Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (38 commits)
ps3flash: Always read chunks of 256 KiB, and cache them
ps3flash: Cache the last accessed FLASH chunk
ps3: Replace direct file operations by callback
ps3: Switch ps3_os_area_[gs]et_rtc_diff to EXPORT_SYMBOL_GPL()
ps3: Correct debug message in dma_ioc0_map_pages()
drivers/ps3: Add missing annotations
ps3fb: Use ps3_system_bus_[gs]et_drvdata() instead of direct access
ps3flash: Use ps3_system_bus_[gs]et_drvdata() instead of direct access
ps3: shorten ps3_system_bus_[gs]et_driver_data to ps3_system_bus_[gs]et_drvdata
ps3: Use dev_[gs]et_drvdata() instead of direct access for system bus devices
block/ps3: remove driver_data direct access of struct device
ps3vram: Make ps3vram_priv.reports a void *
ps3vram: Remove no longer used ps3vram_priv.ddr_base
ps3vram: Replace mutex by spinlock + bio_list
block: Add bio_list_peek()
powerpc: Use generic atomic64_t implementation on 32-bit processors
lib: Provide generic atomic64_t implementation
powerpc: Add compiler memory barrier to mtmsr macro
powerpc/iseries: Mark signal_vsp_instruction() as maybe unused
powerpc/iseries: Fix unused function warning in iSeries DT code
...

+914 -568
+1 -4
arch/powerpc/Kconfig
··· 93 93 bool 94 94 default y 95 95 96 - config GENERIC_CALIBRATE_DELAY 97 - bool 98 - default y 99 - 100 96 config GENERIC_FIND_NEXT_BIT 101 97 bool 102 98 default y ··· 125 129 select USE_GENERIC_SMP_HELPERS if SMP 126 130 select HAVE_OPROFILE 127 131 select HAVE_SYSCALL_WRAPPERS if PPC64 132 + select GENERIC_ATOMIC64 if PPC32 128 133 129 134 config EARLY_PRINTK 130 135 bool
+3
arch/powerpc/boot/install.sh
··· 18 18 # $5 and more - kernel boot files; zImage*, uImage, cuImage.*, etc. 19 19 # 20 20 21 + # Bail with error code if anything goes wrong 22 + set -e 23 + 21 24 # User may have a custom install script 22 25 23 26 if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
+3
arch/powerpc/include/asm/atomic.h
··· 470 470 471 471 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 472 472 473 + #else /* __powerpc64__ */ 474 + #include <asm-generic/atomic64.h> 475 + 473 476 #endif /* __powerpc64__ */ 474 477 475 478 #include <asm-generic/atomic-long.h>
+2 -3
arch/powerpc/include/asm/hw_irq.h
··· 80 80 __asm__ __volatile__("wrteei 0": : :"memory"); 81 81 #else 82 82 unsigned long msr; 83 - __asm__ __volatile__("": : :"memory"); 83 + 84 84 msr = mfmsr(); 85 85 SET_MSR_EE(msr & ~MSR_EE); 86 86 #endif ··· 92 92 __asm__ __volatile__("wrteei 1": : :"memory"); 93 93 #else 94 94 unsigned long msr; 95 - __asm__ __volatile__("": : :"memory"); 95 + 96 96 msr = mfmsr(); 97 97 SET_MSR_EE(msr | MSR_EE); 98 98 #endif ··· 108 108 #else 109 109 SET_MSR_EE(msr & ~MSR_EE); 110 110 #endif 111 - __asm__ __volatile__("": : :"memory"); 112 111 } 113 112 114 113 #define local_save_flags(flags) ((flags) = mfmsr())
+10
arch/powerpc/include/asm/iommu.h
··· 35 35 #define IOMMU_PAGE_MASK (~((1 << IOMMU_PAGE_SHIFT) - 1)) 36 36 #define IOMMU_PAGE_ALIGN(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE) 37 37 38 + /* Cell page table entries */ 39 + #define CBE_IOPTE_PP_W 0x8000000000000000ul /* protection: write */ 40 + #define CBE_IOPTE_PP_R 0x4000000000000000ul /* protection: read */ 41 + #define CBE_IOPTE_M 0x2000000000000000ul /* coherency required */ 42 + #define CBE_IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */ 43 + #define CBE_IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */ 44 + #define CBE_IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */ 45 + #define CBE_IOPTE_H 0x0000000000000800ul /* cache hint */ 46 + #define CBE_IOPTE_IOID_Mask 0x00000000000007fful /* ioid */ 47 + 38 48 /* Boot time flags */ 39 49 extern int iommu_is_off; 40 50 extern int iommu_force_on;
+11 -7
arch/powerpc/include/asm/ps3.h
··· 53 53 extern u64 ps3_os_area_get_rtc_diff(void); 54 54 extern void ps3_os_area_set_rtc_diff(u64 rtc_diff); 55 55 56 + struct ps3_os_area_flash_ops { 57 + ssize_t (*read)(void *buf, size_t count, loff_t pos); 58 + ssize_t (*write)(const void *buf, size_t count, loff_t pos); 59 + }; 60 + 61 + extern void ps3_os_area_flash_register(const struct ps3_os_area_flash_ops *ops); 62 + 56 63 /* dma routines */ 57 64 58 65 enum ps3_dma_page_size { ··· 425 418 * @data: Data to set 426 419 */ 427 420 428 - static inline void ps3_system_bus_set_driver_data( 421 + static inline void ps3_system_bus_set_drvdata( 429 422 struct ps3_system_bus_device *dev, void *data) 430 423 { 431 - dev->core.driver_data = data; 424 + dev_set_drvdata(&dev->core, data); 432 425 } 433 - static inline void *ps3_system_bus_get_driver_data( 426 + static inline void *ps3_system_bus_get_drvdata( 434 427 struct ps3_system_bus_device *dev) 435 428 { 436 - return dev->core.driver_data; 429 + return dev_get_drvdata(&dev->core); 437 430 } 438 431 439 432 /* These two need global scope for get_dma_ops(). */ ··· 526 519 void ps3_sync_irq(int node); 527 520 u32 ps3_get_hw_thread_id(int cpu); 528 521 u64 ps3_get_spe_id(void *arg); 529 - 530 - /* mutex synchronizing GPU accesses and video mode changes */ 531 - extern struct mutex ps3_gpu_mutex; 532 522 533 523 #endif
+86
arch/powerpc/include/asm/ps3gpu.h
··· 1 + /* 2 + * PS3 GPU declarations. 3 + * 4 + * Copyright 2009 Sony Corporation 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; version 2 of the License. 9 + * 10 + * This program is distributed in the hope that it will be useful, 11 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 + * GNU General Public License for more details. 14 + * 15 + * You should have received a copy of the GNU General Public License 16 + * along with this program. 17 + * If not, see <http://www.gnu.org/licenses/>. 18 + */ 19 + 20 + #ifndef _ASM_POWERPC_PS3GPU_H 21 + #define _ASM_POWERPC_PS3GPU_H 22 + 23 + #include <linux/mutex.h> 24 + 25 + #include <asm/lv1call.h> 26 + 27 + 28 + #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101 29 + #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102 30 + 31 + #define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600 32 + #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601 33 + #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602 34 + #define L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE 0x603 35 + 36 + #define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32) 37 + 38 + #define L1GPU_DISPLAY_SYNC_HSYNC 1 39 + #define L1GPU_DISPLAY_SYNC_VSYNC 2 40 + 41 + 42 + /* mutex synchronizing GPU accesses and video mode changes */ 43 + extern struct mutex ps3_gpu_mutex; 44 + 45 + 46 + static inline int lv1_gpu_display_sync(u64 context_handle, u64 head, 47 + u64 ddr_offset) 48 + { 49 + return lv1_gpu_context_attribute(context_handle, 50 + L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC, 51 + head, ddr_offset, 0, 0); 52 + } 53 + 54 + static inline int lv1_gpu_display_flip(u64 context_handle, u64 head, 55 + u64 ddr_offset) 56 + { 57 + return lv1_gpu_context_attribute(context_handle, 58 + L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 59 + head, ddr_offset, 0, 0); 60 + } 61 + 62 + static inline int lv1_gpu_fb_setup(u64 context_handle, u64 xdr_lpar, 63 + u64 xdr_size, u64 ioif_offset) 64 + { 65 + return lv1_gpu_context_attribute(context_handle, 66 + L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP, 67 + xdr_lpar, xdr_size, ioif_offset, 0); 68 + } 69 + 70 + static inline int lv1_gpu_fb_blit(u64 context_handle, u64 ddr_offset, 71 + u64 ioif_offset, u64 sync_width, u64 pitch) 72 + { 73 + return lv1_gpu_context_attribute(context_handle, 74 + L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 75 + ddr_offset, ioif_offset, sync_width, 76 + pitch); 77 + } 78 + 79 + static inline int lv1_gpu_fb_close(u64 context_handle) 80 + { 81 + return lv1_gpu_context_attribute(context_handle, 82 + L1GPU_CONTEXT_ATTRIBUTE_FB_CLOSE, 0, 83 + 0, 0, 0); 84 + } 85 + 86 + #endif /* _ASM_POWERPC_PS3GPU_H */
+2 -2
arch/powerpc/include/asm/reg.h
··· 745 745 asm volatile("mfmsr %0" : "=r" (rval)); rval;}) 746 746 #ifdef CONFIG_PPC64 747 747 #define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \ 748 - : : "r" (v)) 748 + : : "r" (v) : "memory") 749 749 #define mtmsrd(v) __mtmsrd((v), 0) 750 750 #define mtmsr(v) mtmsrd(v) 751 751 #else 752 - #define mtmsr(v) asm volatile("mtmsr %0" : : "r" (v)) 752 + #define mtmsr(v) asm volatile("mtmsr %0" : : "r" (v) : "memory") 753 753 #endif 754 754 755 755 #define mfspr(rn) ({unsigned long rval; \
+1
arch/powerpc/include/asm/systbl.h
··· 325 325 SYSCALL_SPU(perf_counter_open) 326 326 COMPAT_SYS_SPU(preadv) 327 327 COMPAT_SYS_SPU(pwritev) 328 + COMPAT_SYS(rt_tgsigqueueinfo)
+2 -1
arch/powerpc/include/asm/unistd.h
··· 344 344 #define __NR_perf_counter_open 319 345 345 #define __NR_preadv 320 346 346 #define __NR_pwritev 321 347 + #define __NR_rt_tgsigqueueinfo 322 347 348 348 349 #ifdef __KERNEL__ 349 350 350 - #define __NR_syscalls 322 351 + #define __NR_syscalls 323 351 352 352 353 #define __NR__exit __NR_exit 353 354 #define NR_syscalls __NR_syscalls
+2
arch/powerpc/kernel/Makefile
··· 125 125 systbl_chk: $(src)/systbl_chk.sh $(obj)/systbl_chk.i 126 126 $(call cmd,systbl_chk) 127 127 128 + ifeq ($(CONFIG_PPC_OF_BOOT_TRAMPOLINE),y) 128 129 $(obj)/built-in.o: prom_init_check 129 130 130 131 quiet_cmd_prom_init_check = CALL $< ··· 134 133 PHONY += prom_init_check 135 134 prom_init_check: $(src)/prom_init_check.sh $(obj)/prom_init.o 136 135 $(call cmd,prom_init_check) 136 + endif 137 137 138 138 clean-files := vmlinux.lds
+2 -2
arch/powerpc/kernel/setup_64.c
··· 424 424 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 425 425 #endif /* CONFIG_PPC_STD_MMU_64 */ 426 426 if (PHYSICAL_START > 0) 427 - printk("physical_start = 0x%lx\n", 428 - PHYSICAL_START); 427 + printk("physical_start = 0x%llx\n", 428 + (unsigned long long)PHYSICAL_START); 429 429 printk("-----------------------------------------------------\n"); 430 430 431 431 DBG(" <- setup_system()\n");
+10
arch/powerpc/kernel/time.c
··· 52 52 #include <linux/jiffies.h> 53 53 #include <linux/posix-timers.h> 54 54 #include <linux/irq.h> 55 + #include <linux/delay.h> 55 56 56 57 #include <asm/io.h> 57 58 #include <asm/processor.h> ··· 1142 1141 dr->result_high = ((u64)w << 32) + x; 1143 1142 dr->result_low = ((u64)y << 32) + z; 1144 1143 1144 + } 1145 + 1146 + /* We don't need to calibrate delay, we use the CPU timebase for that */ 1147 + void calibrate_delay(void) 1148 + { 1149 + /* Some generic code (such as spinlock debug) use loops_per_jiffy 1150 + * as the number of __delay(1) in a jiffy, so make it so 1151 + */ 1152 + loops_per_jiffy = tb_ticks_per_jiffy; 1145 1153 } 1146 1154 1147 1155 static int __init rtc_init(void)
+2 -2
arch/powerpc/platforms/cell/axon_msi.c
··· 329 329 330 330 static int axon_msi_shutdown(struct of_device *device) 331 331 { 332 - struct axon_msic *msic = device->dev.platform_data; 332 + struct axon_msic *msic = dev_get_drvdata(&device->dev); 333 333 u32 tmp; 334 334 335 335 pr_debug("axon_msi: disabling %s\n", ··· 416 416 msic->read_offset = dcr_read(msic->dcr_host, MSIC_WRITE_OFFSET_REG) 417 417 & MSIC_FIFO_SIZE_MASK; 418 418 419 - device->dev.platform_data = msic; 419 + dev_set_drvdata(&device->dev, msic); 420 420 421 421 ppc_md.setup_msi_irqs = axon_msi_setup_msi_irqs; 422 422 ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs;
+15 -22
arch/powerpc/platforms/cell/iommu.c
··· 100 100 #define IOSTE_PS_1M 0x0000000000000005ul /* - 1MB */ 101 101 #define IOSTE_PS_16M 0x0000000000000007ul /* - 16MB */ 102 102 103 - /* Page table entries */ 104 - #define IOPTE_PP_W 0x8000000000000000ul /* protection: write */ 105 - #define IOPTE_PP_R 0x4000000000000000ul /* protection: read */ 106 - #define IOPTE_M 0x2000000000000000ul /* coherency required */ 107 - #define IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */ 108 - #define IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */ 109 - #define IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */ 110 - #define IOPTE_H 0x0000000000000800ul /* cache hint */ 111 - #define IOPTE_IOID_Mask 0x00000000000007fful /* ioid */ 112 - 113 103 114 104 /* IOMMU sizing */ 115 105 #define IO_SEGMENT_SHIFT 28 ··· 183 193 */ 184 194 const unsigned long prot = 0xc48; 185 195 base_pte = 186 - ((prot << (52 + 4 * direction)) & (IOPTE_PP_W | IOPTE_PP_R)) 187 - | IOPTE_M | IOPTE_SO_RW | (window->ioid & IOPTE_IOID_Mask); 196 + ((prot << (52 + 4 * direction)) & 197 + (CBE_IOPTE_PP_W | CBE_IOPTE_PP_R)) | 198 + CBE_IOPTE_M | CBE_IOPTE_SO_RW | 199 + (window->ioid & CBE_IOPTE_IOID_Mask); 188 200 #else 189 - base_pte = IOPTE_PP_W | IOPTE_PP_R | IOPTE_M | IOPTE_SO_RW | 190 - (window->ioid & IOPTE_IOID_Mask); 201 + base_pte = CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_M | 202 + CBE_IOPTE_SO_RW | (window->ioid & CBE_IOPTE_IOID_Mask); 191 203 #endif 192 204 if (unlikely(dma_get_attr(DMA_ATTR_WEAK_ORDERING, attrs))) 193 - base_pte &= ~IOPTE_SO_RW; 205 + base_pte &= ~CBE_IOPTE_SO_RW; 194 206 195 207 io_pte = (unsigned long *)tbl->it_base + (index - tbl->it_offset); 196 208 197 209 for (i = 0; i < npages; i++, uaddr += IOMMU_PAGE_SIZE) 198 - io_pte[i] = base_pte | (__pa(uaddr) & IOPTE_RPN_Mask); 210 + io_pte[i] = base_pte | (__pa(uaddr) & CBE_IOPTE_RPN_Mask); 199 211 200 212 mb(); 201 213 ··· 223 231 #else 224 232 /* spider bridge does PCI reads after freeing - insert a mapping 225 233 * to a scratch page instead of an invalid entry */ 226 - pte = IOPTE_PP_R | IOPTE_M | IOPTE_SO_RW | __pa(window->iommu->pad_page) 227 - | (window->ioid & IOPTE_IOID_Mask); 234 + pte = CBE_IOPTE_PP_R | CBE_IOPTE_M | CBE_IOPTE_SO_RW | 235 + __pa(window->iommu->pad_page) | 236 + (window->ioid & CBE_IOPTE_IOID_Mask); 228 237 #endif 229 238 230 239 io_pte = (unsigned long *)tbl->it_base + (index - tbl->it_offset); ··· 994 1001 pr_debug("iommu: addr %lx ptab %p segment %lx offset %lx\n", 995 1002 addr, ptab, segment, offset); 996 1003 997 - ptab[offset] = base_pte | (__pa(addr) & IOPTE_RPN_Mask); 1004 + ptab[offset] = base_pte | (__pa(addr) & CBE_IOPTE_RPN_Mask); 998 1005 } 999 1006 1000 1007 static void cell_iommu_setup_fixed_ptab(struct cbe_iommu *iommu, ··· 1009 1016 1010 1017 pr_debug("iommu: mapping 0x%lx pages from 0x%lx\n", fsize, fbase); 1011 1018 1012 - base_pte = IOPTE_PP_W | IOPTE_PP_R | IOPTE_M 1013 - | (cell_iommu_get_ioid(np) & IOPTE_IOID_Mask); 1019 + base_pte = CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_M | 1020 + (cell_iommu_get_ioid(np) & CBE_IOPTE_IOID_Mask); 1014 1021 1015 1022 if (iommu_fixed_is_weak) 1016 1023 pr_info("IOMMU: Using weak ordering for fixed mapping\n"); 1017 1024 else { 1018 1025 pr_info("IOMMU: Using strong ordering for fixed mapping\n"); 1019 - base_pte |= IOPTE_SO_RW; 1026 + base_pte |= CBE_IOPTE_SO_RW; 1020 1027 } 1021 1028 1022 1029 for (uaddr = 0; uaddr < fsize; uaddr += (1 << 24)) {
+2 -1
arch/powerpc/platforms/iseries/dt.c
··· 204 204 dt_prop(dt, name, &data, sizeof(u32)); 205 205 } 206 206 207 - static void __init dt_prop_u64(struct iseries_flat_dt *dt, const char *name, 207 + static void __init __maybe_unused dt_prop_u64(struct iseries_flat_dt *dt, 208 + const char *name, 208 209 u64 data) 209 210 { 210 211 dt_prop(dt, name, &data, sizeof(u64));
+2 -1
arch/powerpc/platforms/iseries/mf.c
··· 267 267 return ev; 268 268 } 269 269 270 - static int signal_vsp_instruction(struct vsp_cmd_data *vsp_cmd) 270 + static int __maybe_unused 271 + signal_vsp_instruction(struct vsp_cmd_data *vsp_cmd) 271 272 { 272 273 struct pending_event *ev = new_pending_event(); 273 274 int rc;
+7 -5
arch/powerpc/platforms/ps3/mm.c
··· 24 24 #include <linux/lmb.h> 25 25 26 26 #include <asm/firmware.h> 27 + #include <asm/iommu.h> 27 28 #include <asm/prom.h> 28 29 #include <asm/udbg.h> 29 30 #include <asm/lv1call.h> ··· 606 605 r->ioid, 607 606 iopte_flag); 608 607 if (result) { 609 - printk(KERN_WARNING "%s:%d: lv1_map_device_dma_region " 610 - "failed: %s\n", __func__, __LINE__, 611 - ps3_result(result)); 608 + pr_warning("%s:%d: lv1_put_iopte failed: %s\n", 609 + __func__, __LINE__, ps3_result(result)); 612 610 goto fail_map; 613 611 } 614 612 DBG("%s: pg=%d bus=%#lx, lpar=%#lx, ioid=%#x\n", __func__, ··· 1001 1001 if (len > r->len) 1002 1002 len = r->len; 1003 1003 result = dma_sb_map_area(r, virt_addr, len, &tmp, 1004 - IOPTE_PP_W | IOPTE_PP_R | IOPTE_SO_RW | IOPTE_M); 1004 + CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_SO_RW | 1005 + CBE_IOPTE_M); 1005 1006 BUG_ON(result); 1006 1007 } 1007 1008 ··· 1015 1014 else 1016 1015 len -= map.rm.size - r->offset; 1017 1016 result = dma_sb_map_area(r, virt_addr, len, &tmp, 1018 - IOPTE_PP_W | IOPTE_PP_R | IOPTE_SO_RW | IOPTE_M); 1017 + CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | CBE_IOPTE_SO_RW | 1018 + CBE_IOPTE_M); 1019 1019 BUG_ON(result); 1020 1020 } 1021 1021
+77 -65
arch/powerpc/platforms/ps3/os-area.c
··· 226 226 .value = &saved_params.av_multi_out, 227 227 }; 228 228 229 + 230 + static DEFINE_MUTEX(os_area_flash_mutex); 231 + 232 + static const struct ps3_os_area_flash_ops *os_area_flash_ops; 233 + 234 + void ps3_os_area_flash_register(const struct ps3_os_area_flash_ops *ops) 235 + { 236 + mutex_lock(&os_area_flash_mutex); 237 + os_area_flash_ops = ops; 238 + mutex_unlock(&os_area_flash_mutex); 239 + } 240 + EXPORT_SYMBOL_GPL(ps3_os_area_flash_register); 241 + 242 + static ssize_t os_area_flash_read(void *buf, size_t count, loff_t pos) 243 + { 244 + ssize_t res = -ENODEV; 245 + 246 + mutex_lock(&os_area_flash_mutex); 247 + if (os_area_flash_ops) 248 + res = os_area_flash_ops->read(buf, count, pos); 249 + mutex_unlock(&os_area_flash_mutex); 250 + 251 + return res; 252 + } 253 + 254 + static ssize_t os_area_flash_write(const void *buf, size_t count, loff_t pos) 255 + { 256 + ssize_t res = -ENODEV; 257 + 258 + mutex_lock(&os_area_flash_mutex); 259 + if (os_area_flash_ops) 260 + res = os_area_flash_ops->write(buf, count, pos); 261 + mutex_unlock(&os_area_flash_mutex); 262 + 263 + return res; 264 + } 265 + 266 + 229 267 /** 230 268 * os_area_set_property - Add or overwrite a saved_params value to the device tree. 231 269 * ··· 390 352 if (memcmp(db->magic_num, OS_AREA_DB_MAGIC_NUM, 391 353 sizeof(db->magic_num))) { 392 354 pr_debug("%s:%d magic_num failed\n", __func__, __LINE__); 393 - return -1; 355 + return -EINVAL; 394 356 } 395 357 396 358 if (db->version != 1) { 397 359 pr_debug("%s:%d version failed\n", __func__, __LINE__); 398 - return -1; 360 + return -EINVAL; 399 361 } 400 362 401 363 return 0; ··· 616 578 * 617 579 */ 618 580 619 - static void __maybe_unused update_flash_db(void) 581 + static int update_flash_db(void) 620 582 { 621 - int result; 622 - int file; 623 - off_t offset; 583 + const unsigned int buf_len = 8 * OS_AREA_SEGMENT_SIZE; 584 + struct os_area_header *header; 624 585 ssize_t count; 625 - static const unsigned int buf_len = 8 * OS_AREA_SEGMENT_SIZE; 626 - const struct os_area_header *header; 586 + int error; 587 + loff_t pos; 627 588 struct os_area_db* db; 628 589 629 590 /* Read in header and db from flash. */ 630 591 631 - file = sys_open("/dev/ps3flash", O_RDWR, 0); 632 - 633 - if (file < 0) { 634 - pr_debug("%s:%d sys_open failed\n", __func__, __LINE__); 635 - goto fail_open; 636 - } 637 - 638 592 header = kmalloc(buf_len, GFP_KERNEL); 639 - 640 593 if (!header) { 641 - pr_debug("%s:%d kmalloc failed\n", __func__, __LINE__); 642 - goto fail_malloc; 594 + pr_debug("%s: kmalloc failed\n", __func__); 595 + return -ENOMEM; 643 596 } 644 597 645 - offset = sys_lseek(file, 0, SEEK_SET); 646 - 647 - if (offset != 0) { 648 - pr_debug("%s:%d sys_lseek failed\n", __func__, __LINE__); 649 - goto fail_header_seek; 598 + count = os_area_flash_read(header, buf_len, 0); 599 + if (count < 0) { 600 + pr_debug("%s: os_area_flash_read failed %zd\n", __func__, 601 + count); 602 + error = count; 603 + goto fail; 650 604 } 651 605 652 - count = sys_read(file, (char __user *)header, buf_len); 653 - 654 - result = count < OS_AREA_SEGMENT_SIZE || verify_header(header) 655 - || count < header->db_area_offset * OS_AREA_SEGMENT_SIZE; 656 - 657 - if (result) { 658 - pr_debug("%s:%d verify_header failed\n", __func__, __LINE__); 606 + pos = header->db_area_offset * OS_AREA_SEGMENT_SIZE; 607 + if (count < OS_AREA_SEGMENT_SIZE || verify_header(header) || 608 + count < pos) { 609 + pr_debug("%s: verify_header failed\n", __func__); 659 610 dump_header(header); 660 - goto fail_header; 611 + error = -EINVAL; 612 + goto fail; 661 613 } 662 614 663 615 /* Now got a good db offset and some maybe good db data. */ 664 616 665 - db = (void*)header + header->db_area_offset * OS_AREA_SEGMENT_SIZE; 617 + db = (void *)header + pos; 666 618 667 - result = db_verify(db); 668 - 669 - if (result) { 670 - printk(KERN_NOTICE "%s:%d: Verify of flash database failed, " 671 - "formatting.\n", __func__, __LINE__); 619 + error = db_verify(db); 620 + if (error) { 621 + pr_notice("%s: Verify of flash database failed, formatting.\n", 622 + __func__); 672 623 dump_db(db); 673 624 os_area_db_init(db); 674 625 } ··· 666 639 667 640 db_set_64(db, &os_area_db_id_rtc_diff, saved_params.rtc_diff); 668 641 669 - offset = sys_lseek(file, header->db_area_offset * OS_AREA_SEGMENT_SIZE, 670 - SEEK_SET); 671 - 672 - if (offset != header->db_area_offset * OS_AREA_SEGMENT_SIZE) { 673 - pr_debug("%s:%d sys_lseek failed\n", __func__, __LINE__); 674 - goto fail_db_seek; 675 - } 676 - 677 - count = sys_write(file, (const char __user *)db, 678 - sizeof(struct os_area_db)); 679 - 642 + count = os_area_flash_write(db, sizeof(struct os_area_db), pos); 680 643 if (count < sizeof(struct os_area_db)) { 681 - pr_debug("%s:%d sys_write failed\n", __func__, __LINE__); 644 + pr_debug("%s: os_area_flash_write failed %zd\n", __func__, 645 + count); 646 + error = count < 0 ? count : -EIO; 682 647 } 683 648 684 - fail_db_seek: 685 - fail_header: 686 - fail_header_seek: 649 + fail: 687 650 kfree(header); 688 - fail_malloc: 689 - sys_close(file); 690 - fail_open: 691 - return; 651 + return error; 692 652 } 693 653 694 654 /** ··· 688 674 static void os_area_queue_work_handler(struct work_struct *work) 689 675 { 690 676 struct device_node *node; 677 + int error; 691 678 692 679 pr_debug(" -> %s:%d\n", __func__, __LINE__); 693 680 694 681 node = of_find_node_by_path("/"); 695 - 696 682 if (node) { 697 683 os_area_set_property(node, &property_rtc_diff); 698 684 of_node_put(node); ··· 700 686 pr_debug("%s:%d of_find_node_by_path failed\n", 701 687 __func__, __LINE__); 702 688 703 - #if defined(CONFIG_PS3_FLASH) || defined(CONFIG_PS3_FLASH_MODULE) 704 - update_flash_db(); 705 - #else 706 - printk(KERN_WARNING "%s:%d: No flash rom driver configured.\n", 707 - __func__, __LINE__); 708 - #endif 689 + error = update_flash_db(); 690 + if (error) 691 + pr_warning("%s: Could not update FLASH ROM\n", __func__); 692 + 709 693 pr_debug(" <- %s:%d\n", __func__, __LINE__); 710 694 } 711 695 ··· 820 808 { 821 809 return saved_params.rtc_diff; 822 810 } 823 - EXPORT_SYMBOL(ps3_os_area_get_rtc_diff); 811 + EXPORT_SYMBOL_GPL(ps3_os_area_get_rtc_diff); 824 812 825 813 /** 826 814 * ps3_os_area_set_rtc_diff - Set the rtc diff value. ··· 836 824 os_area_queue_work(); 837 825 } 838 826 } 839 - EXPORT_SYMBOL(ps3_os_area_set_rtc_diff); 827 + EXPORT_SYMBOL_GPL(ps3_os_area_set_rtc_diff); 840 828 841 829 /** 842 830 * ps3_os_area_get_av_multi_out - Returns the default video mode.
-10
arch/powerpc/platforms/ps3/platform.h
··· 232 232 int ps3_repository_read_vuart_av_port(unsigned int *port); 233 233 int ps3_repository_read_vuart_sysmgr_port(unsigned int *port); 234 234 235 - /* Page table entries */ 236 - #define IOPTE_PP_W 0x8000000000000000ul /* protection: write */ 237 - #define IOPTE_PP_R 0x4000000000000000ul /* protection: read */ 238 - #define IOPTE_M 0x2000000000000000ul /* coherency required */ 239 - #define IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */ 240 - #define IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */ 241 - #define IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */ 242 - #define IOPTE_H 0x0000000000000800ul /* cache hint */ 243 - #define IOPTE_IOID_Mask 0x00000000000007fful /* ioid */ 244 - 245 235 #endif
+1
arch/powerpc/platforms/ps3/setup.c
··· 32 32 #include <asm/udbg.h> 33 33 #include <asm/prom.h> 34 34 #include <asm/lv1call.h> 35 + #include <asm/ps3gpu.h> 35 36 36 37 #include "platform.h" 37 38
+9 -6
arch/powerpc/platforms/ps3/system-bus.c
··· 27 27 #include <asm/udbg.h> 28 28 #include <asm/lv1call.h> 29 29 #include <asm/firmware.h> 30 + #include <asm/iommu.h> 30 31 31 32 #include "platform.h" 32 33 ··· 532 531 } 533 532 534 533 result = ps3_dma_map(dev->d_region, virt_addr, size, dma_handle, 535 - IOPTE_PP_W | IOPTE_PP_R | IOPTE_SO_RW | IOPTE_M); 534 + CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | 535 + CBE_IOPTE_SO_RW | CBE_IOPTE_M); 536 536 537 537 if (result) { 538 538 pr_debug("%s:%d: ps3_dma_map failed (%d)\n", ··· 577 575 578 576 result = ps3_dma_map(dev->d_region, (unsigned long)ptr, size, 579 577 &bus_addr, 580 - IOPTE_PP_R | IOPTE_PP_W | IOPTE_SO_RW | IOPTE_M); 578 + CBE_IOPTE_PP_R | CBE_IOPTE_PP_W | 579 + CBE_IOPTE_SO_RW | CBE_IOPTE_M); 581 580 582 581 if (result) { 583 582 pr_debug("%s:%d: ps3_dma_map failed (%d)\n", ··· 599 596 u64 iopte_flag; 600 597 void *ptr = page_address(page) + offset; 601 598 602 - iopte_flag = IOPTE_M; 599 + iopte_flag = CBE_IOPTE_M; 603 600 switch (direction) { 604 601 case DMA_BIDIRECTIONAL: 605 - iopte_flag |= IOPTE_PP_R | IOPTE_PP_W | IOPTE_SO_RW; 602 + iopte_flag |= CBE_IOPTE_PP_R | CBE_IOPTE_PP_W | CBE_IOPTE_SO_RW; 606 603 break; 607 604 case DMA_TO_DEVICE: 608 - iopte_flag |= IOPTE_PP_R | IOPTE_SO_R; 605 + iopte_flag |= CBE_IOPTE_PP_R | CBE_IOPTE_SO_R; 609 606 break; 610 607 case DMA_FROM_DEVICE: 611 - iopte_flag |= IOPTE_PP_W | IOPTE_SO_RW; 608 + iopte_flag |= CBE_IOPTE_PP_W | CBE_IOPTE_SO_RW; 612 609 break; 613 610 default: 614 611 /* not happned */
+9 -9
drivers/block/ps3disk.c
··· 120 120 static int ps3disk_submit_request_sg(struct ps3_storage_device *dev, 121 121 struct request *req) 122 122 { 123 - struct ps3disk_private *priv = dev->sbd.core.driver_data; 123 + struct ps3disk_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 124 124 int write = rq_data_dir(req), res; 125 125 const char *op = write ? "write" : "read"; 126 126 u64 start_sector, sectors; ··· 168 168 static int ps3disk_submit_flush_request(struct ps3_storage_device *dev, 169 169 struct request *req) 170 170 { 171 - struct ps3disk_private *priv = dev->sbd.core.driver_data; 171 + struct ps3disk_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 172 172 u64 res; 173 173 174 174 dev_dbg(&dev->sbd.core, "%s:%u: flush request\n", __func__, __LINE__); ··· 213 213 static void ps3disk_request(struct request_queue *q) 214 214 { 215 215 struct ps3_storage_device *dev = q->queuedata; 216 - struct ps3disk_private *priv = dev->sbd.core.driver_data; 216 + struct ps3disk_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 217 217 218 218 if (priv->req) { 219 219 dev_dbg(&dev->sbd.core, "%s:%u busy\n", __func__, __LINE__); ··· 245 245 return IRQ_HANDLED; 246 246 } 247 247 248 - priv = dev->sbd.core.driver_data; 248 + priv = ps3_system_bus_get_drvdata(&dev->sbd); 249 249 req = priv->req; 250 250 if (!req) { 251 251 dev_dbg(&dev->sbd.core, ··· 364 364 365 365 static int ps3disk_identify(struct ps3_storage_device *dev) 366 366 { 367 - struct ps3disk_private *priv = dev->sbd.core.driver_data; 367 + struct ps3disk_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 368 368 struct lv1_ata_cmnd_block ata_cmnd; 369 369 u16 *id = dev->bounce_buf; 370 370 u64 res; ··· 445 445 goto fail; 446 446 } 447 447 448 - dev->sbd.core.driver_data = priv; 448 + ps3_system_bus_set_drvdata(_dev, priv); 449 449 spin_lock_init(&priv->lock); 450 450 451 451 dev->bounce_size = BOUNCE_SIZE; ··· 523 523 kfree(dev->bounce_buf); 524 524 fail_free_priv: 525 525 kfree(priv); 526 - dev->sbd.core.driver_data = NULL; 526 + ps3_system_bus_set_drvdata(_dev, NULL); 527 527 fail: 528 528 mutex_lock(&ps3disk_mask_mutex); 529 529 __clear_bit(devidx, &ps3disk_mask); ··· 534 534 static int ps3disk_remove(struct ps3_system_bus_device *_dev) 535 535 { 536 536 struct ps3_storage_device *dev = to_ps3_storage_device(&_dev->core); 537 - struct ps3disk_private *priv = dev->sbd.core.driver_data; 537 + struct ps3disk_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 538 538 539 539 mutex_lock(&ps3disk_mask_mutex); 540 540 __clear_bit(MINOR(disk_devt(priv->gendisk)) / PS3DISK_MINORS, ··· 548 548 ps3stor_teardown(dev); 549 549 kfree(dev->bounce_buf); 550 550 kfree(priv); 551 - dev->sbd.core.driver_data = NULL; 551 + ps3_system_bus_set_drvdata(_dev, NULL); 552 552 return 0; 553 553 } 554 554
+88 -80
drivers/block/ps3vram.c
··· 14 14 #include <linux/seq_file.h> 15 15 16 16 #include <asm/firmware.h> 17 + #include <asm/iommu.h> 17 18 #include <asm/lv1call.h> 18 19 #include <asm/ps3.h> 20 + #include <asm/ps3gpu.h> 19 21 20 22 21 23 #define DEVICE_NAME "ps3vram" ··· 47 45 #define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c 48 46 #define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104 49 47 50 - #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601 51 - 52 48 #define CACHE_PAGE_PRESENT 1 53 49 #define CACHE_PAGE_DIRTY 2 54 50 ··· 72 72 u64 memory_handle; 73 73 u64 context_handle; 74 74 u32 *ctrl; 75 - u32 *reports; 76 - u8 __iomem *ddr_base; 75 + void *reports; 77 76 u8 *xdr_buf; 78 77 79 78 u32 *fifo_base; ··· 80 81 81 82 struct ps3vram_cache cache; 82 83 83 - /* Used to serialize cache/DMA operations */ 84 - struct mutex lock; 84 + spinlock_t lock; /* protecting list of bios */ 85 + struct bio_list list; 85 86 }; 86 87 87 88 ··· 102 103 module_param(size, charp, 0); 103 104 MODULE_PARM_DESC(size, "memory size"); 104 105 105 - static u32 *ps3vram_get_notifier(u32 *reports, int notifier) 106 + static u32 *ps3vram_get_notifier(void *reports, int notifier) 106 107 { 107 - return (void *)reports + DMA_NOTIFIER_OFFSET_BASE + 108 + return reports + DMA_NOTIFIER_OFFSET_BASE + 108 109 DMA_NOTIFIER_SIZE * notifier; 109 110 } 110 111 111 112 static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev) 112 113 { 113 - struct ps3vram_priv *priv = dev->core.driver_data; 114 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 114 115 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 115 116 int i; 116 117 ··· 121 122 static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev, 122 123 unsigned int timeout_ms) 123 124 { 124 - struct ps3vram_priv *priv = dev->core.driver_data; 125 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 125 126 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER); 126 127 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); 127 128 ··· 136 137 137 138 static void ps3vram_init_ring(struct ps3_system_bus_device *dev) 138 139 { 139 - struct ps3vram_priv *priv = dev->core.driver_data; 140 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 140 141 141 142 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET; 142 143 priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET; ··· 145 146 static int ps3vram_wait_ring(struct ps3_system_bus_device *dev, 146 147 unsigned int timeout_ms) 147 148 { 148 - struct ps3vram_priv *priv = dev->core.driver_data; 149 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 149 150 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms); 150 151 151 152 do { ··· 174 175 175 176 static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev) 176 177 { 177 - struct ps3vram_priv *priv = dev->core.driver_data; 178 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 178 179 int status; 179 180 180 181 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET)); ··· 182 183 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET; 183 184 184 185 /* asking the HV for a blit will kick the FIFO */ 185 - status = lv1_gpu_context_attribute(priv->context_handle, 186 - L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0, 187 - 0, 0, 0); 186 + status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0); 188 187 if (status) 189 - dev_err(&dev->core, 190 - "%s: lv1_gpu_context_attribute failed %d\n", __func__, 191 - status); 188 + dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n", 189 + __func__, status); 192 190 193 191 priv->fifo_ptr = priv->fifo_base; 194 192 } 195 193 196 194 static void ps3vram_fire_ring(struct ps3_system_bus_device *dev) 197 195 { 198 - struct ps3vram_priv *priv = dev->core.driver_data; 196 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 199 197 int status; 200 198 201 199 mutex_lock(&ps3_gpu_mutex); ··· 201 205 (priv->fifo_ptr - priv->fifo_base) * sizeof(u32); 202 206 203 207 /* asking the HV for a blit will kick the FIFO */ 204 - status = lv1_gpu_context_attribute(priv->context_handle, 205 - L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 0, 206 - 0, 0, 0); 208 + status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0); 207 209 if (status) 208 - dev_err(&dev->core, 209 - "%s: lv1_gpu_context_attribute failed %d\n", __func__, 210 - status); 210 + dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n", 211 + __func__, status); 211 212 212 213 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) > 213 214 FIFO_SIZE - 1024) { ··· 218 225 219 226 static void ps3vram_bind(struct ps3_system_bus_device *dev) 220 227 { 221 - struct ps3vram_priv *priv = dev->core.driver_data; 228 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 222 229 223 230 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1); 224 231 ps3vram_out_ring(priv, 0x31337303); ··· 241 248 unsigned int src_offset, unsigned int dst_offset, 242 249 int len, int count) 243 250 { 244 - struct ps3vram_priv *priv = dev->core.driver_data; 251 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 245 252 246 253 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 247 254 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); ··· 273 280 unsigned int src_offset, unsigned int dst_offset, 274 281 int len, int count) 275 282 { 276 - struct ps3vram_priv *priv = dev->core.driver_data; 283 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 277 284 278 285 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 279 286 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8); ··· 303 310 304 311 static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry) 305 312 { 306 - struct ps3vram_priv *priv = dev->core.driver_data; 313 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 307 314 struct ps3vram_cache *cache = &priv->cache; 308 315 309 316 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY)) ··· 325 332 static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry, 326 333 unsigned int address) 327 334 { 328 - struct ps3vram_priv *priv = dev->core.driver_data; 335 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 329 336 struct ps3vram_cache *cache = &priv->cache; 330 337 331 338 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address); ··· 345 352 346 353 static void ps3vram_cache_flush(struct ps3_system_bus_device *dev) 347 354 { 348 - struct ps3vram_priv *priv = dev->core.driver_data; 355 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 349 356 struct ps3vram_cache *cache = &priv->cache; 350 357 int i; 351 358 ··· 359 366 static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev, 360 367 loff_t address) 361 368 { 362 - struct ps3vram_priv *priv = dev->core.driver_data; 369 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 363 370 struct ps3vram_cache *cache = &priv->cache; 364 371 unsigned int base; 365 372 unsigned int offset; ··· 393 400 394 401 static int ps3vram_cache_init(struct ps3_system_bus_device *dev) 395 402 { 396 - struct ps3vram_priv *priv = dev->core.driver_data; 403 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 397 404 398 405 priv->cache.page_count = CACHE_PAGE_COUNT; 399 406 priv->cache.page_size = CACHE_PAGE_SIZE; ··· 412 419 413 420 static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev) 414 421 { 415 - struct ps3vram_priv *priv = dev->core.driver_data; 422 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 416 423 417 424 ps3vram_cache_flush(dev); 418 425 kfree(priv->cache.tags); ··· 421 428 static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from, 422 429 size_t len, size_t *retlen, u_char *buf) 423 430 { 424 - struct ps3vram_priv *priv = dev->core.driver_data; 431 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 425 432 unsigned int cached, count; 426 433 427 434 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__, ··· 442 449 offset = (unsigned int) (from & (priv->cache.page_size - 1)); 443 450 avail = priv->cache.page_size - offset; 444 451 445 - mutex_lock(&priv->lock); 446 - 447 452 entry = ps3vram_cache_match(dev, from); 448 453 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 449 454 ··· 452 461 if (avail > count) 453 462 avail = count; 454 463 memcpy(buf, priv->xdr_buf + cached, avail); 455 - 456 - mutex_unlock(&priv->lock); 457 464 458 465 buf += avail; 459 466 count -= avail; ··· 465 476 static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to, 466 477 size_t len, size_t *retlen, const u_char *buf) 467 478 { 468 - struct ps3vram_priv *priv = dev->core.driver_data; 479 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 469 480 unsigned int cached, count; 470 481 471 482 if (to >= priv->size) ··· 483 494 offset = (unsigned int) (to & (priv->cache.page_size - 1)); 484 495 avail = priv->cache.page_size - offset; 485 496 486 - mutex_lock(&priv->lock); 487 - 488 497 entry = ps3vram_cache_match(dev, to); 489 498 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset; 490 499 ··· 495 508 memcpy(priv->xdr_buf + cached, buf, avail); 496 509 497 510 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY; 498 - 499 - mutex_unlock(&priv->lock); 500 511 501 512 buf += avail; 502 513 count -= avail; ··· 528 543 529 544 static void __devinit ps3vram_proc_init(struct ps3_system_bus_device *dev) 530 545 { 531 - struct ps3vram_priv *priv = dev->core.driver_data; 546 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 532 547 struct proc_dir_entry *pde; 533 548 534 - pde = proc_create(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops); 535 - if (!pde) { 549 + pde = proc_create_data(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops, 550 + priv); 551 + if (!pde) 536 552 dev_warn(&dev->core, "failed to create /proc entry\n"); 537 - return; 538 - } 539 - pde->data = priv; 540 553 } 541 554 542 - static int ps3vram_make_request(struct request_queue *q, struct bio *bio) 555 + static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev, 556 + struct bio *bio) 543 557 { 544 - struct ps3_system_bus_device *dev = q->queuedata; 558 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 545 559 int write = bio_data_dir(bio) == WRITE; 546 560 const char *op = write ? "write" : "read"; 547 561 loff_t offset = bio->bi_sector << 9; 548 562 int error = 0; 549 563 struct bio_vec *bvec; 550 564 unsigned int i; 551 - 552 - dev_dbg(&dev->core, "%s\n", __func__); 565 + struct bio *next; 553 566 554 567 bio_for_each_segment(bvec, bio, i) { 555 568 /* PS3 is ppc64, so we don't handle highmem */ ··· 568 585 569 586 if (retlen != len) { 570 587 dev_err(&dev->core, "Short %s\n", op); 588 + error = -EIO; 571 589 goto out; 572 590 } 573 591 ··· 578 594 dev_dbg(&dev->core, "%s completed\n", op); 579 595 580 596 out: 597 + spin_lock_irq(&priv->lock); 598 + bio_list_pop(&priv->list); 599 + next = bio_list_peek(&priv->list); 600 + spin_unlock_irq(&priv->lock); 601 + 581 602 bio_endio(bio, error); 603 + return next; 604 + } 605 + 606 + static int ps3vram_make_request(struct request_queue *q, struct bio *bio) 607 + { 608 + struct ps3_system_bus_device *dev = q->queuedata; 609 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 610 + int busy; 611 + 612 + dev_dbg(&dev->core, "%s\n", __func__); 613 + 614 + spin_lock_irq(&priv->lock); 615 + busy = !bio_list_empty(&priv->list); 616 + bio_list_add(&priv->list, bio); 617 + spin_unlock_irq(&priv->lock); 618 + 619 + if (busy) 620 + return 0; 621 + 622 + do { 623 + bio = ps3vram_do_bio(dev, bio); 624 + } while (bio); 625 + 582 626 return 0; 583 627 } 584 628 ··· 616 604 int error, status; 617 605 struct request_queue *queue; 618 606 struct gendisk *gendisk; 619 - u64 ddr_lpar, ctrl_lpar, info_lpar, reports_lpar, ddr_size, 620 - reports_size; 607 + u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar, 608 + reports_size, xdr_lpar; 621 609 char *rest; 622 610 623 611 priv = kzalloc(sizeof(*priv), GFP_KERNEL); ··· 626 614 goto fail; 627 615 } 628 616 629 - mutex_init(&priv->lock); 630 - dev->core.driver_data = priv; 631 - 632 - priv = dev->core.driver_data; 617 + spin_lock_init(&priv->lock); 618 + bio_list_init(&priv->list); 619 + ps3_system_bus_set_drvdata(dev, priv); 633 620 634 621 /* Allocate XDR buffer (1MiB aligned) */ 635 622 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL, ··· 647 636 if (ps3_open_hv_device(dev)) { 648 637 dev_err(&dev->core, "ps3_open_hv_device failed\n"); 649 638 error = -EAGAIN; 650 - goto out_close_gpu; 639 + goto out_free_xdr_buf; 651 640 } 652 641 653 642 /* Request memory */ ··· 671 660 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n", 672 661 status); 673 662 error = -ENOMEM; 674 - goto out_free_xdr_buf; 663 + goto out_close_gpu; 675 664 } 676 665 677 666 /* Request context */ ··· 687 676 } 688 677 689 678 /* Map XDR buffer to RSX */ 679 + xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)); 690 680 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, 691 - ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)), 692 - XDR_BUF_SIZE, 0); 681 + xdr_lpar, XDR_BUF_SIZE, 682 + CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | 683 + CBE_IOPTE_M); 693 684 if (status) { 694 685 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n", 695 686 status); 696 - error = -ENOMEM; 697 - goto out_free_context; 698 - } 699 - 700 - priv->ddr_base = ioremap_flags(ddr_lpar, ddr_size, _PAGE_NO_CACHE); 701 - 702 - if (!priv->ddr_base) { 703 - dev_err(&dev->core, "ioremap DDR failed\n"); 704 687 error = -ENOMEM; 705 688 goto out_free_context; 706 689 } ··· 703 698 if (!priv->ctrl) { 704 699 dev_err(&dev->core, "ioremap CTRL failed\n"); 705 700 error = -ENOMEM; 706 - goto out_unmap_vram; 701 + goto out_unmap_context; 707 702 } 708 703 709 704 priv->reports = ioremap(reports_lpar, reports_size); ··· 780 775 iounmap(priv->reports); 781 776 out_unmap_ctrl: 782 777 iounmap(priv->ctrl); 783 - out_unmap_vram: 784 - iounmap(priv->ddr_base); 778 + out_unmap_context: 779 + lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar, 780 + XDR_BUF_SIZE, CBE_IOPTE_M); 785 781 out_free_context: 786 782 lv1_gpu_context_free(priv->context_handle); 787 783 out_free_memory: ··· 793 787 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 794 788 fail_free_priv: 795 789 kfree(priv); 796 - dev->core.driver_data = NULL; 790 + ps3_system_bus_set_drvdata(dev, NULL); 797 791 fail: 798 792 return error; 799 793 } 800 794 801 795 static int ps3vram_remove(struct ps3_system_bus_device *dev) 802 796 { 803 - struct ps3vram_priv *priv = dev->core.driver_data; 797 + struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev); 804 798 805 799 del_gendisk(priv->gendisk); 806 800 put_disk(priv->gendisk); ··· 809 803 ps3vram_cache_cleanup(dev); 810 804 iounmap(priv->reports); 811 805 iounmap(priv->ctrl); 812 - iounmap(priv->ddr_base); 806 + lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, 807 + ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)), 808 + XDR_BUF_SIZE, CBE_IOPTE_M); 813 809 lv1_gpu_context_free(priv->context_handle); 814 810 lv1_gpu_memory_free(priv->memory_handle); 815 811 ps3_close_hv_device(dev); 816 812 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE)); 817 813 kfree(priv); 818 - dev->core.driver_data = NULL; 814 + ps3_system_bus_set_drvdata(dev, NULL); 819 815 return 0; 820 816 } 821 817
+205 -173
drivers/char/ps3flash.c
··· 33 33 34 34 struct ps3flash_private { 35 35 struct mutex mutex; /* Bounce buffer mutex */ 36 + u64 chunk_sectors; 37 + int tag; /* Start sector of buffer, -1 if invalid */ 38 + bool dirty; 36 39 }; 37 40 38 41 static struct ps3_storage_device *ps3flash_dev; 39 42 40 - static ssize_t ps3flash_read_write_sectors(struct ps3_storage_device *dev, 41 - u64 lpar, u64 start_sector, 42 - u64 sectors, int write) 43 + static int ps3flash_read_write_sectors(struct ps3_storage_device *dev, 44 + u64 start_sector, int write) 43 45 { 44 - u64 res = ps3stor_read_write_sectors(dev, lpar, start_sector, sectors, 46 + struct ps3flash_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 47 + u64 res = ps3stor_read_write_sectors(dev, dev->bounce_lpar, 48 + start_sector, priv->chunk_sectors, 45 49 write); 46 50 if (res) { 47 51 dev_err(&dev->sbd.core, "%s:%u: %s failed 0x%llx\n", __func__, 48 52 __LINE__, write ? "write" : "read", res); 49 53 return -EIO; 50 54 } 51 - return sectors; 55 + return 0; 52 56 } 53 57 54 - static ssize_t ps3flash_read_sectors(struct ps3_storage_device *dev, 55 - u64 start_sector, u64 sectors, 56 - unsigned int sector_offset) 58 + static int ps3flash_writeback(struct ps3_storage_device *dev) 57 59 { 58 - u64 max_sectors, lpar; 60 + struct ps3flash_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 61 + int res; 59 62 60 - max_sectors = dev->bounce_size / dev->blk_size; 61 - if (sectors > max_sectors) { 62 - dev_dbg(&dev->sbd.core, "%s:%u Limiting sectors to %llu\n", 63 - __func__, __LINE__, max_sectors); 64 - sectors = max_sectors; 65 - } 63 + if (!priv->dirty || priv->tag < 0) 64 + return 0; 66 65 67 - lpar = dev->bounce_lpar + sector_offset * dev->blk_size; 68 - return ps3flash_read_write_sectors(dev, lpar, start_sector, sectors, 69 - 0); 66 + res = ps3flash_read_write_sectors(dev, priv->tag, 1); 67 + if (res) 68 + return res; 69 + 70 + priv->dirty = false; 71 + return 0; 70 72 } 71 73 72 - static ssize_t ps3flash_write_chunk(struct ps3_storage_device *dev, 73 - u64 start_sector) 74 + static int ps3flash_fetch(struct ps3_storage_device *dev, u64 start_sector) 74 75 { 75 - u64 sectors = dev->bounce_size / dev->blk_size; 76 - return ps3flash_read_write_sectors(dev, dev->bounce_lpar, start_sector, 77 - sectors, 1); 76 + struct ps3flash_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 77 + int res; 78 + 79 + if (start_sector == priv->tag) 80 + return 0; 81 + 82 + res = ps3flash_writeback(dev); 83 + if (res) 84 + return res; 85 + 86 + priv->tag = -1; 87 + 88 + res = ps3flash_read_write_sectors(dev, start_sector, 0); 89 + if (res) 90 + return res; 91 + 92 + priv->tag = start_sector; 93 + return 0; 78 94 } 79 95 80 96 static loff_t ps3flash_llseek(struct file *file, loff_t offset, int origin) ··· 120 104 return res; 121 105 } 122 106 123 - static ssize_t ps3flash_read(struct file *file, char __user *buf, size_t count, 124 - loff_t *pos) 107 + static ssize_t ps3flash_read(char __user *userbuf, void *kernelbuf, 108 + size_t count, loff_t *pos) 125 109 { 126 110 struct ps3_storage_device *dev = ps3flash_dev; 127 - struct ps3flash_private *priv = dev->sbd.core.driver_data; 128 - u64 size, start_sector, end_sector, offset; 129 - ssize_t sectors_read; 111 + struct ps3flash_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 112 + u64 size, sector, offset; 113 + int res; 130 114 size_t remaining, n; 115 + const void *src; 131 116 132 117 dev_dbg(&dev->sbd.core, 133 - "%s:%u: Reading %zu bytes at position %lld to user 0x%p\n", 134 - __func__, __LINE__, count, *pos, buf); 118 + "%s:%u: Reading %zu bytes at position %lld to U0x%p/K0x%p\n", 119 + __func__, __LINE__, count, *pos, userbuf, kernelbuf); 135 120 136 121 size = dev->regions[dev->region_idx].size*dev->blk_size; 137 122 if (*pos >= size || !count) ··· 145 128 count = size - *pos; 146 129 } 147 130 148 - start_sector = *pos / dev->blk_size; 149 - offset = *pos % dev->blk_size; 150 - end_sector = DIV_ROUND_UP(*pos + count, dev->blk_size); 151 - 152 - remaining = count; 153 - do { 154 - mutex_lock(&priv->mutex); 155 - 156 - sectors_read = ps3flash_read_sectors(dev, start_sector, 157 - end_sector-start_sector, 158 - 0); 159 - if (sectors_read < 0) { 160 - mutex_unlock(&priv->mutex); 161 - goto fail; 162 - } 163 - 164 - n = min_t(u64, remaining, sectors_read*dev->blk_size-offset); 165 - dev_dbg(&dev->sbd.core, 166 - "%s:%u: copy %lu bytes from 0x%p to user 0x%p\n", 167 - __func__, __LINE__, n, dev->bounce_buf+offset, buf); 168 - if (copy_to_user(buf, dev->bounce_buf+offset, n)) { 169 - mutex_unlock(&priv->mutex); 170 - sectors_read = -EFAULT; 171 - goto fail; 172 - } 173 - 174 - mutex_unlock(&priv->mutex); 175 - 176 - *pos += n; 177 - buf += n; 178 - remaining -= n; 179 - start_sector += sectors_read; 180 - offset = 0; 181 - } while (remaining > 0); 182 - 183 - return count; 184 - 185 - fail: 186 - return sectors_read; 187 - } 188 - 189 - static ssize_t ps3flash_write(struct file *file, const char __user *buf, 190 - size_t count, loff_t *pos) 191 - { 192 - struct ps3_storage_device *dev = ps3flash_dev; 193 - struct ps3flash_private *priv = dev->sbd.core.driver_data; 194 - u64 size, chunk_sectors, start_write_sector, end_write_sector, 195 - end_read_sector, start_read_sector, head, tail, offset; 196 - ssize_t res; 197 - size_t remaining, n; 198 - unsigned int sec_off; 199 - 200 - dev_dbg(&dev->sbd.core, 201 - "%s:%u: Writing %zu bytes at position %lld from user 0x%p\n", 202 - __func__, __LINE__, count, *pos, buf); 203 - 204 - size = dev->regions[dev->region_idx].size*dev->blk_size; 205 - if (*pos >= size || !count) 206 - return 0; 207 - 208 - if (*pos + count > size) { 209 - dev_dbg(&dev->sbd.core, 210 - "%s:%u Truncating count from %zu to %llu\n", __func__, 211 - __LINE__, count, size - *pos); 212 - count = size - *pos; 213 - } 214 - 215 - chunk_sectors = dev->bounce_size / dev->blk_size; 216 - 217 - start_write_sector = *pos / dev->bounce_size * chunk_sectors; 131 + sector = *pos / dev->bounce_size * priv->chunk_sectors; 218 132 offset = *pos % dev->bounce_size; 219 - end_write_sector = DIV_ROUND_UP(*pos + count, dev->bounce_size) * 220 - chunk_sectors; 221 - 222 - end_read_sector = DIV_ROUND_UP(*pos, dev->blk_size); 223 - start_read_sector = (*pos + count) / dev->blk_size; 224 - 225 - /* 226 - * As we have to write in 256 KiB chunks, while we can read in blk_size 227 - * (usually 512 bytes) chunks, we perform the following steps: 228 - * 1. Read from start_write_sector to end_read_sector ("head") 229 - * 2. Read from start_read_sector to end_write_sector ("tail") 230 - * 3. Copy data to buffer 231 - * 4. Write from start_write_sector to end_write_sector 232 - * All of this is complicated by using only one 256 KiB bounce buffer. 233 - */ 234 - 235 - head = end_read_sector - start_write_sector; 236 - tail = end_write_sector - start_read_sector; 237 133 238 134 remaining = count; 239 135 do { 136 + n = min_t(u64, remaining, dev->bounce_size - offset); 137 + src = dev->bounce_buf + offset; 138 + 240 139 mutex_lock(&priv->mutex); 241 140 242 - if (end_read_sector >= start_read_sector) { 243 - /* Merge head and tail */ 244 - dev_dbg(&dev->sbd.core, 245 - "Merged head and tail: %llu sectors at %llu\n", 246 - chunk_sectors, start_write_sector); 247 - res = ps3flash_read_sectors(dev, start_write_sector, 248 - chunk_sectors, 0); 249 - if (res < 0) 250 - goto fail; 251 - } else { 252 - if (head) { 253 - /* Read head */ 254 - dev_dbg(&dev->sbd.core, 255 - "head: %llu sectors at %llu\n", head, 256 - start_write_sector); 257 - res = ps3flash_read_sectors(dev, 258 - start_write_sector, 259 - head, 0); 260 - if (res < 0) 261 - goto fail; 262 - } 263 - if (start_read_sector < 264 - start_write_sector+chunk_sectors) { 265 - /* Read tail */ 266 - dev_dbg(&dev->sbd.core, 267 - "tail: %llu sectors at %llu\n", tail, 268 - start_read_sector); 269 - sec_off = start_read_sector-start_write_sector; 270 - res = ps3flash_read_sectors(dev, 271 - start_read_sector, 272 - tail, sec_off); 273 - if (res < 0) 274 - goto fail; 275 - } 276 - } 141 + res = ps3flash_fetch(dev, sector); 142 + if (res) 143 + goto fail; 277 144 278 - n = min_t(u64, remaining, dev->bounce_size-offset); 279 145 dev_dbg(&dev->sbd.core, 280 - "%s:%u: copy %lu bytes from user 0x%p to 0x%p\n", 281 - __func__, __LINE__, n, buf, dev->bounce_buf+offset); 282 - if (copy_from_user(dev->bounce_buf+offset, buf, n)) { 283 - res = -EFAULT; 284 - goto fail; 146 + "%s:%u: copy %lu bytes from 0x%p to U0x%p/K0x%p\n", 147 + __func__, __LINE__, n, src, userbuf, kernelbuf); 148 + if (userbuf) { 149 + if (copy_to_user(userbuf, src, n)) { 150 + res = -EFAULT; 151 + goto fail; 152 + } 153 + userbuf += n; 285 154 } 286 - 287 - res = ps3flash_write_chunk(dev, start_write_sector); 288 - if (res < 0) 289 - goto fail; 155 + if (kernelbuf) { 156 + memcpy(kernelbuf, src, n); 157 + kernelbuf += n; 158 + } 290 159 291 160 mutex_unlock(&priv->mutex); 292 161 293 162 *pos += n; 294 - buf += n; 295 163 remaining -= n; 296 - start_write_sector += chunk_sectors; 297 - head = 0; 164 + sector += priv->chunk_sectors; 298 165 offset = 0; 299 166 } while (remaining > 0); 300 167 ··· 189 288 return res; 190 289 } 191 290 291 + static ssize_t ps3flash_write(const char __user *userbuf, 292 + const void *kernelbuf, size_t count, loff_t *pos) 293 + { 294 + struct ps3_storage_device *dev = ps3flash_dev; 295 + struct ps3flash_private *priv = ps3_system_bus_get_drvdata(&dev->sbd); 296 + u64 size, sector, offset; 297 + int res = 0; 298 + size_t remaining, n; 299 + void *dst; 300 + 301 + dev_dbg(&dev->sbd.core, 302 + "%s:%u: Writing %zu bytes at position %lld from U0x%p/K0x%p\n", 303 + __func__, __LINE__, count, *pos, userbuf, kernelbuf); 304 + 305 + size = dev->regions[dev->region_idx].size*dev->blk_size; 306 + if (*pos >= size || !count) 307 + return 0; 308 + 309 + if (*pos + count > size) { 310 + dev_dbg(&dev->sbd.core, 311 + "%s:%u Truncating count from %zu to %llu\n", __func__, 312 + __LINE__, count, size - *pos); 313 + count = size - *pos; 314 + } 315 + 316 + sector = *pos / dev->bounce_size * priv->chunk_sectors; 317 + offset = *pos % dev->bounce_size; 318 + 319 + remaining = count; 320 + do { 321 + n = min_t(u64, remaining, dev->bounce_size - offset); 322 + dst = dev->bounce_buf + offset; 323 + 324 + mutex_lock(&priv->mutex); 325 + 326 + if (n != dev->bounce_size) 327 + res = ps3flash_fetch(dev, sector); 328 + else if (sector != priv->tag) 329 + res = ps3flash_writeback(dev); 330 + if (res) 331 + goto fail; 332 + 333 + dev_dbg(&dev->sbd.core, 334 + "%s:%u: copy %lu bytes from U0x%p/K0x%p to 0x%p\n", 335 + __func__, __LINE__, n, userbuf, kernelbuf, dst); 336 + if (userbuf) { 337 + if (copy_from_user(dst, userbuf, n)) { 338 + res = -EFAULT; 339 + goto fail; 340 + } 341 + userbuf += n; 342 + } 343 + if (kernelbuf) { 344 + memcpy(dst, kernelbuf, n); 345 + kernelbuf += n; 346 + } 347 + 348 + priv->tag = sector; 349 + priv->dirty = true; 350 + 351 + mutex_unlock(&priv->mutex); 352 + 353 + *pos += n; 354 + remaining -= n; 355 + sector += priv->chunk_sectors; 356 + offset = 0; 357 + } while (remaining > 0); 358 + 359 + return count; 360 + 361 + fail: 362 + mutex_unlock(&priv->mutex); 363 + return res; 364 + } 365 + 366 + static ssize_t ps3flash_user_read(struct file *file, char __user *buf, 367 + size_t count, loff_t *pos) 368 + { 369 + return ps3flash_read(buf, NULL, count, pos); 370 + } 371 + 372 + static ssize_t ps3flash_user_write(struct file *file, const char __user *buf, 373 + size_t count, loff_t *pos) 374 + { 375 + return ps3flash_write(buf, NULL, count, pos); 376 + } 377 + 378 + static ssize_t ps3flash_kernel_read(void *buf, size_t count, loff_t pos) 379 + { 380 + return ps3flash_read(NULL, buf, count, &pos); 381 + } 382 + 383 + static ssize_t ps3flash_kernel_write(const void *buf, size_t count, 384 + loff_t pos) 385 + { 386 + ssize_t res; 387 + int wb; 388 + 389 + res = ps3flash_write(NULL, buf, count, &pos); 390 + if (res < 0) 391 + return res; 392 + 393 + /* Make kernel writes synchronous */ 394 + wb = ps3flash_writeback(ps3flash_dev); 395 + if (wb) 396 + return wb; 397 + 398 + return res; 399 + } 400 + 401 + static int ps3flash_flush(struct file *file, fl_owner_t id) 402 + { 403 + return ps3flash_writeback(ps3flash_dev); 404 + } 405 + 406 + static int ps3flash_fsync(struct file *file, struct dentry *dentry, 407 + int datasync) 408 + { 409 + return ps3flash_writeback(ps3flash_dev); 410 + } 192 411 193 412 static irqreturn_t ps3flash_interrupt(int irq, void *data) 194 413 { ··· 333 312 return IRQ_HANDLED; 334 313 } 335 314 336 - 337 315 static const struct file_operations ps3flash_fops = { 338 316 .owner = THIS_MODULE, 339 317 .llseek = ps3flash_llseek, 340 - .read = ps3flash_read, 341 - .write = ps3flash_write, 318 + .read = ps3flash_user_read, 319 + .write = ps3flash_user_write, 320 + .flush = ps3flash_flush, 321 + .fsync = ps3flash_fsync, 322 + }; 323 + 324 + static const struct ps3_os_area_flash_ops ps3flash_kernel_ops = { 325 + .read = ps3flash_kernel_read, 326 + .write = ps3flash_kernel_write, 342 327 }; 343 328 344 329 static struct miscdevice ps3flash_misc = { ··· 393 366 goto fail; 394 367 } 395 368 396 - dev->sbd.core.driver_data = priv; 369 + ps3_system_bus_set_drvdata(&dev->sbd, priv); 397 370 mutex_init(&priv->mutex); 371 + priv->tag = -1; 398 372 399 373 dev->bounce_size = ps3flash_bounce_buffer.size; 400 374 dev->bounce_buf = ps3flash_bounce_buffer.address; 375 + priv->chunk_sectors = dev->bounce_size / dev->blk_size; 401 376 402 377 error = ps3stor_setup(dev, ps3flash_interrupt); 403 378 if (error) ··· 415 386 416 387 dev_info(&dev->sbd.core, "%s:%u: registered misc device %d\n", 417 388 __func__, __LINE__, ps3flash_misc.minor); 389 + 390 + ps3_os_area_flash_register(&ps3flash_kernel_ops); 418 391 return 0; 419 392 420 393 fail_teardown: 421 394 ps3stor_teardown(dev); 422 395 fail_free_priv: 423 396 kfree(priv); 424 - dev->sbd.core.driver_data = NULL; 397 + ps3_system_bus_set_drvdata(&dev->sbd, NULL); 425 398 fail: 426 399 ps3flash_dev = NULL; 427 400 return error; ··· 433 402 { 434 403 struct ps3_storage_device *dev = to_ps3_storage_device(&_dev->core); 435 404 405 + ps3_os_area_flash_register(NULL); 436 406 misc_deregister(&ps3flash_misc); 437 407 ps3stor_teardown(dev); 438 - kfree(dev->sbd.core.driver_data); 439 - dev->sbd.core.driver_data = NULL; 408 + kfree(ps3_system_bus_get_drvdata(&dev->sbd)); 409 + ps3_system_bus_set_drvdata(&dev->sbd, NULL); 440 410 ps3flash_dev = NULL; 441 411 return 0; 442 412 }
+4 -4
drivers/net/ps3_gelic_net.c
··· 1648 1648 result = -ENOMEM; 1649 1649 goto fail_alloc_card; 1650 1650 } 1651 - ps3_system_bus_set_driver_data(dev, card); 1651 + ps3_system_bus_set_drvdata(dev, card); 1652 1652 card->dev = dev; 1653 1653 1654 1654 /* get internal vlan info */ ··· 1749 1749 bus_id(card), 1750 1750 0, 0); 1751 1751 fail_status_indicator: 1752 - ps3_system_bus_set_driver_data(dev, NULL); 1752 + ps3_system_bus_set_drvdata(dev, NULL); 1753 1753 kfree(netdev_card(netdev)->unalign); 1754 1754 free_netdev(netdev); 1755 1755 fail_alloc_card: ··· 1766 1766 1767 1767 static int ps3_gelic_driver_remove(struct ps3_system_bus_device *dev) 1768 1768 { 1769 - struct gelic_card *card = ps3_system_bus_get_driver_data(dev); 1769 + struct gelic_card *card = ps3_system_bus_get_drvdata(dev); 1770 1770 struct net_device *netdev0; 1771 1771 pr_debug("%s: called\n", __func__); 1772 1772 ··· 1803 1803 kfree(netdev_card(netdev0)->unalign); 1804 1804 free_netdev(netdev0); 1805 1805 1806 - ps3_system_bus_set_driver_data(dev, NULL); 1806 + ps3_system_bus_set_drvdata(dev, NULL); 1807 1807 1808 1808 ps3_dma_region_free(dev->d_region); 1809 1809
+1 -1
drivers/ps3/ps3-sys-manager.c
··· 706 706 ps3_vuart_read_async(dev, PS3_SM_RX_MSG_LEN_MIN); 707 707 } 708 708 709 - static int ps3_sys_manager_probe(struct ps3_system_bus_device *dev) 709 + static int __devinit ps3_sys_manager_probe(struct ps3_system_bus_device *dev) 710 710 { 711 711 int result; 712 712 struct ps3_sys_manager_ops ops;
+4 -4
drivers/ps3/ps3av.c
··· 80 80 { 0, }, /* auto */ 81 81 {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_480I, A_N, 720, 480}, 82 82 {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_480P, A_N, 720, 480}, 83 - {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_720P_60HZ, A_N, 1280, 720}, 83 + {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_720P_60HZ, A_W, 1280, 720}, 84 84 {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_1080I_60HZ, A_W, 1920, 1080}, 85 85 {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_1080P_60HZ, A_W, 1920, 1080}, 86 86 {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_576I, A_N, 720, 576}, 87 87 {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_576P, A_N, 720, 576}, 88 - {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_720P_50HZ, A_N, 1280, 720}, 88 + {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_720P_50HZ, A_W, 1280, 720}, 89 89 {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_1080I_50HZ, A_W, 1920, 1080}, 90 90 {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_1080P_50HZ, A_W, 1920, 1080}, 91 91 { RGB8, XRGB, PS3AV_CMD_VIDEO_VID_WXGA, A_W, 1280, 768}, ··· 937 937 938 938 EXPORT_SYMBOL_GPL(ps3av_audio_mute); 939 939 940 - static int ps3av_probe(struct ps3_system_bus_device *dev) 940 + static int __devinit ps3av_probe(struct ps3_system_bus_device *dev) 941 941 { 942 942 int res; 943 943 int id; ··· 1048 1048 .shutdown = ps3av_shutdown, 1049 1049 }; 1050 1050 1051 - static int ps3av_module_init(void) 1051 + static int __init ps3av_module_init(void) 1052 1052 { 1053 1053 int error; 1054 1054
+2 -1
drivers/ps3/ps3av_cmd.c
··· 21 21 #include <linux/module.h> 22 22 #include <linux/kernel.h> 23 23 #include <linux/delay.h> 24 + 24 25 #include <asm/ps3av.h> 25 - #include <asm/ps3fb.h> 26 26 #include <asm/ps3.h> 27 + #include <asm/ps3gpu.h> 27 28 28 29 #include "vuart.h" 29 30
+3 -4
drivers/usb/host/ehci-ps3.c
··· 162 162 dev_dbg(&dev->core, "%s:%d: virq %lu\n", __func__, __LINE__, 163 163 (unsigned long)virq); 164 164 165 - ps3_system_bus_set_driver_data(dev, hcd); 165 + ps3_system_bus_set_drvdata(dev, hcd); 166 166 167 167 result = usb_add_hcd(hcd, virq, IRQF_DISABLED); 168 168 ··· 195 195 static int ps3_ehci_remove(struct ps3_system_bus_device *dev) 196 196 { 197 197 unsigned int tmp; 198 - struct usb_hcd *hcd = 199 - (struct usb_hcd *)ps3_system_bus_get_driver_data(dev); 198 + struct usb_hcd *hcd = ps3_system_bus_get_drvdata(dev); 200 199 201 200 BUG_ON(!hcd); 202 201 ··· 207 208 ehci_shutdown(hcd); 208 209 usb_remove_hcd(hcd); 209 210 210 - ps3_system_bus_set_driver_data(dev, NULL); 211 + ps3_system_bus_set_drvdata(dev, NULL); 211 212 212 213 BUG_ON(!hcd->regs); 213 214 iounmap(hcd->regs);
+3 -4
drivers/usb/host/ohci-ps3.c
··· 162 162 dev_dbg(&dev->core, "%s:%d: virq %lu\n", __func__, __LINE__, 163 163 (unsigned long)virq); 164 164 165 - ps3_system_bus_set_driver_data(dev, hcd); 165 + ps3_system_bus_set_drvdata(dev, hcd); 166 166 167 167 result = usb_add_hcd(hcd, virq, IRQF_DISABLED); 168 168 ··· 195 195 static int ps3_ohci_remove(struct ps3_system_bus_device *dev) 196 196 { 197 197 unsigned int tmp; 198 - struct usb_hcd *hcd = 199 - (struct usb_hcd *)ps3_system_bus_get_driver_data(dev); 198 + struct usb_hcd *hcd = ps3_system_bus_get_drvdata(dev); 200 199 201 200 BUG_ON(!hcd); 202 201 ··· 207 208 ohci_shutdown(hcd); 208 209 usb_remove_hcd(hcd); 209 210 210 - ps3_system_bus_set_driver_data(dev, NULL); 211 + ps3_system_bus_set_drvdata(dev, NULL); 211 212 212 213 BUG_ON(!hcd->regs); 213 214 iounmap(hcd->regs);
+115 -157
drivers/video/ps3fb.c
··· 32 32 #include <linux/init.h> 33 33 34 34 #include <asm/abs_addr.h> 35 + #include <asm/iommu.h> 35 36 #include <asm/lv1call.h> 36 37 #include <asm/ps3av.h> 37 38 #include <asm/ps3fb.h> 38 39 #include <asm/ps3.h> 40 + #include <asm/ps3gpu.h> 39 41 40 42 41 43 #define DEVICE_NAME "ps3fb" 42 - 43 - #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101 44 - #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102 45 - #define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600 46 - #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601 47 - #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602 48 - 49 - #define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32) 50 - 51 - #define L1GPU_DISPLAY_SYNC_HSYNC 1 52 - #define L1GPU_DISPLAY_SYNC_VSYNC 2 53 44 54 45 #define GPU_CMD_BUF_SIZE (2 * 1024 * 1024) 55 46 #define GPU_FB_START (64 * 1024) ··· 453 462 src_offset += GPU_FB_START; 454 463 455 464 mutex_lock(&ps3_gpu_mutex); 456 - status = lv1_gpu_context_attribute(ps3fb.context_handle, 457 - L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, 458 - dst_offset, GPU_IOIF + src_offset, 459 - L1GPU_FB_BLIT_WAIT_FOR_COMPLETION | 460 - (width << 16) | height, 461 - line_length); 465 + status = lv1_gpu_fb_blit(ps3fb.context_handle, dst_offset, 466 + GPU_IOIF + src_offset, 467 + L1GPU_FB_BLIT_WAIT_FOR_COMPLETION | 468 + (width << 16) | height, 469 + line_length); 462 470 mutex_unlock(&ps3_gpu_mutex); 463 471 464 472 if (status) 465 - dev_err(dev, 466 - "%s: lv1_gpu_context_attribute FB_BLIT failed: %d\n", 467 - __func__, status); 473 + dev_err(dev, "%s: lv1_gpu_fb_blit failed: %d\n", __func__, 474 + status); 468 475 #ifdef HEAD_A 469 - status = lv1_gpu_context_attribute(ps3fb.context_handle, 470 - L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 471 - 0, frame_offset, 0, 0); 476 + status = lv1_gpu_display_flip(ps3fb.context_handle, 0, frame_offset); 472 477 if (status) 473 - dev_err(dev, "%s: lv1_gpu_context_attribute FLIP failed: %d\n", 474 - __func__, status); 478 + dev_err(dev, "%s: lv1_gpu_display_flip failed: %d\n", __func__, 479 + status); 475 480 #endif 476 481 #ifdef HEAD_B 477 - status = lv1_gpu_context_attribute(ps3fb.context_handle, 478 - L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, 479 - 1, frame_offset, 0, 0); 482 + status = lv1_gpu_display_flip(ps3fb.context_handle, 1, frame_offset); 480 483 if (status) 481 - dev_err(dev, "%s: lv1_gpu_context_attribute FLIP failed: %d\n", 482 - __func__, status); 484 + dev_err(dev, "%s: lv1_gpu_display_flip failed: %d\n", __func__, 485 + status); 483 486 #endif 484 487 } 485 488 ··· 941 956 } 942 957 943 958 944 - static int ps3fb_vsync_settings(struct gpu_driver_info *dinfo, 945 - struct device *dev) 946 - { 947 - int error; 948 - 949 - dev_dbg(dev, "version_driver:%x\n", dinfo->version_driver); 950 - dev_dbg(dev, "irq outlet:%x\n", dinfo->irq.irq_outlet); 951 - dev_dbg(dev, 952 - "version_gpu: %x memory_size: %x ch: %x core_freq: %d " 953 - "mem_freq:%d\n", 954 - dinfo->version_gpu, dinfo->memory_size, dinfo->hardware_channel, 955 - dinfo->nvcore_frequency/1000000, dinfo->memory_frequency/1000000); 956 - 957 - if (dinfo->version_driver != GPU_DRIVER_INFO_VERSION) { 958 - dev_err(dev, "%s: version_driver err:%x\n", __func__, 959 - dinfo->version_driver); 960 - return -EINVAL; 961 - } 962 - 963 - error = ps3_irq_plug_setup(PS3_BINDING_CPU_ANY, dinfo->irq.irq_outlet, 964 - &ps3fb.irq_no); 965 - if (error) { 966 - dev_err(dev, "%s: ps3_alloc_irq failed %d\n", __func__, error); 967 - return error; 968 - } 969 - 970 - error = request_irq(ps3fb.irq_no, ps3fb_vsync_interrupt, IRQF_DISABLED, 971 - DEVICE_NAME, dev); 972 - if (error) { 973 - dev_err(dev, "%s: request_irq failed %d\n", __func__, error); 974 - ps3_irq_plug_destroy(ps3fb.irq_no); 975 - return error; 976 - } 977 - 978 - dinfo->irq.mask = (1 << GPU_INTR_STATUS_VSYNC_1) | 979 - (1 << GPU_INTR_STATUS_FLIP_1); 980 - return 0; 981 - } 982 - 983 - static int ps3fb_xdr_settings(u64 xdr_lpar, struct device *dev) 984 - { 985 - int status; 986 - 987 - status = lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, 988 - xdr_lpar, ps3fb_videomemory.size, 0); 989 - if (status) { 990 - dev_err(dev, "%s: lv1_gpu_context_iomap failed: %d\n", 991 - __func__, status); 992 - return -ENXIO; 993 - } 994 - dev_dbg(dev, "video:%p ioif:%lx lpar:%llx size:%lx\n", 995 - ps3fb_videomemory.address, GPU_IOIF, xdr_lpar, 996 - ps3fb_videomemory.size); 997 - 998 - status = lv1_gpu_context_attribute(ps3fb.context_handle, 999 - L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP, 1000 - xdr_lpar, GPU_CMD_BUF_SIZE, 1001 - GPU_IOIF, 0); 1002 - if (status) { 1003 - dev_err(dev, 1004 - "%s: lv1_gpu_context_attribute FB_SETUP failed: %d\n", 1005 - __func__, status); 1006 - return -ENXIO; 1007 - } 1008 - return 0; 1009 - } 1010 - 1011 959 static struct fb_ops ps3fb_ops = { 1012 960 .fb_open = ps3fb_open, 1013 961 .fb_release = ps3fb_release, ··· 966 1048 .accel = FB_ACCEL_NONE, 967 1049 }; 968 1050 969 - static int ps3fb_set_sync(struct device *dev) 970 - { 971 - int status; 972 - 973 - #ifdef HEAD_A 974 - status = lv1_gpu_context_attribute(0x0, 975 - L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC, 976 - 0, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0); 977 - if (status) { 978 - dev_err(dev, 979 - "%s: lv1_gpu_context_attribute DISPLAY_SYNC failed: " 980 - "%d\n", 981 - __func__, status); 982 - return -1; 983 - } 984 - #endif 985 - #ifdef HEAD_B 986 - status = lv1_gpu_context_attribute(0x0, 987 - L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC, 988 - 1, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0); 989 - 990 - if (status) { 991 - dev_err(dev, 992 - "%s: lv1_gpu_context_attribute DISPLAY_SYNC failed: " 993 - "%d\n", 994 - __func__, status); 995 - return -1; 996 - } 997 - #endif 998 - return 0; 999 - } 1000 - 1001 1051 static int __devinit ps3fb_probe(struct ps3_system_bus_device *dev) 1002 1052 { 1003 1053 struct fb_info *info; 1004 1054 struct ps3fb_par *par; 1005 - int retval = -ENOMEM; 1055 + int retval; 1006 1056 u64 ddr_lpar = 0; 1007 1057 u64 lpar_dma_control = 0; 1008 1058 u64 lpar_driver_info = 0; 1009 1059 u64 lpar_reports = 0; 1010 1060 u64 lpar_reports_size = 0; 1011 1061 u64 xdr_lpar; 1062 + struct gpu_driver_info *dinfo; 1012 1063 void *fb_start; 1013 1064 int status; 1014 1065 struct task_struct *task; ··· 988 1101 return -ENOMEM; 989 1102 } 990 1103 991 - status = ps3_open_hv_device(dev); 992 - if (status) { 1104 + retval = ps3_open_hv_device(dev); 1105 + if (retval) { 993 1106 dev_err(&dev->core, "%s: ps3_open_hv_device failed\n", 994 1107 __func__); 995 1108 goto err; ··· 1003 1116 atomic_set(&ps3fb.ext_flip, 0); /* for flip with vsync */ 1004 1117 init_waitqueue_head(&ps3fb.wait_vsync); 1005 1118 1006 - ps3fb_set_sync(&dev->core); 1119 + #ifdef HEAD_A 1120 + status = lv1_gpu_display_sync(0x0, 0, L1GPU_DISPLAY_SYNC_VSYNC); 1121 + if (status) { 1122 + dev_err(&dev->core, "%s: lv1_gpu_display_sync failed: %d\n", 1123 + __func__, status); 1124 + retval = -ENODEV; 1125 + goto err_close_device; 1126 + } 1127 + #endif 1128 + #ifdef HEAD_B 1129 + status = lv1_gpu_display_sync(0x0, 1, L1GPU_DISPLAY_SYNC_VSYNC); 1130 + if (status) { 1131 + dev_err(&dev->core, "%s: lv1_gpu_display_sync failed: %d\n", 1132 + __func__, status); 1133 + retval = -ENODEV; 1134 + goto err_close_device; 1135 + } 1136 + #endif 1007 1137 1008 1138 max_ps3fb_size = _ALIGN_UP(GPU_IOIF, 256*1024*1024) - GPU_IOIF; 1009 1139 if (ps3fb_videomemory.size > max_ps3fb_size) { ··· 1035 1131 if (status) { 1036 1132 dev_err(&dev->core, "%s: lv1_gpu_memory_allocate failed: %d\n", 1037 1133 __func__, status); 1038 - goto err; 1134 + goto err_close_device; 1039 1135 } 1040 1136 dev_dbg(&dev->core, "ddr:lpar:0x%llx\n", ddr_lpar); 1041 1137 ··· 1045 1141 &lpar_reports, &lpar_reports_size); 1046 1142 if (status) { 1047 1143 dev_err(&dev->core, 1048 - "%s: lv1_gpu_context_attribute failed: %d\n", __func__, 1144 + "%s: lv1_gpu_context_allocate failed: %d\n", __func__, 1049 1145 status); 1050 1146 goto err_gpu_memory_free; 1051 1147 } 1052 1148 1053 1149 /* vsync interrupt */ 1054 - ps3fb.dinfo = (void __force *)ioremap(lpar_driver_info, 128 * 1024); 1055 - if (!ps3fb.dinfo) { 1150 + dinfo = (void __force *)ioremap(lpar_driver_info, 128 * 1024); 1151 + if (!dinfo) { 1056 1152 dev_err(&dev->core, "%s: ioremap failed\n", __func__); 1057 1153 goto err_gpu_context_free; 1058 1154 } 1059 1155 1060 - retval = ps3fb_vsync_settings(ps3fb.dinfo, &dev->core); 1061 - if (retval) 1156 + ps3fb.dinfo = dinfo; 1157 + dev_dbg(&dev->core, "version_driver:%x\n", dinfo->version_driver); 1158 + dev_dbg(&dev->core, "irq outlet:%x\n", dinfo->irq.irq_outlet); 1159 + dev_dbg(&dev->core, "version_gpu: %x memory_size: %x ch: %x " 1160 + "core_freq: %d mem_freq:%d\n", dinfo->version_gpu, 1161 + dinfo->memory_size, dinfo->hardware_channel, 1162 + dinfo->nvcore_frequency/1000000, 1163 + dinfo->memory_frequency/1000000); 1164 + 1165 + if (dinfo->version_driver != GPU_DRIVER_INFO_VERSION) { 1166 + dev_err(&dev->core, "%s: version_driver err:%x\n", __func__, 1167 + dinfo->version_driver); 1168 + retval = -EINVAL; 1062 1169 goto err_iounmap_dinfo; 1170 + } 1171 + 1172 + retval = ps3_irq_plug_setup(PS3_BINDING_CPU_ANY, dinfo->irq.irq_outlet, 1173 + &ps3fb.irq_no); 1174 + if (retval) { 1175 + dev_err(&dev->core, "%s: ps3_alloc_irq failed %d\n", __func__, 1176 + retval); 1177 + goto err_iounmap_dinfo; 1178 + } 1179 + 1180 + retval = request_irq(ps3fb.irq_no, ps3fb_vsync_interrupt, 1181 + IRQF_DISABLED, DEVICE_NAME, &dev->core); 1182 + if (retval) { 1183 + dev_err(&dev->core, "%s: request_irq failed %d\n", __func__, 1184 + retval); 1185 + goto err_destroy_plug; 1186 + } 1187 + 1188 + dinfo->irq.mask = (1 << GPU_INTR_STATUS_VSYNC_1) | 1189 + (1 << GPU_INTR_STATUS_FLIP_1); 1063 1190 1064 1191 /* Clear memory to prevent kernel info leakage into userspace */ 1065 1192 memset(ps3fb_videomemory.address, 0, ps3fb_videomemory.size); 1066 1193 1067 1194 xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb_videomemory.address)); 1068 - retval = ps3fb_xdr_settings(xdr_lpar, &dev->core); 1069 - if (retval) 1195 + 1196 + status = lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, 1197 + xdr_lpar, ps3fb_videomemory.size, 1198 + CBE_IOPTE_PP_W | CBE_IOPTE_PP_R | 1199 + CBE_IOPTE_M); 1200 + if (status) { 1201 + dev_err(&dev->core, "%s: lv1_gpu_context_iomap failed: %d\n", 1202 + __func__, status); 1203 + retval = -ENXIO; 1070 1204 goto err_free_irq; 1205 + } 1206 + 1207 + dev_dbg(&dev->core, "video:%p ioif:%lx lpar:%llx size:%lx\n", 1208 + ps3fb_videomemory.address, GPU_IOIF, xdr_lpar, 1209 + ps3fb_videomemory.size); 1210 + 1211 + status = lv1_gpu_fb_setup(ps3fb.context_handle, xdr_lpar, 1212 + GPU_CMD_BUF_SIZE, GPU_IOIF); 1213 + if (status) { 1214 + dev_err(&dev->core, "%s: lv1_gpu_fb_setup failed: %d\n", 1215 + __func__, status); 1216 + retval = -ENXIO; 1217 + goto err_context_unmap; 1218 + } 1071 1219 1072 1220 info = framebuffer_alloc(sizeof(struct ps3fb_par), &dev->core); 1073 1221 if (!info) 1074 - goto err_free_irq; 1222 + goto err_context_fb_close; 1075 1223 1076 1224 par = info->par; 1077 1225 par->mode_id = ~ps3fb_mode; /* != ps3fb_mode, to trigger change */ ··· 1166 1210 if (retval < 0) 1167 1211 goto err_fb_dealloc; 1168 1212 1169 - dev->core.driver_data = info; 1213 + ps3_system_bus_set_drvdata(dev, info); 1170 1214 1171 1215 dev_info(info->device, "%s %s, using %u KiB of video memory\n", 1172 1216 dev_driver_string(info->dev), dev_name(info->dev), ··· 1188 1232 fb_dealloc_cmap(&info->cmap); 1189 1233 err_framebuffer_release: 1190 1234 framebuffer_release(info); 1235 + err_context_fb_close: 1236 + lv1_gpu_fb_close(ps3fb.context_handle); 1237 + err_context_unmap: 1238 + lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, xdr_lpar, 1239 + ps3fb_videomemory.size, CBE_IOPTE_M); 1191 1240 err_free_irq: 1192 1241 free_irq(ps3fb.irq_no, &dev->core); 1242 + err_destroy_plug: 1193 1243 ps3_irq_plug_destroy(ps3fb.irq_no); 1194 1244 err_iounmap_dinfo: 1195 1245 iounmap((u8 __force __iomem *)ps3fb.dinfo); ··· 1203 1241 lv1_gpu_context_free(ps3fb.context_handle); 1204 1242 err_gpu_memory_free: 1205 1243 lv1_gpu_memory_free(ps3fb.memory_handle); 1244 + err_close_device: 1245 + ps3_close_hv_device(dev); 1206 1246 err: 1207 1247 return retval; 1208 1248 } 1209 1249 1210 1250 static int ps3fb_shutdown(struct ps3_system_bus_device *dev) 1211 1251 { 1212 - int status; 1213 - struct fb_info *info = dev->core.driver_data; 1252 + struct fb_info *info = ps3_system_bus_get_drvdata(dev); 1253 + u64 xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb_videomemory.address)); 1214 1254 1215 1255 dev_dbg(&dev->core, " -> %s:%d\n", __func__, __LINE__); 1216 1256 ··· 1232 1268 unregister_framebuffer(info); 1233 1269 fb_dealloc_cmap(&info->cmap); 1234 1270 framebuffer_release(info); 1235 - info = dev->core.driver_data = NULL; 1271 + ps3_system_bus_set_drvdata(dev, NULL); 1236 1272 } 1237 1273 iounmap((u8 __force __iomem *)ps3fb.dinfo); 1238 - 1239 - status = lv1_gpu_context_free(ps3fb.context_handle); 1240 - if (status) 1241 - dev_dbg(&dev->core, "lv1_gpu_context_free failed: %d\n", 1242 - status); 1243 - 1244 - status = lv1_gpu_memory_free(ps3fb.memory_handle); 1245 - if (status) 1246 - dev_dbg(&dev->core, "lv1_gpu_memory_free failed: %d\n", 1247 - status); 1248 - 1274 + lv1_gpu_fb_close(ps3fb.context_handle); 1275 + lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, xdr_lpar, 1276 + ps3fb_videomemory.size, CBE_IOPTE_M); 1277 + lv1_gpu_context_free(ps3fb.context_handle); 1278 + lv1_gpu_memory_free(ps3fb.memory_handle); 1249 1279 ps3_close_hv_device(dev); 1250 1280 dev_dbg(&dev->core, " <- %s:%d\n", __func__, __LINE__); 1251 1281
+42
include/asm-generic/atomic64.h
··· 1 + /* 2 + * Generic implementation of 64-bit atomics using spinlocks, 3 + * useful on processors that don't have 64-bit atomic instructions. 4 + * 5 + * Copyright © 2009 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 6 + * 7 + * This program is free software; you can redistribute it and/or 8 + * modify it under the terms of the GNU General Public License 9 + * as published by the Free Software Foundation; either version 10 + * 2 of the License, or (at your option) any later version. 11 + */ 12 + #ifndef _ASM_GENERIC_ATOMIC64_H 13 + #define _ASM_GENERIC_ATOMIC64_H 14 + 15 + typedef struct { 16 + long long counter; 17 + } atomic64_t; 18 + 19 + #define ATOMIC64_INIT(i) { (i) } 20 + 21 + extern long long atomic64_read(const atomic64_t *v); 22 + extern void atomic64_set(atomic64_t *v, long long i); 23 + extern void atomic64_add(long long a, atomic64_t *v); 24 + extern long long atomic64_add_return(long long a, atomic64_t *v); 25 + extern void atomic64_sub(long long a, atomic64_t *v); 26 + extern long long atomic64_sub_return(long long a, atomic64_t *v); 27 + extern long long atomic64_dec_if_positive(atomic64_t *v); 28 + extern long long atomic64_cmpxchg(atomic64_t *v, long long o, long long n); 29 + extern long long atomic64_xchg(atomic64_t *v, long long new); 30 + extern int atomic64_add_unless(atomic64_t *v, long long a, long long u); 31 + 32 + #define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) 33 + #define atomic64_inc(v) atomic64_add(1LL, (v)) 34 + #define atomic64_inc_return(v) atomic64_add_return(1LL, (v)) 35 + #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) 36 + #define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0) 37 + #define atomic64_dec(v) atomic64_sub(1LL, (v)) 38 + #define atomic64_dec_return(v) atomic64_sub_return(1LL, (v)) 39 + #define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) 40 + #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL) 41 + 42 + #endif /* _ASM_GENERIC_ATOMIC64_H */
+5
include/linux/bio.h
··· 590 590 bl->head = bl2->head; 591 591 } 592 592 593 + static inline struct bio *bio_list_peek(struct bio_list *bl) 594 + { 595 + return bl->head; 596 + } 597 + 593 598 static inline struct bio *bio_list_pop(struct bio_list *bl) 594 599 { 595 600 struct bio *bio = bl->head;
+6
lib/Kconfig
··· 194 194 config NLATTR 195 195 bool 196 196 197 + # 198 + # Generic 64-bit atomic support is selected if needed 199 + # 200 + config GENERIC_ATOMIC64 201 + bool 202 + 197 203 endmenu
+2
lib/Makefile
··· 95 95 96 96 obj-$(CONFIG_GENERIC_CSUM) += checksum.o 97 97 98 + obj-$(CONFIG_GENERIC_ATOMIC64) += atomic64.o 99 + 98 100 hostprogs-y := gen_crc32table 99 101 clean-files := crc32table.h 100 102
+175
lib/atomic64.c
··· 1 + /* 2 + * Generic implementation of 64-bit atomics using spinlocks, 3 + * useful on processors that don't have 64-bit atomic instructions. 4 + * 5 + * Copyright © 2009 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 6 + * 7 + * This program is free software; you can redistribute it and/or 8 + * modify it under the terms of the GNU General Public License 9 + * as published by the Free Software Foundation; either version 10 + * 2 of the License, or (at your option) any later version. 11 + */ 12 + #include <linux/types.h> 13 + #include <linux/cache.h> 14 + #include <linux/spinlock.h> 15 + #include <linux/init.h> 16 + #include <asm/atomic.h> 17 + 18 + /* 19 + * We use a hashed array of spinlocks to provide exclusive access 20 + * to each atomic64_t variable. Since this is expected to used on 21 + * systems with small numbers of CPUs (<= 4 or so), we use a 22 + * relatively small array of 16 spinlocks to avoid wasting too much 23 + * memory on the spinlock array. 24 + */ 25 + #define NR_LOCKS 16 26 + 27 + /* 28 + * Ensure each lock is in a separate cacheline. 29 + */ 30 + static union { 31 + spinlock_t lock; 32 + char pad[L1_CACHE_BYTES]; 33 + } atomic64_lock[NR_LOCKS] __cacheline_aligned_in_smp; 34 + 35 + static inline spinlock_t *lock_addr(const atomic64_t *v) 36 + { 37 + unsigned long addr = (unsigned long) v; 38 + 39 + addr >>= L1_CACHE_SHIFT; 40 + addr ^= (addr >> 8) ^ (addr >> 16); 41 + return &atomic64_lock[addr & (NR_LOCKS - 1)].lock; 42 + } 43 + 44 + long long atomic64_read(const atomic64_t *v) 45 + { 46 + unsigned long flags; 47 + spinlock_t *lock = lock_addr(v); 48 + long long val; 49 + 50 + spin_lock_irqsave(lock, flags); 51 + val = v->counter; 52 + spin_unlock_irqrestore(lock, flags); 53 + return val; 54 + } 55 + 56 + void atomic64_set(atomic64_t *v, long long i) 57 + { 58 + unsigned long flags; 59 + spinlock_t *lock = lock_addr(v); 60 + 61 + spin_lock_irqsave(lock, flags); 62 + v->counter = i; 63 + spin_unlock_irqrestore(lock, flags); 64 + } 65 + 66 + void atomic64_add(long long a, atomic64_t *v) 67 + { 68 + unsigned long flags; 69 + spinlock_t *lock = lock_addr(v); 70 + 71 + spin_lock_irqsave(lock, flags); 72 + v->counter += a; 73 + spin_unlock_irqrestore(lock, flags); 74 + } 75 + 76 + long long atomic64_add_return(long long a, atomic64_t *v) 77 + { 78 + unsigned long flags; 79 + spinlock_t *lock = lock_addr(v); 80 + long long val; 81 + 82 + spin_lock_irqsave(lock, flags); 83 + val = v->counter += a; 84 + spin_unlock_irqrestore(lock, flags); 85 + return val; 86 + } 87 + 88 + void atomic64_sub(long long a, atomic64_t *v) 89 + { 90 + unsigned long flags; 91 + spinlock_t *lock = lock_addr(v); 92 + 93 + spin_lock_irqsave(lock, flags); 94 + v->counter -= a; 95 + spin_unlock_irqrestore(lock, flags); 96 + } 97 + 98 + long long atomic64_sub_return(long long a, atomic64_t *v) 99 + { 100 + unsigned long flags; 101 + spinlock_t *lock = lock_addr(v); 102 + long long val; 103 + 104 + spin_lock_irqsave(lock, flags); 105 + val = v->counter -= a; 106 + spin_unlock_irqrestore(lock, flags); 107 + return val; 108 + } 109 + 110 + long long atomic64_dec_if_positive(atomic64_t *v) 111 + { 112 + unsigned long flags; 113 + spinlock_t *lock = lock_addr(v); 114 + long long val; 115 + 116 + spin_lock_irqsave(lock, flags); 117 + val = v->counter - 1; 118 + if (val >= 0) 119 + v->counter = val; 120 + spin_unlock_irqrestore(lock, flags); 121 + return val; 122 + } 123 + 124 + long long atomic64_cmpxchg(atomic64_t *v, long long o, long long n) 125 + { 126 + unsigned long flags; 127 + spinlock_t *lock = lock_addr(v); 128 + long long val; 129 + 130 + spin_lock_irqsave(lock, flags); 131 + val = v->counter; 132 + if (val == o) 133 + v->counter = n; 134 + spin_unlock_irqrestore(lock, flags); 135 + return val; 136 + } 137 + 138 + long long atomic64_xchg(atomic64_t *v, long long new) 139 + { 140 + unsigned long flags; 141 + spinlock_t *lock = lock_addr(v); 142 + long long val; 143 + 144 + spin_lock_irqsave(lock, flags); 145 + val = v->counter; 146 + v->counter = new; 147 + spin_unlock_irqrestore(lock, flags); 148 + return val; 149 + } 150 + 151 + int atomic64_add_unless(atomic64_t *v, long long a, long long u) 152 + { 153 + unsigned long flags; 154 + spinlock_t *lock = lock_addr(v); 155 + int ret = 1; 156 + 157 + spin_lock_irqsave(lock, flags); 158 + if (v->counter != u) { 159 + v->counter += a; 160 + ret = 0; 161 + } 162 + spin_unlock_irqrestore(lock, flags); 163 + return ret; 164 + } 165 + 166 + static int init_atomic64_lock(void) 167 + { 168 + int i; 169 + 170 + for (i = 0; i < NR_LOCKS; ++i) 171 + spin_lock_init(&atomic64_lock[i].lock); 172 + return 0; 173 + } 174 + 175 + pure_initcall(init_atomic64_lock);