Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge master.kernel.org:/home/rmk/linux-2.6-arm

* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 5543/1: arm: serial amba: add missing declaration in serial.h
[ARM] pxa: fix pxa27x_udc default pullup GPIO
[ARM] pxa/imote2: fix UCAM sensor board ADC model number
mx[23]: don't put clock lookups in __initdata
fix oops when using console=ttymxcN with N > 0
[ARM] ARMv7 errata: only apply fixes when running on applicable CPU
[ARM] 5534/1: kmalloc must return a cache line aligned buffer

+53 -24
+16
arch/arm/include/asm/cache.h
··· 7 7 #define L1_CACHE_SHIFT 5 8 8 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 9 9 10 + /* 11 + * Memory returned by kmalloc() may be used for DMA, so we must make 12 + * sure that all such allocations are cache aligned. Otherwise, 13 + * unrelated code may cause parts of the buffer to be read into the 14 + * cache before the transfer is done, causing old data to be seen by 15 + * the CPU. 16 + */ 17 + #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES 18 + 19 + /* 20 + * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers. 21 + */ 22 + #if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) 23 + #define ARCH_SLAB_MINALIGN 8 24 + #endif 25 + 10 26 #endif
-7
arch/arm/include/asm/page.h
··· 202 202 (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \ 203 203 VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) 204 204 205 - /* 206 - * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers. 207 - */ 208 - #if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) 209 - #define ARCH_SLAB_MINALIGN 8 210 - #endif 211 - 212 205 #include <asm-generic/page.h> 213 206 214 207 #endif
+1 -1
arch/arm/mach-mx2/clock_imx21.c
··· 890 890 .con_id = n, \ 891 891 .clk = &c, \ 892 892 }, 893 - static struct clk_lookup lookups[] __initdata = { 893 + static struct clk_lookup lookups[] = { 894 894 /* It's unlikely that any driver wants one of them directly: 895 895 _REGISTER_CLOCK(NULL, "ckih", ckih_clk) 896 896 _REGISTER_CLOCK(NULL, "ckil", ckil_clk)
+1 -1
arch/arm/mach-mx2/clock_imx27.c
··· 621 621 .clk = &c, \ 622 622 }, 623 623 624 - static struct clk_lookup lookups[] __initdata = { 624 + static struct clk_lookup lookups[] = { 625 625 _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) 626 626 _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) 627 627 _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
+1 -1
arch/arm/mach-mx3/clock-imx35.c
··· 404 404 .clk = &c, \ 405 405 }, 406 406 407 - static struct clk_lookup lookups[] __initdata = { 407 + static struct clk_lookup lookups[] = { 408 408 _REGISTER_CLOCK(NULL, "asrc", asrc_clk) 409 409 _REGISTER_CLOCK(NULL, "ata", ata_clk) 410 410 _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
+1 -1
arch/arm/mach-mx3/clock.c
··· 516 516 .clk = &c, \ 517 517 }, 518 518 519 - static struct clk_lookup lookups[] __initdata = { 519 + static struct clk_lookup lookups[] = { 520 520 _REGISTER_CLOCK(NULL, "emi", emi_clk) 521 521 _REGISTER_CLOCK(NULL, "cspi", cspi1_clk) 522 522 _REGISTER_CLOCK(NULL, "cspi", cspi2_clk)
+4 -1
arch/arm/mach-pxa/devices.c
··· 72 72 } 73 73 74 74 75 - static struct pxa2xx_udc_mach_info pxa_udc_info; 75 + static struct pxa2xx_udc_mach_info pxa_udc_info = { 76 + .gpio_pullup = -1, 77 + .gpio_vbus = -1, 78 + }; 76 79 77 80 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) 78 81 {
+1 -1
arch/arm/mach-pxa/imote2.c
··· 412 412 */ 413 413 static struct i2c_board_info __initdata imote2_i2c_board_info[] = { 414 414 { /* UCAM sensor board */ 415 - .type = "max1238", 415 + .type = "max1239", 416 416 .addr = 0x35, 417 417 }, { /* ITS400 Sensor board only */ 418 418 .type = "max1363",
+25 -11
arch/arm/mm/proc-v7.S
··· 184 184 stmia r12, {r0-r5, r7, r9, r11, lr} 185 185 bl v7_flush_dcache_all 186 186 ldmia r12, {r0-r5, r7, r9, r11, lr} 187 + 188 + mrc p15, 0, r0, c0, c0, 0 @ read main ID register 189 + and r10, r0, #0xff000000 @ ARM? 190 + teq r10, #0x41000000 191 + bne 2f 192 + and r5, r0, #0x00f00000 @ variant 193 + and r6, r0, #0x0000000f @ revision 194 + orr r0, r6, r5, lsr #20-4 @ combine variant and revision 195 + 187 196 #ifdef CONFIG_ARM_ERRATA_430973 188 - mrc p15, 0, r10, c1, c0, 1 @ read aux control register 189 - orr r10, r10, #(1 << 6) @ set IBE to 1 190 - mcr p15, 0, r10, c1, c0, 1 @ write aux control register 197 + teq r5, #0x00100000 @ only present in r1p* 198 + mrceq p15, 0, r10, c1, c0, 1 @ read aux control register 199 + orreq r10, r10, #(1 << 6) @ set IBE to 1 200 + mcreq p15, 0, r10, c1, c0, 1 @ write aux control register 191 201 #endif 192 202 #ifdef CONFIG_ARM_ERRATA_458693 193 - mrc p15, 0, r10, c1, c0, 1 @ read aux control register 194 - orr r10, r10, #(1 << 5) @ set L1NEON to 1 195 - orr r10, r10, #(1 << 9) @ set PLDNOP to 1 196 - mcr p15, 0, r10, c1, c0, 1 @ write aux control register 203 + teq r0, #0x20 @ only present in r2p0 204 + mrceq p15, 0, r10, c1, c0, 1 @ read aux control register 205 + orreq r10, r10, #(1 << 5) @ set L1NEON to 1 206 + orreq r10, r10, #(1 << 9) @ set PLDNOP to 1 207 + mcreq p15, 0, r10, c1, c0, 1 @ write aux control register 197 208 #endif 198 209 #ifdef CONFIG_ARM_ERRATA_460075 199 - mrc p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register 200 - orr r10, r10, #(1 << 22) @ set the Write Allocate disable bit 201 - mcr p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register 210 + teq r0, #0x20 @ only present in r2p0 211 + mrceq p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register 212 + tsteq r10, #1 << 22 213 + orreq r10, r10, #(1 << 22) @ set the Write Allocate disable bit 214 + mcreq p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register 202 215 #endif 203 - mov r10, #0 216 + 217 + 2: mov r10, #0 204 218 #ifdef HARVARD_CACHE 205 219 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate 206 220 #endif
+2
drivers/serial/imx.c
··· 1031 1031 if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports)) 1032 1032 co->index = 0; 1033 1033 sport = imx_ports[co->index]; 1034 + if(sport == NULL) 1035 + return -ENODEV; 1034 1036 1035 1037 if (options) 1036 1038 uart_parse_options(options, &baud, &parity, &bits, &flow);
+1
include/linux/amba/serial.h
··· 159 159 #define UART01x_FR_MODEM_ANY (UART01x_FR_DCD|UART01x_FR_DSR|UART01x_FR_CTS) 160 160 161 161 #ifndef __ASSEMBLY__ 162 + struct amba_device; /* in uncompress this is included but amba/bus.h is not */ 162 163 struct amba_pl010_data { 163 164 void (*set_mctrl)(struct amba_device *dev, void __iomem *base, unsigned int mctrl); 164 165 };