drm/amd/display: Update dmub code

There is a delta in the dmub code
- add boot options
- add boot status
- remove unused auto_load_is_done func pointer

Signed-off-by: Bhawanpreet Lakha <[e-mail]>
Reviewed-by: Nicholas Kazlauskas <[e-mail]>
Signed-off-by: Alex Deucher <[e-mail]>

drivers/gpu/drm/amd/display/dmub/dmub_srv.h

···
 	bool (*is_hw_init)(struct dmub_srv *dmub);
 
 	bool (*is_phy_init)(struct dmub_srv *dmub);
+	void (*enable_dmub_boot_options)(struct dmub_srv *dmub);
 
-	bool (*is_auto_load_done)(struct dmub_srv *dmub);
+	void (*skip_dmub_panel_power_sequence)(struct dmub_srv *dmub, bool skip);
+
+	union dmub_fw_boot_status (*get_fw_status)(struct dmub_srv *dmub);
+
 
 	void (*set_gpint)(struct dmub_srv *dmub,
 			  union dmub_gpint_data_register reg);
···
 	uint64_t fb_offset;
 	uint32_t psp_version;
 	bool load_inst_const;
+	bool skip_panel_power_sequence;
 };
 
 /**
···
  * Can be called after software initialization.
  */
 void dmub_flush_buffer_mem(const struct dmub_fb *fb);
+
+/**
+ * dmub_srv_get_fw_boot_status() - Returns the DMUB boot status bits.
+ *
+ * @dmub: the dmub service
+ * @status: out pointer for firmware status
+ *
+ * Return:
+ *   DMUB_STATUS_OK - success
+ *   DMUB_STATUS_INVALID - unspecified error, unsupported
+ */
+enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
+					     union dmub_fw_boot_status *status);
 
 #if defined(__cplusplus)
 }

drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h

···
 		uint32_t optimized_init : 1;
 		uint32_t skip_phy_access : 1;
 		uint32_t disable_clk_gate: 1;
-		uint32_t reserved : 27;
+		uint32_t skip_phy_init_panel_sequence: 1;
+		uint32_t reserved : 26;
 	} bits;
 	uint32_t all;
 };

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c

···
 {
 	return REG_READ(DMCUB_SCRATCH7);
 }
+
+union dmub_fw_boot_status dmub_dcn20_get_fw_boot_status(struct dmub_srv *dmub)
+{
+	union dmub_fw_boot_status status;
+
+	status.all = REG_READ(DMCUB_SCRATCH0);
+	return status;
+}
+
+void dmub_dcn20_enable_dmub_boot_options(struct dmub_srv *dmub)
+{
+	union dmub_fw_boot_options boot_options = {0};
+
+	REG_WRITE(DMCUB_SCRATCH14, boot_options.all);
+}
+
+void dmub_dcn20_skip_dmub_panel_power_sequence(struct dmub_srv *dmub, bool skip)
+{
+	union dmub_fw_boot_options boot_options;
+	boot_options.all = REG_READ(DMCUB_SCRATCH14);
+	boot_options.bits.skip_phy_init_panel_sequence = skip;
+	REG_WRITE(DMCUB_SCRATCH14, boot_options.all);
+}

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.h

···
 
 uint32_t dmub_dcn20_get_gpint_response(struct dmub_srv *dmub);
 
+void dmub_dcn20_enable_dmub_boot_options(struct dmub_srv *dmub);
+
+void dmub_dcn20_skip_dmub_panel_power_sequence(struct dmub_srv *dmub, bool skip);
+
+union dmub_fw_boot_status dmub_dcn20_get_fw_boot_status(struct dmub_srv *dmub);
+
 #endif /* _DMUB_DCN20_H_ */

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.c

···
 
 /* Shared functions. */
 
-bool dmub_dcn21_is_auto_load_done(struct dmub_srv *dmub)
-{
-	return (REG_READ(DMCUB_SCRATCH0) == 3);
-}
-
 bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub)
 {
 	return REG_READ(DMCUB_SCRATCH10) == 0;

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn21.h

···
 
 /* Hardware functions. */
 
-bool dmub_dcn21_is_auto_load_done(struct dmub_srv *dmub);
-
 bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub);
 
 #endif /* _DMUB_DCN21_H_ */

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.c

···
 		  DMCUB_REGION3_CW6_TOP_ADDRESS, cw6->region.top,
 		  DMCUB_REGION3_CW6_ENABLE, 1);
 }
-
-bool dmub_dcn30_is_auto_load_done(struct dmub_srv *dmub)
-{
-	return (REG_READ(DMCUB_SCRATCH0) > 0);
-}

drivers/gpu/drm/amd/display/dmub/src/dmub_dcn30.h

···
 			      const struct dmub_window *cw5,
 			      const struct dmub_window *cw6);
 
-bool dmub_dcn30_is_auto_load_done(struct dmub_srv *dmub);
 
 #endif /* _DMUB_DCN30_H_ */

drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

···
 		funcs->set_gpint = dmub_dcn20_set_gpint;
 		funcs->is_gpint_acked = dmub_dcn20_is_gpint_acked;
 		funcs->get_gpint_response = dmub_dcn20_get_gpint_response;
+		funcs->get_fw_status = dmub_dcn20_get_fw_boot_status;
+		funcs->enable_dmub_boot_options = dmub_dcn20_enable_dmub_boot_options;
+		funcs->skip_dmub_panel_power_sequence = dmub_dcn20_skip_dmub_panel_power_sequence;
 
 		if (asic == DMUB_ASIC_DCN21) {
 			dmub->regs = &dmub_srv_dcn21_regs;
 
-			funcs->is_auto_load_done = dmub_dcn21_is_auto_load_done;
 			funcs->is_phy_init = dmub_dcn21_is_phy_init;
 		}
 		if (asic == DMUB_ASIC_DCN30) {
 			dmub->regs = &dmub_srv_dcn30_regs;
 
-			funcs->is_auto_load_done = dmub_dcn30_is_auto_load_done;
 			funcs->backdoor_load = dmub_dcn30_backdoor_load;
 			funcs->setup_windows = dmub_dcn30_setup_windows;
 		}
···
 	if (!dmub->hw_init)
 		return DMUB_STATUS_INVALID;
 
-	if (!dmub->hw_funcs.is_auto_load_done)
-		return DMUB_STATUS_OK;
-
 	for (i = 0; i <= timeout_us; i += 100) {
-		if (dmub->hw_funcs.is_auto_load_done(dmub))
+		union dmub_fw_boot_status status = dmub->hw_funcs.get_fw_status(dmub);
+
+		if (status.bits.dal_fw && status.bits.mailbox_rdy)
 			return DMUB_STATUS_OK;
 
 		udelay(100);
···
 		return DMUB_STATUS_INVALID;
 
 	*response = dmub->hw_funcs.get_gpint_response(dmub);
+
+	return DMUB_STATUS_OK;
+}
+
+enum dmub_status dmub_srv_get_fw_boot_status(struct dmub_srv *dmub,
+					     union dmub_fw_boot_status *status)
+{
+	status->all = 0;
+
+	if (!dmub->sw_init)
+		return DMUB_STATUS_INVALID;
+
+	if (dmub->hw_funcs.get_fw_status)
+		*status = dmub->hw_funcs.get_fw_status(dmub);
 
 	return DMUB_STATUS_OK;
 }