OMAP3: set the core dpll clk rate in its set_rate function

The debug l3_ick/rate is not displaying the actual rate of the clock in
hardware. This is because, the core dpll set_rate function doesn't update the
clk.rate. After fixing, the l3_ick/rate is displaying proper values.

Signed-off-by: Shweta Gulati <[e-mail]>
Signed-off-by: Avinash.H.M <[e-mail]>
Cc: Rajendra Nayak <[e-mail]>
Cc: Paul Wamsley <[e-mail]>
Acked-by: Paul Walmsley <[e-mail]>
Signed-off-by: Tony Lindgren <[e-mail]>

arch/arm/mach-omap2/clkt34xx_dpll3m2.c

···
 				  sdrc_cs0->rfr_ctrl, sdrc_cs0->actim_ctrla,
 				  sdrc_cs0->actim_ctrlb, sdrc_cs0->mr,
 				  0, 0, 0, 0);
+	clk->rate = rate;
 
 	return 0;
 }