Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915/guc: Convert guc_mmio_reg_state_init to iosys_map

Now that the regset list is prepared, convert guc_mmio_reg_state_init()
to use iosys_map to copy the array to the final location and
initialize additional fields in ads.reg_state_list.

v2: Just use an offset instead of temporary iosys_map.

Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220216174147.3073235-15-lucas.demarchi@intel.com

+16 -12
+16 -12
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
··· 383 383 return ret; 384 384 } 385 385 386 - static void guc_mmio_reg_state_init(struct intel_guc *guc, 387 - struct __guc_ads_blob *blob) 386 + static void guc_mmio_reg_state_init(struct intel_guc *guc) 388 387 { 389 388 struct intel_gt *gt = guc_to_gt(guc); 390 389 struct intel_engine_cs *engine; 391 - struct guc_mmio_reg *ads_registers; 392 390 enum intel_engine_id id; 393 391 u32 addr_ggtt, offset; 394 392 395 393 offset = guc_ads_regset_offset(guc); 396 394 addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset; 397 - ads_registers = (struct guc_mmio_reg *)(((u8 *)blob) + offset); 398 395 399 - memcpy(ads_registers, guc->ads_regset, guc->ads_regset_size); 396 + iosys_map_memcpy_to(&guc->ads_map, offset, guc->ads_regset, 397 + guc->ads_regset_size); 400 398 401 399 for_each_engine(engine, gt, id) { 402 400 u32 count = guc->ads_regset_count[id]; 403 - struct guc_mmio_reg_set *ads_reg_set; 404 401 u8 guc_class; 405 402 406 403 /* Class index is checked in class converter */ 407 404 GEM_BUG_ON(engine->instance >= GUC_MAX_INSTANCES_PER_CLASS); 408 405 409 406 guc_class = engine_class_to_guc_class(engine->class); 410 - ads_reg_set = &blob->ads.reg_state_list[guc_class][engine->instance]; 411 407 412 408 if (!count) { 413 - ads_reg_set->address = 0; 414 - ads_reg_set->count = 0; 409 + ads_blob_write(guc, 410 + ads.reg_state_list[guc_class][engine->instance].address, 411 + 0); 412 + ads_blob_write(guc, 413 + ads.reg_state_list[guc_class][engine->instance].count, 414 + 0); 415 415 continue; 416 416 } 417 417 418 - ads_reg_set->address = addr_ggtt; 419 - ads_reg_set->count = count; 418 + ads_blob_write(guc, 419 + ads.reg_state_list[guc_class][engine->instance].address, 420 + addr_ggtt); 421 + ads_blob_write(guc, 422 + ads.reg_state_list[guc_class][engine->instance].count, 423 + count); 420 424 421 425 addr_ggtt += count * sizeof(struct guc_mmio_reg); 422 426 } ··· 647 643 blob->ads.gt_system_info = base + ptr_offset(blob, system_info); 648 644 649 645 /* MMIO save/restore list */ 650 - guc_mmio_reg_state_init(guc, blob); 646 + guc_mmio_reg_state_init(guc); 651 647 652 648 /* Private Data */ 653 649 blob->ads.private_data = base + guc_ads_private_data_offset(guc);