Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/xe/xe3p_xpc: Treat all PSMI MCR ranges as "INSTANCE0"

Early versions of the B-spec originally indicated that Xe3p_XPC had two
ranges of PSMI registers requiring MCR steering (one starting at 0xB500,
one starting at 0xB600), and that reads of registers in these ranges
required different grpid values to ensure that a non-terminated value is
obtained. A late-breaking spec update has simplified this; both ranges
can be safely steered to grpid=0 for reads.

Drop the "PSMI19" replication type and related code, and consolidate
both register ranges into a single entry in the "INSTANCE0" steering
table.

Bspec: 74418
Fixes: be614ea19dad ("drm/xe/xe3p_xpc: Add MCR steering")
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20251021224556.437970-2-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

+1 -22
+1 -14
drivers/gpu/drm/xe/xe_gt_mcr.c
··· 268 268 {}, 269 269 }; 270 270 271 - static const struct xe_mmio_range xe3p_xpc_psmi_grp19_steering_table[] = { 272 - { 0x00B500, 0x00B5FF }, 273 - {}, 274 - }; 275 - 276 271 static const struct xe_mmio_range xe3p_xpc_instance0_steering_table[] = { 277 - { 0x00B600, 0x00B6FF }, /* PSMI0 */ 272 + { 0x00B500, 0x00B6FF }, /* PSMI */ 278 273 { 0x00C800, 0x00CFFF }, /* GAMCTRL */ 279 274 { 0x00F000, 0x00F0FF }, /* GAMCTRL */ 280 275 {}, ··· 447 452 gt->steering[SQIDI_PSMI].instance_target = select & 0x1; 448 453 } 449 454 450 - static void init_steering_psmi(struct xe_gt *gt) 451 - { 452 - gt->steering[PSMI19].group_target = 19; 453 - gt->steering[PSMI19].instance_target = 0; 454 - } 455 - 456 455 static void init_steering_gam1(struct xe_gt *gt) 457 456 { 458 457 gt->steering[GAM1].group_target = 1; ··· 463 474 [DSS] = { "DSS / XeCore", init_steering_dss }, 464 475 [OADDRM] = { "OADDRM / GPMXMT", init_steering_oaddrm }, 465 476 [SQIDI_PSMI] = { "SQIDI_PSMI", init_steering_sqidi_psmi }, 466 - [PSMI19] = { "PSMI[19]", init_steering_psmi }, 467 477 [GAM1] = { "GAMWKRS / STLB / GAMREQSTRM", init_steering_gam1 }, 468 478 [INSTANCE0] = { "INSTANCE 0", NULL }, 469 479 [IMPLICIT_STEERING] = { "IMPLICIT", NULL }, ··· 512 524 gt->steering[DSS].ranges = xe3p_xpc_xecore_steering_table; 513 525 gt->steering[GAM1].ranges = xe3p_xpc_gam_grp1_steering_table; 514 526 gt->steering[INSTANCE0].ranges = xe3p_xpc_instance0_steering_table; 515 - gt->steering[PSMI19].ranges = xe3p_xpc_psmi_grp19_steering_table; 516 527 } else if (GRAPHICS_VER(xe) >= 20) { 517 528 gt->steering[DSS].ranges = xe2lpg_dss_steering_table; 518 529 gt->steering[SQIDI_PSMI].ranges = xe2lpg_sqidi_psmi_steering_table;
-8
drivers/gpu/drm/xe/xe_gt_types.h
··· 73 73 SQIDI_PSMI, 74 74 75 75 /* 76 - * The bspec lists multiple ranges as "PSMI," but the different 77 - * ranges with that label have different grpid steering values so we 78 - * treat them independently in code. Note that the ranges with grpid=0 79 - * are included in the INSTANCE0 group above. 80 - */ 81 - PSMI19, 82 - 83 - /* 84 76 * Although most GAM ranges must be steered to (0,0) and thus use the 85 77 * INSTANCE0 type farther down, some platforms have special rules 86 78 * for specific subtypes that require steering to (1,0) instead.