Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Staging: comedi: remove comedi-specific wrappers

There are a number of comedi "wrappers" for some RT functions that are
about to go away. This patch removes all of the wrapper calls within
the comedi drivers and core in order to prepare for removing the RT
comedi code.

Cc: Ian Abbott <abbotti@mev.co.uk>
Cc: Frank Mori Hess <fmhess@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

+1026 -1061
+18 -19
drivers/staging/comedi/comedi_fops.c
··· 728 728 /* by default we allow the insn since we don't have checks for 729 729 * all possible cases yet */ 730 730 default: 731 - rt_printk("comedi: no check for data length of config insn id " 731 + printk("comedi: no check for data length of config insn id " 732 732 "%i is implemented.\n" 733 733 " Add a check to %s in %s.\n" 734 734 " Assuming n=%i is correct.\n", data[0], __func__, ··· 1219 1219 return -EINVAL; 1220 1220 s = dev->subdevices + arg; 1221 1221 1222 - comedi_spin_lock_irqsave(&s->spin_lock, flags); 1222 + spin_lock_irqsave(&s->spin_lock, flags); 1223 1223 if (s->busy || s->lock) 1224 1224 ret = -EBUSY; 1225 1225 else 1226 1226 s->lock = file; 1227 - comedi_spin_unlock_irqrestore(&s->spin_lock, flags); 1227 + spin_unlock_irqrestore(&s->spin_lock, flags); 1228 1228 1229 1229 if (ret < 0) 1230 1230 return ret; ··· 1984 1984 1985 1985 void comedi_error(const struct comedi_device *dev, const char *s) 1986 1986 { 1987 - rt_printk("comedi%d: %s: %s\n", dev->minor, dev->driver->driver_name, 1988 - s); 1987 + printk("comedi%d: %s: %s\n", dev->minor, dev->driver->driver_name, s); 1989 1988 } 1990 1989 1991 1990 void comedi_event(struct comedi_device *dev, struct comedi_subdevice *s) ··· 2053 2054 { 2054 2055 unsigned long flags; 2055 2056 2056 - comedi_spin_lock_irqsave(&s->spin_lock, flags); 2057 + spin_lock_irqsave(&s->spin_lock, flags); 2057 2058 s->runflags &= ~mask; 2058 2059 s->runflags |= (bits & mask); 2059 - comedi_spin_unlock_irqrestore(&s->spin_lock, flags); 2060 + spin_unlock_irqrestore(&s->spin_lock, flags); 2060 2061 } 2061 2062 2062 2063 unsigned comedi_get_subdevice_runflags(struct comedi_subdevice *s) ··· 2064 2065 unsigned long flags; 2065 2066 unsigned runflags; 2066 2067 2067 - comedi_spin_lock_irqsave(&s->spin_lock, flags); 2068 + spin_lock_irqsave(&s->spin_lock, flags); 2068 2069 runflags = s->runflags; 2069 - comedi_spin_unlock_irqrestore(&s->spin_lock, flags); 2070 + spin_unlock_irqrestore(&s->spin_lock, flags); 2070 2071 return runflags; 2071 2072 } 2072 2073 ··· 2124 2125 return -ENOMEM; 2125 2126 } 2126 2127 comedi_device_init(info->device); 2127 - comedi_spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2128 + spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2128 2129 for (i = 0; i < COMEDI_NUM_BOARD_MINORS; ++i) { 2129 2130 if (comedi_file_info_table[i] == NULL) { 2130 2131 comedi_file_info_table[i] = info; 2131 2132 break; 2132 2133 } 2133 2134 } 2134 - comedi_spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2135 + spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2135 2136 if (i == COMEDI_NUM_BOARD_MINORS) { 2136 2137 comedi_device_cleanup(info->device); 2137 2138 kfree(info->device); ··· 2183 2184 struct comedi_device_file_info *info; 2184 2185 2185 2186 BUG_ON(minor >= COMEDI_NUM_BOARD_MINORS); 2186 - comedi_spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2187 + spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2187 2188 info = comedi_file_info_table[minor]; 2188 2189 comedi_file_info_table[minor] = NULL; 2189 - comedi_spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2190 + spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2190 2191 2191 2192 if (info) { 2192 2193 struct comedi_device *dev = info->device; ··· 2217 2218 info->device = dev; 2218 2219 info->read_subdevice = s; 2219 2220 info->write_subdevice = s; 2220 - comedi_spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2221 + spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2221 2222 for (i = COMEDI_FIRST_SUBDEVICE_MINOR; i < COMEDI_NUM_MINORS; ++i) { 2222 2223 if (comedi_file_info_table[i] == NULL) { 2223 2224 comedi_file_info_table[i] = info; 2224 2225 break; 2225 2226 } 2226 2227 } 2227 - comedi_spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2228 + spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2228 2229 if (i == COMEDI_NUM_MINORS) { 2229 2230 kfree(info); 2230 2231 printk(KERN_ERR "comedi: error: ran out of minor numbers for board device files.\n"); ··· 2282 2283 BUG_ON(s->minor >= COMEDI_NUM_MINORS); 2283 2284 BUG_ON(s->minor < COMEDI_FIRST_SUBDEVICE_MINOR); 2284 2285 2285 - comedi_spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2286 + spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2286 2287 info = comedi_file_info_table[s->minor]; 2287 2288 comedi_file_info_table[s->minor] = NULL; 2288 - comedi_spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2289 + spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2289 2290 2290 2291 if (s->class_dev) { 2291 2292 device_destroy(comedi_class, MKDEV(COMEDI_MAJOR, s->minor)); ··· 2300 2301 struct comedi_device_file_info *info; 2301 2302 2302 2303 BUG_ON(minor >= COMEDI_NUM_MINORS); 2303 - comedi_spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2304 + spin_lock_irqsave(&comedi_file_info_table_lock, flags); 2304 2305 info = comedi_file_info_table[minor]; 2305 - comedi_spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2306 + spin_unlock_irqrestore(&comedi_file_info_table_lock, flags); 2306 2307 return info; 2307 2308 } 2308 2309
+3 -5
drivers/staging/comedi/drivers.c
··· 554 554 555 555 block_size = num_bytes - count; 556 556 if (block_size < 0) { 557 - rt_printk("%s: %s: bug! block_size is negative\n", 557 + printk("%s: %s: bug! block_size is negative\n", 558 558 __FILE__, __func__); 559 559 break; 560 560 } ··· 633 633 { 634 634 if ((int)(async->buf_write_count + nbytes - 635 635 async->buf_write_alloc_count) > 0) { 636 - rt_printk 637 - ("comedi: attempted to write-free more bytes than have been write-allocated.\n"); 636 + printk("comedi: attempted to write-free more bytes than have been write-allocated.\n"); 638 637 nbytes = async->buf_write_alloc_count - async->buf_write_count; 639 638 } 640 639 async->buf_write_count += nbytes; ··· 666 667 smp_mb(); 667 668 if ((int)(async->buf_read_count + nbytes - 668 669 async->buf_read_alloc_count) > 0) { 669 - rt_printk 670 - ("comedi: attempted to read-free more bytes than have been read-allocated.\n"); 670 + printk("comedi: attempted to read-free more bytes than have been read-allocated.\n"); 671 671 nbytes = async->buf_read_alloc_count - async->buf_read_count; 672 672 } 673 673 async->buf_read_count += nbytes;
+5 -5
drivers/staging/comedi/drivers/addi-data/addi_amcc_s5933.h
··· 343 343 *card = amcc; 344 344 return 0; /* ok, card is found */ 345 345 } else { 346 - rt_printk(" - \nCard on requested position is used b:s %d:%d!\n", 346 + printk(" - \nCard on requested position is used b:s %d:%d!\n", 347 347 pci_bus, pci_slot); 348 348 return 2; /* card exist but is used */ 349 349 } ··· 447 447 /* use autodetection */ 448 448 card = ptr_find_free_pci_card_by_device(vendor_id, device_id); 449 449 if (card == NULL) { 450 - rt_printk(" - Unused card not found in system!\n"); 450 + printk(" - Unused card not found in system!\n"); 451 451 return NULL; 452 452 } 453 453 } else { ··· 455 455 pci_bus, pci_slot, 456 456 &card)) { 457 457 case 1: 458 - rt_printk(" - Card not found on requested position b:s %d:%d!\n", 458 + printk(" - Card not found on requested position b:s %d:%d!\n", 459 459 pci_bus, pci_slot); 460 460 return NULL; 461 461 case 2: 462 - rt_printk(" - Card on requested position is used b:s %d:%d!\n", 462 + printk(" - Card on requested position is used b:s %d:%d!\n", 463 463 pci_bus, pci_slot); 464 464 return NULL; 465 465 } 466 466 } 467 467 468 468 if (pci_card_alloc(card, i_Master) != 0) { 469 - rt_printk(" - Can't allocate card!\n"); 469 + printk(" - Can't allocate card!\n"); 470 470 return NULL; 471 471 472 472 }
+7 -7
drivers/staging/comedi/drivers/addi-data/addi_common.c
··· 2583 2583 v_pci_card_list_init(this_board->i_VendorId, 1); /* 1 for displaying the list.. */ 2584 2584 pci_list_builded = 1; 2585 2585 } 2586 - /* rt_printk("comedi%d: addi_common: board=%s",dev->minor,this_board->pc_DriverName); */ 2586 + /* printk("comedi%d: addi_common: board=%s",dev->minor,this_board->pc_DriverName); */ 2587 2587 2588 2588 if ((this_board->i_Dma) && (it->options[2] == 0)) { 2589 2589 i_Dma = 1; ··· 2648 2648 /* ## */ 2649 2649 2650 2650 if (irq > 0) { 2651 - if (comedi_request_irq(irq, v_ADDI_Interrupt, IRQF_SHARED, 2651 + if (request_irq(irq, v_ADDI_Interrupt, IRQF_SHARED, 2652 2652 c_Identifier, dev) < 0) { 2653 2653 printk(", unable to allocate IRQ %u, DISABLING IT", 2654 2654 irq); 2655 2655 irq = 0; /* Can't use IRQ */ 2656 2656 } else { 2657 - rt_printk("\nirq=%u", irq); 2657 + printk("\nirq=%u", irq); 2658 2658 } 2659 2659 } else { 2660 - rt_printk(", IRQ disabled"); 2660 + printk(", IRQ disabled"); 2661 2661 } 2662 2662 2663 2663 printk("\nOption %d %d %d\n", it->options[0], it->options[1], ··· 2719 2719 } 2720 2720 } 2721 2721 if (!devpriv->ul_DmaBufferVirtual[0]) { 2722 - rt_printk 2722 + printk 2723 2723 (", Can't allocate DMA buffer, DMA disabled!"); 2724 2724 devpriv->us_UseDma = ADDI_DISABLE; 2725 2725 } ··· 2730 2730 } 2731 2731 2732 2732 if ((devpriv->us_UseDma == ADDI_ENABLE)) { 2733 - rt_printk("\nDMA ENABLED\n"); 2733 + printk("\nDMA ENABLED\n"); 2734 2734 } else { 2735 2735 printk("\nDMA DISABLED\n"); 2736 2736 } ··· 2937 2937 } 2938 2938 2939 2939 if (dev->irq) { 2940 - comedi_free_irq(dev->irq, dev); 2940 + free_irq(dev->irq, dev); 2941 2941 } 2942 2942 2943 2943 if ((devpriv->ps_BoardInfo->pc_EepromChip == NULL)
+5 -5
drivers/staging/comedi/drivers/addi-data/amcc_s5933_58.h
··· 335 335 *card = amcc; 336 336 return 0; /* ok, card is found */ 337 337 } else { 338 - rt_printk 338 + printk 339 339 (" - \nCard on requested position is used b:s %d:%d!\n", 340 340 pci_bus, pci_slot); 341 341 return 2; /* card exist but is used */ ··· 425 425 if ((pci_bus < 1) & (pci_slot < 1)) { /* use autodetection */ 426 426 card = ptr_find_free_pci_card_by_device(vendor_id, device_id); 427 427 if (card == NULL) { 428 - rt_printk(" - Unused card not found in system!\n"); 428 + printk(" - Unused card not found in system!\n"); 429 429 return NULL; 430 430 } 431 431 } else { ··· 433 433 pci_bus, pci_slot, 434 434 &card)) { 435 435 case 1: 436 - rt_printk 436 + printk 437 437 (" - Card not found on requested position b:s %d:%d!\n", 438 438 pci_bus, pci_slot); 439 439 return NULL; 440 440 case 2: 441 - rt_printk 441 + printk 442 442 (" - Card on requested position is used b:s %d:%d!\n", 443 443 pci_bus, pci_slot); 444 444 return NULL; ··· 446 446 } 447 447 448 448 if (i_pci_card_alloc(card) != 0) { 449 - rt_printk(" - Can't allocate card!\n"); 449 + printk(" - Can't allocate card!\n"); 450 450 return NULL; 451 451 } 452 452
+1 -1
drivers/staging/comedi/drivers/addi-data/hwdrv_apci3120.c
··· 2637 2637 } 2638 2638 2639 2639 /* 2640 - * out put n values at the given channel. rt_printk("\nwaiting for 2640 + * out put n values at the given channel. printk("\nwaiting for 2641 2641 * DA_READY BIT"); 2642 2642 */ 2643 2643 do /* Waiting of DA_READY BIT */
+7 -8
drivers/staging/comedi/drivers/adl_pci9111.c
··· 420 420 PCI9111_8254_READ_LOAD_LSB_MSB | 421 421 PCI9111_8254_MODE_2 | PCI9111_8254_BINARY_COUNTER); 422 422 423 - comedi_udelay(1); 423 + udelay(1); 424 424 425 425 pci9111_8254_counter_2_set(dev_private->timer_divisor_2); 426 426 pci9111_8254_counter_1_set(dev_private->timer_divisor_1); ··· 901 901 902 902 async = subdevice->async; 903 903 904 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 904 + spin_lock_irqsave(&dev->spinlock, irq_flags); 905 905 906 906 /* Check if we are source of interrupt */ 907 907 intcsr = inb(dev_private->lcr_io_base + ··· 919 919 PLX9050_LINTI2_STATUS))))) { 920 920 /* Not the source of the interrupt. */ 921 921 /* (N.B. not using PLX9050_SOFTWARE_INTERRUPT) */ 922 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 922 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 923 923 return IRQ_NONE; 924 924 } 925 925 ··· 928 928 /* Interrupt comes from fifo_half-full signal */ 929 929 930 930 if (pci9111_is_fifo_full()) { 931 - comedi_spin_unlock_irqrestore(&dev->spinlock, 931 + spin_unlock_irqrestore(&dev->spinlock, 932 932 irq_flags); 933 933 comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow"); 934 934 pci9111_interrupt_clear(); ··· 1028 1028 1029 1029 pci9111_interrupt_clear(); 1030 1030 1031 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1031 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1032 1032 1033 1033 comedi_event(dev, subdevice); 1034 1034 ··· 1298 1298 1299 1299 dev->irq = 0; 1300 1300 if (pci_device->irq > 0) { 1301 - if (comedi_request_irq(pci_device->irq, 1302 - pci9111_interrupt, 1301 + if (request_irq(pci_device->irq, pci9111_interrupt, 1303 1302 IRQF_SHARED, PCI9111_DRIVER_NAME, dev) != 0) { 1304 1303 printk("comedi%d: unable to allocate irq %u\n", 1305 1304 dev->minor, pci_device->irq); ··· 1378 1379 /* Release previously allocated irq */ 1379 1380 1380 1381 if (dev->irq != 0) { 1381 - comedi_free_irq(dev->irq, dev); 1382 + free_irq(dev->irq, dev); 1382 1383 } 1383 1384 1384 1385 if (dev_private != 0 && dev_private->pci_device != 0) {
+33 -33
drivers/staging/comedi/drivers/adl_pci9118.c
··· 80 80 81 81 #undef DPRINTK 82 82 #ifdef PCI9118_EXTDEBUG 83 - #define DPRINTK(fmt, args...) rt_printk(fmt, ## args) 83 + #define DPRINTK(fmt, args...) printk(fmt, ## args) 84 84 #else 85 85 #define DPRINTK(fmt, args...) 86 86 #endif ··· 345 345 346 346 for (n = 0; n < insn->n; n++) { 347 347 outw(0, dev->iobase + PCI9118_SOFTTRG); /* start conversion */ 348 - comedi_udelay(2); 348 + udelay(2); 349 349 timeout = 100; 350 350 while (timeout--) { 351 351 if (inl(dev->iobase + PCI9118_ADSTAT) & AdStatus_ADrdy) 352 352 goto conv_finish; 353 - comedi_udelay(1); 353 + udelay(1); 354 354 } 355 355 356 356 comedi_error(dev, "A/D insn timeout"); ··· 569 569 #ifdef PCI9118_PARANOIDCHECK 570 570 if (devpriv->ai16bits == 0) { 571 571 if ((sampl & 0x000f) != devpriv->chanlist[s->async->cur_chan]) { /* data dropout! */ 572 - rt_printk 572 + printk 573 573 ("comedi: A/D SAMPL - data dropout: received channel %d, expected %d!\n", 574 574 sampl & 0x000f, 575 575 devpriv->chanlist[s->async->cur_chan]); ··· 950 950 951 951 if (cmd->scan_begin_src == TRIG_TIMER) { 952 952 tmp = cmd->scan_begin_arg; 953 - /* rt_printk("S1 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 953 + /* printk("S1 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 954 954 i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, &divisor1, 955 955 &divisor2, &cmd->scan_begin_arg, 956 956 cmd->flags & TRIG_ROUND_MASK); 957 - /* rt_printk("S2 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 957 + /* printk("S2 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 958 958 if (cmd->scan_begin_arg < this_board->ai_ns_min) 959 959 cmd->scan_begin_arg = this_board->ai_ns_min; 960 960 if (tmp != cmd->scan_begin_arg) ··· 966 966 i8253_cascade_ns_to_timer(devpriv->i8254_osc_base, &divisor1, 967 967 &divisor2, &cmd->convert_arg, 968 968 cmd->flags & TRIG_ROUND_MASK); 969 - /* rt_printk("s1 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 969 + /* printk("s1 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 970 970 if (cmd->convert_arg < this_board->ai_ns_min) 971 971 cmd->convert_arg = this_board->ai_ns_min; 972 972 if (tmp != cmd->convert_arg) ··· 980 980 cmd->scan_begin_arg = 981 981 this_board->ai_ns_min * 982 982 (cmd->scan_end_arg + 2); 983 - /* rt_printk("s2 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 983 + /* printk("s2 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 984 984 err++; 985 985 } 986 986 } else { ··· 989 989 cmd->scan_begin_arg = 990 990 cmd->convert_arg * 991 991 cmd->chanlist_len; 992 - /* rt_printk("s3 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 992 + /* printk("s3 timer1=%u timer2=%u\n",cmd->scan_begin_arg,cmd->convert_arg); */ 993 993 err++; 994 994 } 995 995 } ··· 1033 1033 if (dmalen0 < (devpriv->ai_n_realscanlen << 1)) { 1034 1034 /* uff, too short DMA buffer, disable EOS support! */ 1035 1035 devpriv->ai_flags &= (~TRIG_WAKE_EOS); 1036 - rt_printk 1036 + printk 1037 1037 ("comedi%d: WAR: DMA0 buf too short, cann't support TRIG_WAKE_EOS (%d<%d)\n", 1038 1038 dev->minor, dmalen0, 1039 1039 devpriv->ai_n_realscanlen << 1); ··· 1044 1044 if (devpriv->useeoshandle) 1045 1045 dmalen0 += 2; 1046 1046 if (dmalen0 < 4) { 1047 - rt_printk 1047 + printk 1048 1048 ("comedi%d: ERR: DMA0 buf len bug? (%d<4)\n", 1049 1049 dev->minor, dmalen0); 1050 1050 dmalen0 = 4; ··· 1055 1055 if (dmalen1 < (devpriv->ai_n_realscanlen << 1)) { 1056 1056 /* uff, too short DMA buffer, disable EOS support! */ 1057 1057 devpriv->ai_flags &= (~TRIG_WAKE_EOS); 1058 - rt_printk 1058 + printk 1059 1059 ("comedi%d: WAR: DMA1 buf too short, cann't support TRIG_WAKE_EOS (%d<%d)\n", 1060 1060 dev->minor, dmalen1, 1061 1061 devpriv->ai_n_realscanlen << 1); ··· 1066 1066 if (devpriv->useeoshandle) 1067 1067 dmalen1 -= 2; 1068 1068 if (dmalen1 < 4) { 1069 - rt_printk 1069 + printk 1070 1070 ("comedi%d: ERR: DMA1 buf len bug? (%d<4)\n", 1071 1071 dev->minor, dmalen1); 1072 1072 dmalen1 = 4; ··· 1464 1464 outl(devpriv->AdControlReg, dev->iobase + PCI9118_ADCNTRL); 1465 1465 devpriv->AdFunctionReg = AdFunction_PDTrg | AdFunction_PETrg; /* positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop */ 1466 1466 outl(devpriv->AdFunctionReg, dev->iobase + PCI9118_ADFUNC); 1467 - comedi_udelay(1); 1467 + udelay(1); 1468 1468 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ 1469 1469 inl(dev->iobase + PCI9118_ADSTAT); /* flush A/D and INT status register */ 1470 1470 inl(dev->iobase + PCI9118_INTSRC); ··· 1497 1497 return 0; 1498 1498 } 1499 1499 if ((frontadd + n_chan + backadd) > s->len_chanlist) { 1500 - rt_printk 1500 + printk 1501 1501 ("comedi%d: range/channel list is too long for actual configuration (%d>%d)!", 1502 1502 dev->minor, n_chan, 1503 1503 s->len_chanlist - frontadd - backadd); ··· 1641 1641 #endif 1642 1642 #endif 1643 1643 outl(0, dev->iobase + PCI9118_SCANMOD); /* close scan queue */ 1644 - /* comedi_udelay(100); important delay, or first sample will be cripled */ 1644 + /* udelay(100); important delay, or first sample will be cripled */ 1645 1645 1646 1646 DPRINTK("adl_pci9118 EDBG: END: setup_channel_list()\n"); 1647 1647 return 1; /* we can serve this with scan logic */ ··· 1716 1716 outl(0x74, dev->iobase + PCI9118_CNTCTRL); 1717 1717 outl(0xb4, dev->iobase + PCI9118_CNTCTRL); 1718 1718 /* outl(0x30, dev->iobase + PCI9118_CNTCTRL); */ 1719 - comedi_udelay(1); 1719 + udelay(1); 1720 1720 1721 1721 if ((mode == 1) || (mode == 2) || (mode == 4)) { 1722 1722 outl(divisor2 & 0xff, dev->iobase + PCI9118_CNT2); ··· 1817 1817 outl(devpriv->ao_data[0], dev->iobase + PCI9118_DA1); /* reset A/D outs to 0V */ 1818 1818 outl(devpriv->ao_data[1], dev->iobase + PCI9118_DA2); 1819 1819 outl(0, dev->iobase + PCI9118_DO); /* reset digi outs to L */ 1820 - comedi_udelay(10); 1820 + udelay(10); 1821 1821 inl(dev->iobase + PCI9118_AD_DATA); 1822 1822 outl(0, dev->iobase + PCI9118_DELFIFO); /* flush FIFO */ 1823 1823 outl(0, dev->iobase + PCI9118_INTSRC); /* remove INT requests */ ··· 1848 1848 unsigned char pci_bus, pci_slot, pci_func; 1849 1849 u16 u16w; 1850 1850 1851 - rt_printk("comedi%d: adl_pci9118: board=%s", dev->minor, 1851 + printk("comedi%d: adl_pci9118: board=%s", dev->minor, 1852 1852 this_board->name); 1853 1853 1854 1854 opt_bus = it->options[0]; ··· 1861 1861 1862 1862 ret = alloc_private(dev, sizeof(struct pci9118_private)); 1863 1863 if (ret < 0) { 1864 - rt_printk(" - Allocation failed!\n"); 1864 + printk(" - Allocation failed!\n"); 1865 1865 return -ENOMEM; 1866 1866 } 1867 1867 ··· 1890 1890 1891 1891 if (!pcidev) { 1892 1892 if (opt_bus || opt_slot) { 1893 - rt_printk(" - Card at b:s %d:%d %s\n", 1893 + printk(" - Card at b:s %d:%d %s\n", 1894 1894 opt_bus, opt_slot, errstr); 1895 1895 } else { 1896 - rt_printk(" - Card %s\n", errstr); 1896 + printk(" - Card %s\n", errstr); 1897 1897 } 1898 1898 return -EIO; 1899 1899 } ··· 1909 1909 iobase_a = pci_resource_start(pcidev, 0); 1910 1910 iobase_9 = pci_resource_start(pcidev, 2); 1911 1911 1912 - rt_printk(", b:s:f=%d:%d:%d, io=0x%4lx, 0x%4lx", pci_bus, pci_slot, 1912 + printk(", b:s:f=%d:%d:%d, io=0x%4lx, 0x%4lx", pci_bus, pci_slot, 1913 1913 pci_func, iobase_9, iobase_a); 1914 1914 1915 1915 dev->iobase = iobase_9; ··· 1923 1923 if (it->options[3] & 2) 1924 1924 irq = 0; /* user don't want use IRQ */ 1925 1925 if (irq > 0) { 1926 - if (comedi_request_irq(irq, interrupt_pci9118, IRQF_SHARED, 1926 + if (request_irq(irq, interrupt_pci9118, IRQF_SHARED, 1927 1927 "ADLink PCI-9118", dev)) { 1928 - rt_printk(", unable to allocate IRQ %d, DISABLING IT", 1928 + printk(", unable to allocate IRQ %d, DISABLING IT", 1929 1929 irq); 1930 1930 irq = 0; /* Can't use IRQ */ 1931 1931 } else { 1932 - rt_printk(", irq=%u", irq); 1932 + printk(", irq=%u", irq); 1933 1933 } 1934 1934 } else { 1935 - rt_printk(", IRQ disabled"); 1935 + printk(", IRQ disabled"); 1936 1936 } 1937 1937 1938 1938 dev->irq = irq; ··· 1958 1958 } 1959 1959 } 1960 1960 if (!devpriv->dmabuf_virt[0]) { 1961 - rt_printk(", Can't allocate DMA buffer, DMA disabled!"); 1961 + printk(", Can't allocate DMA buffer, DMA disabled!"); 1962 1962 master = 0; 1963 1963 } 1964 1964 ··· 1969 1969 1970 1970 devpriv->master = master; 1971 1971 if (devpriv->master) 1972 - rt_printk(", bus master"); 1972 + printk(", bus master"); 1973 1973 else 1974 - rt_printk(", no bus master"); 1974 + printk(", no bus master"); 1975 1975 1976 1976 devpriv->usemux = 0; 1977 1977 if (it->options[2] > 0) { ··· 1982 1982 if (devpriv->usemux > 128) { 1983 1983 devpriv->usemux = 128; /* max 128 channels with softare S&H! */ 1984 1984 } 1985 - rt_printk(", ext. mux %d channels", devpriv->usemux); 1985 + printk(", ext. mux %d channels", devpriv->usemux); 1986 1986 } 1987 1987 1988 1988 devpriv->softsshdelay = it->options[4]; ··· 1995 1995 devpriv->softsshhold = 0x80; 1996 1996 } 1997 1997 1998 - rt_printk(".\n"); 1998 + printk(".\n"); 1999 1999 2000 2000 pci_read_config_word(devpriv->pcidev, PCI_COMMAND, &u16w); 2001 2001 pci_write_config_word(devpriv->pcidev, PCI_COMMAND, u16w | 64); /* Enable parity check for parity error */ ··· 2081 2081 if (devpriv->valid) 2082 2082 pci9118_reset(dev); 2083 2083 if (dev->irq) 2084 - comedi_free_irq(dev->irq, dev); 2084 + free_irq(dev->irq, dev); 2085 2085 if (devpriv->pcidev) { 2086 2086 if (dev->iobase) { 2087 2087 comedi_pci_disable(devpriv->pcidev);
+3 -3
drivers/staging/comedi/drivers/adq12b.c
··· 325 325 channel = CR_CHAN(insn->chanspec); 326 326 if (channel != devpriv->last_channel || range != devpriv->last_range) { 327 327 outb((range << 4) | channel, dev->iobase + ADQ12B_CTREG); 328 - comedi_udelay(50); /* wait for the mux to settle */ 328 + udelay(50); /* wait for the mux to settle */ 329 329 } 330 330 331 331 /* trigger conversion */ ··· 337 337 /* wait for end of convertion */ 338 338 i = 0; 339 339 do { 340 - /* comedi_udelay(1); */ 340 + /* udelay(1); */ 341 341 status = inb(dev->iobase + ADQ12B_STINR); 342 342 status = status & ADQ12B_EOC; 343 343 } while (status == 0 && ++i < TIMEOUT); ··· 347 347 hi = inb(dev->iobase + ADQ12B_ADHIG); 348 348 lo = inb(dev->iobase + ADQ12B_ADLOW); 349 349 350 - /* rt_printk("debug: chan=%d range=%d status=%d hi=%d lo=%d\n", channel, range, status, hi, lo); */ 350 + /* printk("debug: chan=%d range=%d status=%d hi=%d lo=%d\n", channel, range, status, hi, lo); */ 351 351 data[n] = (hi << 8) | lo; 352 352 353 353 }
+27 -27
drivers/staging/comedi/drivers/adv_pci1710.c
··· 58 58 59 59 #undef DPRINTK 60 60 #ifdef PCI171X_EXTDEBUG 61 - #define DPRINTK(fmt, args...) rt_printk(fmt, ## args) 61 + #define DPRINTK(fmt, args...) printk(fmt, ## args) 62 62 #else 63 63 #define DPRINTK(fmt, args...) 64 64 #endif ··· 348 348 outw(0, dev->iobase + PCI171x_SOFTTRG); /* start conversion */ 349 349 DPRINTK("adv_pci1710 B n=%d ST=%4x\n", n, 350 350 inw(dev->iobase + PCI171x_STATUS)); 351 - /* comedi_udelay(1); */ 351 + /* udelay(1); */ 352 352 DPRINTK("adv_pci1710 C n=%d ST=%4x\n", n, 353 353 inw(dev->iobase + PCI171x_STATUS)); 354 354 timeout = 100; ··· 588 588 DPRINTK("adv_pci1710 EDBG: BGN: interrupt_pci1710_every_sample(...)\n"); 589 589 m = inw(dev->iobase + PCI171x_STATUS); 590 590 if (m & Status_FE) { 591 - rt_printk("comedi%d: A/D FIFO empty (%4x)\n", dev->minor, m); 591 + printk("comedi%d: A/D FIFO empty (%4x)\n", dev->minor, m); 592 592 pci171x_ai_cancel(dev, s); 593 593 s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR; 594 594 comedi_event(dev, s); 595 595 return; 596 596 } 597 597 if (m & Status_FF) { 598 - rt_printk 598 + printk 599 599 ("comedi%d: A/D FIFO Full status (Fatal Error!) (%4x)\n", 600 600 dev->minor, m); 601 601 pci171x_ai_cancel(dev, s); ··· 614 614 if (this_board->cardtype != TYPE_PCI1713) 615 615 if ((sampl & 0xf000) != 616 616 devpriv->act_chanlist[s->async->cur_chan]) { 617 - rt_printk 617 + printk 618 618 ("comedi: A/D data dropout: received data from channel %d, expected %d!\n", 619 619 (sampl & 0xf000) >> 12, 620 620 (devpriv->act_chanlist[s->async-> ··· 676 676 sampl = inw(dev->iobase + PCI171x_AD_DATA); 677 677 if (this_board->cardtype != TYPE_PCI1713) 678 678 if ((sampl & 0xf000) != devpriv->act_chanlist[j]) { 679 - rt_printk 679 + printk 680 680 ("comedi%d: A/D FIFO data dropout: received data from channel %d, expected %d! (%d/%d/%d/%d/%d/%4x)\n", 681 681 dev->minor, (sampl & 0xf000) >> 12, 682 682 (devpriv-> ··· 716 716 DPRINTK("adv_pci1710 EDBG: BGN: interrupt_pci1710_half_fifo(...)\n"); 717 717 m = inw(dev->iobase + PCI171x_STATUS); 718 718 if (!(m & Status_FH)) { 719 - rt_printk("comedi%d: A/D FIFO not half full! (%4x)\n", 719 + printk("comedi%d: A/D FIFO not half full! (%4x)\n", 720 720 dev->minor, m); 721 721 pci171x_ai_cancel(dev, s); 722 722 s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR; ··· 724 724 return; 725 725 } 726 726 if (m & Status_FF) { 727 - rt_printk 727 + printk 728 728 ("comedi%d: A/D FIFO Full status (Fatal Error!) (%4x)\n", 729 729 dev->minor, m); 730 730 pci171x_ai_cancel(dev, s); ··· 888 888 */ 889 889 static void pci171x_cmdtest_out(int e, struct comedi_cmd *cmd) 890 890 { 891 - rt_printk("adv_pci1710 e=%d startsrc=%x scansrc=%x convsrc=%x\n", e, 891 + printk("adv_pci1710 e=%d startsrc=%x scansrc=%x convsrc=%x\n", e, 892 892 cmd->start_src, cmd->scan_begin_src, cmd->convert_src); 893 - rt_printk("adv_pci1710 e=%d startarg=%d scanarg=%d convarg=%d\n", e, 893 + printk("adv_pci1710 e=%d startarg=%d scanarg=%d convarg=%d\n", e, 894 894 cmd->start_arg, cmd->scan_begin_arg, cmd->convert_arg); 895 - rt_printk("adv_pci1710 e=%d stopsrc=%x scanend=%x\n", e, cmd->stop_src, 895 + printk("adv_pci1710 e=%d stopsrc=%x scanend=%x\n", e, cmd->stop_src, 896 896 cmd->scan_end_src); 897 - rt_printk("adv_pci1710 e=%d stoparg=%d scanendarg=%d chanlistlen=%d\n", 897 + printk("adv_pci1710 e=%d stoparg=%d scanendarg=%d chanlistlen=%d\n", 898 898 e, cmd->stop_arg, cmd->scan_end_arg, cmd->chanlist_len); 899 899 } 900 900 #endif ··· 1122 1122 if (n_chan > 1) { 1123 1123 chansegment[0] = chanlist[0]; /* first channel is everytime ok */ 1124 1124 for (i = 1, seglen = 1; i < n_chan; i++, seglen++) { /* build part of chanlist */ 1125 - /* rt_printk("%d. %d %d\n",i,CR_CHAN(chanlist[i]),CR_RANGE(chanlist[i])); */ 1125 + /* printk("%d. %d %d\n",i,CR_CHAN(chanlist[i]),CR_RANGE(chanlist[i])); */ 1126 1126 if (chanlist[0] == chanlist[i]) 1127 1127 break; /* we detect loop, this must by finish */ 1128 1128 if (CR_CHAN(chanlist[i]) & 1) /* odd channel cann't by differencial */ ··· 1136 1136 if (CR_AREF(chansegment[i - 1]) == AREF_DIFF) 1137 1137 nowmustbechan = (nowmustbechan + 1) % s->n_chan; 1138 1138 if (nowmustbechan != CR_CHAN(chanlist[i])) { /* channel list isn't continous :-( */ 1139 - rt_printk 1139 + printk 1140 1140 ("channel list must be continous! chanlist[%i]=%d but must be %d or %d!\n", 1141 1141 i, CR_CHAN(chanlist[i]), nowmustbechan, 1142 1142 CR_CHAN(chanlist[0])); ··· 1146 1146 } 1147 1147 1148 1148 for (i = 0, segpos = 0; i < n_chan; i++) { /* check whole chanlist */ 1149 - /* rt_printk("%d %d=%d %d\n",CR_CHAN(chansegment[i%seglen]),CR_RANGE(chansegment[i%seglen]),CR_CHAN(chanlist[i]),CR_RANGE(chanlist[i])); */ 1149 + /* printk("%d %d=%d %d\n",CR_CHAN(chansegment[i%seglen]),CR_RANGE(chansegment[i%seglen]),CR_CHAN(chanlist[i]),CR_RANGE(chanlist[i])); */ 1150 1150 if (chanlist[i] != chansegment[i % seglen]) { 1151 - rt_printk 1151 + printk 1152 1152 ("bad channel, reference or range number! chanlist[%i]=%d,%d,%d and not %d,%d,%d!\n", 1153 1153 i, CR_CHAN(chansegment[i]), 1154 1154 CR_RANGE(chansegment[i]), ··· 1331 1331 int i; 1332 1332 int board_index; 1333 1333 1334 - rt_printk("comedi%d: adv_pci1710: ", dev->minor); 1334 + printk("comedi%d: adv_pci1710: ", dev->minor); 1335 1335 1336 1336 opt_bus = it->options[0]; 1337 1337 opt_slot = it->options[1]; 1338 1338 1339 1339 ret = alloc_private(dev, sizeof(struct pci1710_private)); 1340 1340 if (ret < 0) { 1341 - rt_printk(" - Allocation failed!\n"); 1341 + printk(" - Allocation failed!\n"); 1342 1342 return -ENOMEM; 1343 1343 } 1344 1344 ··· 1386 1386 1387 1387 if (!pcidev) { 1388 1388 if (opt_bus || opt_slot) { 1389 - rt_printk(" - Card at b:s %d:%d %s\n", 1389 + printk(" - Card at b:s %d:%d %s\n", 1390 1390 opt_bus, opt_slot, errstr); 1391 1391 } else { 1392 - rt_printk(" - Card %s\n", errstr); 1392 + printk(" - Card %s\n", errstr); 1393 1393 } 1394 1394 return -EIO; 1395 1395 } ··· 1400 1400 irq = pcidev->irq; 1401 1401 iobase = pci_resource_start(pcidev, 2); 1402 1402 1403 - rt_printk(", b:s:f=%d:%d:%d, io=0x%4lx", pci_bus, pci_slot, pci_func, 1403 + printk(", b:s:f=%d:%d:%d, io=0x%4lx", pci_bus, pci_slot, pci_func, 1404 1404 iobase); 1405 1405 1406 1406 dev->iobase = iobase; ··· 1422 1422 1423 1423 ret = alloc_subdevices(dev, n_subdevices); 1424 1424 if (ret < 0) { 1425 - rt_printk(" - Allocation failed!\n"); 1425 + printk(" - Allocation failed!\n"); 1426 1426 return ret; 1427 1427 } 1428 1428 ··· 1430 1430 1431 1431 if (this_board->have_irq) { 1432 1432 if (irq) { 1433 - if (comedi_request_irq(irq, interrupt_service_pci1710, 1433 + if (request_irq(irq, interrupt_service_pci1710, 1434 1434 IRQF_SHARED, "Advantech PCI-1710", 1435 1435 dev)) { 1436 - rt_printk 1436 + printk 1437 1437 (", unable to allocate IRQ %d, DISABLING IT", 1438 1438 irq); 1439 1439 irq = 0; /* Can't use IRQ */ 1440 1440 } else { 1441 - rt_printk(", irq=%u", irq); 1441 + printk(", irq=%u", irq); 1442 1442 } 1443 1443 } else { 1444 - rt_printk(", IRQ disabled"); 1444 + printk(", IRQ disabled"); 1445 1445 } 1446 1446 } else { 1447 1447 irq = 0; ··· 1551 1551 if (devpriv->valid) 1552 1552 pci1710_reset(dev); 1553 1553 if (dev->irq) 1554 - comedi_free_irq(dev->irq, dev); 1554 + free_irq(dev->irq, dev); 1555 1555 if (devpriv->pcidev) { 1556 1556 if (dev->iobase) { 1557 1557 comedi_pci_disable(devpriv->pcidev);
+6 -6
drivers/staging/comedi/drivers/adv_pci1723.c
··· 304 304 int opt_bus, opt_slot; 305 305 const char *errstr; 306 306 307 - rt_printk("comedi%d: adv_pci1723: board=%s", dev->minor, 307 + printk("comedi%d: adv_pci1723: board=%s", dev->minor, 308 308 this_board->name); 309 309 310 310 opt_bus = it->options[0]; ··· 312 312 313 313 ret = alloc_private(dev, sizeof(struct pci1723_private)); 314 314 if (ret < 0) { 315 - rt_printk(" - Allocation failed!\n"); 315 + printk(" - Allocation failed!\n"); 316 316 return -ENOMEM; 317 317 } 318 318 ··· 342 342 343 343 if (!pcidev) { 344 344 if (opt_bus || opt_slot) { 345 - rt_printk(" - Card at b:s %d:%d %s\n", 345 + printk(" - Card at b:s %d:%d %s\n", 346 346 opt_bus, opt_slot, errstr); 347 347 } else { 348 - rt_printk(" - Card %s\n", errstr); 348 + printk(" - Card %s\n", errstr); 349 349 } 350 350 return -EIO; 351 351 } ··· 355 355 pci_func = PCI_FUNC(pcidev->devfn); 356 356 iobase = pci_resource_start(pcidev, 2); 357 357 358 - rt_printk(", b:s:f=%d:%d:%d, io=0x%4x", pci_bus, pci_slot, pci_func, 358 + printk(", b:s:f=%d:%d:%d, io=0x%4x", pci_bus, pci_slot, pci_func, 359 359 iobase); 360 360 361 361 dev->iobase = iobase; ··· 372 372 373 373 ret = alloc_subdevices(dev, n_subdevices); 374 374 if (ret < 0) { 375 - rt_printk(" - Allocation failed!\n"); 375 + printk(" - Allocation failed!\n"); 376 376 return ret; 377 377 } 378 378
+9 -9
drivers/staging/comedi/drivers/adv_pci_dio.c
··· 40 40 41 41 #undef DPRINTK 42 42 #ifdef PCI_DIO_EXTDEBUG 43 - #define DPRINTK(fmt, args...) rt_printk(fmt, ## args) 43 + #define DPRINTK(fmt, args...) printk(fmt, ## args) 44 44 #else 45 45 #define DPRINTK(fmt, args...) 46 46 #endif ··· 451 451 ok = 1; 452 452 break; 453 453 } 454 - comedi_udelay(1); 454 + udelay(1); 455 455 } 456 456 if (ok) 457 457 return 0; ··· 896 896 unsigned long iobase; 897 897 struct pci_dev *pcidev; 898 898 899 - rt_printk("comedi%d: adv_pci_dio: ", dev->minor); 899 + printk("comedi%d: adv_pci_dio: ", dev->minor); 900 900 901 901 ret = alloc_private(dev, sizeof(struct pci_dio_private)); 902 902 if (ret < 0) { 903 - rt_printk(", Error: Cann't allocate private memory!\n"); 903 + printk(", Error: Cann't allocate private memory!\n"); 904 904 return -ENOMEM; 905 905 } 906 906 ··· 932 932 } 933 933 934 934 if (!dev->board_ptr) { 935 - rt_printk 935 + printk 936 936 (", Error: Requested type of the card was not found!\n"); 937 937 return -EIO; 938 938 } 939 939 940 940 if (comedi_pci_enable(pcidev, driver_pci_dio.driver_name)) { 941 - rt_printk 941 + printk 942 942 (", Error: Can't enable PCI device and request regions!\n"); 943 943 return -EIO; 944 944 } 945 945 iobase = pci_resource_start(pcidev, this_board->main_pci_region); 946 - rt_printk(", b:s:f=%d:%d:%d, io=0x%4lx", 946 + printk(", b:s:f=%d:%d:%d, io=0x%4lx", 947 947 pcidev->bus->number, PCI_SLOT(pcidev->devfn), 948 948 PCI_FUNC(pcidev->devfn), iobase); 949 949 ··· 968 968 969 969 ret = alloc_subdevices(dev, n_subdevices); 970 970 if (ret < 0) { 971 - rt_printk(", Error: Cann't allocate subdevice memory!\n"); 971 + printk(", Error: Cann't allocate subdevice memory!\n"); 972 972 return ret; 973 973 } 974 974 975 - rt_printk(".\n"); 975 + printk(".\n"); 976 976 977 977 subdev = 0; 978 978
+1 -1
drivers/staging/comedi/drivers/aio_aio12_8.c
··· 110 110 !(inb(dev->iobase + AIO12_8_STATUS) & STATUS_ADC_EOC)) { 111 111 timeout--; 112 112 printk("timeout %d\n", timeout); 113 - comedi_udelay(1); 113 + udelay(1); 114 114 } 115 115 if (timeout == 0) { 116 116 comedi_error(dev, "ADC timeout");
+10 -10
drivers/staging/comedi/drivers/amplc_dio200.c
··· 655 655 656 656 subpriv = s->private; 657 657 658 - comedi_spin_lock_irqsave(&subpriv->spinlock, flags); 658 + spin_lock_irqsave(&subpriv->spinlock, flags); 659 659 s->async->inttrig = 0; 660 660 if (subpriv->active) { 661 661 event = dio200_start_intr(dev, s); 662 662 } 663 - comedi_spin_unlock_irqrestore(&subpriv->spinlock, flags); 663 + spin_unlock_irqrestore(&subpriv->spinlock, flags); 664 664 665 665 if (event) { 666 666 comedi_event(dev, s); ··· 684 684 685 685 triggered = 0; 686 686 687 - comedi_spin_lock_irqsave(&subpriv->spinlock, flags); 687 + spin_lock_irqsave(&subpriv->spinlock, flags); 688 688 oldevents = s->async->events; 689 689 if (subpriv->has_int_sce) { 690 690 /* ··· 773 773 } 774 774 } 775 775 } 776 - comedi_spin_unlock_irqrestore(&subpriv->spinlock, flags); 776 + spin_unlock_irqrestore(&subpriv->spinlock, flags); 777 777 778 778 if (oldevents != s->async->events) { 779 779 comedi_event(dev, s); ··· 790 790 struct dio200_subdev_intr *subpriv = s->private; 791 791 unsigned long flags; 792 792 793 - comedi_spin_lock_irqsave(&subpriv->spinlock, flags); 793 + spin_lock_irqsave(&subpriv->spinlock, flags); 794 794 if (subpriv->active) { 795 795 dio200_stop_intr(dev, s); 796 796 } 797 - comedi_spin_unlock_irqrestore(&subpriv->spinlock, flags); 797 + spin_unlock_irqrestore(&subpriv->spinlock, flags); 798 798 799 799 return 0; 800 800 } ··· 916 916 unsigned long flags; 917 917 int event = 0; 918 918 919 - comedi_spin_lock_irqsave(&subpriv->spinlock, flags); 919 + spin_lock_irqsave(&subpriv->spinlock, flags); 920 920 subpriv->active = 1; 921 921 922 922 /* Set up end of acquisition. */ ··· 942 942 event = dio200_start_intr(dev, s); 943 943 break; 944 944 } 945 - comedi_spin_unlock_irqrestore(&subpriv->spinlock, flags); 945 + spin_unlock_irqrestore(&subpriv->spinlock, flags); 946 946 947 947 if (event) { 948 948 comedi_event(dev, s); ··· 1398 1398 if (irq) { 1399 1399 unsigned long flags = share_irq ? IRQF_SHARED : 0; 1400 1400 1401 - if (comedi_request_irq(irq, dio200_interrupt, flags, 1401 + if (request_irq(irq, dio200_interrupt, flags, 1402 1402 DIO200_DRIVER_NAME, dev) >= 0) { 1403 1403 dev->irq = irq; 1404 1404 } else { ··· 1444 1444 DIO200_DRIVER_NAME); 1445 1445 1446 1446 if (dev->irq) { 1447 - comedi_free_irq(dev->irq, dev); 1447 + free_irq(dev->irq, dev); 1448 1448 } 1449 1449 if (dev->subdevices) { 1450 1450 layout = thislayout;
+8 -8
drivers/staging/comedi/drivers/amplc_pc236.c
··· 372 372 if (irq) { 373 373 unsigned long flags = share_irq ? IRQF_SHARED : 0; 374 374 375 - if (comedi_request_irq(irq, pc236_interrupt, flags, 375 + if (request_irq(irq, pc236_interrupt, flags, 376 376 PC236_DRIVER_NAME, dev) >= 0) { 377 377 dev->irq = irq; 378 378 s->type = COMEDI_SUBD_DI; ··· 421 421 pc236_intr_disable(dev); 422 422 } 423 423 if (dev->irq) 424 - comedi_free_irq(dev->irq, dev); 424 + free_irq(dev->irq, dev); 425 425 if (dev->subdevices) { 426 426 subdev_8255_cleanup(dev, dev->subdevices + 0); 427 427 } ··· 471 471 { 472 472 unsigned long flags; 473 473 474 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 474 + spin_lock_irqsave(&dev->spinlock, flags); 475 475 devpriv->enable_irq = 0; 476 476 #ifdef CONFIG_COMEDI_PCI 477 477 if (devpriv->lcr_iobase) 478 478 outl(PCI236_INTR_DISABLE, devpriv->lcr_iobase + PLX9052_INTCSR); 479 479 #endif 480 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 480 + spin_unlock_irqrestore(&dev->spinlock, flags); 481 481 } 482 482 483 483 /* ··· 489 489 { 490 490 unsigned long flags; 491 491 492 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 492 + spin_lock_irqsave(&dev->spinlock, flags); 493 493 devpriv->enable_irq = 1; 494 494 #ifdef CONFIG_COMEDI_PCI 495 495 if (devpriv->lcr_iobase) 496 496 outl(PCI236_INTR_ENABLE, devpriv->lcr_iobase + PLX9052_INTCSR); 497 497 #endif 498 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 498 + spin_unlock_irqrestore(&dev->spinlock, flags); 499 499 } 500 500 501 501 /* ··· 510 510 int retval = 0; 511 511 unsigned long flags; 512 512 513 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 513 + spin_lock_irqsave(&dev->spinlock, flags); 514 514 if (devpriv->enable_irq) { 515 515 retval = 1; 516 516 #ifdef CONFIG_COMEDI_PCI ··· 527 527 } 528 528 #endif 529 529 } 530 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 530 + spin_unlock_irqrestore(&dev->spinlock, flags); 531 531 532 532 return retval; 533 533 }
+18 -18
drivers/staging/comedi/drivers/amplc_pci224.c
··· 542 542 return; 543 543 } 544 544 545 - comedi_spin_lock_irqsave(&devpriv->ao_spinlock, flags); 545 + spin_lock_irqsave(&devpriv->ao_spinlock, flags); 546 546 /* Kill the interrupts. */ 547 547 devpriv->intsce = 0; 548 548 outb(0, devpriv->iobase1 + PCI224_INT_SCE); ··· 558 558 * routine. 559 559 */ 560 560 while (devpriv->intr_running && devpriv->intr_cpuid != THISCPU) { 561 - comedi_spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 562 - comedi_spin_lock_irqsave(&devpriv->ao_spinlock, flags); 561 + spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 562 + spin_lock_irqsave(&devpriv->ao_spinlock, flags); 563 563 } 564 - comedi_spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 564 + spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 565 565 /* Reconfigure DAC for insn_write usage. */ 566 566 outw(0, dev->iobase + PCI224_DACCEN); /* Disable channels. */ 567 567 devpriv->daccon = COMBINE(devpriv->daccon, ··· 587 587 comedi_event(dev, s); 588 588 } else { 589 589 /* Enable interrupts. */ 590 - comedi_spin_lock_irqsave(&devpriv->ao_spinlock, flags); 590 + spin_lock_irqsave(&devpriv->ao_spinlock, flags); 591 591 if (cmd->stop_src == TRIG_EXT) { 592 592 devpriv->intsce = PCI224_INTR_EXT | PCI224_INTR_DAC; 593 593 } else { 594 594 devpriv->intsce = PCI224_INTR_DAC; 595 595 } 596 596 outb(devpriv->intsce, devpriv->iobase1 + PCI224_INT_SCE); 597 - comedi_spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 597 + spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 598 598 } 599 599 } 600 600 ··· 655 655 /* Nothing left to put in the FIFO. */ 656 656 pci224_ao_stop(dev, s); 657 657 s->async->events |= COMEDI_CB_OVERFLOW; 658 - rt_printk(KERN_ERR "comedi%d: " 658 + printk(KERN_ERR "comedi%d: " 659 659 "AO buffer underrun\n", dev->minor); 660 660 } 661 661 } ··· 1155 1155 */ 1156 1156 switch (cmd->start_src) { 1157 1157 case TRIG_INT: 1158 - comedi_spin_lock_irqsave(&devpriv->ao_spinlock, flags); 1158 + spin_lock_irqsave(&devpriv->ao_spinlock, flags); 1159 1159 s->async->inttrig = &pci224_ao_inttrig_start; 1160 - comedi_spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 1160 + spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 1161 1161 break; 1162 1162 case TRIG_EXT: 1163 1163 /* Enable external interrupt trigger to start acquisition. */ 1164 - comedi_spin_lock_irqsave(&devpriv->ao_spinlock, flags); 1164 + spin_lock_irqsave(&devpriv->ao_spinlock, flags); 1165 1165 devpriv->intsce |= PCI224_INTR_EXT; 1166 1166 outb(devpriv->intsce, devpriv->iobase1 + PCI224_INT_SCE); 1167 - comedi_spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 1167 + spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 1168 1168 break; 1169 1169 } 1170 1170 ··· 1227 1227 intstat = inb(devpriv->iobase1 + PCI224_INT_SCE) & 0x3F; 1228 1228 if (intstat) { 1229 1229 retval = 1; 1230 - comedi_spin_lock_irqsave(&devpriv->ao_spinlock, flags); 1230 + spin_lock_irqsave(&devpriv->ao_spinlock, flags); 1231 1231 valid_intstat = devpriv->intsce & intstat; 1232 1232 /* Temporarily disable interrupt sources. */ 1233 1233 curenab = devpriv->intsce & ~intstat; 1234 1234 outb(curenab, devpriv->iobase1 + PCI224_INT_SCE); 1235 1235 devpriv->intr_running = 1; 1236 1236 devpriv->intr_cpuid = THISCPU; 1237 - comedi_spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 1237 + spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 1238 1238 if (valid_intstat != 0) { 1239 1239 cmd = &s->async->cmd; 1240 1240 if (valid_intstat & PCI224_INTR_EXT) { ··· 1250 1250 } 1251 1251 } 1252 1252 /* Reenable interrupt sources. */ 1253 - comedi_spin_lock_irqsave(&devpriv->ao_spinlock, flags); 1253 + spin_lock_irqsave(&devpriv->ao_spinlock, flags); 1254 1254 if (curenab != devpriv->intsce) { 1255 1255 outb(devpriv->intsce, 1256 1256 devpriv->iobase1 + PCI224_INT_SCE); 1257 1257 } 1258 1258 devpriv->intr_running = 0; 1259 - comedi_spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 1259 + spin_unlock_irqrestore(&devpriv->ao_spinlock, flags); 1260 1260 } 1261 1261 return IRQ_RETVAL(retval); 1262 1262 } ··· 1478 1478 dev->board_name = thisboard->name; 1479 1479 1480 1480 if (irq) { 1481 - ret = comedi_request_irq(irq, pci224_interrupt, IRQF_SHARED, 1482 - DRIVER_NAME, dev); 1481 + ret = request_irq(irq, pci224_interrupt, IRQF_SHARED, 1482 + DRIVER_NAME, dev); 1483 1483 if (ret < 0) { 1484 1484 printk(KERN_ERR "comedi%d: error! " 1485 1485 "unable to allocate irq %u\n", dev->minor, irq); ··· 1515 1515 printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor, DRIVER_NAME); 1516 1516 1517 1517 if (dev->irq) { 1518 - comedi_free_irq(dev->irq, dev); 1518 + free_irq(dev->irq, dev); 1519 1519 } 1520 1520 if (dev->subdevices) { 1521 1521 struct comedi_subdevice *s;
+43 -43
drivers/staging/comedi/drivers/amplc_pci230.c
··· 876 876 dev->iobase + PCI230_ADCCON); 877 877 878 878 /* Register the interrupt handler. */ 879 - irq_hdl = comedi_request_irq(devpriv->pci_dev->irq, pci230_interrupt, 880 - IRQF_SHARED, "amplc_pci230", dev); 879 + irq_hdl = request_irq(devpriv->pci_dev->irq, pci230_interrupt, 880 + IRQF_SHARED, "amplc_pci230", dev); 881 881 if (irq_hdl < 0) { 882 882 printk("comedi%d: unable to register irq, " 883 883 "commands will not be available %d\n", dev->minor, ··· 970 970 subdev_8255_cleanup(dev, dev->subdevices + 2); 971 971 972 972 if (dev->irq) 973 - comedi_free_irq(dev->irq, dev); 973 + free_irq(dev->irq, dev); 974 974 975 975 if (devpriv) { 976 976 if (devpriv->pci_dev) { ··· 995 995 996 996 ok = 1; 997 997 claimed = 0; 998 - comedi_spin_lock_irqsave(&devpriv->res_spinlock, irqflags); 998 + spin_lock_irqsave(&devpriv->res_spinlock, irqflags); 999 999 for (b = 1, i = 0; (i < NUM_RESOURCES) 1000 1000 && (res_mask != 0); b <<= 1, i++) { 1001 1001 if ((res_mask & b) != 0) { ··· 1016 1016 } 1017 1017 } 1018 1018 } 1019 - comedi_spin_unlock_irqrestore(&devpriv->res_spinlock, irqflags); 1019 + spin_unlock_irqrestore(&devpriv->res_spinlock, irqflags); 1020 1020 return ok; 1021 1021 } 1022 1022 ··· 1033 1033 unsigned int b; 1034 1034 unsigned long irqflags; 1035 1035 1036 - comedi_spin_lock_irqsave(&devpriv->res_spinlock, irqflags); 1036 + spin_lock_irqsave(&devpriv->res_spinlock, irqflags); 1037 1037 for (b = 1, i = 0; (i < NUM_RESOURCES) 1038 1038 && (res_mask != 0); b <<= 1, i++) { 1039 1039 if ((res_mask & b) != 0) { ··· 1043 1043 } 1044 1044 } 1045 1045 } 1046 - comedi_spin_unlock_irqrestore(&devpriv->res_spinlock, irqflags); 1046 + spin_unlock_irqrestore(&devpriv->res_spinlock, irqflags); 1047 1047 } 1048 1048 1049 1049 static inline void put_one_resource(struct comedi_device *dev, unsigned int resource, ··· 1145 1145 status = inw(dev->iobase + PCI230_ADCCON); 1146 1146 if (!(status & PCI230_ADC_FIFO_EMPTY)) 1147 1147 break; 1148 - comedi_udelay(1); 1148 + udelay(1); 1149 1149 } 1150 1150 if (i == TIMEOUT) { 1151 - /* rt_printk() should be used instead of printk() 1151 + /* printk() should be used instead of printk() 1152 1152 * whenever the code can be called from real-time. */ 1153 - rt_printk("timeout\n"); 1153 + printk("timeout\n"); 1154 1154 return -ETIMEDOUT; 1155 1155 } 1156 1156 ··· 1426 1426 if (trig_num != 0) 1427 1427 return -EINVAL; 1428 1428 1429 - comedi_spin_lock_irqsave(&devpriv->ao_stop_spinlock, irqflags); 1429 + spin_lock_irqsave(&devpriv->ao_stop_spinlock, irqflags); 1430 1430 if (test_bit(AO_CMD_STARTED, &devpriv->state)) { 1431 1431 /* Perform scan. */ 1432 1432 if (devpriv->hwver < 2) { 1433 1433 /* Not using DAC FIFO. */ 1434 - comedi_spin_unlock_irqrestore(&devpriv-> 1434 + spin_unlock_irqrestore(&devpriv-> 1435 1435 ao_stop_spinlock, irqflags); 1436 1436 pci230_handle_ao_nofifo(dev, s); 1437 1437 comedi_event(dev, s); ··· 1439 1439 /* Using DAC FIFO. */ 1440 1440 /* Read DACSWTRIG register to trigger conversion. */ 1441 1441 inw(dev->iobase + PCI230P2_DACSWTRIG); 1442 - comedi_spin_unlock_irqrestore(&devpriv-> 1442 + spin_unlock_irqrestore(&devpriv-> 1443 1443 ao_stop_spinlock, irqflags); 1444 1444 } 1445 1445 /* Delay. Should driver be responsible for this? */ 1446 1446 /* XXX TODO: See if DAC busy bit can be used. */ 1447 - comedi_udelay(8); 1447 + udelay(8); 1448 1448 } 1449 1449 1450 1450 return 1; ··· 1508 1508 if (devpriv->hwver < 2) { 1509 1509 /* Not using DAC FIFO. */ 1510 1510 /* Enable CT1 timer interrupt. */ 1511 - comedi_spin_lock_irqsave(&devpriv->isr_spinlock, 1511 + spin_lock_irqsave(&devpriv->isr_spinlock, 1512 1512 irqflags); 1513 1513 devpriv->int_en |= PCI230_INT_ZCLK_CT1; 1514 1514 devpriv->ier |= PCI230_INT_ZCLK_CT1; 1515 1515 outb(devpriv->ier, 1516 1516 devpriv->iobase1 + PCI230_INT_SCE); 1517 - comedi_spin_unlock_irqrestore(&devpriv-> 1517 + spin_unlock_irqrestore(&devpriv-> 1518 1518 isr_spinlock, irqflags); 1519 1519 } 1520 1520 /* Set CT1 gate high to start counting. */ ··· 1527 1527 } 1528 1528 if (devpriv->hwver >= 2) { 1529 1529 /* Using DAC FIFO. Enable DAC FIFO interrupt. */ 1530 - comedi_spin_lock_irqsave(&devpriv->isr_spinlock, 1530 + spin_lock_irqsave(&devpriv->isr_spinlock, 1531 1531 irqflags); 1532 1532 devpriv->int_en |= PCI230P2_INT_DAC; 1533 1533 devpriv->ier |= PCI230P2_INT_DAC; 1534 1534 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE); 1535 - comedi_spin_unlock_irqrestore(&devpriv->isr_spinlock, 1535 + spin_unlock_irqrestore(&devpriv->isr_spinlock, 1536 1536 irqflags); 1537 1537 } 1538 1538 } ··· 2088 2088 if (trig_num != 0) 2089 2089 return -EINVAL; 2090 2090 2091 - comedi_spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags); 2091 + spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags); 2092 2092 if (test_bit(AI_CMD_STARTED, &devpriv->state)) { 2093 2093 unsigned int delayus; 2094 2094 ··· 2112 2112 /* single-ended or PCI230+/260+ */ 2113 2113 delayus = 4; 2114 2114 } 2115 - comedi_spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, 2115 + spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, 2116 2116 irqflags); 2117 - comedi_udelay(delayus); 2117 + udelay(delayus); 2118 2118 } else { 2119 - comedi_spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, 2119 + spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, 2120 2120 irqflags); 2121 2121 } 2122 2122 ··· 2132 2132 if (trig_num != 0) 2133 2133 return -EINVAL; 2134 2134 2135 - comedi_spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags); 2135 + spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags); 2136 2136 if (test_bit(AI_CMD_STARTED, &devpriv->state)) { 2137 2137 /* Trigger scan by waggling CT0 gate source. */ 2138 2138 zgat = GAT_CONFIG(0, GAT_GND); ··· 2140 2140 zgat = GAT_CONFIG(0, GAT_VCC); 2141 2141 outb(zgat, devpriv->iobase1 + PCI230_ZGAT_SCE); 2142 2142 } 2143 - comedi_spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags); 2143 + spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags); 2144 2144 2145 2145 return 1; 2146 2146 } ··· 2160 2160 comedi_event(dev, s); 2161 2161 } else { 2162 2162 /* Enable ADC FIFO trigger level interrupt. */ 2163 - comedi_spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2163 + spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2164 2164 devpriv->int_en |= PCI230_INT_ADC; 2165 2165 devpriv->ier |= PCI230_INT_ADC; 2166 2166 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE); 2167 - comedi_spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2167 + spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2168 2168 2169 2169 /* Update conversion trigger source which is currently set 2170 2170 * to CT2 output, which is currently stuck high. */ ··· 2426 2426 * FIFO reset (above) and the second FIFO reset (below). Setting the 2427 2427 * channel gains and scan list _before_ the first FIFO reset also 2428 2428 * helps, though only slightly. */ 2429 - comedi_udelay(25); 2429 + udelay(25); 2430 2430 2431 2431 /* Reset FIFO again. */ 2432 2432 outw(adccon | PCI230_ADC_FIFO_RESET, dev->iobase + PCI230_ADCCON); ··· 2575 2575 return IRQ_NONE; 2576 2576 } 2577 2577 2578 - comedi_spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2578 + spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2579 2579 valid_status_int = devpriv->int_en & status_int; 2580 2580 /* Disable triggered interrupts. 2581 2581 * (Only those interrupts that need re-enabling, are, later in the ··· 2584 2584 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE); 2585 2585 devpriv->intr_running = 1; 2586 2586 devpriv->intr_cpuid = THISCPU; 2587 - comedi_spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2587 + spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2588 2588 2589 2589 /* 2590 2590 * Check the source of interrupt and handle it. ··· 2613 2613 } 2614 2614 2615 2615 /* Reenable interrupts. */ 2616 - comedi_spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2616 + spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2617 2617 if (devpriv->ier != devpriv->int_en) { 2618 2618 devpriv->ier = devpriv->int_en; 2619 2619 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE); 2620 2620 } 2621 2621 devpriv->intr_running = 0; 2622 - comedi_spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2622 + spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2623 2623 2624 2624 return IRQ_HANDLED; 2625 2625 } ··· 2870 2870 int started; 2871 2871 struct comedi_cmd *cmd; 2872 2872 2873 - comedi_spin_lock_irqsave(&devpriv->ao_stop_spinlock, irqflags); 2873 + spin_lock_irqsave(&devpriv->ao_stop_spinlock, irqflags); 2874 2874 started = test_and_clear_bit(AO_CMD_STARTED, &devpriv->state); 2875 - comedi_spin_unlock_irqrestore(&devpriv->ao_stop_spinlock, irqflags); 2875 + spin_unlock_irqrestore(&devpriv->ao_stop_spinlock, irqflags); 2876 2876 if (!started) { 2877 2877 return; 2878 2878 } ··· 2893 2893 } 2894 2894 /* Disable interrupt and wait for interrupt routine to finish running 2895 2895 * unless we are called from the interrupt routine. */ 2896 - comedi_spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2896 + spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2897 2897 devpriv->int_en &= ~intsrc; 2898 2898 while (devpriv->intr_running && devpriv->intr_cpuid != THISCPU) { 2899 - comedi_spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2900 - comedi_spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2899 + spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2900 + spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2901 2901 } 2902 2902 if (devpriv->ier != devpriv->int_en) { 2903 2903 devpriv->ier = devpriv->int_en; 2904 2904 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE); 2905 2905 } 2906 - comedi_spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2906 + spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2907 2907 2908 2908 if (devpriv->hwver >= 2) { 2909 2909 /* Using DAC FIFO. Reset FIFO, clear underrun error, ··· 2930 2930 struct comedi_cmd *cmd; 2931 2931 int started; 2932 2932 2933 - comedi_spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags); 2933 + spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags); 2934 2934 started = test_and_clear_bit(AI_CMD_STARTED, &devpriv->state); 2935 - comedi_spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags); 2935 + spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags); 2936 2936 if (!started) { 2937 2937 return; 2938 2938 } ··· 2947 2947 pci230_cancel_ct(dev, 0); 2948 2948 } 2949 2949 2950 - comedi_spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2950 + spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2951 2951 /* Disable ADC interrupt and wait for interrupt routine to finish 2952 2952 * running unless we are called from the interrupt routine. */ 2953 2953 devpriv->int_en &= ~PCI230_INT_ADC; 2954 2954 while (devpriv->intr_running && devpriv->intr_cpuid != THISCPU) { 2955 - comedi_spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2956 - comedi_spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2955 + spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2956 + spin_lock_irqsave(&devpriv->isr_spinlock, irqflags); 2957 2957 } 2958 2958 if (devpriv->ier != devpriv->int_en) { 2959 2959 devpriv->ier = devpriv->int_en; 2960 2960 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE); 2961 2961 } 2962 - comedi_spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2962 + spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags); 2963 2963 2964 2964 /* Reset FIFO, disable FIFO and set start conversion source to none. 2965 2965 * Keep se/diff and bip/uni settings */
+7 -7
drivers/staging/comedi/drivers/cb_das16_cs.c
··· 187 187 } 188 188 printk("\n"); 189 189 190 - ret = comedi_request_irq(link->irq.AssignedIRQ, das16cs_interrupt, 191 - IRQF_SHARED, "cb_das16_cs", dev); 190 + ret = request_irq(link->irq.AssignedIRQ, das16cs_interrupt, 191 + IRQF_SHARED, "cb_das16_cs", dev); 192 192 if (ret < 0) { 193 193 return ret; 194 194 } ··· 270 270 printk("comedi%d: das16cs: remove\n", dev->minor); 271 271 272 272 if (dev->irq) { 273 - comedi_free_irq(dev->irq, dev); 273 + free_irq(dev->irq, dev); 274 274 } 275 275 276 276 return 0; ··· 503 503 d = data[i]; 504 504 505 505 outw(devpriv->status1, dev->iobase + 4); 506 - comedi_udelay(1); 506 + udelay(1); 507 507 508 508 status1 = devpriv->status1 & ~0xf; 509 509 if (chan) ··· 513 513 514 514 /* printk("0x%04x\n",status1);*/ 515 515 outw(status1, dev->iobase + 4); 516 - comedi_udelay(1); 516 + udelay(1); 517 517 518 518 for (bit = 15; bit >= 0; bit--) { 519 519 int b = (d >> bit) & 0x1; 520 520 b <<= 1; 521 521 /* printk("0x%04x\n",status1 | b | 0x0000);*/ 522 522 outw(status1 | b | 0x0000, dev->iobase + 4); 523 - comedi_udelay(1); 523 + udelay(1); 524 524 /* printk("0x%04x\n",status1 | b | 0x0004);*/ 525 525 outw(status1 | b | 0x0004, dev->iobase + 4); 526 - comedi_udelay(1); 526 + udelay(1); 527 527 } 528 528 /* make high both DAC0CS and DAC1CS to load 529 529 new data and update analog output*/
+53 -53
drivers/staging/comedi/drivers/cb_pcidas.c
··· 588 588 devpriv->s5933_config + AMCC_OP_REG_INTCSR); 589 589 590 590 /* get irq */ 591 - if (comedi_request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt, 591 + if (request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt, 592 592 IRQF_SHARED, "cb_pcidas", dev)) { 593 593 printk(" unable to allocate irq %d\n", devpriv->pci_dev->irq); 594 594 return -EINVAL; ··· 727 727 outl(INTCSR_INBOX_INTR_STATUS, 728 728 devpriv->s5933_config + AMCC_OP_REG_INTCSR); 729 729 #ifdef CB_PCIDAS_DEBUG 730 - rt_printk("detaching, incsr is 0x%x\n", 730 + printk("detaching, incsr is 0x%x\n", 731 731 inl(devpriv->s5933_config + 732 732 AMCC_OP_REG_INTCSR)); 733 733 #endif 734 734 } 735 735 } 736 736 if (dev->irq) 737 - comedi_free_irq(dev->irq, dev); 737 + free_irq(dev->irq, dev); 738 738 if (dev->subdevices) 739 739 subdev_8255_cleanup(dev, dev->subdevices + 2); 740 740 if (devpriv && devpriv->pci_dev) { ··· 843 843 844 844 /* set channel and range */ 845 845 channel = CR_CHAN(insn->chanspec); 846 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 846 + spin_lock_irqsave(&dev->spinlock, flags); 847 847 devpriv->ao_control_bits &= 848 848 ~DAC_MODE_UPDATE_BOTH & ~DAC_RANGE_MASK(channel); 849 849 devpriv->ao_control_bits |= 850 850 DACEN | DAC_RANGE(channel, CR_RANGE(insn->chanspec)); 851 851 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 852 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 852 + spin_unlock_irqrestore(&dev->spinlock, flags); 853 853 854 854 /* remember value for readback */ 855 855 devpriv->ao_value[channel] = data[0]; ··· 871 871 872 872 /* set channel and range */ 873 873 channel = CR_CHAN(insn->chanspec); 874 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 874 + spin_lock_irqsave(&dev->spinlock, flags); 875 875 devpriv->ao_control_bits &= 876 876 ~DAC_CHAN_EN(0) & ~DAC_CHAN_EN(1) & ~DAC_RANGE_MASK(channel) & 877 877 ~DAC_PACER_MASK; ··· 879 879 DACEN | DAC_RANGE(channel, 880 880 CR_RANGE(insn->chanspec)) | DAC_CHAN_EN(channel) | DAC_START; 881 881 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 882 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 882 + spin_unlock_irqrestore(&dev->spinlock, flags); 883 883 884 884 /* remember value for readback */ 885 885 devpriv->ao_value[channel] = data[0]; ··· 940 940 941 941 outw(cal_enable_bits(dev) | (value & 0xff), 942 942 devpriv->control_status + CALIBRATION_REG); 943 - comedi_udelay(1); 943 + udelay(1); 944 944 outw(cal_enable_bits(dev) | SELECT_DAC08_BIT | (value & 0xff), 945 945 devpriv->control_status + CALIBRATION_REG); 946 - comedi_udelay(1); 946 + udelay(1); 947 947 outw(cal_enable_bits(dev) | (value & 0xff), 948 948 devpriv->control_status + CALIBRATION_REG); 949 - comedi_udelay(1); 949 + udelay(1); 950 950 951 951 return 1; 952 952 } ··· 1193 1193 outw(bits, devpriv->control_status + ADCMUX_CONT); 1194 1194 1195 1195 #ifdef CB_PCIDAS_DEBUG 1196 - rt_printk("comedi: sent 0x%x to adcmux control\n", bits); 1196 + printk("comedi: sent 0x%x to adcmux control\n", bits); 1197 1197 #endif 1198 1198 1199 1199 /* load counters */ ··· 1209 1209 devpriv->count = cmd->chanlist_len * cmd->stop_arg; 1210 1210 } 1211 1211 /* enable interrupts */ 1212 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1212 + spin_lock_irqsave(&dev->spinlock, flags); 1213 1213 devpriv->adc_fifo_bits |= INTE; 1214 1214 devpriv->adc_fifo_bits &= ~INT_MASK; 1215 1215 if (cmd->flags & TRIG_WAKE_EOS) { ··· 1221 1221 devpriv->adc_fifo_bits |= INT_FHF; /* interrupt fifo half full */ 1222 1222 } 1223 1223 #ifdef CB_PCIDAS_DEBUG 1224 - rt_printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits); 1224 + printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits); 1225 1225 #endif 1226 1226 /* enable (and clear) interrupts */ 1227 1227 outw(devpriv->adc_fifo_bits | EOAI | INT | LADFUL, 1228 1228 devpriv->control_status + INT_ADCFIFO); 1229 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1229 + spin_unlock_irqrestore(&dev->spinlock, flags); 1230 1230 1231 1231 /* set start trigger and burst mode */ 1232 1232 bits = 0; ··· 1242 1242 bits |= BURSTE; 1243 1243 outw(bits, devpriv->control_status + TRIG_CONTSTAT); 1244 1244 #ifdef CB_PCIDAS_DEBUG 1245 - rt_printk("comedi: sent 0x%x to trig control\n", bits); 1245 + printk("comedi: sent 0x%x to trig control\n", bits); 1246 1246 #endif 1247 1247 1248 1248 return 0; ··· 1369 1369 unsigned long flags; 1370 1370 1371 1371 /* set channel limits, gain */ 1372 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1372 + spin_lock_irqsave(&dev->spinlock, flags); 1373 1373 for (i = 0; i < cmd->chanlist_len; i++) { 1374 1374 /* enable channel */ 1375 1375 devpriv->ao_control_bits |= ··· 1381 1381 1382 1382 /* disable analog out before settings pacer source and count values */ 1383 1383 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 1384 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1384 + spin_unlock_irqrestore(&dev->spinlock, flags); 1385 1385 1386 1386 /* clear fifo */ 1387 1387 outw(0, devpriv->ao_registers + DACFIFOCLR); ··· 1403 1403 devpriv->ao_count = cmd->chanlist_len * cmd->stop_arg; 1404 1404 } 1405 1405 /* set pacer source */ 1406 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1406 + spin_lock_irqsave(&dev->spinlock, flags); 1407 1407 switch (cmd->scan_begin_src) { 1408 1408 case TRIG_TIMER: 1409 1409 devpriv->ao_control_bits |= DAC_PACER_INT; ··· 1412 1412 devpriv->ao_control_bits |= DAC_PACER_EXT_RISE; 1413 1413 break; 1414 1414 default: 1415 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1415 + spin_unlock_irqrestore(&dev->spinlock, flags); 1416 1416 comedi_error(dev, "error setting dac pacer source"); 1417 1417 return -1; 1418 1418 break; 1419 1419 } 1420 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1420 + spin_unlock_irqrestore(&dev->spinlock, flags); 1421 1421 1422 1422 async->inttrig = cb_pcidas_ao_inttrig; 1423 1423 ··· 1451 1451 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, num_bytes); 1452 1452 1453 1453 /* enable dac half-full and empty interrupts */ 1454 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1454 + spin_lock_irqsave(&dev->spinlock, flags); 1455 1455 devpriv->adc_fifo_bits |= DAEMIE | DAHFIE; 1456 1456 #ifdef CB_PCIDAS_DEBUG 1457 - rt_printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits); 1457 + printk("comedi: adc_fifo_bits are 0x%x\n", devpriv->adc_fifo_bits); 1458 1458 #endif 1459 1459 /* enable and clear interrupts */ 1460 1460 outw(devpriv->adc_fifo_bits | DAEMI | DAHFI, ··· 1464 1464 devpriv->ao_control_bits |= DAC_START | DACEN | DAC_EMPTY; 1465 1465 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 1466 1466 #ifdef CB_PCIDAS_DEBUG 1467 - rt_printk("comedi: sent 0x%x to dac control\n", 1467 + printk("comedi: sent 0x%x to dac control\n", 1468 1468 devpriv->ao_control_bits); 1469 1469 #endif 1470 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1470 + spin_unlock_irqrestore(&dev->spinlock, flags); 1471 1471 1472 1472 async->inttrig = NULL; 1473 1473 ··· 1494 1494 1495 1495 s5933_status = inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR); 1496 1496 #ifdef CB_PCIDAS_DEBUG 1497 - rt_printk("intcsr 0x%x\n", s5933_status); 1498 - rt_printk("mbef 0x%x\n", inl(devpriv->s5933_config + AMCC_OP_REG_MBEF)); 1497 + printk("intcsr 0x%x\n", s5933_status); 1498 + printk("mbef 0x%x\n", inl(devpriv->s5933_config + AMCC_OP_REG_MBEF)); 1499 1499 #endif 1500 1500 1501 1501 if ((INTCSR_INTR_ASSERTED & s5933_status) == 0) ··· 1537 1537 cb_pcidas_cancel(dev, s); 1538 1538 } 1539 1539 /* clear half-full interrupt latch */ 1540 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1540 + spin_lock_irqsave(&dev->spinlock, flags); 1541 1541 outw(devpriv->adc_fifo_bits | INT, 1542 1542 devpriv->control_status + INT_ADCFIFO); 1543 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1543 + spin_unlock_irqrestore(&dev->spinlock, flags); 1544 1544 /* else if fifo not empty */ 1545 1545 } else if (status & (ADNEI | EOBI)) { 1546 1546 for (i = 0; i < timeout; i++) { ··· 1556 1556 } 1557 1557 } 1558 1558 /* clear not-empty interrupt latch */ 1559 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1559 + spin_lock_irqsave(&dev->spinlock, flags); 1560 1560 outw(devpriv->adc_fifo_bits | INT, 1561 1561 devpriv->control_status + INT_ADCFIFO); 1562 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1562 + spin_unlock_irqrestore(&dev->spinlock, flags); 1563 1563 } else if (status & EOAI) { 1564 1564 comedi_error(dev, 1565 1565 "bug! encountered end of aquisition interrupt?"); 1566 1566 /* clear EOA interrupt latch */ 1567 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1567 + spin_lock_irqsave(&dev->spinlock, flags); 1568 1568 outw(devpriv->adc_fifo_bits | EOAI, 1569 1569 devpriv->control_status + INT_ADCFIFO); 1570 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1570 + spin_unlock_irqrestore(&dev->spinlock, flags); 1571 1571 } 1572 1572 /* check for fifo overflow */ 1573 1573 if (status & LADFUL) { 1574 1574 comedi_error(dev, "fifo overflow"); 1575 1575 /* clear overflow interrupt latch */ 1576 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1576 + spin_lock_irqsave(&dev->spinlock, flags); 1577 1577 outw(devpriv->adc_fifo_bits | LADFUL, 1578 1578 devpriv->control_status + INT_ADCFIFO); 1579 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1579 + spin_unlock_irqrestore(&dev->spinlock, flags); 1580 1580 cb_pcidas_cancel(dev, s); 1581 1581 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR; 1582 1582 } ··· 1599 1599 1600 1600 if (status & DAEMI) { 1601 1601 /* clear dac empty interrupt latch */ 1602 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1602 + spin_lock_irqsave(&dev->spinlock, flags); 1603 1603 outw(devpriv->adc_fifo_bits | DAEMI, 1604 1604 devpriv->control_status + INT_ADCFIFO); 1605 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1605 + spin_unlock_irqrestore(&dev->spinlock, flags); 1606 1606 if (inw(devpriv->ao_registers + DAC_CSR) & DAC_EMPTY) { 1607 1607 if (cmd->stop_src == TRIG_NONE || 1608 1608 (cmd->stop_src == TRIG_COUNT ··· 1633 1633 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, 1634 1634 num_points); 1635 1635 /* clear half-full interrupt latch */ 1636 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1636 + spin_lock_irqsave(&dev->spinlock, flags); 1637 1637 outw(devpriv->adc_fifo_bits | DAHFI, 1638 1638 devpriv->control_status + INT_ADCFIFO); 1639 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1639 + spin_unlock_irqrestore(&dev->spinlock, flags); 1640 1640 } 1641 1641 1642 1642 comedi_event(dev, s); ··· 1647 1647 { 1648 1648 unsigned long flags; 1649 1649 1650 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1650 + spin_lock_irqsave(&dev->spinlock, flags); 1651 1651 /* disable interrupts */ 1652 1652 devpriv->adc_fifo_bits &= ~INTE & ~EOAIE; 1653 1653 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO); 1654 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1654 + spin_unlock_irqrestore(&dev->spinlock, flags); 1655 1655 1656 1656 /* disable start trigger source and burst mode */ 1657 1657 outw(0, devpriv->control_status + TRIG_CONTSTAT); ··· 1667 1667 { 1668 1668 unsigned long flags; 1669 1669 1670 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1670 + spin_lock_irqsave(&dev->spinlock, flags); 1671 1671 /* disable interrupts */ 1672 1672 devpriv->adc_fifo_bits &= ~DAHFIE & ~DAEMIE; 1673 1673 outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO); ··· 1675 1675 /* disable output */ 1676 1676 devpriv->ao_control_bits &= ~DACEN & ~DAC_PACER_MASK; 1677 1677 outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR); 1678 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1678 + spin_unlock_irqrestore(&dev->spinlock, flags); 1679 1679 1680 1680 return 0; 1681 1681 } ··· 1705 1705 register_bits |= SERIAL_DATA_IN_BIT; 1706 1706 else 1707 1707 register_bits &= ~SERIAL_DATA_IN_BIT; 1708 - comedi_udelay(write_delay); 1708 + udelay(write_delay); 1709 1709 outw(register_bits, devpriv->control_status + CALIBRATION_REG); 1710 1710 } 1711 1711 } ··· 1716 1716 static const int num_caldac_channels = 8; 1717 1717 static const int bitstream_length = 11; 1718 1718 unsigned int bitstream = ((address & 0x7) << 8) | value; 1719 - static const int caldac_8800_comedi_udelay = 1; 1719 + static const int caldac_8800_udelay = 1; 1720 1720 1721 1721 if (address >= num_caldac_channels) { 1722 1722 comedi_error(dev, "illegal caldac channel"); ··· 1731 1731 write_calibration_bitstream(dev, cal_enable_bits(dev), bitstream, 1732 1732 bitstream_length); 1733 1733 1734 - comedi_udelay(caldac_8800_comedi_udelay); 1734 + udelay(caldac_8800_udelay); 1735 1735 outw(cal_enable_bits(dev) | SELECT_8800_BIT, 1736 1736 devpriv->control_status + CALIBRATION_REG); 1737 - comedi_udelay(caldac_8800_comedi_udelay); 1737 + udelay(caldac_8800_udelay); 1738 1738 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG); 1739 1739 1740 1740 return 1; ··· 1745 1745 static const int bitstream_length = 7; 1746 1746 unsigned int bitstream = value & 0x7f; 1747 1747 unsigned int register_bits; 1748 - static const int ad7376_comedi_udelay = 1; 1748 + static const int ad7376_udelay = 1; 1749 1749 1750 1750 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT; 1751 - comedi_udelay(ad7376_comedi_udelay); 1751 + udelay(ad7376_udelay); 1752 1752 outw(register_bits, devpriv->control_status + CALIBRATION_REG); 1753 1753 1754 1754 write_calibration_bitstream(dev, register_bits, bitstream, 1755 1755 bitstream_length); 1756 1756 1757 - comedi_udelay(ad7376_comedi_udelay); 1757 + udelay(ad7376_udelay); 1758 1758 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG); 1759 1759 1760 1760 return 0; ··· 1769 1769 static const int bitstream_length = 10; 1770 1770 unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff); 1771 1771 unsigned int register_bits; 1772 - static const int ad8402_comedi_udelay = 1; 1772 + static const int ad8402_udelay = 1; 1773 1773 1774 1774 register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT; 1775 - comedi_udelay(ad8402_comedi_udelay); 1775 + udelay(ad8402_udelay); 1776 1776 outw(register_bits, devpriv->control_status + CALIBRATION_REG); 1777 1777 1778 1778 write_calibration_bitstream(dev, register_bits, bitstream, 1779 1779 bitstream_length); 1780 1780 1781 - comedi_udelay(ad8402_comedi_udelay); 1781 + udelay(ad8402_udelay); 1782 1782 outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG); 1783 1783 1784 1784 return 0; ··· 1794 1794 AMCC_OP_REG_MCSR_NVCMD) & MCSR_NV_BUSY) 1795 1795 == 0) 1796 1796 return 0; 1797 - comedi_udelay(1); 1797 + udelay(1); 1798 1798 } 1799 1799 return -1; 1800 1800 }
+61 -61
drivers/staging/comedi/drivers/cb_pcidas64.c
··· 98 98 /* #define PCIDAS64_DEBUG enable debugging code */ 99 99 100 100 #ifdef PCIDAS64_DEBUG 101 - #define DEBUG_PRINT(format, args...) rt_printk(format , ## args) 101 + #define DEBUG_PRINT(format, args...) printk(format , ## args) 102 102 #else 103 103 #define DEBUG_PRINT(format, args...) 104 104 #endif ··· 1535 1535 uint16_t bits; 1536 1536 unsigned long flags; 1537 1537 1538 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1538 + spin_lock_irqsave(&dev->spinlock, flags); 1539 1539 1540 1540 /* bit should be set for 6025, although docs say boards with <= 16 chans should be cleared XXX */ 1541 1541 if (1) ··· 1556 1556 writew(0, priv(dev)->main_iobase + DAQ_SYNC_REG); 1557 1557 writew(0, priv(dev)->main_iobase + CALIBRATION_REG); 1558 1558 1559 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1559 + spin_unlock_irqrestore(&dev->spinlock, flags); 1560 1560 1561 1561 /* set fifos to maximum size */ 1562 1562 priv(dev)->fifo_size_bits |= DAC_FIFO_BITS; ··· 1794 1794 init_plx9080(dev); 1795 1795 init_stc_registers(dev); 1796 1796 /* get irq */ 1797 - if (comedi_request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED, 1797 + if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED, 1798 1798 "cb_pcidas64", dev)) { 1799 1799 printk(" unable to allocate irq %u\n", pcidev->irq); 1800 1800 return -EINVAL; ··· 1825 1825 printk("comedi%d: cb_pcidas: remove\n", dev->minor); 1826 1826 1827 1827 if (dev->irq) 1828 - comedi_free_irq(dev->irq, dev); 1828 + free_irq(dev->irq, dev); 1829 1829 if (priv(dev)) { 1830 1830 if (priv(dev)->hw_dev) { 1831 1831 if (priv(dev)->plx9080_iobase) { ··· 1895 1895 /* 4020 generates dac done interrupts even though they are disabled */ 1896 1896 disable_ai_pacing(dev); 1897 1897 1898 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1898 + spin_lock_irqsave(&dev->spinlock, flags); 1899 1899 if (insn->chanspec & CR_ALT_FILTER) 1900 1900 priv(dev)->adc_control1_bits |= ADC_DITHER_BIT; 1901 1901 else 1902 1902 priv(dev)->adc_control1_bits &= ~ADC_DITHER_BIT; 1903 1903 writew(priv(dev)->adc_control1_bits, 1904 1904 priv(dev)->main_iobase + ADC_CONTROL1_REG); 1905 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1905 + spin_unlock_irqrestore(&dev->spinlock, flags); 1906 1906 1907 1907 if (board(dev)->layout != LAYOUT_4020) { 1908 1908 /* use internal queue */ ··· 1995 1995 if (pipe_full_bits(bits)) 1996 1996 break; 1997 1997 } 1998 - comedi_udelay(1); 1998 + udelay(1); 1999 1999 } 2000 2000 DEBUG_PRINT(" looped %i times waiting for data\n", i); 2001 2001 if (i == timeout) { 2002 2002 comedi_error(dev, " analog input read insn timed out"); 2003 - rt_printk(" status 0x%x\n", bits); 2003 + printk(" status 0x%x\n", bits); 2004 2004 return -ETIME; 2005 2005 } 2006 2006 if (board(dev)->layout == LAYOUT_4020) ··· 2357 2357 2358 2358 disable_ai_interrupts(dev); 2359 2359 2360 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 2360 + spin_lock_irqsave(&dev->spinlock, flags); 2361 2361 priv(dev)->adc_control1_bits &= ~ADC_SW_GATE_BIT; 2362 2362 writew(priv(dev)->adc_control1_bits, 2363 2363 priv(dev)->main_iobase + ADC_CONTROL1_REG); 2364 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 2364 + spin_unlock_irqrestore(&dev->spinlock, flags); 2365 2365 2366 2366 /* disable pacing, triggering, etc */ 2367 2367 writew(ADC_DMA_DISABLE_BIT | ADC_SOFT_GATE_BITS | ADC_GATE_LEVEL_BIT, ··· 2372 2372 { 2373 2373 unsigned long flags; 2374 2374 2375 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 2375 + spin_lock_irqsave(&dev->spinlock, flags); 2376 2376 priv(dev)->intr_enable_bits &= 2377 2377 ~EN_ADC_INTR_SRC_BIT & ~EN_ADC_DONE_INTR_BIT & 2378 2378 ~EN_ADC_ACTIVE_INTR_BIT & ~EN_ADC_STOP_INTR_BIT & 2379 2379 ~EN_ADC_OVERRUN_BIT & ~ADC_INTR_SRC_MASK; 2380 2380 writew(priv(dev)->intr_enable_bits, 2381 2381 priv(dev)->main_iobase + INTR_ENABLE_REG); 2382 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 2382 + spin_unlock_irqrestore(&dev->spinlock, flags); 2383 2383 2384 2384 DEBUG_PRINT("intr enable bits 0x%x\n", priv(dev)->intr_enable_bits); 2385 2385 } ··· 2397 2397 if (board(dev)->layout != LAYOUT_4020) 2398 2398 bits |= ADC_INTR_EOSCAN_BITS | EN_ADC_INTR_SRC_BIT; 2399 2399 } 2400 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 2400 + spin_lock_irqsave(&dev->spinlock, flags); 2401 2401 priv(dev)->intr_enable_bits |= bits; 2402 2402 writew(priv(dev)->intr_enable_bits, 2403 2403 priv(dev)->main_iobase + INTR_ENABLE_REG); 2404 2404 DEBUG_PRINT("intr enable bits 0x%x\n", priv(dev)->intr_enable_bits); 2405 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 2405 + spin_unlock_irqrestore(&dev->spinlock, flags); 2406 2406 } 2407 2407 2408 2408 static uint32_t ai_convert_counter_6xxx(const struct comedi_device *dev, ··· 2488 2488 unsigned long flags; 2489 2489 2490 2490 /* spinlock for plx dma control/status reg */ 2491 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 2491 + spin_lock_irqsave(&dev->spinlock, flags); 2492 2492 if (channel) 2493 2493 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | 2494 2494 PLX_CLEAR_DMA_INTR_BIT, ··· 2497 2497 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | 2498 2498 PLX_CLEAR_DMA_INTR_BIT, 2499 2499 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 2500 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 2500 + spin_unlock_irqrestore(&dev->spinlock, flags); 2501 2501 } 2502 2502 2503 2503 static void set_ai_pacing(struct comedi_device *dev, struct comedi_cmd *cmd) ··· 2701 2701 2702 2702 enable_ai_interrupts(dev, cmd); 2703 2703 2704 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 2704 + spin_lock_irqsave(&dev->spinlock, flags); 2705 2705 /* set mode, allow conversions through software gate */ 2706 2706 priv(dev)->adc_control1_bits |= ADC_SW_GATE_BIT; 2707 2707 priv(dev)->adc_control1_bits &= ~ADC_DITHER_BIT; ··· 2728 2728 writew(priv(dev)->adc_control1_bits, 2729 2729 priv(dev)->main_iobase + ADC_CONTROL1_REG); 2730 2730 DEBUG_PRINT("control1 bits 0x%x\n", priv(dev)->adc_control1_bits); 2731 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 2731 + spin_unlock_irqrestore(&dev->spinlock, flags); 2732 2732 2733 2733 /* clear adc buffer */ 2734 2734 writew(0, priv(dev)->main_iobase + ADC_BUFFER_CLEAR_REG); ··· 2762 2762 writew(bits, priv(dev)->main_iobase + DAQ_ATRIG_LOW_4020_REG); 2763 2763 } 2764 2764 2765 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 2765 + spin_lock_irqsave(&dev->spinlock, flags); 2766 2766 2767 2767 /* enable pacing, triggering, etc */ 2768 2768 bits = ADC_ENABLE_BIT | ADC_SOFT_GATE_BITS | ADC_GATE_LEVEL_BIT; ··· 2782 2782 2783 2783 priv(dev)->ai_cmd_running = 1; 2784 2784 2785 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 2785 + spin_unlock_irqrestore(&dev->spinlock, flags); 2786 2786 2787 2787 /* start aquisition */ 2788 2788 if (cmd->start_src == TRIG_NOW) { ··· 2842 2842 } 2843 2843 2844 2844 if (num_samples < 0) { 2845 - rt_printk(" cb_pcidas64: bug! num_samples < 0\n"); 2845 + printk(" cb_pcidas64: bug! num_samples < 0\n"); 2846 2846 break; 2847 2847 } 2848 2848 ··· 2964 2964 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR; 2965 2965 } 2966 2966 /* spin lock makes sure noone else changes plx dma control reg */ 2967 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 2967 + spin_lock_irqsave(&dev->spinlock, flags); 2968 2968 dma1_status = readb(priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG); 2969 2969 if (plx_status & ICS_DMA1_A) { /* dma chan 1 interrupt */ 2970 2970 writeb((dma1_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT, ··· 2976 2976 } 2977 2977 DEBUG_PRINT(" cleared dma ch1 interrupt\n"); 2978 2978 } 2979 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 2979 + spin_unlock_irqrestore(&dev->spinlock, flags); 2980 2980 2981 2981 if (status & ADC_DONE_BIT) 2982 2982 DEBUG_PRINT("adc done interrupt\n"); ··· 2987 2987 (status & ADC_INTR_PENDING_BIT) && 2988 2988 (board(dev)->layout != LAYOUT_4020))) { 2989 2989 DEBUG_PRINT("pio fifo drain\n"); 2990 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 2990 + spin_lock_irqsave(&dev->spinlock, flags); 2991 2991 if (priv(dev)->ai_cmd_running) { 2992 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 2992 + spin_unlock_irqrestore(&dev->spinlock, flags); 2993 2993 pio_drain_ai_fifo(dev); 2994 2994 } else 2995 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 2995 + spin_unlock_irqrestore(&dev->spinlock, flags); 2996 2996 } 2997 2997 /* if we are have all the data, then quit */ 2998 2998 if ((cmd->stop_src == TRIG_COUNT && priv(dev)->ai_count <= 0) || ··· 3087 3087 cmd = &async->cmd; 3088 3088 3089 3089 /* spin lock makes sure noone else changes plx dma control reg */ 3090 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 3090 + spin_lock_irqsave(&dev->spinlock, flags); 3091 3091 dma0_status = readb(priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 3092 3092 if (plx_status & ICS_DMA0_A) { /* dma chan 0 interrupt */ 3093 3093 if ((dma0_status & PLX_DMA_EN_BIT) ··· 3097 3097 else 3098 3098 writeb(PLX_CLEAR_DMA_INTR_BIT, 3099 3099 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 3100 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 3100 + spin_unlock_irqrestore(&dev->spinlock, flags); 3101 3101 DEBUG_PRINT("dma0 status 0x%x\n", dma0_status); 3102 3102 if (dma0_status & PLX_DMA_EN_BIT) { 3103 3103 load_ao_dma(dev, cmd); ··· 3107 3107 } 3108 3108 DEBUG_PRINT(" cleared dma ch0 interrupt\n"); 3109 3109 } else 3110 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 3110 + spin_unlock_irqrestore(&dev->spinlock, flags); 3111 3111 3112 3112 if ((status & DAC_DONE_BIT)) { 3113 3113 async->events |= COMEDI_CB_EOA; ··· 3164 3164 unsigned long flags; 3165 3165 3166 3166 /* spinlock for plx dma control/status reg */ 3167 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 3167 + spin_lock_irqsave(&dev->spinlock, flags); 3168 3168 3169 3169 plx9080_abort_dma(priv(dev)->plx9080_iobase, channel); 3170 3170 3171 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 3171 + spin_unlock_irqrestore(&dev->spinlock, flags); 3172 3172 } 3173 3173 3174 3174 static int ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 3175 3175 { 3176 3176 unsigned long flags; 3177 3177 3178 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 3178 + spin_lock_irqsave(&dev->spinlock, flags); 3179 3179 if (priv(dev)->ai_cmd_running == 0) { 3180 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 3180 + spin_unlock_irqrestore(&dev->spinlock, flags); 3181 3181 return 0; 3182 3182 } 3183 3183 priv(dev)->ai_cmd_running = 0; 3184 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 3184 + spin_unlock_irqrestore(&dev->spinlock, flags); 3185 3185 3186 3186 disable_ai_pacing(dev); 3187 3187 ··· 3722 3722 static const int bitstream_length = 10; 3723 3723 unsigned int bit, register_bits; 3724 3724 unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff); 3725 - static const int ad8402_comedi_udelay = 1; 3725 + static const int ad8402_udelay = 1; 3726 3726 3727 3727 priv(dev)->ad8402_state[channel] = value; 3728 3728 3729 3729 register_bits = SELECT_8402_64XX_BIT; 3730 - comedi_udelay(ad8402_comedi_udelay); 3730 + udelay(ad8402_udelay); 3731 3731 writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG); 3732 3732 3733 3733 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) { ··· 3735 3735 register_bits |= SERIAL_DATA_IN_BIT; 3736 3736 else 3737 3737 register_bits &= ~SERIAL_DATA_IN_BIT; 3738 - comedi_udelay(ad8402_comedi_udelay); 3738 + udelay(ad8402_udelay); 3739 3739 writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG); 3740 - comedi_udelay(ad8402_comedi_udelay); 3740 + udelay(ad8402_udelay); 3741 3741 writew(register_bits | SERIAL_CLOCK_BIT, 3742 3742 priv(dev)->main_iobase + CALIBRATION_REG); 3743 3743 } 3744 3744 3745 - comedi_udelay(ad8402_comedi_udelay); 3745 + udelay(ad8402_udelay); 3746 3746 writew(0, priv(dev)->main_iobase + CALIBRATION_REG); 3747 3747 } 3748 3748 ··· 3784 3784 priv(dev)->plx9080_iobase + PLX_CONTROL_REG; 3785 3785 uint16_t value; 3786 3786 static const int value_length = 16; 3787 - static const int eeprom_comedi_udelay = 1; 3787 + static const int eeprom_udelay = 1; 3788 3788 3789 - comedi_udelay(eeprom_comedi_udelay); 3789 + udelay(eeprom_udelay); 3790 3790 priv(dev)->plx_control_bits &= ~CTL_EE_CLK & ~CTL_EE_CS; 3791 3791 /* make sure we don't send anything to the i2c bus on 4020 */ 3792 3792 priv(dev)->plx_control_bits |= CTL_USERO; 3793 3793 writel(priv(dev)->plx_control_bits, plx_control_addr); 3794 3794 /* activate serial eeprom */ 3795 - comedi_udelay(eeprom_comedi_udelay); 3795 + udelay(eeprom_udelay); 3796 3796 priv(dev)->plx_control_bits |= CTL_EE_CS; 3797 3797 writel(priv(dev)->plx_control_bits, plx_control_addr); 3798 3798 3799 3799 /* write read command and desired memory address */ 3800 3800 for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) { 3801 3801 /* set bit to be written */ 3802 - comedi_udelay(eeprom_comedi_udelay); 3802 + udelay(eeprom_udelay); 3803 3803 if (bitstream & bit) 3804 3804 priv(dev)->plx_control_bits |= CTL_EE_W; 3805 3805 else 3806 3806 priv(dev)->plx_control_bits &= ~CTL_EE_W; 3807 3807 writel(priv(dev)->plx_control_bits, plx_control_addr); 3808 3808 /* clock in bit */ 3809 - comedi_udelay(eeprom_comedi_udelay); 3809 + udelay(eeprom_udelay); 3810 3810 priv(dev)->plx_control_bits |= CTL_EE_CLK; 3811 3811 writel(priv(dev)->plx_control_bits, plx_control_addr); 3812 - comedi_udelay(eeprom_comedi_udelay); 3812 + udelay(eeprom_udelay); 3813 3813 priv(dev)->plx_control_bits &= ~CTL_EE_CLK; 3814 3814 writel(priv(dev)->plx_control_bits, plx_control_addr); 3815 3815 } ··· 3817 3817 value = 0; 3818 3818 for (bit = 1 << (value_length - 1); bit; bit >>= 1) { 3819 3819 /* clock out bit */ 3820 - comedi_udelay(eeprom_comedi_udelay); 3820 + udelay(eeprom_udelay); 3821 3821 priv(dev)->plx_control_bits |= CTL_EE_CLK; 3822 3822 writel(priv(dev)->plx_control_bits, plx_control_addr); 3823 - comedi_udelay(eeprom_comedi_udelay); 3823 + udelay(eeprom_udelay); 3824 3824 priv(dev)->plx_control_bits &= ~CTL_EE_CLK; 3825 3825 writel(priv(dev)->plx_control_bits, plx_control_addr); 3826 - comedi_udelay(eeprom_comedi_udelay); 3826 + udelay(eeprom_udelay); 3827 3827 if (readl(plx_control_addr) & CTL_EE_R) 3828 3828 value |= bit; 3829 3829 } 3830 3830 3831 3831 /* deactivate eeprom serial input */ 3832 - comedi_udelay(eeprom_comedi_udelay); 3832 + udelay(eeprom_udelay); 3833 3833 priv(dev)->plx_control_bits &= ~CTL_EE_CS; 3834 3834 writel(priv(dev)->plx_control_bits, plx_control_addr); 3835 3835 ··· 4018 4018 register_bits = 0; 4019 4019 if (bitstream & bit) 4020 4020 register_bits |= SERIAL_DATA_IN_BIT; 4021 - comedi_udelay(caldac_8800_udelay); 4021 + udelay(caldac_8800_udelay); 4022 4022 writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG); 4023 4023 register_bits |= SERIAL_CLOCK_BIT; 4024 - comedi_udelay(caldac_8800_udelay); 4024 + udelay(caldac_8800_udelay); 4025 4025 writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG); 4026 4026 } 4027 - comedi_udelay(caldac_8800_udelay); 4027 + udelay(caldac_8800_udelay); 4028 4028 writew(SELECT_8800_BIT, priv(dev)->main_iobase + CALIBRATION_REG); 4029 - comedi_udelay(caldac_8800_udelay); 4029 + udelay(caldac_8800_udelay); 4030 4030 writew(0, priv(dev)->main_iobase + CALIBRATION_REG); 4031 - comedi_udelay(caldac_8800_udelay); 4031 + udelay(caldac_8800_udelay); 4032 4032 return 0; 4033 4033 } 4034 4034 ··· 4094 4094 } 4095 4095 4096 4096 /* Their i2c requires a huge delay on setting clock or data high for some reason */ 4097 - static const int i2c_high_comedi_udelay = 1000; 4098 - static const int i2c_low_comedi_udelay = 10; 4097 + static const int i2c_high_udelay = 1000; 4098 + static const int i2c_low_udelay = 10; 4099 4099 4100 4100 /* set i2c data line high or low */ 4101 4101 static void i2c_set_sda(struct comedi_device *dev, int state) ··· 4107 4107 /* set data line high */ 4108 4108 priv(dev)->plx_control_bits &= ~data_bit; 4109 4109 writel(priv(dev)->plx_control_bits, plx_control_addr); 4110 - comedi_udelay(i2c_high_comedi_udelay); 4110 + udelay(i2c_high_udelay); 4111 4111 } else /* set data line low */ 4112 4112 { 4113 4113 priv(dev)->plx_control_bits |= data_bit; 4114 4114 writel(priv(dev)->plx_control_bits, plx_control_addr); 4115 - comedi_udelay(i2c_low_comedi_udelay); 4115 + udelay(i2c_low_udelay); 4116 4116 } 4117 4117 } 4118 4118 ··· 4126 4126 /* set clock line high */ 4127 4127 priv(dev)->plx_control_bits &= ~clock_bit; 4128 4128 writel(priv(dev)->plx_control_bits, plx_control_addr); 4129 - comedi_udelay(i2c_high_comedi_udelay); 4129 + udelay(i2c_high_udelay); 4130 4130 } else /* set clock line low */ 4131 4131 { 4132 4132 priv(dev)->plx_control_bits |= clock_bit; 4133 4133 writel(priv(dev)->plx_control_bits, plx_control_addr); 4134 - comedi_udelay(i2c_low_comedi_udelay); 4134 + udelay(i2c_low_udelay); 4135 4135 } 4136 4136 } 4137 4137
+2 -2
drivers/staging/comedi/drivers/cb_pcimdas.c
··· 282 282 283 283 /* Dont support IRQ yet */ 284 284 /* get irq */ 285 - /* if(comedi_request_irq(devpriv->pci_dev->irq, cb_pcimdas_interrupt, IRQF_SHARED, "cb_pcimdas", dev )) */ 285 + /* if(request_irq(devpriv->pci_dev->irq, cb_pcimdas_interrupt, IRQF_SHARED, "cb_pcimdas", dev )) */ 286 286 /* { */ 287 287 /* printk(" unable to allocate irq %u\n", devpriv->pci_dev->irq); */ 288 288 /* return -EINVAL; */ ··· 355 355 #endif 356 356 printk("comedi%d: cb_pcimdas: remove\n", dev->minor); 357 357 if (dev->irq) 358 - comedi_free_irq(dev->irq, dev); 358 + free_irq(dev->irq, dev); 359 359 if (devpriv) { 360 360 if (devpriv->pci_dev) { 361 361 if (devpriv->BADR0) {
+1 -1
drivers/staging/comedi/drivers/comedi_fc.c
··· 53 53 54 54 retval = comedi_buf_write_alloc(async, num_bytes); 55 55 if (retval != num_bytes) { 56 - rt_printk("comedi: buffer overrun\n"); 56 + printk("comedi: buffer overrun\n"); 57 57 async->events |= COMEDI_CB_OVERFLOW; 58 58 return 0; 59 59 }
+3 -3
drivers/staging/comedi/drivers/comedi_parport.c
··· 310 310 irq = it->options[1]; 311 311 if (irq) { 312 312 printk(" irq=%u", irq); 313 - ret = comedi_request_irq(irq, parport_interrupt, 0, 314 - "comedi_parport", dev); 313 + ret = request_irq(irq, parport_interrupt, 0, "comedi_parport", 314 + dev); 315 315 if (ret < 0) { 316 316 printk(" irq not available\n"); 317 317 return -EINVAL; ··· 385 385 release_region(dev->iobase, PARPORT_SIZE); 386 386 387 387 if (dev->irq) 388 - comedi_free_irq(dev->irq, dev); 388 + free_irq(dev->irq, dev); 389 389 390 390 return 0; 391 391 }
+2 -2
drivers/staging/comedi/drivers/comedi_rt_timer.c
··· 204 204 timing_error = now - (devpriv->start + scan * devpriv->scan_period); 205 205 if (timing_error > devpriv->scan_period) { 206 206 comedi_error(dev, "timing error"); 207 - rt_printk("scan started %i ns late\n", timing_error * 838); 207 + printk("scan started %i ns late\n", timing_error * 838); 208 208 return -1; 209 209 } 210 210 ··· 222 222 now - (scan_start + conversion * devpriv->convert_period); 223 223 if (timing_error > devpriv->convert_period) { 224 224 comedi_error(dev, "timing error"); 225 - rt_printk("conversion started %i ns late\n", 225 + printk("conversion started %i ns late\n", 226 226 timing_error * 838); 227 227 return -1; 228 228 }
+3 -3
drivers/staging/comedi/drivers/contec_pci_dio.c
··· 205 205 if (data[0]) { 206 206 s->state &= ~data[0]; 207 207 s->state |= data[0] & data[1]; 208 - rt_printk(" out: %d on %lx\n", s->state, 208 + printk(" out: %d on %lx\n", s->state, 209 209 dev->iobase + thisboard->out_offs); 210 210 outw(s->state, dev->iobase + thisboard->out_offs); 211 211 } ··· 216 216 struct comedi_insn *insn, unsigned int *data) 217 217 { 218 218 219 - rt_printk("contec_di_insn_bits called\n"); 220 - rt_printk(" data: %d %d\n", data[0], data[1]); 219 + printk("contec_di_insn_bits called\n"); 220 + printk(" data: %d %d\n", data[0], data[1]); 221 221 222 222 if (insn->n != 2) 223 223 return -EINVAL;
+24 -24
drivers/staging/comedi/drivers/daqboard2000.c
··· 342 342 { 343 343 struct daqboard2000_hw *fpga = devpriv->daq; 344 344 345 - /* comedi_udelay(4); */ 345 + /* udelay(4); */ 346 346 fpga->acqScanListFIFO = entry & 0x00ff; 347 - /* comedi_udelay(4); */ 347 + /* udelay(4); */ 348 348 fpga->acqScanListFIFO = (entry >> 8) & 0x00ff; 349 349 } 350 350 ··· 425 425 if (fpga->acqControl & DAQBOARD2000_AcqConfigPipeFull) { 426 426 break; 427 427 } 428 - /* comedi_udelay(2); */ 428 + /* udelay(2); */ 429 429 } 430 430 fpga->acqControl = DAQBOARD2000_AdcPacerEnable; 431 431 for (timeout = 0; timeout < 20; timeout++) { 432 432 if (fpga->acqControl & DAQBOARD2000_AcqLogicScanning) { 433 433 break; 434 434 } 435 - /* comedi_udelay(2); */ 435 + /* udelay(2); */ 436 436 } 437 437 for (timeout = 0; timeout < 20; timeout++) { 438 438 if (fpga-> ··· 440 440 DAQBOARD2000_AcqResultsFIFOHasValidData) { 441 441 break; 442 442 } 443 - /* comedi_udelay(2); */ 443 + /* udelay(2); */ 444 444 } 445 445 data[i] = fpga->acqResultsFIFO; 446 446 fpga->acqControl = DAQBOARD2000_AdcPacerDisable; ··· 476 476 * OK, since it works OK without enabling the DAC's, let's keep 477 477 * it as simple as possible... 478 478 */ 479 - /* fpga->dacControl = (chan + 2) * 0x0010 | 0x0001; comedi_udelay(1000); */ 479 + /* fpga->dacControl = (chan + 2) * 0x0010 | 0x0001; udelay(1000); */ 480 480 fpga->dacSetting[chan] = data[i]; 481 481 for (timeout = 0; timeout < 20; timeout++) { 482 482 if ((fpga->dacControl & ((chan + 1) * 0x0010)) == 0) { 483 483 break; 484 484 } 485 - /* comedi_udelay(2); */ 485 + /* udelay(2); */ 486 486 } 487 487 devpriv->ao_readback[chan] = data[i]; 488 488 /* 489 489 * Since we never enabled the DAC's, we don't need to disable it... 490 - * fpga->dacControl = (chan + 2) * 0x0010 | 0x0000; comedi_udelay(1000); 490 + * fpga->dacControl = (chan + 2) * 0x0010 | 0x0000; udelay(1000); 491 491 */ 492 492 } 493 493 ··· 498 498 { 499 499 printk("daqboard2000_resetLocalBus\n"); 500 500 writel(DAQBOARD2000_SECRLocalBusHi, devpriv->plx + 0x6c); 501 - comedi_udelay(10000); 501 + udelay(10000); 502 502 writel(DAQBOARD2000_SECRLocalBusLo, devpriv->plx + 0x6c); 503 - comedi_udelay(10000); 503 + udelay(10000); 504 504 } 505 505 506 506 static void daqboard2000_reloadPLX(struct comedi_device *dev) 507 507 { 508 508 printk("daqboard2000_reloadPLX\n"); 509 509 writel(DAQBOARD2000_SECRReloadLo, devpriv->plx + 0x6c); 510 - comedi_udelay(10000); 510 + udelay(10000); 511 511 writel(DAQBOARD2000_SECRReloadHi, devpriv->plx + 0x6c); 512 - comedi_udelay(10000); 512 + udelay(10000); 513 513 writel(DAQBOARD2000_SECRReloadLo, devpriv->plx + 0x6c); 514 - comedi_udelay(10000); 514 + udelay(10000); 515 515 } 516 516 517 517 static void daqboard2000_pulseProgPin(struct comedi_device *dev) 518 518 { 519 519 printk("daqboard2000_pulseProgPin 1\n"); 520 520 writel(DAQBOARD2000_SECRProgPinHi, devpriv->plx + 0x6c); 521 - comedi_udelay(10000); 521 + udelay(10000); 522 522 writel(DAQBOARD2000_SECRProgPinLo, devpriv->plx + 0x6c); 523 - comedi_udelay(10000); /* Not in the original code, but I like symmetry... */ 523 + udelay(10000); /* Not in the original code, but I like symmetry... */ 524 524 } 525 525 526 526 static int daqboard2000_pollCPLD(struct comedi_device *dev, int mask) ··· 536 536 result = 1; 537 537 break; 538 538 } 539 - comedi_udelay(100); 539 + udelay(100); 540 540 } 541 - comedi_udelay(5); 541 + udelay(5); 542 542 return result; 543 543 } 544 544 ··· 546 546 { 547 547 int result = 0; 548 548 549 - comedi_udelay(10); 549 + udelay(10); 550 550 writew(data, devpriv->daq + 0x1000); 551 551 if ((readw(devpriv->daq + 0x1000) & DAQBOARD2000_CPLD_INIT) == 552 552 DAQBOARD2000_CPLD_INIT) { ··· 623 623 struct daqboard2000_hw *fpga = devpriv->daq; 624 624 625 625 /* Disable hardware triggers */ 626 - comedi_udelay(2); 626 + udelay(2); 627 627 fpga->trigControl = DAQBOARD2000_TrigAnalog | DAQBOARD2000_TrigDisable; 628 - comedi_udelay(2); 628 + udelay(2); 629 629 fpga->trigControl = DAQBOARD2000_TrigTTL | DAQBOARD2000_TrigDisable; 630 630 631 631 /* Stop the scan list FIFO from loading the configuration pipe */ 632 - comedi_udelay(2); 632 + udelay(2); 633 633 fpga->acqControl = DAQBOARD2000_SeqStopScanList; 634 634 635 635 /* Stop the pacer clock */ 636 - comedi_udelay(2); 636 + udelay(2); 637 637 fpga->acqControl = DAQBOARD2000_AdcPacerDisable; 638 638 639 639 /* Stop the input dma (abort channel 1) */ ··· 651 651 if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0) { 652 652 break; 653 653 } 654 - comedi_udelay(2); 654 + udelay(2); 655 655 } 656 656 /* printk("DAQBOARD2000_PosRefDacSelect %d\n", timeout);*/ 657 657 ··· 661 661 if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0) { 662 662 break; 663 663 } 664 - comedi_udelay(2); 664 + udelay(2); 665 665 } 666 666 /* printk("DAQBOARD2000_NegRefDacSelect %d\n", timeout);*/ 667 667 }
+2 -2
drivers/staging/comedi/drivers/das08.c
··· 545 545 /* clear over-range bits for 16-bit boards */ 546 546 if (thisboard->ai_nbits == 16) 547 547 if (inb(dev->iobase + DAS08_MSB) & 0x80) 548 - rt_printk("das08: over-range\n"); 548 + printk("das08: over-range\n"); 549 549 550 550 /* trigger conversion */ 551 551 outb_p(0, dev->iobase + DAS08_TRIG_12BIT); ··· 555 555 break; 556 556 } 557 557 if (i == TIMEOUT) { 558 - rt_printk("das08: timeout\n"); 558 + printk("das08: timeout\n"); 559 559 return -ETIME; 560 560 } 561 561 msb = inb(dev->iobase + DAS08_MSB);
+10 -11
drivers/staging/comedi/drivers/das16.c
··· 90 90 /* #define DEBUG */ 91 91 92 92 #ifdef DEBUG 93 - #define DEBUG_PRINT(format, args...) rt_printk("das16: " format, ## args) 93 + #define DEBUG_PRINT(format, args...) printk("das16: " format, ## args) 94 94 #else 95 95 #define DEBUG_PRINT(format, args...) 96 96 #endif ··· 998 998 { 999 999 unsigned long flags; 1000 1000 1001 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1001 + spin_lock_irqsave(&dev->spinlock, flags); 1002 1002 /* disable interrupts, dma and pacer clocked conversions */ 1003 1003 devpriv->control_state &= ~DAS16_INTE & ~PACING_MASK & ~DMA_ENABLE; 1004 1004 outb(devpriv->control_state, dev->iobase + DAS16_CONTROL); ··· 1016 1016 outb(0, dev->iobase + DAS1600_BURST); 1017 1017 } 1018 1018 1019 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1019 + spin_unlock_irqrestore(&dev->spinlock, flags); 1020 1020 1021 1021 return 0; 1022 1022 } ··· 1062 1062 break; 1063 1063 } 1064 1064 if (i == DAS16_TIMEOUT) { 1065 - rt_printk("das16: timeout\n"); 1065 + printk("das16: timeout\n"); 1066 1066 return -ETIME; 1067 1067 } 1068 1068 msb = inb(dev->iobase + DAS16_AI_MSB); ··· 1180 1180 enable_dma(devpriv->dma_chan); 1181 1181 for (j = 0; j < enable_timeout; ++j) { 1182 1182 int new_residue; 1183 - comedi_udelay(2); 1183 + udelay(2); 1184 1184 new_residue = get_dma_residue(devpriv->dma_chan); 1185 1185 if (new_residue != residue) 1186 1186 break; ··· 1217 1217 return; 1218 1218 } 1219 1219 1220 - comedi_spin_lock_irqsave(&dev->spinlock, spin_flags); 1220 + spin_lock_irqsave(&dev->spinlock, spin_flags); 1221 1221 if ((devpriv->control_state & DMA_ENABLE) == 0) { 1222 - comedi_spin_unlock_irqrestore(&dev->spinlock, spin_flags); 1222 + spin_unlock_irqrestore(&dev->spinlock, spin_flags); 1223 1223 DEBUG_PRINT("interrupt while dma disabled?\n"); 1224 1224 return; 1225 1225 } ··· 1263 1263 } 1264 1264 release_dma_lock(dma_flags); 1265 1265 1266 - comedi_spin_unlock_irqrestore(&dev->spinlock, spin_flags); 1266 + spin_unlock_irqrestore(&dev->spinlock, spin_flags); 1267 1267 1268 1268 cfc_write_array_to_buffer(s, 1269 1269 devpriv->dma_buffer[buffer_index], num_bytes); ··· 1449 1449 1450 1450 /* now for the irq */ 1451 1451 if (irq > 1 && irq < 8) { 1452 - ret = comedi_request_irq(irq, das16_dma_interrupt, 0, 1453 - "das16", dev); 1452 + ret = request_irq(irq, das16_dma_interrupt, 0, "das16", dev); 1454 1453 1455 1454 if (ret < 0) 1456 1455 return ret; ··· 1657 1658 } 1658 1659 1659 1660 if (dev->irq) 1660 - comedi_free_irq(dev->irq, dev); 1661 + free_irq(dev->irq, dev); 1661 1662 1662 1663 if (dev->iobase) { 1663 1664 if (thisboard->size < 0x400) {
+5 -5
drivers/staging/comedi/drivers/das16m1.c
··· 466 466 unsigned int status; 467 467 468 468 /* prevent race with interrupt handler */ 469 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 469 + spin_lock_irqsave(&dev->spinlock, flags); 470 470 status = inb(dev->iobase + DAS16M1_CS); 471 471 das16m1_handler(dev, status); 472 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 472 + spin_unlock_irqrestore(&dev->spinlock, flags); 473 473 474 474 return s->async->buf_write_count - s->async->buf_read_count; 475 475 } ··· 669 669 irq = it->options[1]; 670 670 /* make sure it is valid */ 671 671 if (das16m1_irq_bits(irq) >= 0) { 672 - ret = comedi_request_irq(irq, das16m1_interrupt, 0, 673 - driver_das16m1.driver_name, dev); 672 + ret = request_irq(irq, das16m1_interrupt, 0, 673 + driver_das16m1.driver_name, dev); 674 674 if (ret < 0) { 675 675 printk(", irq unavailable\n"); 676 676 return ret; ··· 753 753 subdev_8255_cleanup(dev, dev->subdevices + 3); 754 754 755 755 if (dev->irq) 756 - comedi_free_irq(dev->irq, dev); 756 + free_irq(dev->irq, dev); 757 757 758 758 if (dev->iobase) { 759 759 release_region(dev->iobase, DAS16M1_SIZE);
+10 -10
drivers/staging/comedi/drivers/das1800.c
··· 651 651 652 652 /* grab our IRQ */ 653 653 if (irq) { 654 - if (comedi_request_irq(irq, das1800_interrupt, 0, 654 + if (request_irq(irq, das1800_interrupt, 0, 655 655 driver_das1800.driver_name, dev)) { 656 656 printk(" unable to allocate irq %u\n", irq); 657 657 return -EINVAL; ··· 771 771 if (dev->iobase) 772 772 release_region(dev->iobase, DAS1800_SIZE); 773 773 if (dev->irq) 774 - comedi_free_irq(dev->irq, dev); 774 + free_irq(dev->irq, dev); 775 775 if (dev->private) { 776 776 if (devpriv->iobase2) 777 777 release_region(devpriv->iobase2, DAS1800_SIZE); ··· 872 872 unsigned long flags; 873 873 874 874 /* prevent race with interrupt handler */ 875 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 875 + spin_lock_irqsave(&dev->spinlock, flags); 876 876 das1800_ai_handler(dev); 877 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 877 + spin_unlock_irqrestore(&dev->spinlock, flags); 878 878 879 879 return s->async->buf_write_count - s->async->buf_read_count; 880 880 } ··· 1471 1471 1472 1472 n = cmd.chanlist_len; 1473 1473 /* spinlock protects indirect addressing */ 1474 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 1474 + spin_lock_irqsave(&dev->spinlock, irq_flags); 1475 1475 outb(QRAM, dev->iobase + DAS1800_SELECT); /* select QRAM for baseAddress + 0x0 */ 1476 1476 outb(n - 1, dev->iobase + DAS1800_QRAM_ADDRESS); /*set QRAM address start */ 1477 1477 /* make channel / gain list */ ··· 1483 1483 outw(chan_range, dev->iobase + DAS1800_QRAM); 1484 1484 } 1485 1485 outb(n - 1, dev->iobase + DAS1800_QRAM_ADDRESS); /*finish write to QRAM */ 1486 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1486 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1487 1487 1488 1488 return; 1489 1489 } ··· 1582 1582 /* mask of unipolar/bipolar bit from range */ 1583 1583 range = CR_RANGE(insn->chanspec) & 0x3; 1584 1584 chan_range = chan | (range << 8); 1585 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 1585 + spin_lock_irqsave(&dev->spinlock, irq_flags); 1586 1586 outb(QRAM, dev->iobase + DAS1800_SELECT); /* select QRAM for baseAddress + 0x0 */ 1587 1587 outb(0x0, dev->iobase + DAS1800_QRAM_ADDRESS); /* set QRAM address start */ 1588 1588 outw(chan_range, dev->iobase + DAS1800_QRAM); ··· 1606 1606 dpnt += 1 << (thisboard->resolution - 1); 1607 1607 data[n] = dpnt; 1608 1608 } 1609 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1609 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1610 1610 1611 1611 return n; 1612 1612 } ··· 1627 1627 if (chan == update_chan) 1628 1628 devpriv->ao_update_bits = output; 1629 1629 /* write to channel */ 1630 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 1630 + spin_lock_irqsave(&dev->spinlock, irq_flags); 1631 1631 outb(DAC(chan), dev->iobase + DAS1800_SELECT); /* select dac channel for baseAddress + 0x0 */ 1632 1632 outw(output, dev->iobase + DAS1800_DAC); 1633 1633 /* now we need to write to 'update' channel to update all dac channels */ ··· 1635 1635 outb(DAC(update_chan), dev->iobase + DAS1800_SELECT); /* select 'update' channel for baseAddress + 0x0 */ 1636 1636 outw(devpriv->ao_update_bits, dev->iobase + DAS1800_DAC); 1637 1637 } 1638 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1638 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 1639 1639 1640 1640 return 1; 1641 1641 }
+2 -2
drivers/staging/comedi/drivers/das6402.c
··· 292 292 static int das6402_detach(struct comedi_device *dev) 293 293 { 294 294 if (dev->irq) 295 - comedi_free_irq(dev->irq, dev); 295 + free_irq(dev->irq, dev); 296 296 if (dev->iobase) 297 297 release_region(dev->iobase, DAS6402_SIZE); 298 298 ··· 324 324 325 325 irq = it->options[0]; 326 326 printk(" ( irq = %u )", irq); 327 - ret = comedi_request_irq(irq, intr_handler, 0, "das6402", dev); 327 + ret = request_irq(irq, intr_handler, 0, "das6402", dev); 328 328 if (ret < 0) { 329 329 printk("irq conflict\n"); 330 330 return ret;
+24 -24
drivers/staging/comedi/drivers/das800.c
··· 279 279 int board; 280 280 281 281 /* 'comedi spin lock irqsave' disables even rt interrupts, we use them to protect indirect addressing */ 282 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 282 + spin_lock_irqsave(&dev->spinlock, irq_flags); 283 283 outb(ID, dev->iobase + DAS800_GAIN); /* select base address + 7 to be ID register */ 284 284 id_bits = inb(dev->iobase + DAS800_ID) & 0x3; /* get id bits */ 285 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 285 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 286 286 287 287 board = thisboard - das800_boards; 288 288 ··· 370 370 async = s->async; 371 371 372 372 /* if hardware conversions are not enabled, then quit */ 373 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 373 + spin_lock_irqsave(&dev->spinlock, irq_flags); 374 374 outb(CONTROL1, dev->iobase + DAS800_GAIN); /* select base address + 7 to be STATUS2 register */ 375 375 status = inb(dev->iobase + DAS800_STATUS2) & STATUS2_HCEN; 376 376 /* don't release spinlock yet since we want to make sure noone else disables hardware conversions */ 377 377 if (status == 0) { 378 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 378 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 379 379 return IRQ_HANDLED; 380 380 } 381 381 ··· 415 415 fifo_overflow = inb(dev->iobase + DAS800_GAIN) & CIO_FFOV; 416 416 } 417 417 if (fifo_overflow) { 418 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 418 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 419 419 comedi_error(dev, "DAS800 FIFO overflow"); 420 420 das800_cancel(dev, dev->subdevices + 0); 421 421 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA; ··· 429 429 outb(CONTROL1, dev->iobase + DAS800_GAIN); /* select dev->iobase + 2 to be control register 1 */ 430 430 outb(CONTROL1_INTE | devpriv->do_bits, 431 431 dev->iobase + DAS800_CONTROL1); 432 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 432 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 433 433 /* otherwise, stop taking data */ 434 434 } else { 435 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 435 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 436 436 disable_das800(dev); /* diable hardware triggered conversions */ 437 437 async->events |= COMEDI_CB_EOA; 438 438 } ··· 484 484 return -EINVAL; 485 485 } 486 486 if (irq) { 487 - if (comedi_request_irq(irq, das800_interrupt, 0, "das800", dev)) { 487 + if (request_irq(irq, das800_interrupt, 0, "das800", dev)) { 488 488 printk("unable to allocate irq %u\n", irq); 489 489 return -EINVAL; 490 490 } ··· 531 531 disable_das800(dev); 532 532 533 533 /* initialize digital out channels */ 534 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 534 + spin_lock_irqsave(&dev->spinlock, irq_flags); 535 535 outb(CONTROL1, dev->iobase + DAS800_GAIN); /* select dev->iobase + 2 to be control register 1 */ 536 536 outb(CONTROL1_INTE | devpriv->do_bits, dev->iobase + DAS800_CONTROL1); 537 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 537 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 538 538 539 539 return 0; 540 540 }; ··· 547 547 if (dev->iobase) 548 548 release_region(dev->iobase, DAS800_SIZE); 549 549 if (dev->irq) 550 - comedi_free_irq(dev->irq, dev); 550 + free_irq(dev->irq, dev); 551 551 return 0; 552 552 }; 553 553 ··· 563 563 static void enable_das800(struct comedi_device *dev) 564 564 { 565 565 unsigned long irq_flags; 566 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 566 + spin_lock_irqsave(&dev->spinlock, irq_flags); 567 567 /* enable fifo-half full interrupts for cio-das802/16 */ 568 568 if (thisboard->resolution == 16) 569 569 outb(CIO_ENHF, dev->iobase + DAS800_GAIN); ··· 571 571 outb(CONV_HCEN, dev->iobase + DAS800_CONV_CONTROL); /* enable hardware triggering */ 572 572 outb(CONTROL1, dev->iobase + DAS800_GAIN); /* select dev->iobase + 2 to be control register 1 */ 573 573 outb(CONTROL1_INTE | devpriv->do_bits, dev->iobase + DAS800_CONTROL1); /* enable card's interrupt */ 574 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 574 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 575 575 } 576 576 577 577 /* disable_das800 stops hardware triggered conversions */ 578 578 static void disable_das800(struct comedi_device *dev) 579 579 { 580 580 unsigned long irq_flags; 581 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 581 + spin_lock_irqsave(&dev->spinlock, irq_flags); 582 582 outb(CONV_CONTROL, dev->iobase + DAS800_GAIN); /* select dev->iobase + 2 to be conversion control register */ 583 583 outb(0x0, dev->iobase + DAS800_CONV_CONTROL); /* disable hardware triggering of conversions */ 584 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 584 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 585 585 } 586 586 587 587 static int das800_ai_do_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, ··· 729 729 endChan = (startChan + async->cmd.chanlist_len - 1) % 8; 730 730 scan = (endChan << 3) | startChan; 731 731 732 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 732 + spin_lock_irqsave(&dev->spinlock, irq_flags); 733 733 outb(SCAN_LIMITS, dev->iobase + DAS800_GAIN); /* select base address + 2 to be scan limits register */ 734 734 outb(scan, dev->iobase + DAS800_SCAN_LIMITS); /* set scan limits */ 735 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 735 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 736 736 737 737 /* set gain */ 738 738 gain = CR_RANGE(async->cmd.chanlist[0]); ··· 779 779 break; 780 780 } 781 781 782 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 782 + spin_lock_irqsave(&dev->spinlock, irq_flags); 783 783 outb(CONV_CONTROL, dev->iobase + DAS800_GAIN); /* select dev->iobase + 2 to be conversion control register */ 784 784 outb(conv_bits, dev->iobase + DAS800_CONV_CONTROL); 785 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 785 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 786 786 async->events = 0; 787 787 enable_das800(dev); 788 788 return 0; ··· 803 803 /* set multiplexer */ 804 804 chan = CR_CHAN(insn->chanspec); 805 805 806 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 806 + spin_lock_irqsave(&dev->spinlock, irq_flags); 807 807 outb(CONTROL1, dev->iobase + DAS800_GAIN); /* select dev->iobase + 2 to be control register 1 */ 808 808 outb(chan | devpriv->do_bits, dev->iobase + DAS800_CONTROL1); 809 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 809 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 810 810 811 811 /* set gain / range */ 812 812 range = CR_RANGE(insn->chanspec); ··· 815 815 range &= 0xf; 816 816 outb(range, dev->iobase + DAS800_GAIN); 817 817 818 - comedi_udelay(5); 818 + udelay(5); 819 819 820 820 for (n = 0; n < insn->n; n++) { 821 821 /* trigger conversion */ ··· 868 868 wbits |= data[0] & data[1]; 869 869 devpriv->do_bits = wbits << 4; 870 870 871 - comedi_spin_lock_irqsave(&dev->spinlock, irq_flags); 871 + spin_lock_irqsave(&dev->spinlock, irq_flags); 872 872 outb(CONTROL1, dev->iobase + DAS800_GAIN); /* select dev->iobase + 2 to be control register 1 */ 873 873 outb(devpriv->do_bits | CONTROL1_INTE, dev->iobase + DAS800_CONTROL1); 874 - comedi_spin_unlock_irqrestore(&dev->spinlock, irq_flags); 874 + spin_unlock_irqrestore(&dev->spinlock, irq_flags); 875 875 876 876 data[1] = wbits; 877 877
+2 -3
drivers/staging/comedi/drivers/dmm32at.c
··· 380 380 381 381 /* board is there, register interrupt */ 382 382 if (irq) { 383 - ret = comedi_request_irq(irq, dmm32at_isr, 0, thisboard->name, 384 - dev); 383 + ret = request_irq(irq, dmm32at_isr, 0, thisboard->name, dev); 385 384 if (ret < 0) { 386 385 printk("irq conflict\n"); 387 386 return ret; ··· 484 485 { 485 486 printk("comedi%d: dmm32at: remove\n", dev->minor); 486 487 if (dev->irq) 487 - comedi_free_irq(dev->irq, dev); 488 + free_irq(dev->irq, dev); 488 489 if (dev->iobase) 489 490 release_region(dev->iobase, DMM32AT_MEMSIZE); 490 491
+2 -2
drivers/staging/comedi/drivers/dt2801.c
··· 384 384 outb_p(DT_C_STOP, dev->iobase + DT2801_CMD); 385 385 386 386 /* dt2801_wait_for_ready(dev); */ 387 - comedi_udelay(100); 387 + udelay(100); 388 388 timeout = 10000; 389 389 do { 390 390 stat = inb_p(dev->iobase + DT2801_STATUS); ··· 402 402 outb_p(DT_C_RESET, dev->iobase + DT2801_CMD); 403 403 /* dt2801_writecmd(dev,DT_C_RESET); */ 404 404 405 - comedi_udelay(100); 405 + udelay(100); 406 406 timeout = 10000; 407 407 do { 408 408 stat = inb_p(dev->iobase + DT2801_STATUS);
+4 -4
drivers/staging/comedi/drivers/dt2811.c
··· 335 335 336 336 #if 0 337 337 outb(0, dev->iobase + DT2811_ADCSR); 338 - comedi_udelay(100); 338 + udelay(100); 339 339 i = inb(dev->iobase + DT2811_ADDATLO); 340 340 i = inb(dev->iobase + DT2811_ADDATHI); 341 341 #endif ··· 351 351 dev->iobase + DT2811_ADCSR); 352 352 outb(0, dev->iobase + DT2811_ADGCR); 353 353 354 - comedi_udelay(100); 354 + udelay(100); 355 355 356 356 irq = probe_irq_off(irqs); 357 357 restore_flags(flags); ··· 366 366 i = inb(dev->iobase + DT2811_ADDATLO); 367 367 i = inb(dev->iobase + DT2811_ADDATHI); 368 368 printk("(irq = %d)\n", irq); 369 - ret = comedi_request_irq(irq, dt2811_interrupt, 0, 369 + ret = request_irq(irq, dt2811_interrupt, 0, 370 370 driver_name, dev); 371 371 if (ret < 0) 372 372 return -EIO; ··· 489 489 printk("comedi%d: dt2811: remove\n", dev->minor); 490 490 491 491 if (dev->irq) { 492 - comedi_free_irq(dev->irq, dev); 492 + free_irq(dev->irq, dev); 493 493 } 494 494 if (dev->iobase) { 495 495 release_region(dev->iobase, DT2811_SIZE);
+5 -5
drivers/staging/comedi/drivers/dt2814.c
··· 97 97 for (i = 0; i < DT2814_TIMEOUT; i++) { 98 98 status = inb(dev->iobase + DT2814_CSR); 99 99 printk("dt2814: status: %02x\n", status); 100 - comedi_udelay(10); 100 + udelay(10); 101 101 if (status & DT2814_FINISH) 102 102 break; 103 103 } ··· 262 262 dev->board_name = "dt2814"; 263 263 264 264 outb(0, dev->iobase + DT2814_CSR); 265 - comedi_udelay(100); 265 + udelay(100); 266 266 if (inb(dev->iobase + DT2814_CSR) & DT2814_ERR) { 267 267 printk("reset error (fatal)\n"); 268 268 return -EIO; ··· 279 279 280 280 outb(0, dev->iobase + DT2814_CSR); 281 281 282 - comedi_udelay(100); 282 + udelay(100); 283 283 284 284 irq = probe_irq_off(irqs); 285 285 restore_flags(flags); ··· 293 293 #endif 294 294 dev->irq = 0; 295 295 if (irq > 0) { 296 - if (comedi_request_irq(irq, dt2814_interrupt, 0, "dt2814", dev)) { 296 + if (request_irq(irq, dt2814_interrupt, 0, "dt2814", dev)) { 297 297 printk("(irq %d unavailable)\n", irq); 298 298 } else { 299 299 printk("( irq = %d )\n", irq); ··· 337 337 printk("comedi%d: dt2814: remove\n", dev->minor); 338 338 339 339 if (dev->irq) { 340 - comedi_free_irq(dev->irq, dev); 340 + free_irq(dev->irq, dev); 341 341 } 342 342 if (dev->iobase) { 343 343 release_region(dev->iobase, DT2814_SIZE);
+3 -3
drivers/staging/comedi/drivers/dt2815.c
··· 135 135 136 136 status = dt2815_wait_for_status(dev, 0x00); 137 137 if (status != 0) { 138 - rt_printk 138 + printk 139 139 ("dt2815: failed to write low byte on %d reason %x\n", 140 140 chan, status); 141 141 return -EBUSY; ··· 145 145 146 146 status = dt2815_wait_for_status(dev, 0x10); 147 147 if (status != 0x10) { 148 - rt_printk 148 + printk 149 149 ("dt2815: failed to write high byte on %d reason %x\n", 150 150 chan, status); 151 151 return -EBUSY; ··· 226 226 /* This is incredibly slow (approx 20 ms) */ 227 227 unsigned int status; 228 228 229 - comedi_udelay(1000); 229 + udelay(1000); 230 230 status = inb(dev->iobase + DT2815_STATUS); 231 231 if (status == 4) { 232 232 unsigned int program;
+7 -8
drivers/staging/comedi/drivers/dt282x.c
··· 389 389 int _i; \ 390 390 for (_i=0;_i<DT2821_TIMEOUT;_i++){ \ 391 391 if (a){_i=0;break;} \ 392 - comedi_udelay(5); \ 392 + udelay(5); \ 393 393 } \ 394 394 if (_i){b} \ 395 395 }while (0) ··· 463 463 464 464 size = cfc_read_array_from_buffer(s, ptr, devpriv->dma_maxsize); 465 465 if (size == 0) { 466 - rt_printk("dt282x: AO underrun\n"); 466 + printk("dt282x: AO underrun\n"); 467 467 dt282x_ao_cancel(dev, s); 468 468 s->async->events |= COMEDI_CB_OVERFLOW; 469 469 return; ··· 1080 1080 size = cfc_read_array_from_buffer(s, devpriv->dma[0].buf, 1081 1081 devpriv->dma_maxsize); 1082 1082 if (size == 0) { 1083 - rt_printk("dt282x: AO underrun\n"); 1083 + printk("dt282x: AO underrun\n"); 1084 1084 return -EPIPE; 1085 1085 } 1086 1086 prep_ao_dma(dev, 0, size); ··· 1088 1088 size = cfc_read_array_from_buffer(s, devpriv->dma[1].buf, 1089 1089 devpriv->dma_maxsize); 1090 1090 if (size == 0) { 1091 - rt_printk("dt282x: AO underrun\n"); 1091 + printk("dt282x: AO underrun\n"); 1092 1092 return -EPIPE; 1093 1093 } 1094 1094 prep_ao_dma(dev, 1, size); ··· 1298 1298 1299 1299 /* trigger interrupt */ 1300 1300 1301 - comedi_udelay(100); 1301 + udelay(100); 1302 1302 1303 1303 irq = probe_irq_off(irqs); 1304 1304 restore_flags(flags); ··· 1309 1309 #endif 1310 1310 if (irq > 0) { 1311 1311 printk(" ( irq = %d )", irq); 1312 - ret = comedi_request_irq(irq, dt282x_interrupt, 0, "dt282x", 1313 - dev); 1312 + ret = request_irq(irq, dt282x_interrupt, 0, "dt282x", dev); 1314 1313 if (ret < 0) { 1315 1314 printk(" failed to get irq\n"); 1316 1315 return -EIO; ··· 1402 1403 static void free_resources(struct comedi_device *dev) 1403 1404 { 1404 1405 if (dev->irq) { 1405 - comedi_free_irq(dev->irq, dev); 1406 + free_irq(dev->irq, dev); 1406 1407 } 1407 1408 if (dev->iobase) 1408 1409 release_region(dev->iobase, DT2821_SIZE);
+4 -4
drivers/staging/comedi/drivers/dt3000.c
··· 307 307 status = readw(devpriv->io_addr + DPR_Command_Mbx); 308 308 if ((status & DT3000_COMPLETION_MASK) != DT3000_NOTPROCESSED) 309 309 break; 310 - comedi_udelay(1); 310 + udelay(1); 311 311 } 312 312 if ((status & DT3000_COMPLETION_MASK) == DT3000_NOERROR) { 313 313 return 0; ··· 825 825 826 826 dev->board_name = this_board->name; 827 827 828 - if (comedi_request_irq(devpriv->pci_dev->irq, dt3k_interrupt, 829 - IRQF_SHARED, "dt3000", dev)) { 828 + if (request_irq(devpriv->pci_dev->irq, dt3k_interrupt, IRQF_SHARED, 829 + "dt3000", dev)) { 830 830 printk(" unable to allocate IRQ %u\n", devpriv->pci_dev->irq); 831 831 return -EINVAL; 832 832 } ··· 895 895 static int dt3000_detach(struct comedi_device *dev) 896 896 { 897 897 if (dev->irq) 898 - comedi_free_irq(dev->irq, dev); 898 + free_irq(dev->irq, dev); 899 899 900 900 if (devpriv) { 901 901 if (devpriv->pci_dev) {
+1 -1
drivers/staging/comedi/drivers/fl512.c
··· 78 78 outb(chan, iobase + 2); /* select chan */ 79 79 outb(0, iobase + 3); /* start conversion */ 80 80 /* XXX should test "done" flag instead of delay */ 81 - comedi_udelay(30); /* sleep 30 usec */ 81 + udelay(30); /* sleep 30 usec */ 82 82 lo_byte = inb(iobase + 2); /* low 8 byte */ 83 83 hi_byte = inb(iobase + 3) & 0xf; /* high 4 bit and mask */ 84 84 data[n] = lo_byte + (hi_byte << 8);
+13 -13
drivers/staging/comedi/drivers/gsc_hpdi.c
··· 66 66 /* #define HPDI_DEBUG enable debugging code */ 67 67 68 68 #ifdef HPDI_DEBUG 69 - #define DEBUG_PRINT(format, args...) rt_printk(format , ## args) 69 + #define DEBUG_PRINT(format, args...) printk(format , ## args) 70 70 #else 71 71 #define DEBUG_PRINT(format, args...) 72 72 #endif ··· 109 109 int command_channel_valid(unsigned int channel) 110 110 { 111 111 if (channel == 0 || channel > 6) { 112 - rt_printk("gsc_hpdi: bug! invalid cable command channel\n"); 112 + printk("gsc_hpdi: bug! invalid cable command channel\n"); 113 113 return 0; 114 114 } 115 115 return 1; ··· 465 465 uint32_t plx_intcsr_bits; 466 466 467 467 writel(BOARD_RESET_BIT, priv(dev)->hpdi_iobase + BOARD_CONTROL_REG); 468 - comedi_udelay(10); 468 + udelay(10); 469 469 470 470 writel(almost_empty_bits(32) | almost_full_bits(32), 471 471 priv(dev)->hpdi_iobase + RX_PROG_ALMOST_REG); ··· 622 622 init_plx9080(dev); 623 623 624 624 /* get irq */ 625 - if (comedi_request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED, 625 + if (request_irq(pcidev->irq, handle_interrupt, IRQF_SHARED, 626 626 driver_hpdi.driver_name, dev)) { 627 627 printk(" unable to allocate irq %u\n", pcidev->irq); 628 628 return -EINVAL; ··· 667 667 printk("comedi%d: gsc_hpdi: remove\n", dev->minor); 668 668 669 669 if (dev->irq) 670 - comedi_free_irq(dev->irq, dev); 670 + free_irq(dev->irq, dev); 671 671 if (priv(dev)) { 672 672 if (priv(dev)->hw_dev) { 673 673 if (priv(dev)->plx9080_iobase) { ··· 862 862 writel(bits, priv(dev)->plx9080_iobase + PLX_DMA0_DESCRIPTOR_REG); 863 863 864 864 /* spinlock for plx dma control/status reg */ 865 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 865 + spin_lock_irqsave(&dev->spinlock, flags); 866 866 /* enable dma transfer */ 867 867 writeb(PLX_DMA_EN_BIT | PLX_DMA_START_BIT | PLX_CLEAR_DMA_INTR_BIT, 868 868 priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 869 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 869 + spin_unlock_irqrestore(&dev->spinlock, flags); 870 870 871 871 if (cmd->stop_src == TRIG_COUNT) 872 872 priv(dev)->dio_count = cmd->stop_arg; ··· 971 971 priv(dev)->hpdi_iobase + INTERRUPT_STATUS_REG); 972 972 } 973 973 /* spin lock makes sure noone else changes plx dma control reg */ 974 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 974 + spin_lock_irqsave(&dev->spinlock, flags); 975 975 dma0_status = readb(priv(dev)->plx9080_iobase + PLX_DMA0_CS_REG); 976 976 if (plx_status & ICS_DMA0_A) { /* dma chan 0 interrupt */ 977 977 writeb((dma0_status & PLX_DMA_EN_BIT) | PLX_CLEAR_DMA_INTR_BIT, ··· 983 983 } 984 984 DEBUG_PRINT(" cleared dma ch0 interrupt\n"); 985 985 } 986 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 986 + spin_unlock_irqrestore(&dev->spinlock, flags); 987 987 988 988 /* spin lock makes sure noone else changes plx dma control reg */ 989 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 989 + spin_lock_irqsave(&dev->spinlock, flags); 990 990 dma1_status = readb(priv(dev)->plx9080_iobase + PLX_DMA1_CS_REG); 991 991 if (plx_status & ICS_DMA1_A) /* XXX */ 992 992 { /* dma chan 1 interrupt */ ··· 996 996 997 997 DEBUG_PRINT(" cleared dma ch1 interrupt\n"); 998 998 } 999 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 999 + spin_unlock_irqrestore(&dev->spinlock, flags); 1000 1000 1001 1001 /* clear possible plx9080 interrupt sources */ 1002 1002 if (plx_status & ICS_LDIA) { /* clear local doorbell interrupt */ ··· 1036 1036 unsigned long flags; 1037 1037 1038 1038 /* spinlock for plx dma control/status reg */ 1039 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1039 + spin_lock_irqsave(&dev->spinlock, flags); 1040 1040 1041 1041 plx9080_abort_dma(priv(dev)->plx9080_iobase, channel); 1042 1042 1043 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1043 + spin_unlock_irqrestore(&dev->spinlock, flags); 1044 1044 } 1045 1045 1046 1046 static int hpdi_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
+6 -6
drivers/staging/comedi/drivers/icp_multi.c
··· 282 282 readw(devpriv->io_addr + ICP_MULTI_ADC_CSR)); 283 283 #endif 284 284 285 - comedi_udelay(1); 285 + udelay(1); 286 286 287 287 #ifdef ICP_MULTI_EXTDEBUG 288 288 printk("icp multi C n=%d ST=%4x\n", n, ··· 304 304 ICP_MULTI_ADC_CSR)); 305 305 #endif 306 306 307 - comedi_udelay(1); 307 + udelay(1); 308 308 } 309 309 310 310 /* If we reach here, a timeout has occurred */ ··· 411 411 ICP_MULTI_DAC_CSR)); 412 412 #endif 413 413 414 - comedi_udelay(1); 414 + udelay(1); 415 415 } 416 416 417 417 /* If we reach here, a timeout has occurred */ ··· 842 842 devpriv->io_addr + ICP_MULTI_DAC_CSR); 843 843 844 844 /* Delay to allow DAC time to recover */ 845 - comedi_udelay(1); 845 + udelay(1); 846 846 } 847 847 /* Digital outputs to 0 */ 848 848 writew(0, devpriv->io_addr + ICP_MULTI_DO); ··· 954 954 955 955 if (this_board->have_irq) { 956 956 if (irq) { 957 - if (comedi_request_irq(irq, interrupt_service_icp_multi, 957 + if (request_irq(irq, interrupt_service_icp_multi, 958 958 IRQF_SHARED, "Inova Icp Multi", dev)) { 959 959 printk(", unable to allocate IRQ %u, DISABLING IT", irq); 960 960 irq = 0; /* Can't use IRQ */ ··· 1072 1072 icp_multi_reset(dev); 1073 1073 1074 1074 if (dev->irq) 1075 - comedi_free_irq(dev->irq, dev); 1075 + free_irq(dev->irq, dev); 1076 1076 1077 1077 if (dev->private && devpriv->io_addr) 1078 1078 iounmap(devpriv->io_addr);
+6 -6
drivers/staging/comedi/drivers/icp_multi.h
··· 168 168 int i; 169 169 170 170 if (!inova) { 171 - rt_printk(" - BUG!! inova is NULL!\n"); 171 + printk(" - BUG!! inova is NULL!\n"); 172 172 return -1; 173 173 } 174 174 175 175 if (inova->used) 176 176 return 1; 177 177 if (comedi_pci_enable(inova->pcidev, "icp_multi")) { 178 - rt_printk(" - Can't enable PCI device and request regions!\n"); 178 + printk(" - Can't enable PCI device and request regions!\n"); 179 179 return -1; 180 180 } 181 181 /* Resources will be accurate now. */ ··· 248 248 249 249 card = find_free_pci_card_by_device(vendor_id, device_id); 250 250 if (card == NULL) { 251 - rt_printk(" - Unused card not found in system!\n"); 251 + printk(" - Unused card not found in system!\n"); 252 252 return NULL; 253 253 } 254 254 } else { 255 255 switch (find_free_pci_card_by_position(vendor_id, device_id, 256 256 pci_bus, pci_slot, &card)) { 257 257 case 1: 258 - rt_printk 258 + printk 259 259 (" - Card not found on requested position b:s %d:%d!\n", 260 260 pci_bus, pci_slot); 261 261 return NULL; 262 262 case 2: 263 - rt_printk 263 + printk 264 264 (" - Card on requested position is used b:s %d:%d!\n", 265 265 pci_bus, pci_slot); 266 266 return NULL; ··· 270 270 err = pci_card_alloc(card); 271 271 if (err != 0) { 272 272 if (err > 0) 273 - rt_printk(" - Can't allocate card!\n"); 273 + printk(" - Can't allocate card!\n"); 274 274 /* else: error already printed. */ 275 275 return NULL; 276 276 }
+6 -6
drivers/staging/comedi/drivers/jr3_pci.c
··· 185 185 186 186 set_u16(&channel->transforms[num].link[i].link_type, 187 187 transf.link[i].link_type); 188 - comedi_udelay(1); 188 + udelay(1); 189 189 set_s16(&channel->transforms[num].link[i].link_amount, 190 190 transf.link[i].link_amount); 191 - comedi_udelay(1); 191 + udelay(1); 192 192 if (transf.link[i].link_type == end_x_form) { 193 193 break; 194 194 } ··· 496 496 channel[i]. 497 497 program_low 498 498 [addr], data1); 499 - comedi_udelay(1); 499 + udelay(1); 500 500 set_u16(&p->iobase-> 501 501 channel[i]. 502 502 program_high 503 503 [addr], data2); 504 - comedi_udelay(1); 504 + udelay(1); 505 505 506 506 } 507 507 } ··· 734 734 int delay; 735 735 int i; 736 736 737 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 737 + spin_lock_irqsave(&dev->spinlock, flags); 738 738 delay = 1000; 739 739 now = jiffies; 740 740 /* Poll all channels that are ready to be polled */ ··· 757 757 } 758 758 } 759 759 } 760 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 760 + spin_unlock_irqrestore(&dev->spinlock, flags); 761 761 762 762 devpriv->timer.expires = jiffies + msecs_to_jiffies(delay); 763 763 add_timer(&devpriv->timer);
+1 -1
drivers/staging/comedi/drivers/me4000.c
··· 283 283 s->insn_read = me4000_ai_insn_read; 284 284 285 285 if (info->irq > 0) { 286 - if (comedi_request_irq(info->irq, me4000_ai_isr, 286 + if (request_irq(info->irq, me4000_ai_isr, 287 287 IRQF_SHARED, "ME-4000", dev)) { 288 288 printk("comedi%d: me4000: me4000_attach(): Unable to allocate irq\n", dev->minor); 289 289 } else {
+14 -14
drivers/staging/comedi/drivers/mite.c
··· 258 258 struct mite_channel *channel = NULL; 259 259 260 260 /* spin lock so mite_release_channel can be called safely from interrupts */ 261 - comedi_spin_lock_irqsave(&mite->lock, flags); 261 + spin_lock_irqsave(&mite->lock, flags); 262 262 for (i = min_channel; i <= max_channel; ++i) { 263 263 if (mite->channel_allocated[i] == 0) { 264 264 mite->channel_allocated[i] = 1; ··· 267 267 break; 268 268 } 269 269 } 270 - comedi_spin_unlock_irqrestore(&mite->lock, flags); 270 + spin_unlock_irqrestore(&mite->lock, flags); 271 271 return channel; 272 272 } 273 273 ··· 277 277 unsigned long flags; 278 278 279 279 /* spin lock to prevent races with mite_request_channel */ 280 - comedi_spin_lock_irqsave(&mite->lock, flags); 280 + spin_lock_irqsave(&mite->lock, flags); 281 281 if (mite->channel_allocated[mite_chan->channel]) { 282 282 mite_dma_disarm(mite_chan); 283 283 mite_dma_reset(mite_chan); ··· 292 292 mite_chan->ring = NULL; 293 293 mmiowb(); 294 294 } 295 - comedi_spin_unlock_irqrestore(&mite->lock, flags); 295 + spin_unlock_irqrestore(&mite->lock, flags); 296 296 } 297 297 298 298 void mite_dma_arm(struct mite_channel *mite_chan) ··· 307 307 smp_mb(); 308 308 /* arm */ 309 309 chor = CHOR_START; 310 - comedi_spin_lock_irqsave(&mite->lock, flags); 310 + spin_lock_irqsave(&mite->lock, flags); 311 311 mite_chan->done = 0; 312 312 writel(chor, mite->mite_io_addr + MITE_CHOR(mite_chan->channel)); 313 313 mmiowb(); 314 - comedi_spin_unlock_irqrestore(&mite->lock, flags); 314 + spin_unlock_irqrestore(&mite->lock, flags); 315 315 /* mite_dma_tcr(mite, channel); */ 316 316 } 317 317 ··· 413 413 mcr |= CR_PSIZE32; 414 414 break; 415 415 default: 416 - rt_printk 416 + printk 417 417 ("mite: bug! invalid mem bit width for dma transfer\n"); 418 418 break; 419 419 } ··· 433 433 dcr |= CR_PSIZE32; 434 434 break; 435 435 default: 436 - rt_printk 436 + printk 437 437 ("mite: bug! invalid dev bit width for dma transfer\n"); 438 438 break; 439 439 } ··· 539 539 nbytes = mite_bytes_written_to_memory_lb(mite_chan); 540 540 if ((int)(mite_bytes_written_to_memory_ub(mite_chan) - 541 541 old_alloc_count) > 0) { 542 - rt_printk("mite: DMA overwrite of free area\n"); 542 + printk("mite: DMA overwrite of free area\n"); 543 543 async->events |= COMEDI_CB_OVERFLOW; 544 544 return -1; 545 545 } ··· 581 581 (int)(nbytes_ub - stop_count) > 0) 582 582 nbytes_ub = stop_count; 583 583 if ((int)(nbytes_ub - old_alloc_count) > 0) { 584 - rt_printk("mite: DMA underrun\n"); 584 + printk("mite: DMA underrun\n"); 585 585 async->events |= COMEDI_CB_OVERFLOW; 586 586 return -1; 587 587 } ··· 602 602 unsigned status; 603 603 unsigned long flags; 604 604 605 - comedi_spin_lock_irqsave(&mite->lock, flags); 605 + spin_lock_irqsave(&mite->lock, flags); 606 606 status = readl(mite->mite_io_addr + MITE_CHSR(mite_chan->channel)); 607 607 if (status & CHSR_DONE) { 608 608 mite_chan->done = 1; ··· 610 610 mite->mite_io_addr + MITE_CHOR(mite_chan->channel)); 611 611 } 612 612 mmiowb(); 613 - comedi_spin_unlock_irqrestore(&mite->lock, flags); 613 + spin_unlock_irqrestore(&mite->lock, flags); 614 614 return status; 615 615 } 616 616 ··· 621 621 int done; 622 622 623 623 mite_get_status(mite_chan); 624 - comedi_spin_lock_irqsave(&mite->lock, flags); 624 + spin_lock_irqsave(&mite->lock, flags); 625 625 done = mite_chan->done; 626 - comedi_spin_unlock_irqrestore(&mite->lock, flags); 626 + spin_unlock_irqrestore(&mite->lock, flags); 627 627 return done; 628 628 } 629 629
+1 -1
drivers/staging/comedi/drivers/mite.h
··· 405 405 value++; 406 406 } 407 407 if (value > 0x7) 408 - rt_printk("comedi: bug! retry_limit too large\n"); 408 + printk("comedi: bug! retry_limit too large\n"); 409 409 return (value & 0x7) << 21; 410 410 } 411 411
+33 -33
drivers/staging/comedi/drivers/mpc624.c
··· 166 166 unsigned long iobase; 167 167 168 168 iobase = it->options[0]; 169 - rt_printk("comedi%d: mpc624 [0x%04lx, ", dev->minor, iobase); 169 + printk("comedi%d: mpc624 [0x%04lx, ", dev->minor, iobase); 170 170 if (request_region(iobase, MPC624_SIZE, "mpc624") == NULL) { 171 - rt_printk("I/O port(s) in use\n"); 171 + printk("I/O port(s) in use\n"); 172 172 return -EIO; 173 173 } 174 174 ··· 182 182 switch (it->options[1]) { 183 183 case 0: 184 184 devpriv->ulConvertionRate = MPC624_SPEED_3_52_kHz; 185 - rt_printk("3.52 kHz, "); 185 + printk("3.52 kHz, "); 186 186 break; 187 187 case 1: 188 188 devpriv->ulConvertionRate = MPC624_SPEED_1_76_kHz; 189 - rt_printk("1.76 kHz, "); 189 + printk("1.76 kHz, "); 190 190 break; 191 191 case 2: 192 192 devpriv->ulConvertionRate = MPC624_SPEED_880_Hz; 193 - rt_printk("880 Hz, "); 193 + printk("880 Hz, "); 194 194 break; 195 195 case 3: 196 196 devpriv->ulConvertionRate = MPC624_SPEED_440_Hz; 197 - rt_printk("440 Hz, "); 197 + printk("440 Hz, "); 198 198 break; 199 199 case 4: 200 200 devpriv->ulConvertionRate = MPC624_SPEED_220_Hz; 201 - rt_printk("220 Hz, "); 201 + printk("220 Hz, "); 202 202 break; 203 203 case 5: 204 204 devpriv->ulConvertionRate = MPC624_SPEED_110_Hz; 205 - rt_printk("110 Hz, "); 205 + printk("110 Hz, "); 206 206 break; 207 207 case 6: 208 208 devpriv->ulConvertionRate = MPC624_SPEED_55_Hz; 209 - rt_printk("55 Hz, "); 209 + printk("55 Hz, "); 210 210 break; 211 211 case 7: 212 212 devpriv->ulConvertionRate = MPC624_SPEED_27_5_Hz; 213 - rt_printk("27.5 Hz, "); 213 + printk("27.5 Hz, "); 214 214 break; 215 215 case 8: 216 216 devpriv->ulConvertionRate = MPC624_SPEED_13_75_Hz; 217 - rt_printk("13.75 Hz, "); 217 + printk("13.75 Hz, "); 218 218 break; 219 219 case 9: 220 220 devpriv->ulConvertionRate = MPC624_SPEED_6_875_Hz; 221 - rt_printk("6.875 Hz, "); 221 + printk("6.875 Hz, "); 222 222 break; 223 223 default: 224 - rt_printk 224 + printk 225 225 ("illegal convertion rate setting! Valid numbers are 0..9. Using 9 => 6.875 Hz, "); 226 226 devpriv->ulConvertionRate = MPC624_SPEED_3_52_kHz; 227 227 } ··· 237 237 switch (it->options[1]) { 238 238 default: 239 239 s->maxdata = 0x3FFFFFFF; 240 - rt_printk("30 bit, "); 240 + printk("30 bit, "); 241 241 } 242 242 243 243 switch (it->options[1]) { 244 244 case 0: 245 245 s->range_table = &range_mpc624_bipolar1; 246 - rt_printk("1.01V]: "); 246 + printk("1.01V]: "); 247 247 break; 248 248 default: 249 249 s->range_table = &range_mpc624_bipolar10; 250 - rt_printk("10.1V]: "); 250 + printk("10.1V]: "); 251 251 } 252 252 s->len_chanlist = 1; 253 253 s->insn_read = mpc624_ai_rinsn; 254 254 255 - rt_printk("attached\n"); 255 + printk("attached\n"); 256 256 257 257 return 1; 258 258 } 259 259 260 260 static int mpc624_detach(struct comedi_device *dev) 261 261 { 262 - rt_printk("comedi%d: mpc624: remove\n", dev->minor); 262 + printk("comedi%d: mpc624: remove\n", dev->minor); 263 263 264 264 if (dev->iobase) 265 265 release_region(dev->iobase, MPC624_SIZE); ··· 279 279 280 280 /* WARNING: We always write 0 to GNSWA bit, so the channel range is +-/10.1Vdc */ 281 281 outb(insn->chanspec, dev->iobase + MPC624_GNMUXCH); 282 - /* rt_printk("Channel %d: \n", insn->chanspec); */ 282 + /* printk("Channel %d: \n", insn->chanspec); */ 283 283 if (!insn->n) { 284 - rt_printk("MPC624: Warning, no data to aquire\n"); 284 + printk("MPC624: Warning, no data to aquire\n"); 285 285 return 0; 286 286 } 287 287 288 288 for (n = 0; n < insn->n; n++) { 289 289 /* Trigger the convertion */ 290 290 outb(MPC624_ADSCK, dev->iobase + MPC624_ADC); 291 - comedi_udelay(1); 291 + udelay(1); 292 292 outb(MPC624_ADCS | MPC624_ADSCK, dev->iobase + MPC624_ADC); 293 - comedi_udelay(1); 293 + udelay(1); 294 294 outb(0, dev->iobase + MPC624_ADC); 295 - comedi_udelay(1); 295 + udelay(1); 296 296 297 297 /* Wait for the convertion to end */ 298 298 for (i = 0; i < TIMEOUT; i++) { 299 299 ucPort = inb(dev->iobase + MPC624_ADC); 300 300 if (ucPort & MPC624_ADBUSY) 301 - comedi_udelay(1000); 301 + udelay(1000); 302 302 else 303 303 break; 304 304 } 305 305 if (i == TIMEOUT) { 306 - rt_printk("MPC624: timeout (%dms)\n", TIMEOUT); 306 + printk("MPC624: timeout (%dms)\n", TIMEOUT); 307 307 data[n] = 0; 308 308 return -ETIMEDOUT; 309 309 } 310 310 /* Start reading data */ 311 311 data_in = 0; 312 312 data_out = devpriv->ulConvertionRate; 313 - comedi_udelay(1); 313 + udelay(1); 314 314 for (i = 0; i < 32; i++) { 315 315 /* Set the clock low */ 316 316 outb(0, dev->iobase + MPC624_ADC); 317 - comedi_udelay(1); 317 + udelay(1); 318 318 319 319 if (data_out & (1 << 31)) /* the next bit is a 1 */ 320 320 { 321 321 /* Set the ADSDI line (send to MPC624) */ 322 322 outb(MPC624_ADSDI, dev->iobase + MPC624_ADC); 323 - comedi_udelay(1); 323 + udelay(1); 324 324 /* Set the clock high */ 325 325 outb(MPC624_ADSCK | MPC624_ADSDI, 326 326 dev->iobase + MPC624_ADC); ··· 328 328 { 329 329 /* Set the ADSDI line (send to MPC624) */ 330 330 outb(0, dev->iobase + MPC624_ADC); 331 - comedi_udelay(1); 331 + udelay(1); 332 332 /* Set the clock high */ 333 333 outb(MPC624_ADSCK, dev->iobase + MPC624_ADC); 334 334 } 335 335 /* Read ADSDO on high clock (receive from MPC624) */ 336 - comedi_udelay(1); 336 + udelay(1); 337 337 data_in <<= 1; 338 338 data_in |= 339 339 (inb(dev->iobase + 340 340 MPC624_ADC) & MPC624_ADSDO) >> 4; 341 - comedi_udelay(1); 341 + udelay(1); 342 342 343 343 data_out <<= 1; 344 344 } ··· 357 357 /* 00: sub-LSB */ 358 358 359 359 if (data_in & MPC624_EOC_BIT) 360 - rt_printk("MPC624: EOC bit is set (data_in=%lu)!", 360 + printk("MPC624: EOC bit is set (data_in=%lu)!", 361 361 data_in); 362 362 if (data_in & MPC624_DMY_BIT) 363 - rt_printk("MPC624: DMY bit is set (data_in=%lu)!", 363 + printk("MPC624: DMY bit is set (data_in=%lu)!", 364 364 data_in); 365 365 if (data_in & MPC624_SGN_BIT) /* check the sign bit */ 366 366 { /* The voltage is positive */
+3 -3
drivers/staging/comedi/drivers/ni_6527.c
··· 432 432 devpriv->mite->daq_io_addr + Clear_Register); 433 433 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control); 434 434 435 - ret = comedi_request_irq(mite_irq(devpriv->mite), ni6527_interrupt, 436 - IRQF_SHARED, "ni6527", dev); 435 + ret = request_irq(mite_irq(devpriv->mite), ni6527_interrupt, 436 + IRQF_SHARED, "ni6527", dev); 437 437 if (ret < 0) { 438 438 printk(" irq not available"); 439 439 } else ··· 452 452 } 453 453 454 454 if (dev->irq) { 455 - comedi_free_irq(dev->irq, dev); 455 + free_irq(dev->irq, dev); 456 456 } 457 457 458 458 if (devpriv && devpriv->mite) {
+5 -5
drivers/staging/comedi/drivers/ni_65xx.c
··· 437 437 writeb(bits, 438 438 private(dev)->mite->daq_io_addr + 439 439 Port_Data(port)); 440 - /* rt_printk("wrote 0x%x to port %i\n", bits, port); */ 440 + /* printk("wrote 0x%x to port %i\n", bits, port); */ 441 441 } 442 442 port_read_bits = 443 443 readb(private(dev)->mite->daq_io_addr + 444 444 Port_Data(port)); 445 - /* rt_printk("read 0x%x from port %i\n", port_read_bits, port); */ 445 + /* printk("read 0x%x from port %i\n", port_read_bits, port); */ 446 446 if (bitshift > 0) { 447 447 port_read_bits <<= bitshift; 448 448 } else { ··· 742 742 /* Set filter interval to 0 (32bit reg) */ 743 743 writeb(0x00000000, private(dev)->mite->daq_io_addr + Filter_Interval); 744 744 745 - ret = comedi_request_irq(dev->irq, ni_65xx_interrupt, IRQF_SHARED, 746 - "ni_65xx", dev); 745 + ret = request_irq(dev->irq, ni_65xx_interrupt, IRQF_SHARED, 746 + "ni_65xx", dev); 747 747 if (ret < 0) { 748 748 dev->irq = 0; 749 749 printk(" irq not available"); ··· 764 764 } 765 765 766 766 if (dev->irq) { 767 - comedi_free_irq(dev->irq, dev); 767 + free_irq(dev->irq, dev); 768 768 } 769 769 770 770 if (private(dev)) {
+19 -21
drivers/staging/comedi/drivers/ni_660x.c
··· 695 695 ni_660x_register = G3InterruptEnable; 696 696 break; 697 697 default: 698 - rt_printk("%s: unhandled register 0x%x in switch.\n", 698 + printk("%s: unhandled register 0x%x in switch.\n", 699 699 __func__, reg); 700 700 BUG(); 701 701 return 0; ··· 719 719 writel(bits, write_address); 720 720 break; 721 721 default: 722 - rt_printk("%s: %s: bug! unhandled case (reg=0x%x) in switch.\n", 722 + printk("%s: %s: bug! unhandled case (reg=0x%x) in switch.\n", 723 723 __FILE__, __func__, reg); 724 724 BUG(); 725 725 break; ··· 741 741 return readl(read_address); 742 742 break; 743 743 default: 744 - rt_printk("%s: %s: bug! unhandled case (reg=0x%x) in switch.\n", 744 + printk("%s: %s: bug! unhandled case (reg=0x%x) in switch.\n", 745 745 __FILE__, __func__, reg); 746 746 BUG(); 747 747 break; ··· 777 777 unsigned mite_channel, struct ni_gpct *counter) 778 778 { 779 779 unsigned long flags; 780 - comedi_spin_lock_irqsave(&private(dev)->soft_reg_copy_lock, flags); 780 + spin_lock_irqsave(&private(dev)->soft_reg_copy_lock, flags); 781 781 private(dev)->dma_configuration_soft_copies[counter->chip_index] &= 782 782 ~dma_select_mask(mite_channel); 783 783 private(dev)->dma_configuration_soft_copies[counter->chip_index] |= ··· 788 788 chip_index] | dma_reset_bit(mite_channel), 789 789 DMAConfigRegister); 790 790 mmiowb(); 791 - comedi_spin_unlock_irqrestore(&private(dev)->soft_reg_copy_lock, flags); 791 + spin_unlock_irqrestore(&private(dev)->soft_reg_copy_lock, flags); 792 792 } 793 793 794 794 static inline void ni_660x_unset_dma_channel(struct comedi_device *dev, 795 795 unsigned mite_channel, struct ni_gpct *counter) 796 796 { 797 797 unsigned long flags; 798 - comedi_spin_lock_irqsave(&private(dev)->soft_reg_copy_lock, flags); 798 + spin_lock_irqsave(&private(dev)->soft_reg_copy_lock, flags); 799 799 private(dev)->dma_configuration_soft_copies[counter->chip_index] &= 800 800 ~dma_select_mask(mite_channel); 801 801 private(dev)->dma_configuration_soft_copies[counter->chip_index] |= ··· 804 804 private(dev)->dma_configuration_soft_copies[counter-> 805 805 chip_index], DMAConfigRegister); 806 806 mmiowb(); 807 - comedi_spin_unlock_irqrestore(&private(dev)->soft_reg_copy_lock, flags); 807 + spin_unlock_irqrestore(&private(dev)->soft_reg_copy_lock, flags); 808 808 } 809 809 810 810 static int ni_660x_request_mite_channel(struct comedi_device *dev, ··· 813 813 unsigned long flags; 814 814 struct mite_channel *mite_chan; 815 815 816 - comedi_spin_lock_irqsave(&private(dev)->mite_channel_lock, flags); 816 + spin_lock_irqsave(&private(dev)->mite_channel_lock, flags); 817 817 BUG_ON(counter->mite_chan); 818 818 mite_chan = 819 819 mite_request_channel(private(dev)->mite, mite_ring(private(dev), 820 820 counter)); 821 821 if (mite_chan == NULL) { 822 - comedi_spin_unlock_irqrestore(&private(dev)->mite_channel_lock, 822 + spin_unlock_irqrestore(&private(dev)->mite_channel_lock, 823 823 flags); 824 824 comedi_error(dev, 825 825 "failed to reserve mite dma channel for counter."); ··· 828 828 mite_chan->dir = direction; 829 829 ni_tio_set_mite_channel(counter, mite_chan); 830 830 ni_660x_set_dma_channel(dev, mite_chan->channel, counter); 831 - comedi_spin_unlock_irqrestore(&private(dev)->mite_channel_lock, flags); 831 + spin_unlock_irqrestore(&private(dev)->mite_channel_lock, flags); 832 832 return 0; 833 833 } 834 834 ··· 836 836 { 837 837 unsigned long flags; 838 838 839 - comedi_spin_lock_irqsave(&private(dev)->mite_channel_lock, flags); 839 + spin_lock_irqsave(&private(dev)->mite_channel_lock, flags); 840 840 if (counter->mite_chan) { 841 841 struct mite_channel *mite_chan = counter->mite_chan; 842 842 ··· 844 844 ni_tio_set_mite_channel(counter, NULL); 845 845 mite_release_channel(mite_chan); 846 846 } 847 - comedi_spin_unlock_irqrestore(&private(dev)->mite_channel_lock, flags); 847 + spin_unlock_irqrestore(&private(dev)->mite_channel_lock, flags); 848 848 } 849 849 850 850 static int ni_660x_cmd(struct comedi_device *dev, struct comedi_subdevice *s) ··· 921 921 if (dev->attached == 0) 922 922 return IRQ_NONE; 923 923 /* lock to avoid race with comedi_poll */ 924 - comedi_spin_lock_irqsave(&private(dev)->interrupt_lock, flags); 924 + spin_lock_irqsave(&private(dev)->interrupt_lock, flags); 925 925 smp_mb(); 926 926 for (i = 0; i < ni_660x_num_counters(dev); ++i) { 927 927 s = dev->subdevices + NI_660X_GPCT_SUBDEV(i); 928 928 ni_660x_handle_gpct_interrupt(dev, s); 929 929 } 930 - comedi_spin_unlock_irqrestore(&private(dev)->interrupt_lock, flags); 930 + spin_unlock_irqrestore(&private(dev)->interrupt_lock, flags); 931 931 return IRQ_HANDLED; 932 932 } 933 933 ··· 936 936 { 937 937 unsigned long flags; 938 938 /* lock to avoid race with comedi_poll */ 939 - comedi_spin_lock_irqsave(&private(dev)->interrupt_lock, flags); 939 + spin_lock_irqsave(&private(dev)->interrupt_lock, flags); 940 940 mite_sync_input_dma(subdev_to_counter(s)->mite_chan, s->async); 941 - comedi_spin_unlock_irqrestore(&private(dev)->interrupt_lock, flags); 941 + spin_unlock_irqrestore(&private(dev)->interrupt_lock, flags); 942 942 return comedi_buf_read_n_available(s->async); 943 943 } 944 944 ··· 1107 1107 for (i = 0; i < board(dev)->n_chips; ++i) { 1108 1108 set_tio_counterswap(dev, i); 1109 1109 } 1110 - ret = comedi_request_irq(mite_irq(private(dev)->mite), 1111 - ni_660x_interrupt, IRQF_SHARED, "ni_660x", 1112 - dev); 1113 - 1110 + ret = request_irq(mite_irq(private(dev)->mite), ni_660x_interrupt, 1111 + IRQF_SHARED, "ni_660x", dev); 1114 1112 if (ret < 0) { 1115 1113 printk(" irq not available\n"); 1116 1114 return ret; ··· 1129 1131 1130 1132 /* Free irq */ 1131 1133 if (dev->irq) 1132 - comedi_free_irq(dev->irq, dev); 1134 + free_irq(dev->irq, dev); 1133 1135 1134 1136 if (dev->private) { 1135 1137 if (private(dev)->counter_dev)
+1 -1
drivers/staging/comedi/drivers/ni_670x.c
··· 217 217 mite_unsetup(devpriv->mite); 218 218 219 219 if (dev->irq) 220 - comedi_free_irq(dev->irq, dev); 220 + free_irq(dev->irq, dev); 221 221 222 222 return 0; 223 223 }
+9 -9
drivers/staging/comedi/drivers/ni_at_a2150.c
··· 201 201 202 202 static void ni_dump_regs(struct comedi_device *dev) 203 203 { 204 - rt_printk("config bits 0x%x\n", devpriv->config_bits); 205 - rt_printk("irq dma bits 0x%x\n", devpriv->irq_dma_bits); 206 - rt_printk("status bits 0x%x\n", inw(dev->iobase + STATUS_REG)); 204 + printk("config bits 0x%x\n", devpriv->config_bits); 205 + printk("irq dma bits 0x%x\n", devpriv->irq_dma_bits); 206 + printk("status bits 0x%x\n", inw(dev->iobase + STATUS_REG)); 207 207 } 208 208 209 209 #endif ··· 370 370 printk(" invalid irq line %u\n", irq); 371 371 return -EINVAL; 372 372 } 373 - if (comedi_request_irq(irq, a2150_interrupt, 0, 373 + if (request_irq(irq, a2150_interrupt, 0, 374 374 driver_a2150.driver_name, dev)) { 375 375 printk("unable to allocate irq %u\n", irq); 376 376 return -EINVAL; ··· 437 437 for (i = 0; i < timeout; i++) { 438 438 if ((DCAL_BIT & inw(dev->iobase + STATUS_REG)) == 0) 439 439 break; 440 - comedi_udelay(1000); 440 + udelay(1000); 441 441 } 442 442 if (i == timeout) { 443 443 printk(" timed out waiting for offset calibration to complete\n"); ··· 461 461 } 462 462 463 463 if (dev->irq) 464 - comedi_free_irq(dev->irq, dev); 464 + free_irq(dev->irq, dev); 465 465 if (devpriv) { 466 466 if (devpriv->dma) 467 467 free_dma(devpriv->dma); ··· 764 764 for (i = 0; i < timeout; i++) { 765 765 if (inw(dev->iobase + STATUS_REG) & FNE_BIT) 766 766 break; 767 - comedi_udelay(1); 767 + udelay(1); 768 768 } 769 769 if (i == timeout) { 770 770 comedi_error(dev, "timeout"); ··· 778 778 for (i = 0; i < timeout; i++) { 779 779 if (inw(dev->iobase + STATUS_REG) & FNE_BIT) 780 780 break; 781 - comedi_udelay(1); 781 + udelay(1); 782 782 } 783 783 if (i == timeout) { 784 784 comedi_error(dev, "timeout"); ··· 789 789 #endif 790 790 data[n] = inw(dev->iobase + FIFO_DATA_REG); 791 791 #ifdef A2150_DEBUG 792 - rt_printk(" data is %i\n", data[n]); 792 + printk(" data is %i\n", data[n]); 793 793 #endif 794 794 data[n] ^= 0x8000; 795 795 }
+7 -7
drivers/staging/comedi/drivers/ni_atmio.c
··· 301 301 { 302 302 unsigned long flags; 303 303 304 - comedi_spin_lock_irqsave(&devpriv->window_lock, flags); 304 + spin_lock_irqsave(&devpriv->window_lock, flags); 305 305 if ((addr) < 8) { 306 306 ni_writew(data, addr * 2); 307 307 } else { 308 308 ni_writew(addr, Window_Address); 309 309 ni_writew(data, Window_Data); 310 310 } 311 - comedi_spin_unlock_irqrestore(&devpriv->window_lock, flags); 311 + spin_unlock_irqrestore(&devpriv->window_lock, flags); 312 312 } 313 313 314 314 static uint16_t ni_atmio_win_in(struct comedi_device *dev, int addr) ··· 316 316 unsigned long flags; 317 317 uint16_t ret; 318 318 319 - comedi_spin_lock_irqsave(&devpriv->window_lock, flags); 319 + spin_lock_irqsave(&devpriv->window_lock, flags); 320 320 if (addr < 8) { 321 321 ret = ni_readw(addr * 2); 322 322 } else { 323 323 ni_writew(addr, Window_Address); 324 324 ret = ni_readw(Window_Data); 325 325 } 326 - comedi_spin_unlock_irqrestore(&devpriv->window_lock, flags); 326 + spin_unlock_irqrestore(&devpriv->window_lock, flags); 327 327 328 328 return ret; 329 329 } ··· 362 362 if (dev->iobase) 363 363 release_region(dev->iobase, NI_SIZE); 364 364 if (dev->irq) { 365 - comedi_free_irq(dev->irq, dev); 365 + free_irq(dev->irq, dev); 366 366 } 367 367 if (devpriv->isapnp_dev) 368 368 pnp_device_detach(devpriv->isapnp_dev); ··· 478 478 return -EINVAL; 479 479 } 480 480 printk(" ( irq = %u )", irq); 481 - ret = comedi_request_irq(irq, ni_E_interrupt, 482 - NI_E_IRQ_FLAGS, "ni_atmio", dev); 481 + ret = request_irq(irq, ni_E_interrupt, NI_E_IRQ_FLAGS, 482 + "ni_atmio", dev); 483 483 484 484 if (ret < 0) { 485 485 printk(" irq not available\n");
+3 -4
drivers/staging/comedi/drivers/ni_atmio16d.c
··· 579 579 } 580 580 /* end waiting, now check if it timed out */ 581 581 if (t == ATMIO16D_TIMEOUT) { 582 - rt_printk("atmio16d: timeout\n"); 582 + printk("atmio16d: timeout\n"); 583 583 584 584 return -ETIME; 585 585 } ··· 743 743 irq = it->options[1]; 744 744 if (irq) { 745 745 746 - ret = comedi_request_irq(irq, atmio16d_interrupt, 747 - 0, "atmio16d", dev); 746 + ret = request_irq(irq, atmio16d_interrupt, 0, "atmio16d", dev); 748 747 if (ret < 0) { 749 748 printk("failed to allocate irq %u\n", irq); 750 749 return ret; ··· 855 856 subdev_8255_cleanup(dev, dev->subdevices + 3); 856 857 857 858 if (dev->irq) 858 - comedi_free_irq(dev->irq, dev); 859 + free_irq(dev->irq, dev); 859 860 860 861 reset_atmio16d(dev); 861 862
+1 -1
drivers/staging/comedi/drivers/ni_daq_700.c
··· 425 425 if (thisboard->bustype != pcmcia_bustype && dev->iobase) 426 426 release_region(dev->iobase, DIO700_SIZE); 427 427 if (dev->irq) 428 - comedi_free_irq(dev->irq, dev); 428 + free_irq(dev->irq, dev); 429 429 430 430 return 0; 431 431 };
+1 -1
drivers/staging/comedi/drivers/ni_daq_dio24.c
··· 182 182 if (thisboard->bustype != pcmcia_bustype && dev->iobase) 183 183 release_region(dev->iobase, DIO24_SIZE); 184 184 if (dev->irq) 185 - comedi_free_irq(dev->irq, dev); 185 + free_irq(dev->irq, dev); 186 186 187 187 return 0; 188 188 };
+36 -36
drivers/staging/comedi/drivers/ni_labpc.c
··· 516 516 isr_flags = 0; 517 517 if (thisboard->bustype == pci_bustype) 518 518 isr_flags |= IRQF_SHARED; 519 - if (comedi_request_irq(irq, labpc_interrupt, isr_flags, 519 + if (request_irq(irq, labpc_interrupt, isr_flags, 520 520 driver_labpc.driver_name, dev)) { 521 521 printk("unable to allocate irq %u\n", irq); 522 522 return -EINVAL; ··· 737 737 if (devpriv->dma_chan) 738 738 free_dma(devpriv->dma_chan); 739 739 if (dev->irq) 740 - comedi_free_irq(dev->irq, dev); 740 + free_irq(dev->irq, dev); 741 741 if (thisboard->bustype == isa_bustype && dev->iobase) 742 742 release_region(dev->iobase, LABPC_SIZE); 743 743 #ifdef CONFIG_COMEDI_PCI ··· 759 759 { 760 760 unsigned long flags; 761 761 762 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 762 + spin_lock_irqsave(&dev->spinlock, flags); 763 763 devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT; 764 764 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); 765 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 765 + spin_unlock_irqrestore(&dev->spinlock, flags); 766 766 767 767 devpriv->command3_bits = 0; 768 768 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG); ··· 788 788 if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1])) 789 789 return MODE_MULT_CHAN_DOWN; 790 790 791 - rt_printk("ni_labpc: bug! this should never happen\n"); 791 + printk("ni_labpc: bug! this should never happen\n"); 792 792 793 793 return 0; 794 794 } ··· 844 844 } 845 845 break; 846 846 default: 847 - rt_printk("ni_labpc: bug! in chanlist check\n"); 847 + printk("ni_labpc: bug! in chanlist check\n"); 848 848 return 1; 849 849 break; 850 850 } ··· 1082 1082 aref = CR_AREF(cmd->chanlist[0]); 1083 1083 1084 1084 /* make sure board is disabled before setting up aquisition */ 1085 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1085 + spin_lock_irqsave(&dev->spinlock, flags); 1086 1086 devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT; 1087 1087 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); 1088 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1088 + spin_unlock_irqrestore(&dev->spinlock, flags); 1089 1089 1090 1090 devpriv->command3_bits = 0; 1091 1091 devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG); ··· 1174 1174 devpriv->command1_bits |= ADC_SCAN_EN_BIT; 1175 1175 /* need a brief delay before enabling scan, or scan list will get screwed when you switch 1176 1176 * between scan up to scan down mode - dunno why */ 1177 - comedi_udelay(1); 1177 + udelay(1); 1178 1178 devpriv->write_byte(devpriv->command1_bits, 1179 1179 dev->iobase + COMMAND1_REG); 1180 1180 } ··· 1275 1275 1276 1276 /* command2 reg */ 1277 1277 /* use 2 cascaded counters for pacing */ 1278 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1278 + spin_lock_irqsave(&dev->spinlock, flags); 1279 1279 devpriv->command2_bits |= CASCADE_BIT; 1280 1280 switch (cmd->start_src) { 1281 1281 case TRIG_EXT: ··· 1303 1303 return -1; 1304 1304 } 1305 1305 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); 1306 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1306 + spin_unlock_irqrestore(&dev->spinlock, flags); 1307 1307 1308 1308 return 0; 1309 1309 } ··· 1510 1510 unsigned long flags; 1511 1511 1512 1512 /* disable timed conversions */ 1513 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1513 + spin_lock_irqsave(&dev->spinlock, flags); 1514 1514 devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT; 1515 1515 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); 1516 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1516 + spin_unlock_irqrestore(&dev->spinlock, flags); 1517 1517 1518 1518 /* disable interrupt generation and dma */ 1519 1519 devpriv->command3_bits = 0; ··· 1571 1571 if (devpriv->read_byte(dev->iobase + 1572 1572 STATUS1_REG) & DATA_AVAIL_BIT) 1573 1573 break; 1574 - comedi_udelay(1); 1574 + udelay(1); 1575 1575 } 1576 1576 if (i == timeout) { 1577 1577 comedi_error(dev, "timeout"); ··· 1598 1598 /* turn off pacing of analog output channel */ 1599 1599 /* note: hardware bug in daqcard-1200 means pacing cannot 1600 1600 * be independently enabled/disabled for its the two channels */ 1601 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1601 + spin_lock_irqsave(&dev->spinlock, flags); 1602 1602 devpriv->command2_bits &= ~DAC_PACED_BIT(channel); 1603 1603 devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG); 1604 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1604 + spin_unlock_irqrestore(&dev->spinlock, flags); 1605 1605 1606 1606 /* set range */ 1607 1607 if (thisboard->register_layout == labpc_1200_layout) { ··· 1809 1809 devpriv->command5_bits |= SDATA_BIT; 1810 1810 else 1811 1811 devpriv->command5_bits &= ~SDATA_BIT; 1812 - comedi_udelay(1); 1812 + udelay(1); 1813 1813 devpriv->write_byte(devpriv->command5_bits, 1814 1814 dev->iobase + COMMAND5_REG); 1815 1815 /* set clock to load bit */ 1816 1816 devpriv->command5_bits |= SCLOCK_BIT; 1817 - comedi_udelay(1); 1817 + udelay(1); 1818 1818 devpriv->write_byte(devpriv->command5_bits, 1819 1819 dev->iobase + COMMAND5_REG); 1820 1820 } ··· 1830 1830 for (i = 1; i <= value_width; i++) { 1831 1831 /* set serial clock */ 1832 1832 devpriv->command5_bits |= SCLOCK_BIT; 1833 - comedi_udelay(1); 1833 + udelay(1); 1834 1834 devpriv->write_byte(devpriv->command5_bits, 1835 1835 dev->iobase + COMMAND5_REG); 1836 1836 /* clear clock bit */ 1837 1837 devpriv->command5_bits &= ~SCLOCK_BIT; 1838 - comedi_udelay(1); 1838 + udelay(1); 1839 1839 devpriv->write_byte(devpriv->command5_bits, 1840 1840 dev->iobase + COMMAND5_REG); 1841 1841 /* read bits most significant bit first */ 1842 - comedi_udelay(1); 1842 + udelay(1); 1843 1843 devpriv->status2_bits = 1844 1844 devpriv->read_byte(dev->iobase + STATUS2_REG); 1845 1845 if (devpriv->status2_bits & EEPROM_OUT_BIT) { ··· 1858 1858 1859 1859 /* enable read/write to eeprom */ 1860 1860 devpriv->command5_bits &= ~EEPROM_EN_BIT; 1861 - comedi_udelay(1); 1861 + udelay(1); 1862 1862 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1863 1863 devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT; 1864 - comedi_udelay(1); 1864 + udelay(1); 1865 1865 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1866 1866 1867 1867 /* send read instruction */ ··· 1873 1873 1874 1874 /* disable read/write to eeprom */ 1875 1875 devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT; 1876 - comedi_udelay(1); 1876 + udelay(1); 1877 1877 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1878 1878 1879 1879 return value; ··· 1904 1904 1905 1905 /* enable read/write to eeprom */ 1906 1906 devpriv->command5_bits &= ~EEPROM_EN_BIT; 1907 - comedi_udelay(1); 1907 + udelay(1); 1908 1908 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1909 1909 devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT; 1910 - comedi_udelay(1); 1910 + udelay(1); 1911 1911 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1912 1912 1913 1913 /* send write_enable instruction */ 1914 1914 labpc_serial_out(dev, write_enable_instruction, write_length); 1915 1915 devpriv->command5_bits &= ~EEPROM_EN_BIT; 1916 - comedi_udelay(1); 1916 + udelay(1); 1917 1917 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1918 1918 1919 1919 /* send write instruction */ 1920 1920 devpriv->command5_bits |= EEPROM_EN_BIT; 1921 - comedi_udelay(1); 1921 + udelay(1); 1922 1922 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1923 1923 labpc_serial_out(dev, write_instruction, write_length); 1924 1924 /* send 8 bit address to write to */ ··· 1926 1926 /* write value */ 1927 1927 labpc_serial_out(dev, value, write_length); 1928 1928 devpriv->command5_bits &= ~EEPROM_EN_BIT; 1929 - comedi_udelay(1); 1929 + udelay(1); 1930 1930 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1931 1931 1932 1932 /* disable read/write to eeprom */ 1933 1933 devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT; 1934 - comedi_udelay(1); 1934 + udelay(1); 1935 1935 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1936 1936 1937 1937 return 0; ··· 1945 1945 1946 1946 /* enable read/write to eeprom */ 1947 1947 devpriv->command5_bits &= ~EEPROM_EN_BIT; 1948 - comedi_udelay(1); 1948 + udelay(1); 1949 1949 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1950 1950 devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT; 1951 - comedi_udelay(1); 1951 + udelay(1); 1952 1952 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1953 1953 1954 1954 /* send read status instruction */ ··· 1958 1958 1959 1959 /* disable read/write to eeprom */ 1960 1960 devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT; 1961 - comedi_udelay(1); 1961 + udelay(1); 1962 1962 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1963 1963 1964 1964 return value; ··· 1975 1975 /* clear caldac load bit and make sure we don't write to eeprom */ 1976 1976 devpriv->command5_bits &= 1977 1977 ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT; 1978 - comedi_udelay(1); 1978 + udelay(1); 1979 1979 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1980 1980 1981 1981 /* write 4 bit channel */ ··· 1985 1985 1986 1986 /* set and clear caldac bit to load caldac value */ 1987 1987 devpriv->command5_bits |= CALDAC_LOAD_BIT; 1988 - comedi_udelay(1); 1988 + udelay(1); 1989 1989 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1990 1990 devpriv->command5_bits &= ~CALDAC_LOAD_BIT; 1991 - comedi_udelay(1); 1991 + udelay(1); 1992 1992 devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG); 1993 1993 } 1994 1994
+126 -129
drivers/staging/comedi/drivers/ni_mio_common.c
··· 365 365 { 366 366 unsigned long flags; 367 367 368 - comedi_spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags); 368 + spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags); 369 369 switch (reg) { 370 370 case Interrupt_A_Enable_Register: 371 371 devpriv->int_a_enable_reg &= ~bit_mask; ··· 396 396 ni_writeb(devpriv->g0_g1_select_reg, G0_G1_Select); 397 397 break; 398 398 default: 399 - rt_printk("Warning %s() called with invalid register\n", 399 + printk("Warning %s() called with invalid register\n", 400 400 __func__); 401 - rt_printk("reg is %d\n", reg); 401 + printk("reg is %d\n", reg); 402 402 break; 403 403 } 404 404 mmiowb(); 405 - comedi_spin_unlock_irqrestore(&devpriv->soft_reg_copy_lock, flags); 405 + spin_unlock_irqrestore(&devpriv->soft_reg_copy_lock, flags); 406 406 } 407 407 408 408 #ifdef PCIDMA ··· 460 460 { 461 461 unsigned long flags; 462 462 463 - comedi_spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags); 463 + spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags); 464 464 devpriv->cdio_dma_select_reg &= ~CDO_DMA_Select_Mask; 465 465 if (mite_channel >= 0) { 466 466 /*XXX just guessing ni_stc_dma_channel_select_bitfield() returns the right bits, ··· 472 472 } 473 473 ni_writeb(devpriv->cdio_dma_select_reg, M_Offset_CDIO_DMA_Select); 474 474 mmiowb(); 475 - comedi_spin_unlock_irqrestore(&devpriv->soft_reg_copy_lock, flags); 475 + spin_unlock_irqrestore(&devpriv->soft_reg_copy_lock, flags); 476 476 } 477 477 478 478 static int ni_request_ai_mite_channel(struct comedi_device *dev) 479 479 { 480 480 unsigned long flags; 481 481 482 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 482 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 483 483 BUG_ON(devpriv->ai_mite_chan); 484 484 devpriv->ai_mite_chan = 485 485 mite_request_channel(devpriv->mite, devpriv->ai_mite_ring); 486 486 if (devpriv->ai_mite_chan == NULL) { 487 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, 487 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, 488 488 flags); 489 489 comedi_error(dev, 490 490 "failed to reserve mite dma channel for analog input."); ··· 492 492 } 493 493 devpriv->ai_mite_chan->dir = COMEDI_INPUT; 494 494 ni_set_ai_dma_channel(dev, devpriv->ai_mite_chan->channel); 495 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 495 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 496 496 return 0; 497 497 } 498 498 ··· 500 500 { 501 501 unsigned long flags; 502 502 503 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 503 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 504 504 BUG_ON(devpriv->ao_mite_chan); 505 505 devpriv->ao_mite_chan = 506 506 mite_request_channel(devpriv->mite, devpriv->ao_mite_ring); 507 507 if (devpriv->ao_mite_chan == NULL) { 508 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, 508 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, 509 509 flags); 510 510 comedi_error(dev, 511 511 "failed to reserve mite dma channel for analog outut."); ··· 513 513 } 514 514 devpriv->ao_mite_chan->dir = COMEDI_OUTPUT; 515 515 ni_set_ao_dma_channel(dev, devpriv->ao_mite_chan->channel); 516 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 516 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 517 517 return 0; 518 518 } 519 519 ··· 524 524 struct mite_channel *mite_chan; 525 525 526 526 BUG_ON(gpct_index >= NUM_GPCT); 527 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 527 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 528 528 BUG_ON(devpriv->counter_dev->counters[gpct_index].mite_chan); 529 529 mite_chan = 530 530 mite_request_channel(devpriv->mite, 531 531 devpriv->gpct_mite_ring[gpct_index]); 532 532 if (mite_chan == NULL) { 533 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, 533 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, 534 534 flags); 535 535 comedi_error(dev, 536 536 "failed to reserve mite dma channel for counter."); ··· 540 540 ni_tio_set_mite_channel(&devpriv->counter_dev->counters[gpct_index], 541 541 mite_chan); 542 542 ni_set_gpct_dma_channel(dev, gpct_index, mite_chan->channel); 543 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 543 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 544 544 return 0; 545 545 } 546 546 ··· 551 551 #ifdef PCIDMA 552 552 unsigned long flags; 553 553 554 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 554 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 555 555 BUG_ON(devpriv->cdo_mite_chan); 556 556 devpriv->cdo_mite_chan = 557 557 mite_request_channel(devpriv->mite, devpriv->cdo_mite_ring); 558 558 if (devpriv->cdo_mite_chan == NULL) { 559 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, 559 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, 560 560 flags); 561 561 comedi_error(dev, 562 562 "failed to reserve mite dma channel for correlated digital outut."); ··· 564 564 } 565 565 devpriv->cdo_mite_chan->dir = COMEDI_OUTPUT; 566 566 ni_set_cdo_dma_channel(dev, devpriv->cdo_mite_chan->channel); 567 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 567 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 568 568 #endif /* PCIDMA */ 569 569 return 0; 570 570 } ··· 574 574 #ifdef PCIDMA 575 575 unsigned long flags; 576 576 577 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 577 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 578 578 if (devpriv->ai_mite_chan) { 579 579 ni_set_ai_dma_channel(dev, -1); 580 580 mite_release_channel(devpriv->ai_mite_chan); 581 581 devpriv->ai_mite_chan = NULL; 582 582 } 583 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 583 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 584 584 #endif /* PCIDMA */ 585 585 } 586 586 ··· 589 589 #ifdef PCIDMA 590 590 unsigned long flags; 591 591 592 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 592 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 593 593 if (devpriv->ao_mite_chan) { 594 594 ni_set_ao_dma_channel(dev, -1); 595 595 mite_release_channel(devpriv->ao_mite_chan); 596 596 devpriv->ao_mite_chan = NULL; 597 597 } 598 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 598 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 599 599 #endif /* PCIDMA */ 600 600 } 601 601 ··· 605 605 unsigned long flags; 606 606 607 607 BUG_ON(gpct_index >= NUM_GPCT); 608 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 608 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 609 609 if (devpriv->counter_dev->counters[gpct_index].mite_chan) { 610 610 struct mite_channel *mite_chan = 611 611 devpriv->counter_dev->counters[gpct_index].mite_chan; ··· 615 615 counters[gpct_index], NULL); 616 616 mite_release_channel(mite_chan); 617 617 } 618 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 618 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 619 619 #endif /* PCIDMA */ 620 620 } 621 621 ··· 624 624 #ifdef PCIDMA 625 625 unsigned long flags; 626 626 627 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 627 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 628 628 if (devpriv->cdo_mite_chan) { 629 629 ni_set_cdo_dma_channel(dev, -1); 630 630 mite_release_channel(devpriv->cdo_mite_chan); 631 631 devpriv->cdo_mite_chan = NULL; 632 632 } 633 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 633 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 634 634 #endif /* PCIDMA */ 635 635 } 636 636 ··· 712 712 { 713 713 unsigned long flags; 714 714 715 - comedi_spin_lock_irqsave(&devpriv->window_lock, flags); 715 + spin_lock_irqsave(&devpriv->window_lock, flags); 716 716 ni_writew(addr, AO_Window_Address_611x); 717 717 ni_writew(data, AO_Window_Data_611x); 718 - comedi_spin_unlock_irqrestore(&devpriv->window_lock, flags); 718 + spin_unlock_irqrestore(&devpriv->window_lock, flags); 719 719 } 720 720 721 721 static inline void ni_ao_win_outl(struct comedi_device *dev, uint32_t data, int addr) 722 722 { 723 723 unsigned long flags; 724 724 725 - comedi_spin_lock_irqsave(&devpriv->window_lock, flags); 725 + spin_lock_irqsave(&devpriv->window_lock, flags); 726 726 ni_writew(addr, AO_Window_Address_611x); 727 727 ni_writel(data, AO_Window_Data_611x); 728 - comedi_spin_unlock_irqrestore(&devpriv->window_lock, flags); 728 + spin_unlock_irqrestore(&devpriv->window_lock, flags); 729 729 } 730 730 731 731 static inline unsigned short ni_ao_win_inw(struct comedi_device *dev, int addr) ··· 733 733 unsigned long flags; 734 734 unsigned short data; 735 735 736 - comedi_spin_lock_irqsave(&devpriv->window_lock, flags); 736 + spin_lock_irqsave(&devpriv->window_lock, flags); 737 737 ni_writew(addr, AO_Window_Address_611x); 738 738 data = ni_readw(AO_Window_Data_611x); 739 - comedi_spin_unlock_irqrestore(&devpriv->window_lock, flags); 739 + spin_unlock_irqrestore(&devpriv->window_lock, flags); 740 740 return data; 741 741 } 742 742 ··· 779 779 smp_mb(); /* make sure dev->attached is checked before handler does anything else. */ 780 780 781 781 /* lock to avoid race with comedi_poll */ 782 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 782 + spin_lock_irqsave(&dev->spinlock, flags); 783 783 a_status = devpriv->stc_readw(dev, AI_Status_1_Register); 784 784 b_status = devpriv->stc_readw(dev, AO_Status_1_Register); 785 785 #ifdef PCIDMA 786 786 if (mite) { 787 787 unsigned long flags_too; 788 788 789 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, 790 - flags_too); 789 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags_too); 791 790 if (devpriv->ai_mite_chan) { 792 791 ai_mite_status = mite_get_status(devpriv->ai_mite_chan); 793 792 if (ai_mite_status & CHSR_LINKC) ··· 803 804 MITE_CHOR(devpriv->ao_mite_chan-> 804 805 channel)); 805 806 } 806 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, 807 - flags_too); 807 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags_too); 808 808 } 809 809 #endif 810 810 ack_a_interrupt(dev, a_status); ··· 816 818 handle_gpct_interrupt(dev, 1); 817 819 handle_cdio_interrupt(dev); 818 820 819 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 821 + spin_unlock_irqrestore(&dev->spinlock, flags); 820 822 return IRQ_HANDLED; 821 823 } 822 824 ··· 826 828 struct comedi_subdevice *s = dev->subdevices + NI_AI_SUBDEV; 827 829 unsigned long flags; 828 830 829 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 831 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 830 832 if (devpriv->ai_mite_chan) 831 833 mite_sync_input_dma(devpriv->ai_mite_chan, s->async); 832 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 834 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 833 835 } 834 836 835 837 static void mite_handle_b_linkc(struct mite_struct *mite, struct comedi_device * dev) ··· 837 839 struct comedi_subdevice *s = dev->subdevices + NI_AO_SUBDEV; 838 840 unsigned long flags; 839 841 840 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 842 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 841 843 if (devpriv->ao_mite_chan) { 842 844 mite_sync_output_dma(devpriv->ao_mite_chan, s->async); 843 845 } 844 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 846 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 845 847 } 846 848 847 849 static int ni_ao_wait_for_dma_load(struct comedi_device *dev) ··· 856 858 break; 857 859 /* if we poll too often, the pci bus activity seems 858 860 to slow the dma transfer down */ 859 - comedi_udelay(10); 861 + udelay(10); 860 862 } 861 863 if (i == timeout) { 862 864 comedi_error(dev, "timed out waiting for dma load"); ··· 877 879 ni_sync_ai_dma(dev); 878 880 if ((s->async->events & COMEDI_CB_EOS)) 879 881 break; 880 - comedi_udelay(1); 882 + udelay(1); 881 883 } 882 884 #else 883 885 ni_handle_fifo_dregs(dev); ··· 974 976 return; 975 977 976 978 #ifdef DEBUG_INTERRUPT 977 - rt_printk 979 + printk 978 980 ("ni_mio_common: interrupt: a_status=%04x ai_mite_status=%08x\n", 979 981 status, ai_mite_status); 980 982 ni_mio_print_status_a(status); ··· 987 989 if (ai_mite_status & ~(CHSR_INT | CHSR_LINKC | CHSR_DONE | CHSR_MRDY | 988 990 CHSR_DRDY | CHSR_DRQ1 | CHSR_DRQ0 | CHSR_ERROR | 989 991 CHSR_SABORT | CHSR_XFERR | CHSR_LxERR_mask)) { 990 - rt_printk 992 + printk 991 993 ("unknown mite interrupt, ack! (ai_mite_status=%08x)\n", 992 994 ai_mite_status); 993 995 /* mite_print_chsr(ai_mite_status); */ ··· 1000 1002 if (status & (AI_Overrun_St | AI_Overflow_St | AI_SC_TC_Error_St | 1001 1003 AI_SC_TC_St | AI_START1_St)) { 1002 1004 if (status == 0xffff) { 1003 - rt_printk 1005 + printk 1004 1006 ("ni_mio_common: a_status=0xffff. Card removed?\n"); 1005 1007 /* we probably aren't even running a command now, 1006 1008 * so it's a good idea to be careful. */ ··· 1013 1015 } 1014 1016 if (status & (AI_Overrun_St | AI_Overflow_St | 1015 1017 AI_SC_TC_Error_St)) { 1016 - rt_printk("ni_mio_common: ai error a_status=%04x\n", 1018 + printk("ni_mio_common: ai error a_status=%04x\n", 1017 1019 status); 1018 1020 ni_mio_print_status_a(status); 1019 1021 ··· 1029 1031 } 1030 1032 if (status & AI_SC_TC_St) { 1031 1033 #ifdef DEBUG_INTERRUPT 1032 - rt_printk("ni_mio_common: SC_TC interrupt\n"); 1034 + printk("ni_mio_common: SC_TC interrupt\n"); 1033 1035 #endif 1034 1036 if (!devpriv->ai_continuous) { 1035 1037 shutdown_ai_command(dev); ··· 1061 1063 #ifdef DEBUG_INTERRUPT 1062 1064 status = devpriv->stc_readw(dev, AI_Status_1_Register); 1063 1065 if (status & Interrupt_A_St) { 1064 - rt_printk 1066 + printk 1065 1067 ("handle_a_interrupt: didn't clear interrupt? status=0x%x\n", 1066 1068 status); 1067 1069 } ··· 1102 1104 struct comedi_subdevice *s = dev->subdevices + NI_AO_SUBDEV; 1103 1105 /* unsigned short ack=0; */ 1104 1106 #ifdef DEBUG_INTERRUPT 1105 - rt_printk("ni_mio_common: interrupt: b_status=%04x m1_status=%08x\n", 1107 + printk("ni_mio_common: interrupt: b_status=%04x m1_status=%08x\n", 1106 1108 b_status, ao_mite_status); 1107 1109 ni_mio_print_status_b(b_status); 1108 1110 #endif ··· 1116 1118 if (ao_mite_status & ~(CHSR_INT | CHSR_LINKC | CHSR_DONE | CHSR_MRDY | 1117 1119 CHSR_DRDY | CHSR_DRQ1 | CHSR_DRQ0 | CHSR_ERROR | 1118 1120 CHSR_SABORT | CHSR_XFERR | CHSR_LxERR_mask)) { 1119 - rt_printk 1121 + printk 1120 1122 ("unknown mite interrupt, ack! (ao_mite_status=%08x)\n", 1121 1123 ao_mite_status); 1122 1124 /* mite_print_chsr(ao_mite_status); */ ··· 1127 1129 if (b_status == 0xffff) 1128 1130 return; 1129 1131 if (b_status & AO_Overrun_St) { 1130 - rt_printk 1132 + printk 1131 1133 ("ni_mio_common: AO FIFO underrun status=0x%04x status2=0x%04x\n", 1132 1134 b_status, devpriv->stc_readw(dev, 1133 1135 AO_Status_2_Register)); ··· 1144 1146 1145 1147 ret = ni_ao_fifo_half_empty(dev, s); 1146 1148 if (!ret) { 1147 - rt_printk("ni_mio_common: AO buffer underrun\n"); 1149 + printk("ni_mio_common: AO buffer underrun\n"); 1148 1150 ni_set_bits(dev, Interrupt_B_Enable_Register, 1149 1151 AO_FIFO_Interrupt_Enable | 1150 1152 AO_Error_Interrupt_Enable, 0); ··· 1168 1170 { 1169 1171 int i; 1170 1172 1171 - rt_printk("A status:"); 1173 + printk("A status:"); 1172 1174 for (i = 15; i >= 0; i--) { 1173 1175 if (status & (1 << i)) { 1174 - rt_printk(" %s", status_a_strings[i]); 1176 + printk(" %s", status_a_strings[i]); 1175 1177 } 1176 1178 } 1177 - rt_printk("\n"); 1179 + printk("\n"); 1178 1180 } 1179 1181 #endif 1180 1182 ··· 1190 1192 { 1191 1193 int i; 1192 1194 1193 - rt_printk("B status:"); 1195 + printk("B status:"); 1194 1196 for (i = 15; i >= 0; i--) { 1195 1197 if (status & (1 << i)) { 1196 - rt_printk(" %s", status_b_strings[i]); 1198 + printk(" %s", status_b_strings[i]); 1197 1199 } 1198 1200 } 1199 - rt_printk("\n"); 1201 + printk("\n"); 1200 1202 } 1201 1203 #endif 1202 1204 ··· 1381 1383 unsigned long flags; 1382 1384 int retval = 0; 1383 1385 1384 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 1386 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 1385 1387 if (devpriv->ai_mite_chan) { 1386 1388 for (i = 0; i < timeout; i++) { 1387 1389 if ((devpriv->stc_readw(dev, ··· 1390 1392 && mite_bytes_in_transit(devpriv-> 1391 1393 ai_mite_chan) == 0) 1392 1394 break; 1393 - comedi_udelay(5); 1395 + udelay(5); 1394 1396 } 1395 1397 if (i == timeout) { 1396 - rt_printk 1398 + printk 1397 1399 ("ni_mio_common: wait for dma drain timed out\n"); 1398 - rt_printk 1400 + printk 1399 1401 ("mite_bytes_in_transit=%i, AI_Status1_Register=0x%x\n", 1400 1402 mite_bytes_in_transit(devpriv->ai_mite_chan), 1401 1403 devpriv->stc_readw(dev, AI_Status_1_Register)); 1402 1404 retval = -1; 1403 1405 } 1404 1406 } 1405 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 1407 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 1406 1408 1407 1409 ni_sync_ai_dma(dev); 1408 1410 ··· 1546 1548 retval = ni_request_ai_mite_channel(dev); 1547 1549 if (retval) 1548 1550 return retval; 1549 - /* rt_printk("comedi_debug: using mite channel %i for ai.\n", devpriv->ai_mite_chan->channel); */ 1551 + /* printk("comedi_debug: using mite channel %i for ai.\n", devpriv->ai_mite_chan->channel); */ 1550 1552 1551 1553 /* write alloc the entire buffer */ 1552 1554 comedi_buf_write_alloc(s->async, s->async->prealloc_bufsz); 1553 1555 1554 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 1555 - if (devpriv->ai_mite_chan == NULL) 1556 - { 1557 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 1556 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 1557 + if (devpriv->ai_mite_chan == NULL) { 1558 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 1558 1559 return -EIO; 1559 1560 } 1560 1561 ··· 1571 1574 }; 1572 1575 /*start the MITE */ 1573 1576 mite_dma_arm(devpriv->ai_mite_chan); 1574 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 1577 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 1575 1578 1576 1579 return 0; 1577 1580 } ··· 1589 1592 /* read alloc the entire buffer */ 1590 1593 comedi_buf_read_alloc(s->async, s->async->prealloc_bufsz); 1591 1594 1592 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 1595 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 1593 1596 if (devpriv->ao_mite_chan) { 1594 1597 if (boardtype.reg_type & (ni_reg_611x | ni_reg_6713)) { 1595 1598 mite_prep_dma(devpriv->ao_mite_chan, 32, 32); ··· 1601 1604 mite_dma_arm(devpriv->ao_mite_chan); 1602 1605 } else 1603 1606 retval = -EIO; 1604 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 1607 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 1605 1608 1606 1609 return retval; 1607 1610 } ··· 1702 1705 1703 1706 /* lock to avoid race with interrupt handler */ 1704 1707 if (in_interrupt() == 0) 1705 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1708 + spin_lock_irqsave(&dev->spinlock, flags); 1706 1709 #ifndef PCIDMA 1707 1710 ni_handle_fifo_dregs(dev); 1708 1711 #else ··· 1710 1713 #endif 1711 1714 count = s->async->buf_write_count - s->async->buf_read_count; 1712 1715 if (in_interrupt() == 0) 1713 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1716 + spin_unlock_irqrestore(&dev->spinlock, flags); 1714 1717 1715 1718 return count; 1716 1719 } ··· 1733 1736 for (n = 0; n < num_adc_stages_611x; n++) { 1734 1737 devpriv->stc_writew(dev, AI_CONVERT_Pulse, 1735 1738 AI_Command_1_Register); 1736 - comedi_udelay(1); 1739 + udelay(1); 1737 1740 } 1738 1741 for (n = 0; n < insn->n; n++) { 1739 1742 devpriv->stc_writew(dev, AI_CONVERT_Pulse, ··· 1755 1758 } 1756 1759 } 1757 1760 if (i == NI_TIMEOUT) { 1758 - rt_printk 1761 + printk 1759 1762 ("ni_mio_common: timeout in 611x ni_ai_insn_read\n"); 1760 1763 return -ETIME; 1761 1764 } ··· 1777 1780 } 1778 1781 } 1779 1782 if (i == NI_TIMEOUT) { 1780 - rt_printk 1783 + printk 1781 1784 ("ni_mio_common: timeout in 6143 ni_ai_insn_read\n"); 1782 1785 return -ETIME; 1783 1786 } ··· 1794 1797 break; 1795 1798 } 1796 1799 if (i == NI_TIMEOUT) { 1797 - rt_printk 1800 + printk 1798 1801 ("ni_mio_common: timeout in ni_ai_insn_read\n"); 1799 1802 return -ETIME; 1800 1803 } ··· 1822 1825 devpriv->stc_writew(dev, 1, ADC_FIFO_Clear); 1823 1826 return; 1824 1827 } 1825 - comedi_udelay(1); 1828 + udelay(1); 1826 1829 } 1827 - rt_printk("ni_mio_common: timeout loading channel/gain list\n"); 1830 + printk("ni_mio_common: timeout loading channel/gain list\n"); 1828 1831 } 1829 1832 1830 1833 static void ni_m_series_load_channelgain_list(struct comedi_device *dev, ··· 2841 2844 M_Offset_AO_Reference_Attenuation(chan)); 2842 2845 break; 2843 2846 default: 2844 - rt_printk("%s: bug! unhandled ao reference voltage\n", 2847 + printk("%s: bug! unhandled ao reference voltage\n", 2845 2848 __func__); 2846 2849 break; 2847 2850 } ··· 2853 2856 conf |= MSeries_AO_DAC_Offset_5V_Bits; 2854 2857 break; 2855 2858 default: 2856 - rt_printk("%s: bug! unhandled ao offset voltage\n", 2859 + printk("%s: bug! unhandled ao offset voltage\n", 2857 2860 __func__); 2858 2861 break; 2859 2862 } ··· 3030 3033 devpriv->stc_writew(dev, devpriv->ao_mode3, AO_Mode_3_Register); 3031 3034 /* wait for DACs to be loaded */ 3032 3035 for (i = 0; i < timeout; i++) { 3033 - comedi_udelay(1); 3036 + udelay(1); 3034 3037 if ((devpriv->stc_readw(dev, 3035 3038 Joint_Status_2_Register) & 3036 3039 AO_TMRDACWRs_In_Progress_St) == 0) ··· 3437 3440 struct comedi_insn *insn, unsigned int *data) 3438 3441 { 3439 3442 #ifdef DEBUG_DIO 3440 - rt_printk("ni_dio_insn_config() chan=%d io=%d\n", 3443 + printk("ni_dio_insn_config() chan=%d io=%d\n", 3441 3444 CR_CHAN(insn->chanspec), data[0]); 3442 3445 #endif 3443 3446 switch (data[0]) { ··· 3469 3472 struct comedi_insn *insn, unsigned int *data) 3470 3473 { 3471 3474 #ifdef DEBUG_DIO 3472 - rt_printk("ni_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0], data[1]); 3475 + printk("ni_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0], data[1]); 3473 3476 #endif 3474 3477 if (insn->n != 2) 3475 3478 return -EINVAL; ··· 3496 3499 struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) 3497 3500 { 3498 3501 #ifdef DEBUG_DIO 3499 - rt_printk("ni_m_series_dio_insn_config() chan=%d io=%d\n", 3502 + printk("ni_m_series_dio_insn_config() chan=%d io=%d\n", 3500 3503 CR_CHAN(insn->chanspec), data[0]); 3501 3504 #endif 3502 3505 switch (data[0]) { ··· 3526 3529 struct comedi_insn *insn, unsigned int *data) 3527 3530 { 3528 3531 #ifdef DEBUG_DIO 3529 - rt_printk("ni_m_series_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0], 3532 + printk("ni_m_series_dio_insn_bits() mask=0x%x bits=0x%x\n", data[0], 3530 3533 data[1]); 3531 3534 #endif 3532 3535 if (insn->n != 2) ··· 3703 3706 comedi_buf_read_alloc(s->async, s->async->prealloc_bufsz); 3704 3707 3705 3708 #ifdef PCIDMA 3706 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 3709 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 3707 3710 if (devpriv->cdo_mite_chan) { 3708 3711 mite_prep_dma(devpriv->cdo_mite_chan, 32, 32); 3709 3712 mite_dma_arm(devpriv->cdo_mite_chan); ··· 3711 3714 comedi_error(dev, "BUG: no cdo mite channel?"); 3712 3715 retval = -EIO; 3713 3716 } 3714 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 3717 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 3715 3718 if (retval < 0) 3716 3719 return retval; 3717 3720 #endif ··· 3723 3726 for (i = 0; i < timeout; ++i) { 3724 3727 if (ni_readl(M_Offset_CDIO_Status) & CDO_FIFO_Full_Bit) 3725 3728 break; 3726 - comedi_udelay(10); 3729 + udelay(10); 3727 3730 } 3728 3731 if (i == timeout) { 3729 3732 comedi_error(dev, "dma failed to fill cdo fifo!"); ··· 3762 3765 return; 3763 3766 } 3764 3767 #ifdef PCIDMA 3765 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 3768 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 3766 3769 if (devpriv->cdo_mite_chan) { 3767 3770 unsigned cdo_mite_status = 3768 3771 mite_get_status(devpriv->cdo_mite_chan); ··· 3773 3776 } 3774 3777 mite_sync_output_dma(devpriv->cdo_mite_chan, s->async); 3775 3778 } 3776 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 3779 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 3777 3780 #endif 3778 3781 3779 3782 cdio_status = ni_readl(M_Offset_CDIO_Status); 3780 3783 if (cdio_status & (CDO_Overrun_Bit | CDO_Underflow_Bit)) { 3781 - /* rt_printk("cdio error: statux=0x%x\n", cdio_status); */ 3784 + /* printk("cdio error: statux=0x%x\n", cdio_status); */ 3782 3785 ni_writel(CDO_Error_Interrupt_Confirm_Bit, M_Offset_CDIO_Command); /* XXX just guessing this is needed and does something useful */ 3783 3786 s->async->events |= COMEDI_CB_OVERFLOW; 3784 3787 } 3785 3788 if (cdio_status & CDO_FIFO_Empty_Bit) { 3786 - /* rt_printk("cdio fifo empty\n"); */ 3789 + /* printk("cdio fifo empty\n"); */ 3787 3790 ni_writel(CDO_Empty_FIFO_Interrupt_Enable_Clear_Bit, 3788 3791 M_Offset_CDIO_Command); 3789 3792 /* s->async->events |= COMEDI_CB_EOA; */ ··· 3804 3807 case INSN_CONFIG_SERIAL_CLOCK: 3805 3808 3806 3809 #ifdef DEBUG_DIO 3807 - rt_printk("SPI serial clock Config cd\n", data[1]); 3810 + printk("SPI serial clock Config cd\n", data[1]); 3808 3811 #endif 3809 3812 devpriv->serial_hw_mode = 1; 3810 3813 devpriv->dio_control |= DIO_HW_Serial_Enable; ··· 3870 3873 err = ni_serial_sw_readwrite8(dev, s, byte_out, 3871 3874 &byte_in); 3872 3875 } else { 3873 - rt_printk("ni_serial_insn_config: serial disabled!\n"); 3876 + printk("ni_serial_insn_config: serial disabled!\n"); 3874 3877 return -EINVAL; 3875 3878 } 3876 3879 if (err < 0) ··· 3892 3895 int err = 0, count = 20; 3893 3896 3894 3897 #ifdef DEBUG_DIO 3895 - rt_printk("ni_serial_hw_readwrite8: outputting 0x%x\n", data_out); 3898 + printk("ni_serial_hw_readwrite8: outputting 0x%x\n", data_out); 3896 3899 #endif 3897 3900 3898 3901 devpriv->dio_output &= ~DIO_Serial_Data_Mask; ··· 3915 3918 Joint_Status_1_Register)) & 3916 3919 DIO_Serial_IO_In_Progress_St) { 3917 3920 /* Delay one bit per loop */ 3918 - comedi_udelay((devpriv->serial_interval_ns + 999) / 1000); 3921 + udelay((devpriv->serial_interval_ns + 999) / 1000); 3919 3922 if (--count < 0) { 3920 - rt_printk 3923 + printk 3921 3924 ("ni_serial_hw_readwrite8: SPI serial I/O didn't finish in time!\n"); 3922 3925 err = -ETIME; 3923 3926 goto Error; ··· 3926 3929 3927 3930 /* Delay for last bit. This delay is absolutely necessary, because 3928 3931 DIO_Serial_IO_In_Progress_St goes high one bit too early. */ 3929 - comedi_udelay((devpriv->serial_interval_ns + 999) / 1000); 3932 + udelay((devpriv->serial_interval_ns + 999) / 1000); 3930 3933 3931 3934 if (data_in != NULL) { 3932 3935 *data_in = devpriv->stc_readw(dev, DIO_Serial_Input_Register); 3933 3936 #ifdef DEBUG_DIO 3934 - rt_printk("ni_serial_hw_readwrite8: inputted 0x%x\n", *data_in); 3937 + printk("ni_serial_hw_readwrite8: inputted 0x%x\n", *data_in); 3935 3938 #endif 3936 3939 } 3937 3940 ··· 3947 3950 unsigned char mask, input = 0; 3948 3951 3949 3952 #ifdef DEBUG_DIO 3950 - rt_printk("ni_serial_sw_readwrite8: outputting 0x%x\n", data_out); 3953 + printk("ni_serial_sw_readwrite8: outputting 0x%x\n", data_out); 3951 3954 #endif 3952 3955 3953 3956 /* Wait for one bit before transfer */ 3954 - comedi_udelay((devpriv->serial_interval_ns + 999) / 1000); 3957 + udelay((devpriv->serial_interval_ns + 999) / 1000); 3955 3958 3956 3959 for (mask = 0x80; mask; mask >>= 1) { 3957 3960 /* Output current bit; note that we cannot touch s->state ··· 3970 3973 devpriv->stc_writew(dev, devpriv->dio_control, 3971 3974 DIO_Control_Register); 3972 3975 3973 - comedi_udelay((devpriv->serial_interval_ns + 999) / 2000); 3976 + udelay((devpriv->serial_interval_ns + 999) / 2000); 3974 3977 3975 3978 devpriv->dio_control &= ~DIO_Software_Serial_Control; 3976 3979 devpriv->stc_writew(dev, devpriv->dio_control, 3977 3980 DIO_Control_Register); 3978 3981 3979 - comedi_udelay((devpriv->serial_interval_ns + 999) / 2000); 3982 + udelay((devpriv->serial_interval_ns + 999) / 2000); 3980 3983 3981 3984 /* Input current bit */ 3982 3985 if (devpriv->stc_readw(dev, 3983 3986 DIO_Parallel_Input_Register) & DIO_SDIN) { 3984 - /* rt_printk("DIO_P_I_R: 0x%x\n", devpriv->stc_readw(dev, DIO_Parallel_Input_Register)); */ 3987 + /* printk("DIO_P_I_R: 0x%x\n", devpriv->stc_readw(dev, DIO_Parallel_Input_Register)); */ 3985 3988 input |= mask; 3986 3989 } 3987 3990 } 3988 3991 #ifdef DEBUG_DIO 3989 - rt_printk("ni_serial_sw_readwrite8: inputted 0x%x\n", input); 3992 + printk("ni_serial_sw_readwrite8: inputted 0x%x\n", input); 3990 3993 #endif 3991 3994 if (data_in) 3992 3995 *data_in = input; ··· 4100 4103 stc_register = Interrupt_B_Enable_Register; 4101 4104 break; 4102 4105 default: 4103 - rt_printk("%s: unhandled register 0x%x in switch.\n", 4106 + printk("%s: unhandled register 0x%x in switch.\n", 4104 4107 __func__, reg); 4105 4108 BUG(); 4106 4109 return 0; ··· 4925 4928 4926 4929 for (bit = 1 << (bits - 1); bit; bit >>= 1) { 4927 4930 ni_writeb(((bit & bitstring) ? 0x02 : 0), Serial_Command); 4928 - comedi_udelay(1); 4931 + udelay(1); 4929 4932 ni_writeb(1 | ((bit & bitstring) ? 0x02 : 0), Serial_Command); 4930 - comedi_udelay(1); 4933 + udelay(1); 4931 4934 } 4932 4935 ni_writeb(loadbit, Serial_Command); 4933 - comedi_udelay(1); 4936 + udelay(1); 4934 4937 ni_writeb(0, Serial_Command); 4935 4938 } 4936 4939 ··· 5226 5229 return NI_PFI_OUTPUT_G_GATE0; 5227 5230 break; 5228 5231 default: 5229 - rt_printk("%s: bug, unhandled case in switch.\n", __func__); 5232 + printk("%s: bug, unhandled case in switch.\n", __func__); 5230 5233 break; 5231 5234 } 5232 5235 return 0; ··· 5320 5323 /* Set clock mode to internal */ 5321 5324 devpriv->clock_and_fout2 = MSeries_RTSI_10MHz_Bit; 5322 5325 if (ni_set_master_clock(dev, NI_MIO_INTERNAL_CLOCK, 0) < 0) { 5323 - rt_printk("ni_set_master_clock failed, bug?"); 5326 + printk("ni_set_master_clock failed, bug?"); 5324 5327 } 5325 5328 /* default internal lines routing to RTSI bus lines */ 5326 5329 devpriv->rtsi_trig_a_output_reg = ··· 5392 5395 } 5393 5396 } 5394 5397 if (best_period_picosec == 0) { 5395 - rt_printk("%s: bug, failed to find pll parameters\n", 5398 + printk("%s: bug, failed to find pll parameters\n", 5396 5399 __func__); 5397 5400 return -EIO; 5398 5401 } ··· 5427 5430 period_ns = 100; 5428 5431 /* these limits are somewhat arbitrary, but NI advertises 1 to 20MHz range so we'll use that */ 5429 5432 if (period_ns < min_period_ns || period_ns > max_period_ns) { 5430 - rt_printk 5433 + printk 5431 5434 ("%s: you must specify an input clock frequency between %i and %i nanosec " 5432 5435 "for the phased-lock loop.\n", __func__, 5433 5436 min_period_ns, max_period_ns); ··· 5488 5491 MSeries_PLL_Divisor_Bits(freq_divider) | 5489 5492 MSeries_PLL_Multiplier_Bits(freq_multiplier); 5490 5493 5491 - /* rt_printk("using divider=%i, multiplier=%i for PLL. pll_control_bits = 0x%x\n", 5494 + /* printk("using divider=%i, multiplier=%i for PLL. pll_control_bits = 0x%x\n", 5492 5495 * freq_divider, freq_multiplier, pll_control_bits); */ 5493 - /* rt_printk("clock_ns=%d\n", devpriv->clock_ns); */ 5496 + /* printk("clock_ns=%d\n", devpriv->clock_ns); */ 5494 5497 ni_writew(pll_control_bits, M_Offset_PLL_Control); 5495 5498 devpriv->clock_source = source; 5496 5499 /* it seems to typically take a few hundred microseconds for PLL to lock */ ··· 5501 5504 udelay(1); 5502 5505 } 5503 5506 if (i == timeout) { 5504 - rt_printk 5507 + printk 5505 5508 ("%s: timed out waiting for PLL to lock to reference clock source %i with period %i ns.\n", 5506 5509 __func__, source, period_ns); 5507 5510 return -ETIMEDOUT; ··· 5538 5541 devpriv->rtsi_trig_direction_reg, 5539 5542 RTSI_Trig_Direction_Register); 5540 5543 if (period_ns == 0) { 5541 - rt_printk 5544 + printk 5542 5545 ("%s: we don't handle an unspecified clock period correctly yet, returning error.\n", 5543 5546 __func__); 5544 5547 return -EINVAL; ··· 5561 5564 if (source == NI_RTSI_OUTPUT_RTSI_OSC) 5562 5565 return 1; 5563 5566 else { 5564 - rt_printk 5567 + printk 5565 5568 ("%s: invalid source for channel=%i, channel %i is always the RTSI clock for pre-m-series boards.\n", 5566 5569 __func__, chan, 5567 5570 old_RTSI_clock_channel); ··· 5626 5629 } else { 5627 5630 if (chan == old_RTSI_clock_channel) 5628 5631 return NI_RTSI_OUTPUT_RTSI_OSC; 5629 - rt_printk("%s: bug! should never get here?\n", __func__); 5632 + printk("%s: bug! should never get here?\n", __func__); 5630 5633 return 0; 5631 5634 } 5632 5635 } ··· 5721 5724 } 5722 5725 /* printk("looped %i times waiting for idle\n", i); */ 5723 5726 if (i == timeout) { 5724 - rt_printk("%s: %s: timeout\n", __FILE__, __func__); 5727 + printk("%s: %s: timeout\n", __FILE__, __func__); 5725 5728 return -ETIME; 5726 5729 } 5727 5730 return 0; ··· 5740 5743 for (i = 0; i < timeout; i++) { 5741 5744 if ((ni_ao_win_inw(dev, CAL_ADC_Status_67xx) & CSS_ADC_BUSY)) 5742 5745 break; 5743 - comedi_udelay(1); 5746 + udelay(1); 5744 5747 } 5745 5748 /* printk("looped %i times writing command to cs5529\n", i); */ 5746 5749 if (i == timeout) { ··· 5794 5797 } 5795 5798 status = ni_ao_win_inw(dev, CAL_ADC_Status_67xx); 5796 5799 if (status & CSS_OSC_DETECT) { 5797 - rt_printk 5800 + printk 5798 5801 ("ni_mio_common: cs5529 conversion error, status CSS_OSC_DETECT\n"); 5799 5802 return -EIO; 5800 5803 } 5801 5804 if (status & CSS_OVERRANGE) { 5802 - rt_printk 5805 + printk 5803 5806 ("ni_mio_common: cs5529 conversion error, overrange (ignoring)\n"); 5804 5807 } 5805 5808 if (data) { ··· 5856 5859 comedi_error(dev, "timeout or signal in init_cs5529()\n"); 5857 5860 #endif 5858 5861 #ifdef NI_CS5529_DEBUG 5859 - rt_printk("config: 0x%x\n", cs5529_config_read(dev, 5862 + printk("config: 0x%x\n", cs5529_config_read(dev, 5860 5863 CSCMD_CONFIG_REGISTER)); 5861 - rt_printk("gain: 0x%x\n", cs5529_config_read(dev, 5864 + printk("gain: 0x%x\n", cs5529_config_read(dev, 5862 5865 CSCMD_GAIN_REGISTER)); 5863 - rt_printk("offset: 0x%x\n", cs5529_config_read(dev, 5866 + printk("offset: 0x%x\n", cs5529_config_read(dev, 5864 5867 CSCMD_OFFSET_REGISTER)); 5865 5868 #endif 5866 5869 return 0;
+6 -6
drivers/staging/comedi/drivers/ni_mio_cs.c
··· 200 200 { 201 201 unsigned long flags; 202 202 203 - comedi_spin_lock_irqsave(&devpriv->window_lock, flags); 203 + spin_lock_irqsave(&devpriv->window_lock, flags); 204 204 if (addr < 8) { 205 205 ni_writew(data, addr * 2); 206 206 } else { 207 207 ni_writew(addr, Window_Address); 208 208 ni_writew(data, Window_Data); 209 209 } 210 - comedi_spin_unlock_irqrestore(&devpriv->window_lock, flags); 210 + spin_unlock_irqrestore(&devpriv->window_lock, flags); 211 211 } 212 212 213 213 static uint16_t mio_cs_win_in(struct comedi_device *dev, int addr) ··· 215 215 unsigned long flags; 216 216 uint16_t ret; 217 217 218 - comedi_spin_lock_irqsave(&devpriv->window_lock, flags); 218 + spin_lock_irqsave(&devpriv->window_lock, flags); 219 219 if (addr < 8) { 220 220 ret = ni_readw(addr * 2); 221 221 } else { 222 222 ni_writew(addr, Window_Address); 223 223 ret = ni_readw(Window_Data); 224 224 } 225 - comedi_spin_unlock_irqrestore(&devpriv->window_lock, flags); 225 + spin_unlock_irqrestore(&devpriv->window_lock, flags); 226 226 227 227 return ret; 228 228 } ··· 249 249 /* PCMCIA layer frees the IO region */ 250 250 251 251 if (dev->irq) { 252 - comedi_free_irq(dev->irq, dev); 252 + free_irq(dev->irq, dev); 253 253 } 254 254 255 255 return 0; ··· 446 446 printk(" %s", boardtype.name); 447 447 dev->board_name = boardtype.name; 448 448 449 - ret = comedi_request_irq(irq, ni_E_interrupt, NI_E_IRQ_FLAGS, 449 + ret = request_irq(irq, ni_E_interrupt, NI_E_IRQ_FLAGS, 450 450 "ni_mio_cs", dev); 451 451 if (ret < 0) { 452 452 printk(" irq not available\n");
+10 -11
drivers/staging/comedi/drivers/ni_pcidio.c
··· 422 422 { 423 423 unsigned long flags; 424 424 425 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 425 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 426 426 BUG_ON(devpriv->di_mite_chan); 427 427 devpriv->di_mite_chan = 428 428 mite_request_channel_in_range(devpriv->mite, 429 429 devpriv->di_mite_ring, 1, 2); 430 430 if (devpriv->di_mite_chan == NULL) { 431 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, 432 - flags); 431 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 433 432 comedi_error(dev, "failed to reserve mite dma channel."); 434 433 return -EBUSY; 435 434 } ··· 436 437 secondary_DMAChannel_bits(devpriv->di_mite_chan->channel), 437 438 devpriv->mite->daq_io_addr + DMA_Line_Control_Group1); 438 439 mmiowb(); 439 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 440 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 440 441 return 0; 441 442 } 442 443 ··· 444 445 { 445 446 unsigned long flags; 446 447 447 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 448 + spin_lock_irqsave(&devpriv->mite_channel_lock, flags); 448 449 if (devpriv->di_mite_chan) { 449 450 mite_dma_disarm(devpriv->di_mite_chan); 450 451 mite_dma_reset(devpriv->di_mite_chan); ··· 455 456 devpriv->mite->daq_io_addr + DMA_Line_Control_Group1); 456 457 mmiowb(); 457 458 } 458 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 459 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags); 459 460 } 460 461 461 462 static int nidio96_8255_cb(int dir, int port, int data, unsigned long iobase) ··· 513 514 /* printk("buf[0]=%08x\n",*(unsigned int *)async->prealloc_buf); */ 514 515 /* printk("buf[4096]=%08x\n",*(unsigned int *)(async->prealloc_buf+4096)); */ 515 516 516 - comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, irq_flags); 517 + spin_lock_irqsave(&devpriv->mite_channel_lock, irq_flags); 517 518 if (devpriv->di_mite_chan) 518 519 m_status = mite_get_status(devpriv->di_mite_chan); 519 520 #ifdef MITE_DEBUG ··· 536 537 disable_irq(dev->irq); 537 538 } 538 539 } 539 - comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, irq_flags); 540 + spin_unlock_irqrestore(&devpriv->mite_channel_lock, irq_flags); 540 541 541 542 while (status & DataLeft) { 542 543 work++; ··· 1234 1235 devpriv->mite->daq_io_addr + 1235 1236 Master_DMA_And_Interrupt_Control); 1236 1237 1237 - ret = comedi_request_irq(irq, nidio_interrupt, IRQF_SHARED, 1238 - "ni_pcidio", dev); 1238 + ret = request_irq(irq, nidio_interrupt, IRQF_SHARED, 1239 + "ni_pcidio", dev); 1239 1240 if (ret < 0) { 1240 1241 printk(" irq not available"); 1241 1242 } ··· 1258 1259 } 1259 1260 1260 1261 if (dev->irq) 1261 - comedi_free_irq(dev->irq, dev); 1262 + free_irq(dev->irq, dev); 1262 1263 1263 1264 if (devpriv) { 1264 1265 if (devpriv->di_mite_ring) {
+13 -14
drivers/staging/comedi/drivers/ni_pcimio.c
··· 101 101 102 102 need to slow down DAC loading. I don't trust NI's claim that 103 103 two writes to the PCI bus slows IO enough. I would prefer to 104 - use comedi_udelay(). Timing specs: (clock) 104 + use udelay(). Timing specs: (clock) 105 105 AD8522 30ns 106 106 DAC8043 120ns 107 107 DAC8800 60ns ··· 1246 1246 { 1247 1247 unsigned long flags; 1248 1248 1249 - comedi_spin_lock_irqsave(&devpriv->window_lock, flags); 1249 + spin_lock_irqsave(&devpriv->window_lock, flags); 1250 1250 ni_writew(reg, Window_Address); 1251 1251 ni_writew(data, Window_Data); 1252 - comedi_spin_unlock_irqrestore(&devpriv->window_lock, flags); 1252 + spin_unlock_irqrestore(&devpriv->window_lock, flags); 1253 1253 } 1254 1254 1255 1255 static uint16_t e_series_win_in(struct comedi_device *dev, int reg) ··· 1257 1257 unsigned long flags; 1258 1258 uint16_t ret; 1259 1259 1260 - comedi_spin_lock_irqsave(&devpriv->window_lock, flags); 1260 + spin_lock_irqsave(&devpriv->window_lock, flags); 1261 1261 ni_writew(reg, Window_Address); 1262 1262 ret = ni_readw(Window_Data); 1263 - comedi_spin_unlock_irqrestore(&devpriv->window_lock, flags); 1263 + spin_unlock_irqrestore(&devpriv->window_lock, flags); 1264 1264 1265 1265 return ret; 1266 1266 } ··· 1349 1349 offset = M_Offset_AO_FIFO_Clear; 1350 1350 break; 1351 1351 case DIO_Control_Register: 1352 - rt_printk 1352 + printk 1353 1353 ("%s: FIXME: register 0x%x does not map cleanly on to m-series boards.\n", 1354 1354 __func__, reg); 1355 1355 return; ··· 1411 1411 /* FIXME: DIO_Output_Register (16 bit reg) is replaced by M_Offset_Static_Digital_Output (32 bit) 1412 1412 and M_Offset_SCXI_Serial_Data_Out (8 bit) */ 1413 1413 default: 1414 - rt_printk("%s: bug! unhandled register=0x%x in switch.\n", 1414 + printk("%s: bug! unhandled register=0x%x in switch.\n", 1415 1415 __func__, reg); 1416 1416 BUG(); 1417 1417 return; ··· 1446 1446 offset = M_Offset_G01_Status; 1447 1447 break; 1448 1448 default: 1449 - rt_printk("%s: bug! unhandled register=0x%x in switch.\n", 1449 + printk("%s: bug! unhandled register=0x%x in switch.\n", 1450 1450 __func__, reg); 1451 1451 BUG(); 1452 1452 return 0; ··· 1487 1487 offset = M_Offset_G1_Load_B; 1488 1488 break; 1489 1489 default: 1490 - rt_printk("%s: bug! unhandled register=0x%x in switch.\n", 1490 + printk("%s: bug! unhandled register=0x%x in switch.\n", 1491 1491 __func__, reg); 1492 1492 BUG(); 1493 1493 return; ··· 1513 1513 offset = M_Offset_G1_Save; 1514 1514 break; 1515 1515 default: 1516 - rt_printk("%s: bug! unhandled register=0x%x in switch.\n", 1516 + printk("%s: bug! unhandled register=0x%x in switch.\n", 1517 1517 __func__, reg); 1518 1518 BUG(); 1519 1519 return 0; ··· 1602 1602 { 1603 1603 mio_common_detach(dev); 1604 1604 if (dev->irq) { 1605 - comedi_free_irq(dev->irq, dev); 1605 + free_irq(dev->irq, dev); 1606 1606 } 1607 1607 if (dev->private) { 1608 1608 mite_free_ring(devpriv->ai_mite_ring); ··· 1679 1679 printk(" unknown irq (bad)\n"); 1680 1680 } else { 1681 1681 printk(" ( irq = %u )", dev->irq); 1682 - ret = comedi_request_irq(dev->irq, ni_E_interrupt, 1683 - NI_E_IRQ_FLAGS, DRV_NAME, 1684 - dev); 1682 + ret = request_irq(dev->irq, ni_E_interrupt, NI_E_IRQ_FLAGS, 1683 + DRV_NAME, dev); 1685 1684 if (ret < 0) { 1686 1685 printk(" irq not available\n"); 1687 1686 dev->irq = 0;
+7 -7
drivers/staging/comedi/drivers/ni_stc.h
··· 339 339 max_channel = 6; 340 340 } 341 341 if (channel > max_channel) { 342 - rt_printk("%s: bug, invalid RTSI_channel=%i\n", __func__, 342 + printk("%s: bug, invalid RTSI_channel=%i\n", __func__, 343 343 channel); 344 344 return 0; 345 345 } ··· 1085 1085 0x263, 1086 1086 }; 1087 1087 if (((unsigned)i) >= ARRAY_SIZE(offset)) { 1088 - rt_printk("%s: invalid channel=%i\n", __func__, i); 1088 + printk("%s: invalid channel=%i\n", __func__, i); 1089 1089 return offset[0]; 1090 1090 } 1091 1091 return offset[i]; ··· 1099 1099 0x267 1100 1100 }; 1101 1101 if (((unsigned)channel) >= ARRAY_SIZE(offset)) { 1102 - rt_printk("%s: invalid channel=%i\n", __func__, channel); 1102 + printk("%s: invalid channel=%i\n", __func__, channel); 1103 1103 return offset[0]; 1104 1104 } 1105 1105 return offset[channel]; ··· 1107 1107 static inline unsigned M_Offset_PFI_Output_Select(unsigned n) 1108 1108 { 1109 1109 if (n < 1 || n > NUM_PFI_OUTPUT_SELECT_REGS) { 1110 - rt_printk("%s: invalid pfi output select register=%i\n", 1110 + printk("%s: invalid pfi output select register=%i\n", 1111 1111 __func__, n); 1112 1112 return M_Offset_PFI_Output_Select_1; 1113 1113 } ··· 1162 1162 RTSI_channel) 1163 1163 { 1164 1164 if (RTSI_channel > 7) { 1165 - rt_printk("%s: bug, invalid RTSI_channel=%i\n", __func__, 1165 + printk("%s: bug, invalid RTSI_channel=%i\n", __func__, 1166 1166 RTSI_channel); 1167 1167 return 0; 1168 1168 } ··· 1183 1183 { 1184 1184 static const unsigned max_divisor = 0x10; 1185 1185 if (divisor < 1 || divisor > max_divisor) { 1186 - rt_printk("%s: bug, invalid divisor=%i\n", __func__, 1186 + printk("%s: bug, invalid divisor=%i\n", __func__, 1187 1187 divisor); 1188 1188 return 0; 1189 1189 } ··· 1193 1193 { 1194 1194 static const unsigned max_multiplier = 0x100; 1195 1195 if (multiplier < 1 || multiplier > max_multiplier) { 1196 - rt_printk("%s: bug, invalid multiplier=%i\n", __func__, 1196 + printk("%s: bug, invalid multiplier=%i\n", __func__, 1197 1197 multiplier); 1198 1198 return 0; 1199 1199 }
+2 -2
drivers/staging/comedi/drivers/ni_tio.c
··· 669 669 } 670 670 if (i <= ni_m_series_max_pfi_channel) 671 671 break; 672 - rt_printk("invalid clock source 0x%lx\n", 672 + printk("invalid clock source 0x%lx\n", 673 673 (unsigned long)clock_source); 674 674 BUG(); 675 675 ni_m_series_clock = 0; ··· 1273 1273 counter_dev->regs[abz_reg] &= ~mask; 1274 1274 counter_dev->regs[abz_reg] |= (source << shift) & mask; 1275 1275 write_register(counter, counter_dev->regs[abz_reg], abz_reg); 1276 - /* rt_printk("%s %x %d %d\n", __func__, counter_dev->regs[abz_reg], index, source); */ 1276 + /* printk("%s %x %d %d\n", __func__, counter_dev->regs[abz_reg], index, source); */ 1277 1277 return 0; 1278 1278 } 1279 1279 return -EINVAL;
+4 -4
drivers/staging/comedi/drivers/ni_tio_internal.h
··· 728 728 unsigned long flags; 729 729 730 730 BUG_ON(register_index >= NITIO_Num_Registers); 731 - comedi_spin_lock_irqsave(&counter_dev->regs_lock, flags); 731 + spin_lock_irqsave(&counter_dev->regs_lock, flags); 732 732 counter_dev->regs[register_index] &= ~bit_mask; 733 733 counter_dev->regs[register_index] |= (bit_values & bit_mask); 734 734 write_register(counter, 735 735 counter_dev->regs[register_index] | transient_bit_values, 736 736 register_index); 737 737 mmiowb(); 738 - comedi_spin_unlock_irqrestore(&counter_dev->regs_lock, flags); 738 + spin_unlock_irqrestore(&counter_dev->regs_lock, flags); 739 739 } 740 740 741 741 /* ni_tio_set_bits( ) is for safely writing to registers whose bits may be ··· 761 761 unsigned value; 762 762 763 763 BUG_ON(register_index >= NITIO_Num_Registers); 764 - comedi_spin_lock_irqsave(&counter_dev->regs_lock, flags); 764 + spin_lock_irqsave(&counter_dev->regs_lock, flags); 765 765 value = counter_dev->regs[register_index]; 766 - comedi_spin_unlock_irqrestore(&counter_dev->regs_lock, flags); 766 + spin_unlock_irqrestore(&counter_dev->regs_lock, flags); 767 767 return value; 768 768 } 769 769
+18 -18
drivers/staging/comedi/drivers/ni_tiocmd.c
··· 107 107 if (trignum != 0) 108 108 return -EINVAL; 109 109 110 - comedi_spin_lock_irqsave(&counter->lock, flags); 110 + spin_lock_irqsave(&counter->lock, flags); 111 111 if (counter->mite_chan) 112 112 mite_dma_arm(counter->mite_chan); 113 113 else 114 114 retval = -EIO; 115 - comedi_spin_unlock_irqrestore(&counter->lock, flags); 115 + spin_unlock_irqrestore(&counter->lock, flags); 116 116 if (retval < 0) 117 117 return retval; 118 118 retval = ni_tio_arm(counter, 1, NI_GPCT_ARM_IMMEDIATE); ··· 171 171 172 172 static int ni_tio_output_cmd(struct ni_gpct *counter, struct comedi_async *async) 173 173 { 174 - rt_printk("ni_tio: output commands not yet implemented.\n"); 174 + printk("ni_tio: output commands not yet implemented.\n"); 175 175 return -ENOTSUPP; 176 176 177 177 counter->mite_chan->dir = COMEDI_OUTPUT; ··· 213 213 int retval = 0; 214 214 unsigned long flags; 215 215 216 - comedi_spin_lock_irqsave(&counter->lock, flags); 216 + spin_lock_irqsave(&counter->lock, flags); 217 217 if (counter->mite_chan == NULL) { 218 - rt_printk 218 + printk 219 219 ("ni_tio: commands only supported with DMA. Interrupt-driven commands not yet implemented.\n"); 220 220 retval = -EIO; 221 221 } else { ··· 228 228 } 229 229 } 230 230 } 231 - comedi_spin_unlock_irqrestore(&counter->lock, flags); 231 + spin_unlock_irqrestore(&counter->lock, flags); 232 232 return retval; 233 233 } 234 234 ··· 342 342 unsigned long flags; 343 343 344 344 ni_tio_arm(counter, 0, 0); 345 - comedi_spin_lock_irqsave(&counter->lock, flags); 345 + spin_lock_irqsave(&counter->lock, flags); 346 346 if (counter->mite_chan) { 347 347 mite_dma_disarm(counter->mite_chan); 348 348 } 349 - comedi_spin_unlock_irqrestore(&counter->lock, flags); 349 + spin_unlock_irqrestore(&counter->lock, flags); 350 350 ni_tio_configure_dma(counter, 0, 0); 351 351 352 352 ni_tio_set_bits(counter, ··· 369 369 return 1; 370 370 break; 371 371 case ni_gpct_variant_e_series: 372 - comedi_spin_lock_irqsave(&counter->lock, flags); 372 + spin_lock_irqsave(&counter->lock, flags); 373 373 { 374 374 if (counter->mite_chan == NULL || 375 375 counter->mite_chan->dir != COMEDI_INPUT || ··· 377 377 retval = 1; 378 378 } 379 379 } 380 - comedi_spin_unlock_irqrestore(&counter->lock, flags); 380 + spin_unlock_irqrestore(&counter->lock, flags); 381 381 break; 382 382 } 383 383 return retval; ··· 439 439 NITIO_Gxx_Joint_Status2_Reg(counter-> 440 440 counter_index)) & 441 441 Gi_Permanent_Stale_Bit(counter->counter_index)) { 442 - rt_printk("%s: Gi_Permanent_Stale_Data detected.\n", 442 + printk("%s: Gi_Permanent_Stale_Data detected.\n", 443 443 __FUNCTION__); 444 444 if (perm_stale_data) 445 445 *perm_stale_data = 1; ··· 458 458 ni_tio_acknowledge_and_confirm(counter, &gate_error, &tc_error, 459 459 &perm_stale_data, NULL); 460 460 if (gate_error) { 461 - rt_printk("%s: Gi_Gate_Error detected.\n", __FUNCTION__); 461 + printk("%s: Gi_Gate_Error detected.\n", __FUNCTION__); 462 462 s->async->events |= COMEDI_CB_OVERFLOW; 463 463 } 464 464 if (perm_stale_data) { ··· 470 470 if (read_register(counter, 471 471 NITIO_Gi_DMA_Status_Reg(counter-> 472 472 counter_index)) & Gi_DRQ_Error_Bit) { 473 - rt_printk("%s: Gi_DRQ_Error detected.\n", __FUNCTION__); 473 + printk("%s: Gi_DRQ_Error detected.\n", __FUNCTION__); 474 474 s->async->events |= COMEDI_CB_OVERFLOW; 475 475 } 476 476 break; 477 477 case ni_gpct_variant_e_series: 478 478 break; 479 479 } 480 - comedi_spin_lock_irqsave(&counter->lock, flags); 480 + spin_lock_irqsave(&counter->lock, flags); 481 481 if (counter->mite_chan == NULL) { 482 - comedi_spin_unlock_irqrestore(&counter->lock, flags); 482 + spin_unlock_irqrestore(&counter->lock, flags); 483 483 return; 484 484 } 485 485 gpct_mite_status = mite_get_status(counter->mite_chan); ··· 489 489 MITE_CHOR(counter->mite_chan->channel)); 490 490 } 491 491 mite_sync_input_dma(counter->mite_chan, s->async); 492 - comedi_spin_unlock_irqrestore(&counter->lock, flags); 492 + spin_unlock_irqrestore(&counter->lock, flags); 493 493 } 494 494 495 495 void ni_tio_set_mite_channel(struct ni_gpct *counter, ··· 497 497 { 498 498 unsigned long flags; 499 499 500 - comedi_spin_lock_irqsave(&counter->lock, flags); 500 + spin_lock_irqsave(&counter->lock, flags); 501 501 counter->mite_chan = mite_chan; 502 - comedi_spin_unlock_irqrestore(&counter->lock, flags); 502 + spin_unlock_irqrestore(&counter->lock, flags); 503 503 } 504 504 505 505 static int __init ni_tiocmd_init_module(void)
+4 -4
drivers/staging/comedi/drivers/pcl711.c
··· 269 269 hi = inb(dev->iobase + PCL711_AD_HI); 270 270 if (!(hi & PCL711_DRDY)) 271 271 goto ok; 272 - comedi_udelay(1); 272 + udelay(1); 273 273 } 274 - rt_printk("comedi%d: pcl711: A/D timeout\n", dev->minor); 274 + printk("comedi%d: pcl711: A/D timeout\n", dev->minor); 275 275 return -ETIME; 276 276 277 277 ok: ··· 503 503 printk("comedi%d: pcl711: remove\n", dev->minor); 504 504 505 505 if (dev->irq) 506 - comedi_free_irq(dev->irq, dev); 506 + free_irq(dev->irq, dev); 507 507 508 508 if (dev->iobase) 509 509 release_region(dev->iobase, PCL711_SIZE); ··· 541 541 return -EINVAL; 542 542 } 543 543 if (irq) { 544 - if (comedi_request_irq(irq, pcl711_interrupt, 0, "pcl711", dev)) { 544 + if (request_irq(irq, pcl711_interrupt, 0, "pcl711", dev)) { 545 545 printk("unable to allocate irq %u\n", irq); 546 546 return -EINVAL; 547 547 } else {
+5 -6
drivers/staging/comedi/drivers/pcl724.c
··· 155 155 irq = it->options[1]; 156 156 if (irq) { /* we want to use IRQ */ 157 157 if (((1 << irq) & this_board->IRQbits) == 0) { 158 - rt_printk 158 + printk 159 159 (", IRQ %u is out of allowed range, DISABLING IT", 160 160 irq); 161 161 irq = 0; /* Bad IRQ */ 162 162 } else { 163 - if (comedi_request_irq(irq, interrupt_pcl724, 0, 164 - "pcl724", dev)) { 165 - rt_printk 163 + if (request_irq(irq, interrupt_pcl724, 0, "pcl724", dev)) { 164 + printk 166 165 (", unable to allocate IRQ %u, DISABLING IT", 167 166 irq); 168 167 irq = 0; /* Can't use IRQ */ 169 168 } else { 170 - rt_printk(", irq=%u", irq); 169 + printk(", irq=%u", irq); 171 170 } 172 171 } 173 172 } ··· 212 213 213 214 #ifdef PCL724_IRQ 214 215 if (dev->irq) { 215 - comedi_free_irq(dev->irq, dev); 216 + free_irq(dev->irq, dev); 216 217 } 217 218 #endif 218 219
+5 -5
drivers/staging/comedi/drivers/pcl726.c
··· 280 280 devpriv->first_chan = 2; 281 281 if (irq) { /* we want to use IRQ */ 282 282 if (((1 << irq) & boardtypes[board].IRQbits) == 0) { 283 - rt_printk 283 + printk 284 284 (", IRQ %d is out of allowed range, DISABLING IT", 285 285 irq); 286 286 irq = 0; /* Bad IRQ */ 287 287 } else { 288 - if (comedi_request_irq(irq, interrupt_pcl818, 0, 288 + if (request_irq(irq, interrupt_pcl818, 0, 289 289 "pcl726", dev)) { 290 - rt_printk 290 + printk 291 291 (", unable to allocate IRQ %d, DISABLING IT", 292 292 irq); 293 293 irq = 0; /* Can't use IRQ */ 294 294 } else { 295 - rt_printk(", irq=%d", irq); 295 + printk(", irq=%d", irq); 296 296 } 297 297 } 298 298 } ··· 368 368 369 369 #ifdef ACL6126_IRQ 370 370 if (dev->irq) { 371 - comedi_free_irq(dev->irq, dev); 371 + free_irq(dev->irq, dev); 372 372 } 373 373 #endif 374 374
+40 -41
drivers/staging/comedi/drivers/pcl812.c
··· 447 447 setup_range_channel(dev, s, insn->chanspec, 1); /* select channel and renge */ 448 448 for (n = 0; n < insn->n; n++) { 449 449 outb(255, dev->iobase + PCL812_SOFTTRIG); /* start conversion */ 450 - comedi_udelay(5); 450 + udelay(5); 451 451 timeout = 50; /* wait max 50us, it must finish under 33us */ 452 452 while (timeout--) { 453 453 hi = inb(dev->iobase + PCL812_AD_HI); 454 454 if (!(hi & PCL812_DRDY)) 455 455 goto conv_finish; 456 - comedi_udelay(1); 456 + udelay(1); 457 457 } 458 - rt_printk 458 + printk 459 459 ("comedi%d: pcl812: (%s at 0x%lx) A/D insn read timeout\n", 460 460 dev->minor, dev->board_name, dev->iobase); 461 461 outb(devpriv->mode_reg_int | 0, dev->iobase + PCL812_MODE); ··· 481 481 setup_range_channel(dev, s, insn->chanspec, 1); /* select channel and renge */ 482 482 for (n = 0; n < insn->n; n++) { 483 483 outb(255, dev->iobase + PCL812_SOFTTRIG); /* start conversion */ 484 - comedi_udelay(5); 484 + udelay(5); 485 485 timeout = 50; /* wait max 50us, it must finish under 33us */ 486 486 while (timeout--) { 487 487 if (!(inb(dev->iobase + ACL8216_STATUS) & ACL8216_DRDY)) 488 488 goto conv_finish; 489 - comedi_udelay(1); 489 + udelay(1); 490 490 } 491 - rt_printk 491 + printk 492 492 ("comedi%d: pcl812: (%s at 0x%lx) A/D insn read timeout\n", 493 493 dev->minor, dev->board_name, dev->iobase); 494 494 outb(0, dev->iobase + PCL812_MODE); ··· 581 581 */ 582 582 static void pcl812_cmdtest_out(int e, struct comedi_cmd *cmd) 583 583 { 584 - rt_printk("pcl812 e=%d startsrc=%x scansrc=%x convsrc=%x\n", e, 584 + printk("pcl812 e=%d startsrc=%x scansrc=%x convsrc=%x\n", e, 585 585 cmd->start_src, cmd->scan_begin_src, cmd->convert_src); 586 - rt_printk("pcl812 e=%d startarg=%d scanarg=%d convarg=%d\n", e, 586 + printk("pcl812 e=%d startarg=%d scanarg=%d convarg=%d\n", e, 587 587 cmd->start_arg, cmd->scan_begin_arg, cmd->convert_arg); 588 - rt_printk("pcl812 e=%d stopsrc=%x scanend=%x\n", e, cmd->stop_src, 588 + printk("pcl812 e=%d stopsrc=%x scanend=%x\n", e, cmd->stop_src, 589 589 cmd->scan_end_src); 590 - rt_printk("pcl812 e=%d stoparg=%d scanendarg=%d chanlistlen=%d\n", e, 590 + printk("pcl812 e=%d stoparg=%d scanendarg=%d chanlistlen=%d\n", e, 591 591 cmd->stop_arg, cmd->scan_end_arg, cmd->chanlist_len); 592 592 } 593 593 #endif ··· 602 602 int tmp, divisor1, divisor2; 603 603 604 604 #ifdef PCL812_EXTDEBUG 605 - rt_printk("pcl812 EDBG: BGN: pcl812_ai_cmdtest(...)\n"); 605 + printk("pcl812 EDBG: BGN: pcl812_ai_cmdtest(...)\n"); 606 606 pcl812_cmdtest_out(-1, cmd); 607 607 #endif 608 608 /* step 1: make sure trigger sources are trivially valid */ ··· 639 639 if (err) { 640 640 #ifdef PCL812_EXTDEBUG 641 641 pcl812_cmdtest_out(1, cmd); 642 - rt_printk 642 + printk 643 643 ("pcl812 EDBG: BGN: pcl812_ai_cmdtest(...) err=%d ret=1\n", 644 644 err); 645 645 #endif ··· 681 681 if (err) { 682 682 #ifdef PCL812_EXTDEBUG 683 683 pcl812_cmdtest_out(2, cmd); 684 - rt_printk 684 + printk 685 685 ("pcl812 EDBG: BGN: pcl812_ai_cmdtest(...) err=%d ret=2\n", 686 686 err); 687 687 #endif ··· 739 739 if (err) { 740 740 #ifdef PCL812_EXTDEBUG 741 741 pcl812_cmdtest_out(3, cmd); 742 - rt_printk 742 + printk 743 743 ("pcl812 EDBG: BGN: pcl812_ai_cmdtest(...) err=%d ret=3\n", 744 744 err); 745 745 #endif ··· 761 761 762 762 if (err) { 763 763 #ifdef PCL812_EXTDEBUG 764 - rt_printk 764 + printk 765 765 ("pcl812 EDBG: BGN: pcl812_ai_cmdtest(...) err=%d ret=4\n", 766 766 err); 767 767 #endif ··· 780 780 struct comedi_cmd *cmd = &s->async->cmd; 781 781 782 782 #ifdef PCL812_EXTDEBUG 783 - rt_printk("pcl812 EDBG: BGN: pcl812_ai_cmd(...)\n"); 783 + printk("pcl812 EDBG: BGN: pcl812_ai_cmd(...)\n"); 784 784 #endif 785 785 786 786 if (cmd->start_src != TRIG_NOW) ··· 892 892 release_dma_lock(dma_flags); 893 893 enable_dma(devpriv->dma); 894 894 #ifdef PCL812_EXTDEBUG 895 - rt_printk 895 + printk 896 896 ("pcl812 EDBG: DMA %d PTR 0x%0x/0x%0x LEN %u/%u EOS %d\n", 897 897 devpriv->dma, devpriv->hwdmaptr[0], 898 898 devpriv->hwdmaptr[1], devpriv->dmabytestomove[0], ··· 913 913 } 914 914 915 915 #ifdef PCL812_EXTDEBUG 916 - rt_printk("pcl812 EDBG: END: pcl812_ai_cmd(...)\n"); 916 + printk("pcl812 EDBG: END: pcl812_ai_cmd(...)\n"); 917 917 #endif 918 918 919 919 return 0; ··· 939 939 err = 0; 940 940 break; 941 941 } 942 - comedi_udelay(1); 942 + udelay(1); 943 943 } 944 944 } else { 945 945 mask = 0x0fff; ··· 948 948 err = 0; 949 949 break; 950 950 } 951 - comedi_udelay(1); 951 + udelay(1); 952 952 } 953 953 } 954 954 955 955 if (err) { 956 - rt_printk 956 + printk 957 957 ("comedi%d: pcl812: (%s at 0x%lx) A/D cmd IRQ without DRDY!\n", 958 958 dev->minor, dev->board_name, dev->iobase); 959 959 pcl812_ai_cancel(dev, s); ··· 1019 1019 short *ptr; 1020 1020 1021 1021 #ifdef PCL812_EXTDEBUG 1022 - rt_printk("pcl812 EDBG: BGN: interrupt_pcl812_ai_dma(...)\n"); 1022 + printk("pcl812 EDBG: BGN: interrupt_pcl812_ai_dma(...)\n"); 1023 1023 #endif 1024 1024 ptr = (short *) devpriv->dmabuf[devpriv->next_dma_buf]; 1025 1025 len = (devpriv->dmabytestomove[devpriv->next_dma_buf] >> 1) - ··· 1053 1053 transfer_from_dma_buf(dev, s, ptr, bufptr, len); 1054 1054 1055 1055 #ifdef PCL812_EXTDEBUG 1056 - rt_printk("pcl812 EDBG: END: interrupt_pcl812_ai_dma(...)\n"); 1056 + printk("pcl812 EDBG: END: interrupt_pcl812_ai_dma(...)\n"); 1057 1057 #endif 1058 1058 return IRQ_HANDLED; 1059 1059 } ··· 1087 1087 if (!devpriv->ai_dma) 1088 1088 return 0; /* poll is valid only for DMA transfer */ 1089 1089 1090 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 1090 + spin_lock_irqsave(&dev->spinlock, flags); 1091 1091 1092 1092 for (i = 0; i < 10; i++) { 1093 1093 top1 = get_dma_residue(devpriv->ai_dma); /* where is now DMA */ ··· 1097 1097 } 1098 1098 1099 1099 if (top1 != top2) { 1100 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1100 + spin_unlock_irqrestore(&dev->spinlock, flags); 1101 1101 return 0; 1102 1102 } 1103 1103 ··· 1105 1105 top1 >>= 1; /* sample position */ 1106 1106 top2 = top1 - devpriv->ai_poll_ptr; 1107 1107 if (top2 < 1) { /* no new samples */ 1108 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1108 + spin_unlock_irqrestore(&dev->spinlock, flags); 1109 1109 return 0; 1110 1110 } 1111 1111 ··· 1115 1115 1116 1116 devpriv->ai_poll_ptr = top1; /* new buffer position */ 1117 1117 1118 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1118 + spin_unlock_irqrestore(&dev->spinlock, flags); 1119 1119 1120 1120 return s->async->buf_write_count - s->async->buf_read_count; 1121 1121 } ··· 1152 1152 outb(gain_reg, dev->iobase + PCL812_GAIN); /* select gain */ 1153 1153 1154 1154 if (wait) { 1155 - comedi_udelay(devpriv->max_812_ai_mode0_rangewait); /* XXX this depends on selected range and can be very long for some high gain ranges! */ 1155 + udelay(devpriv->max_812_ai_mode0_rangewait); /* XXX this depends on selected range and can be very long for some high gain ranges! */ 1156 1156 } 1157 1157 } 1158 1158 ··· 1163 1163 unsigned int divisor2) 1164 1164 { 1165 1165 #ifdef PCL812_EXTDEBUG 1166 - rt_printk("pcl812 EDBG: BGN: start_pacer(%d,%u,%u)\n", mode, divisor1, 1166 + printk("pcl812 EDBG: BGN: start_pacer(%d,%u,%u)\n", mode, divisor1, 1167 1167 divisor2); 1168 1168 #endif 1169 1169 outb(0xb4, dev->iobase + PCL812_CTRCTL); 1170 1170 outb(0x74, dev->iobase + PCL812_CTRCTL); 1171 - comedi_udelay(1); 1171 + udelay(1); 1172 1172 1173 1173 if (mode == 1) { 1174 1174 outb(divisor2 & 0xff, dev->iobase + PCL812_CTR2); ··· 1177 1177 outb((divisor1 >> 8) & 0xff, dev->iobase + PCL812_CTR1); 1178 1178 } 1179 1179 #ifdef PCL812_EXTDEBUG 1180 - rt_printk("pcl812 EDBG: END: start_pacer(...)\n"); 1180 + printk("pcl812 EDBG: END: start_pacer(...)\n"); 1181 1181 #endif 1182 1182 } 1183 1183 ··· 1196 1196 free_dma(devpriv->dma); 1197 1197 } 1198 1198 if (dev->irq) 1199 - comedi_free_irq(dev->irq, dev); 1199 + free_irq(dev->irq, dev); 1200 1200 if (dev->iobase) 1201 1201 release_region(dev->iobase, this_board->io_range); 1202 1202 } ··· 1207 1207 static int pcl812_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 1208 1208 { 1209 1209 #ifdef PCL812_EXTDEBUG 1210 - rt_printk("pcl812 EDBG: BGN: pcl812_ai_cancel(...)\n"); 1210 + printk("pcl812 EDBG: BGN: pcl812_ai_cancel(...)\n"); 1211 1211 #endif 1212 1212 if (devpriv->ai_dma) 1213 1213 disable_dma(devpriv->dma); ··· 1216 1216 start_pacer(dev, -1, 0, 0); /* stop 8254 */ 1217 1217 outb(0, dev->iobase + PCL812_CLRINT); /* clear INT request */ 1218 1218 #ifdef PCL812_EXTDEBUG 1219 - rt_printk("pcl812 EDBG: END: pcl812_ai_cancel(...)\n"); 1219 + printk("pcl812 EDBG: END: pcl812_ai_cancel(...)\n"); 1220 1220 #endif 1221 1221 return 0; 1222 1222 } ··· 1227 1227 static void pcl812_reset(struct comedi_device *dev) 1228 1228 { 1229 1229 #ifdef PCL812_EXTDEBUG 1230 - rt_printk("pcl812 EDBG: BGN: pcl812_reset(...)\n"); 1230 + printk("pcl812 EDBG: BGN: pcl812_reset(...)\n"); 1231 1231 #endif 1232 1232 outb(0, dev->iobase + PCL812_MUX); 1233 1233 outb(0 + devpriv->range_correction, dev->iobase + PCL812_GAIN); ··· 1254 1254 case boardPCL813: 1255 1255 case boardISO813: 1256 1256 case boardACL8113: 1257 - comedi_udelay(5); 1257 + udelay(5); 1258 1258 break; 1259 1259 } 1260 - comedi_udelay(5); 1260 + udelay(5); 1261 1261 #ifdef PCL812_EXTDEBUG 1262 - rt_printk("pcl812 EDBG: END: pcl812_reset(...)\n"); 1262 + printk("pcl812 EDBG: END: pcl812_reset(...)\n"); 1263 1263 #endif 1264 1264 } 1265 1265 ··· 1302 1302 printk(", IRQ %u is out of allowed range, DISABLING IT", irq); 1303 1303 irq = 0; /* Bad IRQ */ 1304 1304 } else { 1305 - if (comedi_request_irq(irq, interrupt_pcl812, 0, 1306 - "pcl812", dev)) { 1305 + if (request_irq(irq, interrupt_pcl812, 0, "pcl812", dev)) { 1307 1306 printk(", unable to allocate IRQ %u, DISABLING IT", irq); 1308 1307 irq = 0; /* Can't use IRQ */ 1309 1308 } else { ··· 1599 1600 { 1600 1601 1601 1602 #ifdef PCL812_EXTDEBUG 1602 - rt_printk("comedi%d: pcl812: remove\n", dev->minor); 1603 + printk("comedi%d: pcl812: remove\n", dev->minor); 1603 1604 #endif 1604 1605 free_resources(dev); 1605 1606 return 0;
+47 -49
drivers/staging/comedi/drivers/pcl816.c
··· 263 263 outb(0, dev->iobase + PCL816_CLRINT); /* clear INT (conversion end) flag */ 264 264 break; 265 265 } 266 - comedi_udelay(1); 266 + udelay(1); 267 267 } 268 268 /* Return timeout error */ 269 269 if (!timeout) { ··· 293 293 if (!(inb(dev->iobase + PCL816_STATUS) & 294 294 PCL816_STATUS_DRDY_MASK)) 295 295 break; 296 - comedi_udelay(1); 296 + udelay(1); 297 297 } 298 298 if (!timeout) { /* timeout, bail error */ 299 299 outb(0, dev->iobase + PCL816_CLRINT); /* clear INT request */ ··· 449 449 */ 450 450 static void pcl816_cmdtest_out(int e, struct comedi_cmd *cmd) 451 451 { 452 - rt_printk("pcl816 e=%d startsrc=%x scansrc=%x convsrc=%x\n", e, 452 + printk("pcl816 e=%d startsrc=%x scansrc=%x convsrc=%x\n", e, 453 453 cmd->start_src, cmd->scan_begin_src, cmd->convert_src); 454 - rt_printk("pcl816 e=%d startarg=%d scanarg=%d convarg=%d\n", e, 454 + printk("pcl816 e=%d startarg=%d scanarg=%d convarg=%d\n", e, 455 455 cmd->start_arg, cmd->scan_begin_arg, cmd->convert_arg); 456 - rt_printk("pcl816 e=%d stopsrc=%x scanend=%x\n", e, cmd->stop_src, 456 + printk("pcl816 e=%d stopsrc=%x scanend=%x\n", e, cmd->stop_src, 457 457 cmd->scan_end_src); 458 - rt_printk("pcl816 e=%d stoparg=%d scanendarg=%d chanlistlen=%d\n", e, 458 + printk("pcl816 e=%d stoparg=%d scanendarg=%d chanlistlen=%d\n", e, 459 459 cmd->stop_arg, cmd->scan_end_arg, cmd->chanlist_len); 460 460 } 461 461 ··· 468 468 int err = 0; 469 469 int tmp, divisor1, divisor2; 470 470 471 - DEBUG(rt_printk("pcl816 pcl812_ai_cmdtest\n"); 471 + DEBUG(printk("pcl816 pcl812_ai_cmdtest\n"); 472 472 pcl816_cmdtest_out(-1, cmd);); 473 473 474 474 /* step 1: make sure trigger sources are trivially valid */ ··· 636 636 if (!check_and_setup_channel_list(dev, s, cmd->chanlist, 637 637 cmd->chanlist_len)) 638 638 return -EINVAL; 639 - comedi_udelay(1); 639 + udelay(1); 640 640 641 641 devpriv->ai_act_scan = 0; 642 642 s->async->cur_chan = 0; ··· 710 710 if (!devpriv->dma) 711 711 return 0; /* poll is valid only for DMA transfer */ 712 712 713 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 713 + spin_lock_irqsave(&dev->spinlock, flags); 714 714 715 715 for (i = 0; i < 20; i++) { 716 716 top1 = get_dma_residue(devpriv->dma); /* where is now DMA */ ··· 719 719 break; 720 720 } 721 721 if (top1 != top2) { 722 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 722 + spin_unlock_irqrestore(&dev->spinlock, flags); 723 723 return 0; 724 724 } 725 725 ··· 727 727 top1 >>= 1; /* sample position */ 728 728 top2 = top1 - devpriv->ai_poll_ptr; 729 729 if (top2 < 1) { /* no new samples */ 730 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 730 + spin_unlock_irqrestore(&dev->spinlock, flags); 731 731 return 0; 732 732 } 733 733 ··· 736 736 devpriv->ai_poll_ptr, top2); 737 737 738 738 devpriv->ai_poll_ptr = top1; /* new buffer position */ 739 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 739 + spin_unlock_irqrestore(&dev->spinlock, flags); 740 740 741 741 return s->async->buf_write_count - s->async->buf_read_count; 742 742 } ··· 747 747 */ 748 748 static int pcl816_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 749 749 { 750 - /* DEBUG(rt_printk("pcl816_ai_cancel()\n");) */ 750 + /* DEBUG(printk("pcl816_ai_cancel()\n");) */ 751 751 752 752 if (devpriv->irq_blocked > 0) { 753 753 switch (devpriv->int816_mode) { ··· 763 763 case INT_TYPE_AI1_INT: 764 764 case INT_TYPE_AI3_INT: 765 765 outb(inb(dev->iobase + PCL816_CONTROL) & 0x73, dev->iobase + PCL816_CONTROL); /* Stop A/D */ 766 - comedi_udelay(1); 766 + udelay(1); 767 767 outb(0, dev->iobase + PCL816_CONTROL); /* Stop A/D */ 768 768 outb(0xb0, dev->iobase + PCL816_CTRCTL); /* Stop pacer */ 769 769 outb(0x70, dev->iobase + PCL816_CTRCTL); ··· 781 781 } 782 782 } 783 783 784 - DEBUG(rt_printk("comedi: pcl816_ai_cancel() successful\n"); 784 + DEBUG(printk("comedi: pcl816_ai_cancel() successful\n"); 785 785 ) 786 786 return 0; 787 787 } ··· 793 793 static int pcl816_check(unsigned long iobase) 794 794 { 795 795 outb(0x00, iobase + PCL816_MUX); 796 - comedi_udelay(1); 796 + udelay(1); 797 797 if (inb(iobase + PCL816_MUX) != 0x00) 798 798 return 1; /* there isn't card */ 799 799 outb(0x55, iobase + PCL816_MUX); 800 - comedi_udelay(1); 800 + udelay(1); 801 801 if (inb(iobase + PCL816_MUX) != 0x55) 802 802 return 1; /* there isn't card */ 803 803 outb(0x00, iobase + PCL816_MUX); 804 - comedi_udelay(1); 804 + udelay(1); 805 805 outb(0x18, iobase + PCL816_CONTROL); 806 - comedi_udelay(1); 806 + udelay(1); 807 807 if (inb(iobase + PCL816_CONTROL) != 0x18) 808 808 return 1; /* there isn't card */ 809 809 return 0; /* ok, card exist */ ··· 817 817 { 818 818 /* outb (0, dev->iobase + PCL818_DA_LO); DAC=0V */ 819 819 /* outb (0, dev->iobase + PCL818_DA_HI); */ 820 - /* comedi_udelay (1); */ 820 + /* udelay (1); */ 821 821 /* outb (0, dev->iobase + PCL818_DO_HI); DO=$0000 */ 822 822 /* outb (0, dev->iobase + PCL818_DO_LO); */ 823 - /* comedi_udelay (1); */ 823 + /* udelay (1); */ 824 824 outb(0, dev->iobase + PCL816_CONTROL); 825 825 outb(0, dev->iobase + PCL816_MUX); 826 826 outb(0, dev->iobase + PCL816_CLRINT); ··· 841 841 outb(0x32, dev->iobase + PCL816_CTRCTL); 842 842 outb(0xff, dev->iobase + PCL816_CTR0); 843 843 outb(0x00, dev->iobase + PCL816_CTR0); 844 - comedi_udelay(1); 844 + udelay(1); 845 845 outb(0xb4, dev->iobase + PCL816_CTRCTL); /* set counter 2 as mode 3 */ 846 846 outb(0x74, dev->iobase + PCL816_CTRCTL); /* set counter 1 as mode 3 */ 847 - comedi_udelay(1); 847 + udelay(1); 848 848 849 849 if (mode == 1) { 850 850 DPRINTK("mode %d, divisor1 %d, divisor2 %d\n", mode, divisor1, ··· 881 881 chansegment[0] = chanlist[0]; /* first channel is everytime ok */ 882 882 for (i = 1, seglen = 1; i < chanlen; i++, seglen++) { 883 883 /* build part of chanlist */ 884 - DEBUG(rt_printk("%d. %d %d\n", i, CR_CHAN(chanlist[i]), 884 + DEBUG(printk("%d. %d %d\n", i, CR_CHAN(chanlist[i]), 885 885 CR_RANGE(chanlist[i])); 886 886 ) 887 887 if (chanlist[0] == chanlist[i]) ··· 890 890 (CR_CHAN(chansegment[i - 1]) + 1) % chanlen; 891 891 if (nowmustbechan != CR_CHAN(chanlist[i])) { 892 892 /* channel list isn't continous :-( */ 893 - rt_printk 893 + printk 894 894 ("comedi%d: pcl816: channel list must be continous! chanlist[%i]=%d but must be %d or %d!\n", 895 895 dev->minor, i, CR_CHAN(chanlist[i]), 896 896 nowmustbechan, CR_CHAN(chanlist[0])); ··· 900 900 } 901 901 902 902 for (i = 0, segpos = 0; i < chanlen; i++) { /* check whole chanlist */ 903 - DEBUG(rt_printk("%d %d=%d %d\n", 903 + DEBUG(printk("%d %d=%d %d\n", 904 904 CR_CHAN(chansegment[i % seglen]), 905 905 CR_RANGE(chansegment[i % seglen]), 906 906 CR_CHAN(chanlist[i]), 907 907 CR_RANGE(chanlist[i])); 908 908 ) 909 909 if (chanlist[i] != chansegment[i % seglen]) { 910 - rt_printk 910 + printk 911 911 ("comedi%d: pcl816: bad channel or range number! chanlist[%i]=%d,%d,%d and not %d,%d,%d!\n", 912 912 dev->minor, i, CR_CHAN(chansegment[i]), 913 913 CR_RANGE(chansegment[i]), ··· 931 931 outb(CR_RANGE(chanlist[0]), dev->iobase + PCL816_RANGE); /* select gain */ 932 932 } 933 933 934 - comedi_udelay(1); 934 + udelay(1); 935 935 936 936 outb(devpriv->ai_act_chanlist[0] | (devpriv->ai_act_chanlist[seglen - 1] << 4), dev->iobase + PCL816_MUX); /* select channel interval to scan */ 937 937 ··· 981 981 */ 982 982 static void free_resources(struct comedi_device *dev) 983 983 { 984 - /* rt_printk("free_resource()\n"); */ 984 + /* printk("free_resource()\n"); */ 985 985 if (dev->private) { 986 986 pcl816_ai_cancel(dev, devpriv->sub_ai); 987 987 pcl816_reset(dev); ··· 993 993 free_pages(devpriv->dmabuf[1], devpriv->dmapages[1]); 994 994 #ifdef unused 995 995 if (devpriv->rtc_irq) 996 - comedi_free_irq(devpriv->rtc_irq, dev); 996 + free_irq(devpriv->rtc_irq, dev); 997 997 if ((devpriv->dma_rtc) && (RTC_lock == 1)) { 998 998 if (devpriv->rtc_iobase) 999 999 release_region(devpriv->rtc_iobase, ··· 1006 1006 free_irq(dev->irq, dev); 1007 1007 if (dev->iobase) 1008 1008 release_region(dev->iobase, this_board->io_range); 1009 - /* rt_printk("free_resource() end\n"); */ 1009 + /* printk("free_resource() end\n"); */ 1010 1010 } 1011 1011 1012 1012 /* ··· 1030 1030 this_board->name, iobase); 1031 1031 1032 1032 if (!request_region(iobase, this_board->io_range, "pcl816")) { 1033 - rt_printk("I/O port conflict\n"); 1033 + printk("I/O port conflict\n"); 1034 1034 return -EIO; 1035 1035 } 1036 1036 1037 1037 dev->iobase = iobase; 1038 1038 1039 1039 if (pcl816_check(iobase)) { 1040 - rt_printk(", I cann't detect board. FAIL!\n"); 1040 + printk(", I cann't detect board. FAIL!\n"); 1041 1041 return -EIO; 1042 1042 } 1043 1043 ··· 1054 1054 irq = it->options[1]; 1055 1055 if (irq) { /* we want to use IRQ */ 1056 1056 if (((1 << irq) & this_board->IRQbits) == 0) { 1057 - rt_printk 1057 + printk 1058 1058 (", IRQ %u is out of allowed range, DISABLING IT", 1059 1059 irq); 1060 1060 irq = 0; /* Bad IRQ */ 1061 1061 } else { 1062 - if (comedi_request_irq(irq, interrupt_pcl816, 0, 1063 - "pcl816", dev)) { 1064 - rt_printk 1062 + if (request_irq(irq, interrupt_pcl816, 0, "pcl816", dev)) { 1063 + printk 1065 1064 (", unable to allocate IRQ %u, DISABLING IT", 1066 1065 irq); 1067 1066 irq = 0; /* Can't use IRQ */ 1068 1067 } else { 1069 - rt_printk(", irq=%u", irq); 1068 + printk(", irq=%u", irq); 1070 1069 } 1071 1070 } 1072 1071 } ··· 1094 1095 devpriv->rtc_iosize = RTC_IO_EXTENT; 1095 1096 RTC_lock++; 1096 1097 #ifdef UNTESTED_CODE 1097 - if (!comedi_request_irq(RTC_IRQ, 1098 - interrupt_pcl816_ai_mode13_dma_rtc, 0, 1098 + if (!request_irq(RTC_IRQ, interrupt_pcl816_ai_mode13_dma_rtc, 0, 1099 1099 "pcl816 DMA (RTC)", dev)) { 1100 1100 devpriv->dma_rtc = 1; 1101 1101 devpriv->rtc_irq = RTC_IRQ; 1102 - rt_printk(", dma_irq=%u", devpriv->rtc_irq); 1102 + printk(", dma_irq=%u", devpriv->rtc_irq); 1103 1103 } else { 1104 1104 RTC_lock--; 1105 1105 if (RTC_lock == 0) { ··· 1129 1131 goto no_dma; /* DMA disabled */ 1130 1132 1131 1133 if (((1 << dma) & this_board->DMAbits) == 0) { 1132 - rt_printk(", DMA is out of allowed range, FAIL!\n"); 1134 + printk(", DMA is out of allowed range, FAIL!\n"); 1133 1135 return -EINVAL; /* Bad DMA */ 1134 1136 } 1135 1137 ret = request_dma(dma, "pcl816"); 1136 1138 if (ret) { 1137 - rt_printk(", unable to allocate DMA %u, FAIL!\n", dma); 1139 + printk(", unable to allocate DMA %u, FAIL!\n", dma); 1138 1140 return -EBUSY; /* DMA isn't free */ 1139 1141 } 1140 1142 1141 1143 devpriv->dma = dma; 1142 - rt_printk(", dma=%u", dma); 1144 + printk(", dma=%u", dma); 1143 1145 pages = 2; /* we need 16KB */ 1144 1146 devpriv->dmabuf[0] = __get_dma_pages(GFP_KERNEL, pages); 1145 1147 1146 1148 if (!devpriv->dmabuf[0]) { 1147 - rt_printk(", unable to allocate DMA buffer, FAIL!\n"); 1149 + printk(", unable to allocate DMA buffer, FAIL!\n"); 1148 1150 /* maybe experiment with try_to_free_pages() will help .... */ 1149 1151 return -EBUSY; /* no buffer :-( */ 1150 1152 } 1151 1153 devpriv->dmapages[0] = pages; 1152 1154 devpriv->hwdmaptr[0] = virt_to_bus((void *)devpriv->dmabuf[0]); 1153 1155 devpriv->hwdmasize[0] = (1 << pages) * PAGE_SIZE; 1154 - /* rt_printk("%d %d %ld, ",devpriv->dmapages[0],devpriv->hwdmasize[0],PAGE_SIZE); */ 1156 + /* printk("%d %d %ld, ",devpriv->dmapages[0],devpriv->hwdmasize[0],PAGE_SIZE); */ 1155 1157 1156 1158 if (devpriv->dma_rtc == 0) { /* we must do duble buff :-( */ 1157 1159 devpriv->dmabuf[1] = __get_dma_pages(GFP_KERNEL, pages); 1158 1160 if (!devpriv->dmabuf[1]) { 1159 - rt_printk 1161 + printk 1160 1162 (", unable to allocate DMA buffer, FAIL!\n"); 1161 1163 return -EBUSY; 1162 1164 } ··· 1230 1232 1231 1233 pcl816_reset(dev); 1232 1234 1233 - rt_printk("\n"); 1235 + printk("\n"); 1234 1236 1235 1237 return 0; 1236 1238 } ··· 1241 1243 */ 1242 1244 static int pcl816_detach(struct comedi_device *dev) 1243 1245 { 1244 - DEBUG(rt_printk("comedi%d: pcl816: remove\n", dev->minor); 1246 + DEBUG(printk("comedi%d: pcl816: remove\n", dev->minor); 1245 1247 ) 1246 1248 free_resources(dev); 1247 1249 #ifdef unused
+53 -55
drivers/staging/comedi/drivers/pcl818.c
··· 418 418 while (timeout--) { 419 419 if (inb(dev->iobase + PCL818_STATUS) & 0x10) 420 420 goto conv_finish; 421 - comedi_udelay(1); 421 + udelay(1); 422 422 } 423 423 comedi_error(dev, "A/D insn timeout"); 424 424 /* clear INT (conversion end) flag */ ··· 524 524 while (timeout--) { 525 525 if (inb(dev->iobase + PCL818_STATUS) & 0x10) 526 526 goto conv_finish; 527 - comedi_udelay(1); 527 + udelay(1); 528 528 } 529 529 outb(0, dev->iobase + PCL818_STATUS); /* clear INT request */ 530 530 comedi_error(dev, "A/D mode1/3 IRQ without DRDY!"); ··· 539 539 outb(0, dev->iobase + PCL818_CLRINT); /* clear INT request */ 540 540 541 541 if ((low & 0xf) != devpriv->act_chanlist[devpriv->act_chanlist_pos]) { /* dropout! */ 542 - rt_printk 542 + printk 543 543 ("comedi: A/D mode1/3 IRQ - channel dropout %x!=%x !\n", 544 544 (low & 0xf), 545 545 devpriv->act_chanlist[devpriv->act_chanlist_pos]); ··· 549 549 return IRQ_HANDLED; 550 550 } 551 551 if (s->async->cur_chan == 0) { 552 - /* rt_printk("E"); */ 552 + /* printk("E"); */ 553 553 devpriv->ai_act_scan--; 554 554 } 555 555 ··· 591 591 release_dma_lock(flags); 592 592 enable_dma(devpriv->dma); 593 593 } 594 - rt_printk("comedi: A/D mode1/3 IRQ \n"); 594 + printk("comedi: A/D mode1/3 IRQ \n"); 595 595 596 596 devpriv->dma_runs_to_end--; 597 597 outb(0, dev->iobase + PCL818_CLRINT); /* clear INT request */ ··· 602 602 603 603 for (i = 0; i < len; i++) { 604 604 if ((ptr[bufptr] & 0xf) != devpriv->act_chanlist[devpriv->act_chanlist_pos]) { /* dropout! */ 605 - rt_printk 605 + printk 606 606 ("comedi: A/D mode1/3 DMA - channel dropout %d(card)!=%d(chanlist) at %d !\n", 607 607 (ptr[bufptr] & 0xf), 608 608 devpriv->act_chanlist[devpriv-> ··· 681 681 682 682 if (dmabuf[i] != MAGIC_DMA_WORD) { /* DMA overflow! */ 683 683 comedi_error(dev, "A/D mode1/3 DMA buffer overflow!"); 684 - /* rt_printk("I %d dmabuf[i] %d %d\n",i,dmabuf[i],devpriv->dmasamplsize); */ 684 + /* printk("I %d dmabuf[i] %d %d\n",i,dmabuf[i],devpriv->dmasamplsize); */ 685 685 pcl818_ai_cancel(dev, s); 686 686 s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR; 687 687 comedi_event(dev, s); 688 688 return IRQ_HANDLED; 689 689 } 690 - /* rt_printk("r %ld ",ofs_dats); */ 690 + /* printk("r %ld ",ofs_dats); */ 691 691 692 692 bufptr = devpriv->last_top_dma; 693 693 694 694 for (i = 0; i < ofs_dats; i++) { 695 695 if ((dmabuf[bufptr] & 0xf) != devpriv->act_chanlist[devpriv->act_chanlist_pos]) { /* dropout! */ 696 - rt_printk 696 + printk 697 697 ("comedi: A/D mode1/3 DMA - channel dropout %d!=%d !\n", 698 698 (dmabuf[bufptr] & 0xf), 699 699 devpriv->act_chanlist[devpriv-> ··· 775 775 for (i = 0; i < len; i++) { 776 776 lo = inb(dev->iobase + PCL818_FI_DATALO); 777 777 if ((lo & 0xf) != devpriv->act_chanlist[devpriv->act_chanlist_pos]) { /* dropout! */ 778 - rt_printk 778 + printk 779 779 ("comedi: A/D mode1/3 FIFO - channel dropout %d!=%d !\n", 780 780 (lo & 0xf), 781 781 devpriv->act_chanlist[devpriv-> ··· 818 818 comedi_error(dev, "premature interrupt"); 819 819 return IRQ_HANDLED; 820 820 } 821 - /* rt_printk("I\n"); */ 821 + /* printk("I\n"); */ 822 822 823 823 if (devpriv->irq_blocked && devpriv->irq_was_now_closed) { 824 824 if ((devpriv->neverending_ai || (!devpriv->neverending_ai && ··· 882 882 unsigned int flags; 883 883 unsigned int bytes; 884 884 885 - rt_printk("mode13dma_int, mode: %d\n", mode); 885 + printk("mode13dma_int, mode: %d\n", mode); 886 886 disable_dma(devpriv->dma); /* disable dma */ 887 887 bytes = devpriv->hwdmasize[0]; 888 888 if (!devpriv->neverending_ai) { ··· 965 965 int divisor1, divisor2; 966 966 unsigned int seglen; 967 967 968 - rt_printk("pcl818_ai_cmd_mode()\n"); 968 + printk("pcl818_ai_cmd_mode()\n"); 969 969 if ((!dev->irq) && (!devpriv->dma_rtc)) { 970 970 comedi_error(dev, "IRQ not defined!"); 971 971 return -EINVAL; ··· 983 983 setup_channel_list(dev, s, devpriv->ai_chanlist, 984 984 devpriv->ai_n_chan, seglen); 985 985 986 - comedi_udelay(1); 986 + udelay(1); 987 987 988 988 devpriv->ai_act_scan = devpriv->ai_scans; 989 989 devpriv->ai_act_chan = 0; ··· 1030 1030 case 0: 1031 1031 if (!devpriv->usefifo) { 1032 1032 /* IRQ */ 1033 - /* rt_printk("IRQ\n"); */ 1033 + /* printk("IRQ\n"); */ 1034 1034 if (mode == 1) { 1035 1035 devpriv->ai_mode = INT_TYPE_AI1_INT; 1036 1036 /* Pacer+IRQ */ ··· 1065 1065 break; 1066 1066 } 1067 1067 #endif 1068 - rt_printk("pcl818_ai_cmd_mode() end\n"); 1068 + printk("pcl818_ai_cmd_mode() end\n"); 1069 1069 return 0; 1070 1070 } 1071 1071 ··· 1155 1155 { 1156 1156 outb(0xb4, dev->iobase + PCL818_CTRCTL); 1157 1157 outb(0x74, dev->iobase + PCL818_CTRCTL); 1158 - comedi_udelay(1); 1158 + udelay(1); 1159 1159 1160 1160 if (mode == 1) { 1161 1161 outb(divisor2 & 0xff, dev->iobase + PCL818_CTR2); ··· 1188 1188 /* build part of chanlist */ 1189 1189 for (i = 1, seglen = 1; i < n_chan; i++, seglen++) { 1190 1190 1191 - /* rt_printk("%d. %d * %d\n",i, 1191 + /* printk("%d. %d * %d\n",i, 1192 1192 * CR_CHAN(it->chanlist[i]),CR_RANGE(it->chanlist[i]));*/ 1193 1193 1194 1194 /* we detect loop, this must by finish */ ··· 1198 1198 nowmustbechan = 1199 1199 (CR_CHAN(chansegment[i - 1]) + 1) % s->n_chan; 1200 1200 if (nowmustbechan != CR_CHAN(chanlist[i])) { /* channel list isn't continous :-( */ 1201 - rt_printk 1201 + printk 1202 1202 ("comedi%d: pcl818: channel list must be continous! chanlist[%i]=%d but must be %d or %d!\n", 1203 1203 dev->minor, i, CR_CHAN(chanlist[i]), 1204 1204 nowmustbechan, CR_CHAN(chanlist[0])); ··· 1210 1210 1211 1211 /* check whole chanlist */ 1212 1212 for (i = 0, segpos = 0; i < n_chan; i++) { 1213 - /* rt_printk("%d %d=%d %d\n",CR_CHAN(chansegment[i%seglen]),CR_RANGE(chansegment[i%seglen]),CR_CHAN(it->chanlist[i]),CR_RANGE(it->chanlist[i])); */ 1213 + /* printk("%d %d=%d %d\n",CR_CHAN(chansegment[i%seglen]),CR_RANGE(chansegment[i%seglen]),CR_CHAN(it->chanlist[i]),CR_RANGE(it->chanlist[i])); */ 1214 1214 if (chanlist[i] != chansegment[i % seglen]) { 1215 - rt_printk 1215 + printk 1216 1216 ("comedi%d: pcl818: bad channel or range number! chanlist[%i]=%d,%d,%d and not %d,%d,%d!\n", 1217 1217 dev->minor, i, CR_CHAN(chansegment[i]), 1218 1218 CR_RANGE(chansegment[i]), ··· 1226 1226 } else { 1227 1227 seglen = 1; 1228 1228 } 1229 - rt_printk("check_channel_list: seglen %d\n", seglen); 1229 + printk("check_channel_list: seglen %d\n", seglen); 1230 1230 return seglen; 1231 1231 } 1232 1232 ··· 1244 1244 outb(CR_RANGE(chanlist[i]), dev->iobase + PCL818_RANGE); /* select gain */ 1245 1245 } 1246 1246 1247 - comedi_udelay(1); 1247 + udelay(1); 1248 1248 1249 1249 /* select channel interval to scan */ 1250 1250 outb(devpriv->act_chanlist[0] | (devpriv->act_chanlist[seglen - ··· 1417 1417 struct comedi_cmd *cmd = &s->async->cmd; 1418 1418 int retval; 1419 1419 1420 - rt_printk("pcl818_ai_cmd()\n"); 1420 + printk("pcl818_ai_cmd()\n"); 1421 1421 devpriv->ai_n_chan = cmd->chanlist_len; 1422 1422 devpriv->ai_chanlist = cmd->chanlist; 1423 1423 devpriv->ai_flags = cmd->flags; ··· 1436 1436 if (cmd->convert_src == TRIG_TIMER) { /* mode 1 */ 1437 1437 devpriv->ai_timer1 = cmd->convert_arg; 1438 1438 retval = pcl818_ai_cmd_mode(1, dev, s); 1439 - rt_printk("pcl818_ai_cmd() end\n"); 1439 + printk("pcl818_ai_cmd() end\n"); 1440 1440 return retval; 1441 1441 } 1442 1442 if (cmd->convert_src == TRIG_EXT) { /* mode 3 */ ··· 1454 1454 static int pcl818_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s) 1455 1455 { 1456 1456 if (devpriv->irq_blocked > 0) { 1457 - rt_printk("pcl818_ai_cancel()\n"); 1457 + printk("pcl818_ai_cancel()\n"); 1458 1458 devpriv->irq_was_now_closed = 1; 1459 1459 1460 1460 switch (devpriv->ai_mode) { ··· 1482 1482 case INT_TYPE_AO3_INT: 1483 1483 #endif 1484 1484 outb(inb(dev->iobase + PCL818_CONTROL) & 0x73, dev->iobase + PCL818_CONTROL); /* Stop A/D */ 1485 - comedi_udelay(1); 1485 + udelay(1); 1486 1486 start_pacer(dev, -1, 0, 0); 1487 1487 outb(0, dev->iobase + PCL818_AD_LO); 1488 1488 inb(dev->iobase + PCL818_AD_LO); ··· 1504 1504 } 1505 1505 1506 1506 end: 1507 - rt_printk("pcl818_ai_cancel() end\n"); 1507 + printk("pcl818_ai_cancel() end\n"); 1508 1508 return 0; 1509 1509 } 1510 1510 ··· 1515 1515 static int pcl818_check(unsigned long iobase) 1516 1516 { 1517 1517 outb(0x00, iobase + PCL818_MUX); 1518 - comedi_udelay(1); 1518 + udelay(1); 1519 1519 if (inb(iobase + PCL818_MUX) != 0x00) 1520 1520 return 1; /* there isn't card */ 1521 1521 outb(0x55, iobase + PCL818_MUX); 1522 - comedi_udelay(1); 1522 + udelay(1); 1523 1523 if (inb(iobase + PCL818_MUX) != 0x55) 1524 1524 return 1; /* there isn't card */ 1525 1525 outb(0x00, iobase + PCL818_MUX); 1526 - comedi_udelay(1); 1526 + udelay(1); 1527 1527 outb(0x18, iobase + PCL818_CONTROL); 1528 - comedi_udelay(1); 1528 + udelay(1); 1529 1529 if (inb(iobase + PCL818_CONTROL) != 0x18) 1530 1530 return 1; /* there isn't card */ 1531 1531 return 0; /* ok, card exist */ ··· 1544 1544 } 1545 1545 outb(0, dev->iobase + PCL818_DA_LO); /* DAC=0V */ 1546 1546 outb(0, dev->iobase + PCL818_DA_HI); 1547 - comedi_udelay(1); 1547 + udelay(1); 1548 1548 outb(0, dev->iobase + PCL818_DO_HI); /* DO=$0000 */ 1549 1549 outb(0, dev->iobase + PCL818_DO_LO); 1550 - comedi_udelay(1); 1550 + udelay(1); 1551 1551 outb(0, dev->iobase + PCL818_CONTROL); 1552 1552 outb(0, dev->iobase + PCL818_CNTENABLE); 1553 1553 outb(0, dev->iobase + PCL818_MUX); ··· 1658 1658 */ 1659 1659 static void free_resources(struct comedi_device *dev) 1660 1660 { 1661 - /* rt_printk("free_resource()\n"); */ 1661 + /* printk("free_resource()\n"); */ 1662 1662 if (dev->private) { 1663 1663 pcl818_ai_cancel(dev, devpriv->sub_ai); 1664 1664 pcl818_reset(dev); ··· 1670 1670 free_pages(devpriv->dmabuf[1], devpriv->dmapages[1]); 1671 1671 #ifdef unused 1672 1672 if (devpriv->rtc_irq) 1673 - comedi_free_irq(devpriv->rtc_irq, dev); 1673 + free_irq(devpriv->rtc_irq, dev); 1674 1674 if ((devpriv->dma_rtc) && (RTC_lock == 1)) { 1675 1675 if (devpriv->rtc_iobase) 1676 1676 release_region(devpriv->rtc_iobase, ··· 1685 1685 free_irq(dev->irq, dev); 1686 1686 if (dev->iobase) 1687 1687 release_region(dev->iobase, devpriv->io_range); 1688 - /* rt_printk("free_resource() end\n"); */ 1688 + /* printk("free_resource() end\n"); */ 1689 1689 } 1690 1690 1691 1691 /* ··· 1717 1717 devpriv->usefifo = 1; 1718 1718 } 1719 1719 if (!request_region(iobase, devpriv->io_range, "pcl818")) { 1720 - rt_printk("I/O port conflict\n"); 1720 + printk("I/O port conflict\n"); 1721 1721 return -EIO; 1722 1722 } 1723 1723 1724 1724 dev->iobase = iobase; 1725 1725 1726 1726 if (pcl818_check(iobase)) { 1727 - rt_printk(", I can't detect board. FAIL!\n"); 1727 + printk(", I can't detect board. FAIL!\n"); 1728 1728 return -EIO; 1729 1729 } 1730 1730 ··· 1736 1736 irq = it->options[1]; 1737 1737 if (irq) { /* we want to use IRQ */ 1738 1738 if (((1 << irq) & this_board->IRQbits) == 0) { 1739 - rt_printk 1739 + printk 1740 1740 (", IRQ %u is out of allowed range, DISABLING IT", 1741 1741 irq); 1742 1742 irq = 0; /* Bad IRQ */ 1743 1743 } else { 1744 - if (comedi_request_irq(irq, interrupt_pcl818, 0, 1745 - "pcl818", dev)) { 1746 - rt_printk 1744 + if (request_irq(irq, interrupt_pcl818, 0, "pcl818", dev)) { 1745 + printk 1747 1746 (", unable to allocate IRQ %u, DISABLING IT", 1748 1747 irq); 1749 1748 irq = 0; /* Can't use IRQ */ 1750 1749 } else { 1751 - rt_printk(", irq=%u", irq); 1750 + printk(", irq=%u", irq); 1752 1751 } 1753 1752 } 1754 1753 } ··· 1775 1776 devpriv->rtc_iobase = RTC_PORT(0); 1776 1777 devpriv->rtc_iosize = RTC_IO_EXTENT; 1777 1778 RTC_lock++; 1778 - if (!comedi_request_irq(RTC_IRQ, 1779 - interrupt_pcl818_ai_mode13_dma_rtc, 0, 1779 + if (!request_irq(RTC_IRQ, interrupt_pcl818_ai_mode13_dma_rtc, 0, 1780 1780 "pcl818 DMA (RTC)", dev)) { 1781 1781 devpriv->dma_rtc = 1; 1782 1782 devpriv->rtc_irq = RTC_IRQ; 1783 - rt_printk(", dma_irq=%u", devpriv->rtc_irq); 1783 + printk(", dma_irq=%u", devpriv->rtc_irq); 1784 1784 } else { 1785 1785 RTC_lock--; 1786 1786 if (RTC_lock == 0) { ··· 1804 1806 if (dma < 1) 1805 1807 goto no_dma; /* DMA disabled */ 1806 1808 if (((1 << dma) & this_board->DMAbits) == 0) { 1807 - rt_printk(", DMA is out of allowed range, FAIL!\n"); 1809 + printk(", DMA is out of allowed range, FAIL!\n"); 1808 1810 return -EINVAL; /* Bad DMA */ 1809 1811 } 1810 1812 ret = request_dma(dma, "pcl818"); 1811 1813 if (ret) { 1812 - rt_printk(", unable to allocate DMA %u, FAIL!\n", dma); 1814 + printk(", unable to allocate DMA %u, FAIL!\n", dma); 1813 1815 return -EBUSY; /* DMA isn't free */ 1814 1816 } 1815 1817 devpriv->dma = dma; 1816 - rt_printk(", dma=%u", dma); 1818 + printk(", dma=%u", dma); 1817 1819 pages = 2; /* we need 16KB */ 1818 1820 devpriv->dmabuf[0] = __get_dma_pages(GFP_KERNEL, pages); 1819 1821 if (!devpriv->dmabuf[0]) { 1820 - rt_printk(", unable to allocate DMA buffer, FAIL!\n"); 1822 + printk(", unable to allocate DMA buffer, FAIL!\n"); 1821 1823 /* maybe experiment with try_to_free_pages() will help .... */ 1822 1824 return -EBUSY; /* no buffer :-( */ 1823 1825 } 1824 1826 devpriv->dmapages[0] = pages; 1825 1827 devpriv->hwdmaptr[0] = virt_to_bus((void *)devpriv->dmabuf[0]); 1826 1828 devpriv->hwdmasize[0] = (1 << pages) * PAGE_SIZE; 1827 - /* rt_printk("%d %d %ld, ",devpriv->dmapages[0],devpriv->hwdmasize[0],PAGE_SIZE); */ 1829 + /* printk("%d %d %ld, ",devpriv->dmapages[0],devpriv->hwdmasize[0],PAGE_SIZE); */ 1828 1830 if (devpriv->dma_rtc == 0) { /* we must do duble buff :-( */ 1829 1831 devpriv->dmabuf[1] = __get_dma_pages(GFP_KERNEL, pages); 1830 1832 if (!devpriv->dmabuf[1]) { 1831 - rt_printk 1833 + printk 1832 1834 (", unable to allocate DMA buffer, FAIL!\n"); 1833 1835 return -EBUSY; 1834 1836 } ··· 1987 1989 1988 1990 pcl818_reset(dev); 1989 1991 1990 - rt_printk("\n"); 1992 + printk("\n"); 1991 1993 1992 1994 return 0; 1993 1995 } ··· 1998 2000 */ 1999 2001 static int pcl818_detach(struct comedi_device *dev) 2000 2002 { 2001 - /* rt_printk("comedi%d: pcl818: remove\n", dev->minor); */ 2003 + /* printk("comedi%d: pcl818: remove\n", dev->minor); */ 2002 2004 free_resources(dev); 2003 2005 return 0; 2004 2006 }
+14 -20
drivers/staging/comedi/drivers/pcmmio.c
··· 364 364 dev->iobase + 16 + asic * ASIC_IOSIZE; 365 365 devpriv->asics[asic].irq = 0; /* this gets actually set at the end of 366 366 this function when we 367 - comedi_request_irqs */ 367 + request_irqs */ 368 368 spin_lock_init(&devpriv->asics[asic].spinlock); 369 369 } 370 370 ··· 489 489 490 490 for (asic = 0; irq[0] && asic < MAX_ASICS; ++asic) { 491 491 if (irq[asic] 492 - && comedi_request_irq(irq[asic], interrupt_pcmmio, 492 + && request_irq(irq[asic], interrupt_pcmmio, 493 493 IRQF_SHARED, thisboard->name, dev)) { 494 494 int i; 495 495 /* unroll the allocated irqs.. */ 496 496 for (i = asic - 1; i >= 0; --i) { 497 - comedi_free_irq(irq[i], dev); 497 + free_irq(irq[i], dev); 498 498 devpriv->asics[i].irq = irq[i] = 0; 499 499 } 500 500 irq[asic] = 0; ··· 536 536 537 537 for (i = 0; i < MAX_ASICS; ++i) { 538 538 if (devpriv && devpriv->asics[i].irq) 539 - comedi_free_irq(devpriv->asics[i].irq, dev); 539 + free_irq(devpriv->asics[i].irq, dev); 540 540 } 541 541 542 542 if (devpriv && devpriv->sprivs) ··· 778 778 /* it is an interrupt for ASIC #asic */ 779 779 unsigned char int_pend; 780 780 781 - comedi_spin_lock_irqsave(&devpriv->asics[asic].spinlock, 782 - flags); 781 + spin_lock_irqsave(&devpriv->asics[asic].spinlock, flags); 783 782 784 783 int_pend = inb(iobase + REG_INT_PENDING) & 0x07; 785 784 ··· 810 811 ++got1; 811 812 } 812 813 813 - comedi_spin_unlock_irqrestore(&devpriv->asics[asic]. 814 - spinlock, flags); 814 + spin_unlock_irqrestore(&devpriv->asics[asic]. spinlock, flags); 815 815 816 816 if (triggered) { 817 817 struct comedi_subdevice *s; ··· 823 825 unsigned long flags; 824 826 unsigned oldevents; 825 827 826 - comedi_spin_lock_irqsave 827 - (&subpriv->dio.intr. 828 - spinlock, flags); 828 + spin_lock_irqsave(&subpriv->dio.intr.spinlock, flags); 829 829 830 830 oldevents = s->async->events; 831 831 ··· 892 896 } 893 897 } 894 898 895 - comedi_spin_unlock_irqrestore 896 - (&subpriv->dio.intr. 897 - spinlock, flags); 899 + spin_unlock_irqrestore(&subpriv->dio.intr.spinlock, flags); 898 900 899 901 if (oldevents != 900 902 s->async->events) { ··· 995 1001 { 996 1002 unsigned long flags; 997 1003 998 - comedi_spin_lock_irqsave(&subpriv->dio.intr.spinlock, flags); 1004 + spin_lock_irqsave(&subpriv->dio.intr.spinlock, flags); 999 1005 if (subpriv->dio.intr.active) 1000 1006 pcmmio_stop_intr(dev, s); 1001 - comedi_spin_unlock_irqrestore(&subpriv->dio.intr.spinlock, flags); 1007 + spin_unlock_irqrestore(&subpriv->dio.intr.spinlock, flags); 1002 1008 1003 1009 return 0; 1004 1010 } ··· 1016 1022 if (trignum != 0) 1017 1023 return -EINVAL; 1018 1024 1019 - comedi_spin_lock_irqsave(&subpriv->dio.intr.spinlock, flags); 1025 + spin_lock_irqsave(&subpriv->dio.intr.spinlock, flags); 1020 1026 s->async->inttrig = 0; 1021 1027 if (subpriv->dio.intr.active) { 1022 1028 event = pcmmio_start_intr(dev, s); 1023 1029 } 1024 - comedi_spin_unlock_irqrestore(&subpriv->dio.intr.spinlock, flags); 1030 + spin_unlock_irqrestore(&subpriv->dio.intr.spinlock, flags); 1025 1031 1026 1032 if (event) { 1027 1033 comedi_event(dev, s); ··· 1039 1045 unsigned long flags; 1040 1046 int event = 0; 1041 1047 1042 - comedi_spin_lock_irqsave(&subpriv->dio.intr.spinlock, flags); 1048 + spin_lock_irqsave(&subpriv->dio.intr.spinlock, flags); 1043 1049 subpriv->dio.intr.active = 1; 1044 1050 1045 1051 /* Set up end of acquisition. */ ··· 1065 1071 event = pcmmio_start_intr(dev, s); 1066 1072 break; 1067 1073 } 1068 - comedi_spin_unlock_irqrestore(&subpriv->dio.intr.spinlock, flags); 1074 + spin_unlock_irqrestore(&subpriv->dio.intr.spinlock, flags); 1069 1075 1070 1076 if (event) { 1071 1077 comedi_event(dev, s);
+14 -20
drivers/staging/comedi/drivers/pcmuio.c
··· 322 322 devpriv->asics[asic].iobase = dev->iobase + asic * ASIC_IOSIZE; 323 323 devpriv->asics[asic].irq = 0; /* this gets actually set at the end of 324 324 this function when we 325 - comedi_request_irqs */ 325 + request_irqs */ 326 326 spin_lock_init(&devpriv->asics[asic].spinlock); 327 327 } 328 328 ··· 413 413 414 414 for (asic = 0; irq[0] && asic < MAX_ASICS; ++asic) { 415 415 if (irq[asic] 416 - && comedi_request_irq(irq[asic], interrupt_pcmuio, 416 + && request_irq(irq[asic], interrupt_pcmuio, 417 417 IRQF_SHARED, thisboard->name, dev)) { 418 418 int i; 419 419 /* unroll the allocated irqs.. */ 420 420 for (i = asic - 1; i >= 0; --i) { 421 - comedi_free_irq(irq[i], dev); 421 + free_irq(irq[i], dev); 422 422 devpriv->asics[i].irq = irq[i] = 0; 423 423 } 424 424 irq[asic] = 0; ··· 460 460 461 461 for (i = 0; i < MAX_ASICS; ++i) { 462 462 if (devpriv->asics[i].irq) 463 - comedi_free_irq(devpriv->asics[i].irq, dev); 463 + free_irq(devpriv->asics[i].irq, dev); 464 464 } 465 465 466 466 if (devpriv && devpriv->sprivs) ··· 701 701 /* it is an interrupt for ASIC #asic */ 702 702 unsigned char int_pend; 703 703 704 - comedi_spin_lock_irqsave(&devpriv->asics[asic].spinlock, 705 - flags); 704 + spin_lock_irqsave(&devpriv->asics[asic].spinlock, flags); 706 705 707 706 int_pend = inb(iobase + REG_INT_PENDING) & 0x07; 708 707 ··· 733 734 ++got1; 734 735 } 735 736 736 - comedi_spin_unlock_irqrestore(&devpriv->asics[asic]. 737 - spinlock, flags); 737 + spin_unlock_irqrestore(&devpriv->asics[asic].spinlock, flags); 738 738 739 739 if (triggered) { 740 740 struct comedi_subdevice *s; ··· 746 748 unsigned long flags; 747 749 unsigned oldevents; 748 750 749 - comedi_spin_lock_irqsave 750 - (&subpriv->intr. 751 - spinlock, flags); 751 + spin_lock_irqsave (&subpriv->intr.spinlock, flags); 752 752 753 753 oldevents = s->async->events; 754 754 ··· 812 816 } 813 817 } 814 818 815 - comedi_spin_unlock_irqrestore 816 - (&subpriv->intr. 817 - spinlock, flags); 819 + spin_unlock_irqrestore(&subpriv->intr.spinlock, flags); 818 820 819 821 if (oldevents != 820 822 s->async->events) { ··· 905 911 { 906 912 unsigned long flags; 907 913 908 - comedi_spin_lock_irqsave(&subpriv->intr.spinlock, flags); 914 + spin_lock_irqsave(&subpriv->intr.spinlock, flags); 909 915 if (subpriv->intr.active) 910 916 pcmuio_stop_intr(dev, s); 911 - comedi_spin_unlock_irqrestore(&subpriv->intr.spinlock, flags); 917 + spin_unlock_irqrestore(&subpriv->intr.spinlock, flags); 912 918 913 919 return 0; 914 920 } ··· 926 932 if (trignum != 0) 927 933 return -EINVAL; 928 934 929 - comedi_spin_lock_irqsave(&subpriv->intr.spinlock, flags); 935 + spin_lock_irqsave(&subpriv->intr.spinlock, flags); 930 936 s->async->inttrig = 0; 931 937 if (subpriv->intr.active) { 932 938 event = pcmuio_start_intr(dev, s); 933 939 } 934 - comedi_spin_unlock_irqrestore(&subpriv->intr.spinlock, flags); 940 + spin_unlock_irqrestore(&subpriv->intr.spinlock, flags); 935 941 936 942 if (event) { 937 943 comedi_event(dev, s); ··· 949 955 unsigned long flags; 950 956 int event = 0; 951 957 952 - comedi_spin_lock_irqsave(&subpriv->intr.spinlock, flags); 958 + spin_lock_irqsave(&subpriv->intr.spinlock, flags); 953 959 subpriv->intr.active = 1; 954 960 955 961 /* Set up end of acquisition. */ ··· 975 981 event = pcmuio_start_intr(dev, s); 976 982 break; 977 983 } 978 - comedi_spin_unlock_irqrestore(&subpriv->intr.spinlock, flags); 984 + spin_unlock_irqrestore(&subpriv->intr.spinlock, flags); 979 985 980 986 if (event) { 981 987 comedi_event(dev, s);
+4 -4
drivers/staging/comedi/drivers/plx9080.h
··· 399 399 400 400 /* wait to make sure done bit is zero */ 401 401 for (i = 0; (dma_status & PLX_DMA_DONE_BIT) && i < timeout; i++) { 402 - comedi_udelay(1); 402 + udelay(1); 403 403 dma_status = readb(dma_cs_addr); 404 404 } 405 405 if (i == timeout) { 406 - rt_printk 406 + printk 407 407 ("plx9080: cancel() timed out waiting for dma %i done clear\n", 408 408 channel); 409 409 return -ETIMEDOUT; ··· 413 413 /* wait for dma done bit */ 414 414 dma_status = readb(dma_cs_addr); 415 415 for (i = 0; (dma_status & PLX_DMA_DONE_BIT) == 0 && i < timeout; i++) { 416 - comedi_udelay(1); 416 + udelay(1); 417 417 dma_status = readb(dma_cs_addr); 418 418 } 419 419 if (i == timeout) { 420 - rt_printk 420 + printk 421 421 ("plx9080: cancel() timed out waiting for dma %i done set\n", 422 422 channel); 423 423 return -ETIMEDOUT;
+11 -11
drivers/staging/comedi/drivers/rtd520.c
··· 135 135 #define RTD_DMA_TIMEOUT 33000 /* 1 msec */ 136 136 #else 137 137 /* by delaying, power and electrical noise are reduced somewhat */ 138 - #define WAIT_QUIETLY comedi_udelay (1) 138 + #define WAIT_QUIETLY udelay (1) 139 139 #define RTD_ADC_TIMEOUT 2000 /* in usec */ 140 140 #define RTD_DAC_TIMEOUT 2000 /* in usec */ 141 141 #define RTD_DMA_TIMEOUT 1000 /* in usec */ ··· 900 900 /* initialize board, per RTD spec */ 901 901 /* also, initialize shadow registers */ 902 902 RtdResetBoard(dev); 903 - comedi_udelay(100); /* needed? */ 903 + udelay(100); /* needed? */ 904 904 RtdPlxInterruptWrite(dev, 0); 905 905 RtdInterruptMask(dev, 0); /* and sets shadow */ 906 906 RtdInterruptClearMask(dev, ~0); /* and sets shadow */ ··· 919 919 /* TODO: set user out source ??? */ 920 920 921 921 /* check if our interrupt is available and get it */ 922 - ret = comedi_request_irq(devpriv->pci_dev->irq, rtd_interrupt, 922 + ret = request_irq(devpriv->pci_dev->irq, rtd_interrupt, 923 923 IRQF_SHARED, DRV_NAME, dev); 924 924 925 925 if (ret < 0) { ··· 1032 1032 /* disable interrupt controller */ 1033 1033 RtdPlxInterruptWrite(dev, RtdPlxInterruptRead(dev) 1034 1034 & ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E)); 1035 - comedi_free_irq(dev->irq, dev); 1035 + free_irq(dev->irq, dev); 1036 1036 } 1037 1037 1038 1038 /* release all regions that were allocated */ ··· 1111 1111 /* disable interrupt controller */ 1112 1112 RtdPlxInterruptWrite(dev, RtdPlxInterruptRead(dev) 1113 1113 & ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E)); 1114 - comedi_free_irq(dev->irq, dev); 1114 + free_irq(dev->irq, dev); 1115 1115 } 1116 1116 1117 1117 /* release all regions that were allocated */ ··· 1224 1224 unsigned fifo_status; 1225 1225 /* trigger conversion */ 1226 1226 RtdAdcStart(dev); 1227 - comedi_udelay(1); 1227 + udelay(1); 1228 1228 fifo_status = RtdFifoStatus(dev); 1229 1229 if ((fifo_status & FS_ADC_HEMPTY) == 0) { 1230 1230 fifo_size = 2 * i; ··· 1233 1233 } 1234 1234 if (i == limit) 1235 1235 { 1236 - rt_printk("\ncomedi: %s: failed to probe fifo size.\n", DRV_NAME); 1236 + printk("\ncomedi: %s: failed to probe fifo size.\n", DRV_NAME); 1237 1237 return -EIO; 1238 1238 } 1239 1239 RtdAdcClearFifo(dev); 1240 1240 if (fifo_size != 0x400 && fifo_size != 0x2000) 1241 1241 { 1242 - rt_printk("\ncomedi: %s: unexpected fifo size of %i, expected 1024 or 8192.\n", 1242 + printk("\ncomedi: %s: unexpected fifo size of %i, expected 1024 or 8192.\n", 1243 1243 DRV_NAME, fifo_size); 1244 1244 return -EIO; 1245 1245 } ··· 1386 1386 + ((channel == 0) ? LCFG_DMACSR0 : LCFG_DMACSR1); 1387 1387 1388 1388 /* spinlock for plx dma control/status reg */ 1389 - /* comedi_spin_lock_irqsave( &dev->spinlock, flags ); */ 1389 + /* spin_lock_irqsave( &dev->spinlock, flags ); */ 1390 1390 1391 1391 /* abort dma transfer if necessary */ 1392 1392 status = readb(dma_cs_addr); ··· 1409 1409 1410 1410 /* disable channel (required) */ 1411 1411 writeb(0, dma_cs_addr); 1412 - comedi_udelay(1); /* needed?? */ 1412 + udelay(1); /* needed?? */ 1413 1413 /* set abort bit for channel */ 1414 1414 writeb(PLX_DMA_ABORT_BIT, dma_cs_addr); 1415 1415 ··· 1427 1427 } 1428 1428 1429 1429 abortDmaExit: 1430 - /* comedi_spin_unlock_irqrestore( &dev->spinlock, flags ); */ 1430 + /* spin_unlock_irqrestore( &dev->spinlock, flags ); */ 1431 1431 } 1432 1432 1433 1433 /*
+6 -7
drivers/staging/comedi/drivers/rti800.c
··· 200 200 * gets set, and you will have an error. */ 201 201 if (insn->n > 0) { 202 202 BUG_ON(gain >= ARRAY_SIZE(gaindelay)); 203 - comedi_udelay(gaindelay[gain]); 203 + udelay(gaindelay[gain]); 204 204 } 205 205 } 206 206 ··· 209 209 for (t = RTI800_TIMEOUT; t; t--) { 210 210 status = inb(dev->iobase + RTI800_CSR); 211 211 if (status & RTI800_OVERRUN) { 212 - rt_printk("rti800: a/d overrun\n"); 212 + printk("rti800: a/d overrun\n"); 213 213 outb(0, dev->iobase + RTI800_CLRFLAGS); 214 214 return -EIO; 215 215 } 216 216 if (status & RTI800_DONE) 217 217 break; 218 - comedi_udelay(1); 218 + udelay(1); 219 219 } 220 220 if (t == 0) { 221 - rt_printk("rti800: timeout\n"); 221 + printk("rti800: timeout\n"); 222 222 return -ETIME; 223 223 } 224 224 data[i] = inb(dev->iobase + RTI800_ADCLO); ··· 338 338 irq = it->options[1]; 339 339 if (irq) { 340 340 printk("( irq = %u )", irq); 341 - ret = comedi_request_irq(irq, rti800_interrupt, 0, 342 - "rti800", dev); 341 + ret = request_irq(irq, rti800_interrupt, 0, "rti800", dev); 343 342 if (ret < 0) { 344 343 printk(" Failed to allocate IRQ\n"); 345 344 return ret; ··· 454 455 release_region(dev->iobase, RTI800_SIZE); 455 456 456 457 if (dev->irq) 457 - comedi_free_irq(dev->irq, dev); 458 + free_irq(dev->irq, dev); 458 459 459 460 return 0; 460 461 }
+2 -2
drivers/staging/comedi/drivers/s526.c
··· 850 850 } 851 851 } 852 852 if (i == TIMEOUT) { 853 - /* rt_printk() should be used instead of printk() 853 + /* printk() should be used instead of printk() 854 854 * whenever the code can be called from real-time. */ 855 - rt_printk("s526: ADC(0x%04x) timeout\n", 855 + printk("s526: ADC(0x%04x) timeout\n", 856 856 inw(ADDR_REG(REG_ISR))); 857 857 return -ETIMEDOUT; 858 858 }
+7 -7
drivers/staging/comedi/drivers/s626.c
··· 596 596 if (dev->irq == 0) { 597 597 printk(" unknown irq (bad)\n"); 598 598 } else { 599 - ret = comedi_request_irq(dev->irq, s626_irq_handler, 600 - IRQF_SHARED, "s626", dev); 599 + ret = request_irq(dev->irq, s626_irq_handler, IRQF_SHARED, 600 + "s626", dev); 601 601 602 602 if (ret < 0) { 603 603 printk(" irq not available\n"); ··· 987 987 if (dev->attached == 0) 988 988 return IRQ_NONE; 989 989 /* lock to avoid race with comedi_poll */ 990 - comedi_spin_lock_irqsave(&dev->spinlock, flags); 990 + spin_lock_irqsave(&dev->spinlock, flags); 991 991 992 992 /* save interrupt enable register state */ 993 993 irqstatus = readl(devpriv->base_addr + P_IER); ··· 1264 1264 1265 1265 DEBUG("s626_irq_handler: exit interrupt service routine.\n"); 1266 1266 1267 - comedi_spin_unlock_irqrestore(&dev->spinlock, flags); 1267 + spin_unlock_irqrestore(&dev->spinlock, flags); 1268 1268 return IRQ_HANDLED; 1269 1269 } 1270 1270 ··· 1291 1291 } 1292 1292 1293 1293 if (dev->irq) 1294 - comedi_free_irq(dev->irq, dev); 1294 + free_irq(dev->irq, dev); 1295 1295 1296 1296 if (devpriv->base_addr) 1297 1297 iounmap(devpriv->base_addr); ··· 1574 1574 for (n = 0; n < insn->n; n++) { 1575 1575 1576 1576 /* Delay 10 microseconds for analog input settling. */ 1577 - comedi_udelay(10); 1577 + udelay(10); 1578 1578 1579 1579 /* Start ADC by pulsing GPIO1 low. */ 1580 1580 GpioImage = RR7146(P_GPIO); ··· 1606 1606 * data value is sometimes set to the previous 1607 1607 * conversion's data value. 1608 1608 */ 1609 - comedi_udelay(4); 1609 + udelay(4); 1610 1610 } 1611 1611 1612 1612 /* Start a dummy conversion to cause the data from the
+1 -1
drivers/staging/comedi/drivers/s626.h
··· 63 63 */ 64 64 65 65 #ifdef _DEBUG_ 66 - #define DEBUG(...); rt_printk(__VA_ARGS__); 66 + #define DEBUG(...); printk(__VA_ARGS__); 67 67 #else 68 68 #define DEBUG(...) 69 69 #endif
+1 -1
drivers/staging/comedi/drivers/serial2002.c
··· 223 223 result = ch; 224 224 break; 225 225 } 226 - comedi_udelay(100); 226 + udelay(100); 227 227 } 228 228 } 229 229 set_fs(oldfs);
+2 -2
drivers/staging/comedi/drivers/skel.c
··· 331 331 break; 332 332 } 333 333 if (i == TIMEOUT) { 334 - /* rt_printk() should be used instead of printk() 334 + /* printk() should be used instead of printk() 335 335 * whenever the code can be called from real-time. */ 336 - rt_printk("timeout\n"); 336 + printk("timeout\n"); 337 337 return -ETIMEDOUT; 338 338 } 339 339
+1 -1
drivers/staging/comedi/drivers/unioxx5.c
··· 311 311 usp->usp_module_type[i] = inb(subdev_iobase + 6); 312 312 313 313 printk(" [%d] 0x%02x |", i, usp->usp_module_type[i]); 314 - comedi_udelay(1); 314 + udelay(1); 315 315 } 316 316 317 317 printk("\n");
+2 -2
drivers/staging/comedi/kcomedilib/data.c
··· 23 23 24 24 #include "../comedi.h" 25 25 #include "../comedilib.h" 26 - #include "../comedidev.h" /* for comedi_udelay() */ 26 + #include "../comedidev.h" 27 27 28 28 #include <linux/string.h> 29 29 ··· 83 83 if (retval < 0) 84 84 return retval; 85 85 86 - comedi_udelay((nano_sec + 999) / 1000); 86 + udelay((nano_sec + 999) / 1000); 87 87 88 88 return comedi_data_read(dev, subdev, chan, range, aref, data); 89 89 }
+12 -12
drivers/staging/comedi/kcomedilib/kcomedilib_main.c
··· 105 105 106 106 void comedi_perror(const char *message) 107 107 { 108 - rt_printk("%s: unknown error\n", message); 108 + printk("%s: unknown error\n", message); 109 109 } 110 110 111 111 char *comedi_strerror(int err) ··· 208 208 ret = -EINVAL; 209 209 break; 210 210 } 211 - comedi_udelay(insn->data[0]); 211 + udelay(insn->data[0]); 212 212 ret = 1; 213 213 break; 214 214 case INSN_INTTRIG: ··· 217 217 break; 218 218 } 219 219 if (insn->subdev >= dev->n_subdevices) { 220 - rt_printk("%d not usable subdevice\n", 220 + printk("%d not usable subdevice\n", 221 221 insn->subdev); 222 222 ret = -EINVAL; 223 223 break; 224 224 } 225 225 s = dev->subdevices + insn->subdev; 226 226 if (!s->async) { 227 - rt_printk("no async\n"); 227 + printk("no async\n"); 228 228 ret = -EINVAL; 229 229 break; 230 230 } 231 231 if (!s->async->inttrig) { 232 - rt_printk("no inttrig\n"); 232 + printk("no inttrig\n"); 233 233 ret = -EAGAIN; 234 234 break; 235 235 } ··· 249 249 s = dev->subdevices + insn->subdev; 250 250 251 251 if (s->type == COMEDI_SUBD_UNUSED) { 252 - rt_printk("%d not useable subdevice\n", insn->subdev); 252 + printk("%d not useable subdevice\n", insn->subdev); 253 253 ret = -EIO; 254 254 goto error; 255 255 } ··· 258 258 259 259 ret = check_chanlist(s, 1, &insn->chanspec); 260 260 if (ret < 0) { 261 - rt_printk("bad chanspec\n"); 261 + printk("bad chanspec\n"); 262 262 ret = -EINVAL; 263 263 goto error; 264 264 } ··· 295 295 #if 0 296 296 /* XXX do we want this? -- abbotti #if'ed it out for now. */ 297 297 if (ret != insn->n) { 298 - rt_printk("BUG: result of insn != insn.n\n"); 298 + printk("BUG: result of insn != insn.n\n"); 299 299 ret = -EINVAL; 300 300 goto error; 301 301 } ··· 336 336 337 337 s = dev->subdevices + subdevice; 338 338 339 - comedi_spin_lock_irqsave(&s->spin_lock, flags); 339 + spin_lock_irqsave(&s->spin_lock, flags); 340 340 341 341 if (s->busy) { 342 342 ret = -EBUSY; ··· 348 348 } 349 349 } 350 350 351 - comedi_spin_unlock_irqrestore(&s->spin_lock, flags); 351 + spin_unlock_irqrestore(&s->spin_lock, flags); 352 352 353 353 return ret; 354 354 } ··· 382 382 383 383 async = s->async; 384 384 385 - comedi_spin_lock_irqsave(&s->spin_lock, flags); 385 + spin_lock_irqsave(&s->spin_lock, flags); 386 386 387 387 if (s->busy) { 388 388 ret = -EBUSY; ··· 400 400 ret = 0; 401 401 } 402 402 403 - comedi_spin_unlock_irqrestore(&s->spin_lock, flags); 403 + spin_unlock_irqrestore(&s->spin_lock, flags); 404 404 405 405 return ret; 406 406 }
+3 -4
drivers/staging/comedi/range.c
··· 130 130 if (CR_CHAN(chanlist[i]) >= s->n_chan || 131 131 CR_RANGE(chanlist[i]) >= s->range_table->length 132 132 || aref_invalid(s, chanlist[i])) { 133 - rt_printk 134 - ("bad chanlist[%d]=0x%08x n_chan=%d range length=%d\n", 133 + printk("bad chanlist[%d]=0x%08x n_chan=%d range length=%d\n", 135 134 i, chanlist[i], s->n_chan, 136 135 s->range_table->length); 137 136 #if 0 ··· 146 147 CR_RANGE(chanlist[i]) >= 147 148 s->range_table_list[chan]->length 148 149 || aref_invalid(s, chanlist[i])) { 149 - rt_printk("bad chanlist[%d]=0x%08x\n", i, 150 + printk("bad chanlist[%d]=0x%08x\n", i, 150 151 chanlist[i]); 151 152 return -EINVAL; 152 153 } 153 154 } 154 155 } else { 155 - rt_printk("comedi: (bug) no range type list!\n"); 156 + printk("comedi: (bug) no range type list!\n"); 156 157 return -EINVAL; 157 158 } 158 159 return 0;