tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops

The sdcc driver for msm8996/msm8916/msm8974/msm8994 and apq8084
expects a clk_set_rate() on the sdcc rcg clk to set
a floor value of supported clk rate closest to the requested
rate, by looking up the frequency table.
So move all the sdcc rcgs on all these platforms to use the
newly introduced clk_rcg2_floor_ops

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Jeremy McNicoll <jeremymc@redhat.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

authored by

Rajendra Nayak and committed by
Stephen Boyd 5f5001a9 081ba802

+18 -18
+4 -4
drivers/clk/qcom/gcc-apq8084.c
··· 1142 1142 .name = "sdcc1_apps_clk_src", 1143 1143 .parent_names = gcc_xo_gpll0_gpll4, 1144 1144 .num_parents = 3, 1145 - .ops = &clk_rcg2_ops, 1145 + .ops = &clk_rcg2_floor_ops, 1146 1146 }, 1147 1147 }; 1148 1148 ··· 1156 1156 .name = "sdcc2_apps_clk_src", 1157 1157 .parent_names = gcc_xo_gpll0, 1158 1158 .num_parents = 2, 1159 - .ops = &clk_rcg2_ops, 1159 + .ops = &clk_rcg2_floor_ops, 1160 1160 }, 1161 1161 }; 1162 1162 ··· 1170 1170 .name = "sdcc3_apps_clk_src", 1171 1171 .parent_names = gcc_xo_gpll0, 1172 1172 .num_parents = 2, 1173 - .ops = &clk_rcg2_ops, 1173 + .ops = &clk_rcg2_floor_ops, 1174 1174 }, 1175 1175 }; 1176 1176 ··· 1184 1184 .name = "sdcc4_apps_clk_src", 1185 1185 .parent_names = gcc_xo_gpll0, 1186 1186 .num_parents = 2, 1187 - .ops = &clk_rcg2_ops, 1187 + .ops = &clk_rcg2_floor_ops, 1188 1188 }, 1189 1189 }; 1190 1190
+2 -2
drivers/clk/qcom/gcc-msm8916.c
··· 1107 1107 .name = "sdcc1_apps_clk_src", 1108 1108 .parent_names = gcc_xo_gpll0, 1109 1109 .num_parents = 2, 1110 - .ops = &clk_rcg2_ops, 1110 + .ops = &clk_rcg2_floor_ops, 1111 1111 }, 1112 1112 }; 1113 1113 ··· 1132 1132 .name = "sdcc2_apps_clk_src", 1133 1133 .parent_names = gcc_xo_gpll0, 1134 1134 .num_parents = 2, 1135 - .ops = &clk_rcg2_ops, 1135 + .ops = &clk_rcg2_floor_ops, 1136 1136 }, 1137 1137 }; 1138 1138
+4 -4
drivers/clk/qcom/gcc-msm8974.c
··· 872 872 .name = "sdcc1_apps_clk_src", 873 873 .parent_names = gcc_xo_gpll0, 874 874 .num_parents = 2, 875 - .ops = &clk_rcg2_ops, 875 + .ops = &clk_rcg2_floor_ops, 876 876 }; 877 877 878 878 static struct clk_rcg2 sdcc1_apps_clk_src = { ··· 894 894 .name = "sdcc2_apps_clk_src", 895 895 .parent_names = gcc_xo_gpll0, 896 896 .num_parents = 2, 897 - .ops = &clk_rcg2_ops, 897 + .ops = &clk_rcg2_floor_ops, 898 898 }, 899 899 }; 900 900 ··· 908 908 .name = "sdcc3_apps_clk_src", 909 909 .parent_names = gcc_xo_gpll0, 910 910 .num_parents = 2, 911 - .ops = &clk_rcg2_ops, 911 + .ops = &clk_rcg2_floor_ops, 912 912 }, 913 913 }; 914 914 ··· 922 922 .name = "sdcc4_apps_clk_src", 923 923 .parent_names = gcc_xo_gpll0, 924 924 .num_parents = 2, 925 - .ops = &clk_rcg2_ops, 925 + .ops = &clk_rcg2_floor_ops, 926 926 }, 927 927 }; 928 928
+4 -4
drivers/clk/qcom/gcc-msm8994.c
··· 912 912 .name = "sdcc1_apps_clk_src", 913 913 .parent_names = gcc_xo_gpll0_gpll4, 914 914 .num_parents = 3, 915 - .ops = &clk_rcg2_ops, 915 + .ops = &clk_rcg2_floor_ops, 916 916 }, 917 917 }; 918 918 ··· 938 938 .name = "sdcc2_apps_clk_src", 939 939 .parent_names = gcc_xo_gpll0, 940 940 .num_parents = 2, 941 - .ops = &clk_rcg2_ops, 941 + .ops = &clk_rcg2_floor_ops, 942 942 }, 943 943 }; 944 944 ··· 953 953 .name = "sdcc3_apps_clk_src", 954 954 .parent_names = gcc_xo_gpll0, 955 955 .num_parents = 2, 956 - .ops = &clk_rcg2_ops, 956 + .ops = &clk_rcg2_floor_ops, 957 957 }, 958 958 }; 959 959 ··· 968 968 .name = "sdcc4_apps_clk_src", 969 969 .parent_names = gcc_xo_gpll0, 970 970 .num_parents = 2, 971 - .ops = &clk_rcg2_ops, 971 + .ops = &clk_rcg2_floor_ops, 972 972 }, 973 973 }; 974 974
+4 -4
drivers/clk/qcom/gcc-msm8996.c
··· 460 460 .name = "sdcc1_apps_clk_src", 461 461 .parent_names = gcc_xo_gpll0_gpll4_gpll0_early_div, 462 462 .num_parents = 4, 463 - .ops = &clk_rcg2_ops, 463 + .ops = &clk_rcg2_floor_ops, 464 464 }, 465 465 }; 466 466 ··· 505 505 .name = "sdcc2_apps_clk_src", 506 506 .parent_names = gcc_xo_gpll0_gpll4, 507 507 .num_parents = 3, 508 - .ops = &clk_rcg2_ops, 508 + .ops = &clk_rcg2_floor_ops, 509 509 }, 510 510 }; 511 511 ··· 519 519 .name = "sdcc3_apps_clk_src", 520 520 .parent_names = gcc_xo_gpll0_gpll4, 521 521 .num_parents = 3, 522 - .ops = &clk_rcg2_ops, 522 + .ops = &clk_rcg2_floor_ops, 523 523 }, 524 524 }; 525 525 ··· 543 543 .name = "sdcc4_apps_clk_src", 544 544 .parent_names = gcc_xo_gpll0, 545 545 .num_parents = 2, 546 - .ops = &clk_rcg2_ops, 546 + .ops = &clk_rcg2_floor_ops, 547 547 }, 548 548 }; 549 549