Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'wireless-drivers-next-2020-03-24' of git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next

Kalle Valo says:

====================
wireless-drivers-next patches for v5.7

Second set of patches for v5.7. Lots of cleanup patches this time, but
of course various new features as well fixes.

When merging with wireless-drivers this pull request has a conflict in:

drivers/net/wireless/intel/iwlwifi/pcie/drv.c

To solve that just drop the changes from commit cf52c8a776d1 in
wireless-drivers and take the hunk from wireless-drivers-next as is.
The list of specific subsystem device IDs are not necessary after
commit d6f2134a3831 (in wireless-drivers-next) anymore, the detection
is based on other characteristics of the devices.

Major changes:

qtnfmac

* support WPA3 SAE and OWE in AP mode

ath10k

* support for getting btcoex settings from Device Tree

* support QCA9377 SDIO device

ath11k

* add HE rate accounting

* add thermal sensor and cooling devices

mt76

* MT7663 support for the MT7615 driver
====================

Signed-off-by: David S. Miller <davem@davemloft.net>

+3957 -1973
+7
Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt
··· 91 91 - qcom,msa-fixed-perm: Boolean context flag to disable SCM call for statically 92 92 mapped msa region. 93 93 94 + - qcom,coexist-support : should contain eithr "0" or "1" to indicate coex 95 + support by the hardware. 96 + - qcom,coexist-gpio-pin : gpio pin number information to support coex 97 + which will be used by wifi firmware. 98 + 94 99 Example (to supply PCI based wifi block details): 95 100 96 101 In this example, the node is defined as child node of the PCI controller. ··· 164 159 qcom,msi_addr = <0x0b006040>; 165 160 qcom,msi_base = <0x40>; 166 161 qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ]; 162 + qcom,coexist-support = <1>; 163 + qcom,coexist-gpio-pin = <0x33>; 167 164 }; 168 165 169 166 Example (to supply wcn3990 SoC wifi block details):
+1 -1
drivers/net/wireless/admtek/adm8211.h
··· 531 531 u8 lpf_cutoff[14]; /* 0x62 */ 532 532 u8 lnags_threshold[14]; /* 0x70 */ 533 533 __le16 checksum; /* 0x7E */ 534 - u8 cis_data[0]; /* 0x80, 384 bytes */ 534 + u8 cis_data[]; /* 0x80, 384 bytes */ 535 535 } __packed; 536 536 537 537 struct adm8211_priv {
+2 -2
drivers/net/wireless/ath/ath10k/ahb.c
··· 459 459 ar_ahb->mem_len = resource_size(res); 460 460 461 461 ar_ahb->gcc_mem = ioremap(ATH10K_GCC_REG_BASE, 462 - ATH10K_GCC_REG_SIZE); 462 + ATH10K_GCC_REG_SIZE); 463 463 if (!ar_ahb->gcc_mem) { 464 464 ath10k_err(ar, "gcc mem ioremap error\n"); 465 465 ret = -ENOMEM; ··· 467 467 } 468 468 469 469 ar_ahb->tcsr_mem = ioremap(ATH10K_TCSR_REG_BASE, 470 - ATH10K_TCSR_REG_SIZE); 470 + ATH10K_TCSR_REG_SIZE); 471 471 if (!ar_ahb->tcsr_mem) { 472 472 ath10k_err(ar, "tcsr mem ioremap error\n"); 473 473 ret = -ENOMEM;
+81 -1
drivers/net/wireless/ath/ath10k/core.c
··· 541 541 .tx_stats_over_pktlog = false, 542 542 }, 543 543 { 544 + .id = QCA9377_HW_1_1_DEV_VERSION, 545 + .dev_id = QCA9377_1_0_DEVICE_ID, 546 + .bus = ATH10K_BUS_SDIO, 547 + .name = "qca9377 hw1.1 sdio", 548 + .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 549 + .uart_pin = 19, 550 + .otp_exe_param = 0, 551 + .channel_counters_freq_hz = 88000, 552 + .max_probe_resp_desc_thres = 0, 553 + .cal_data_len = 8124, 554 + .fw = { 555 + .dir = QCA9377_HW_1_0_FW_DIR, 556 + .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 557 + .board_size = QCA9377_BOARD_DATA_SZ, 558 + .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 559 + }, 560 + .hw_ops = &qca6174_ops, 561 + .hw_clk = qca6174_clk, 562 + .target_cpu_freq = 176000000, 563 + .decap_align_bytes = 4, 564 + .n_cipher_suites = 8, 565 + .num_peers = TARGET_QCA9377_HL_NUM_PEERS, 566 + .ast_skid_limit = 0x10, 567 + .num_wds_entries = 0x20, 568 + .uart_pin_workaround = true, 569 + }, 570 + { 544 571 .id = QCA4019_HW_1_0_DEV_VERSION, 545 572 .dev_id = 0, 546 573 .bus = ATH10K_BUS_AHB, ··· 901 874 return -ENODATA; 902 875 } 903 876 877 + if (ar->id.bmi_ids_valid) { 878 + ath10k_dbg(ar, ATH10K_DBG_BOOT, 879 + "boot already acquired valid otp board id,skip download, board_id %d chip_id %d\n", 880 + ar->id.bmi_board_id, ar->id.bmi_chip_id); 881 + goto skip_otp_download; 882 + } 883 + 904 884 ath10k_dbg(ar, ATH10K_DBG_BOOT, 905 885 "boot upload otp to 0x%x len %zd for board id\n", 906 886 address, ar->normal_mode_fw.fw_file.otp_len); ··· 954 920 ar->id.bmi_ids_valid = true; 955 921 ar->id.bmi_board_id = board_id; 956 922 ar->id.bmi_chip_id = chip_id; 923 + 924 + skip_otp_download: 957 925 958 926 return 0; 959 927 } ··· 2155 2119 return 0; 2156 2120 } 2157 2121 2122 + static void ath10k_core_fetch_btcoex_dt(struct ath10k *ar) 2123 + { 2124 + struct device_node *node; 2125 + u8 coex_support = 0; 2126 + int ret; 2127 + 2128 + node = ar->dev->of_node; 2129 + if (!node) 2130 + goto out; 2131 + 2132 + ret = of_property_read_u8(node, "qcom,coexist-support", &coex_support); 2133 + if (ret) { 2134 + ar->coex_support = true; 2135 + goto out; 2136 + } 2137 + 2138 + if (coex_support) { 2139 + ar->coex_support = true; 2140 + } else { 2141 + ar->coex_support = false; 2142 + ar->coex_gpio_pin = -1; 2143 + goto out; 2144 + } 2145 + 2146 + ret = of_property_read_u32(node, "qcom,coexist-gpio-pin", 2147 + &ar->coex_gpio_pin); 2148 + if (ret) 2149 + ar->coex_gpio_pin = -1; 2150 + 2151 + out: 2152 + ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot coex_support %d coex_gpio_pin %d\n", 2153 + ar->coex_support, ar->coex_gpio_pin); 2154 + } 2155 + 2158 2156 static int ath10k_init_uart(struct ath10k *ar) 2159 2157 { 2160 2158 int ret; ··· 2766 2696 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2767 2697 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2768 2698 2699 + ath10k_core_fetch_btcoex_dt(ar); 2700 + 2769 2701 /* 10.4 firmware supports BT-Coex without reloading firmware 2770 2702 * via pdev param. To support Bluetooth coexistence pdev param, 2771 2703 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2772 2704 * enabled always. 2705 + * 2706 + * We can still enable BTCOEX if firmware has the support 2707 + * eventhough btceox_support value is 2708 + * ATH10K_DT_BTCOEX_NOT_FOUND 2773 2709 */ 2710 + 2774 2711 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2775 2712 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2776 - ar->running_fw->fw_file.fw_features)) 2713 + ar->running_fw->fw_file.fw_features) && 2714 + ar->coex_support) 2777 2715 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2778 2716 2779 2717 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ··· 2941 2863 ath10k_htt_tx_stop(&ar->htt); 2942 2864 ath10k_htt_rx_free(&ar->htt); 2943 2865 ath10k_wmi_detach(ar); 2866 + 2867 + ar->id.bmi_ids_valid = false; 2944 2868 } 2945 2869 EXPORT_SYMBOL(ath10k_core_stop); 2946 2870
+3
drivers/net/wireless/ath/ath10k/core.h
··· 1222 1222 struct ath10k_bus_params bus_param; 1223 1223 struct completion peer_delete_done; 1224 1224 1225 + bool coex_support; 1226 + int coex_gpio_pin; 1227 + 1225 1228 /* must be last */ 1226 1229 u8 drv_priv[0] __aligned(sizeof(void *)); 1227 1230 };
+7 -5
drivers/net/wireless/ath/ath10k/debug.c
··· 1978 1978 if (strtobool(buf, &val) != 0) 1979 1979 return -EINVAL; 1980 1980 1981 + if (!ar->coex_support) 1982 + return -EOPNOTSUPP; 1983 + 1981 1984 mutex_lock(&ar->conf_mutex); 1982 1985 1983 1986 if (ar->state != ATH10K_STATE_ON && ··· 2373 2370 goto exit; 2374 2371 } 2375 2372 2376 - if (!(test_bit(WMI_SERVICE_RESET_CHIP, ar->wmi.svc_map))) 2377 - ath10k_warn(ar, "wmi service for reset chip is not available\n"); 2378 - 2379 2373 ret = ath10k_wmi_pdev_set_param(ar, ar->wmi.pdev_param->pdev_reset, 2380 2374 WMI_RST_MODE_WARM_RESET); 2381 2375 ··· 2647 2647 ar->debug.debugfs_phy, ar, 2648 2648 &fops_tpc_stats_final); 2649 2649 2650 - debugfs_create_file("warm_hw_reset", 0600, ar->debug.debugfs_phy, ar, 2651 - &fops_warm_hw_reset); 2650 + if (test_bit(WMI_SERVICE_RESET_CHIP, ar->wmi.svc_map)) 2651 + debugfs_create_file("warm_hw_reset", 0600, 2652 + ar->debug.debugfs_phy, ar, 2653 + &fops_warm_hw_reset); 2652 2654 2653 2655 debugfs_create_file("ps_state_enable", 0600, ar->debug.debugfs_phy, ar, 2654 2656 &fops_ps_state_enable);
+2 -1
drivers/net/wireless/ath/ath10k/htt_rx.c
··· 2744 2744 continue; 2745 2745 } 2746 2746 2747 - tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0); 2747 + tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0) & 2748 + IEEE80211_QOS_CTL_TID_MASK; 2748 2749 tx_duration = __le32_to_cpu(ppdu_dur->tx_duration); 2749 2750 2750 2751 ieee80211_sta_register_airtime(peer->sta, tid, tx_duration, 0);
+1
drivers/net/wireless/ath/ath10k/hw.c
··· 1131 1131 1132 1132 const struct ath10k_hw_ops qca988x_ops = { 1133 1133 .set_coverage_class = ath10k_hw_qca988x_set_coverage_class, 1134 + .is_rssi_enable = ath10k_htt_tx_rssi_enable, 1134 1135 }; 1135 1136 1136 1137 static int ath10k_qca99x0_rx_desc_get_l3_pad_bytes(struct htt_rx_desc *rxd)
+3
drivers/net/wireless/ath/ath10k/hw.h
··· 774 774 #define TARGET_HL_TLV_AST_SKID_LIMIT 16 775 775 #define TARGET_HL_TLV_NUM_WDS_ENTRIES 2 776 776 777 + /* Target specific defines for QCA9377 high latency firmware */ 778 + #define TARGET_QCA9377_HL_NUM_PEERS 15 779 + 777 780 /* Diagnostic Window */ 778 781 #define CE_DIAG_PIPE 7 779 782
+2 -1
drivers/net/wireless/ath/ath10k/mac.c
··· 4982 4982 param = ar->wmi.pdev_param->enable_btcoex; 4983 4983 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 4984 4984 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 4985 - ar->running_fw->fw_file.fw_features)) { 4985 + ar->running_fw->fw_file.fw_features) && 4986 + ar->coex_support) { 4986 4987 ret = ath10k_wmi_pdev_set_param(ar, param, 0); 4987 4988 if (ret) { 4988 4989 ath10k_warn(ar,
+19 -6
drivers/net/wireless/ath/ath10k/sdio.c
··· 694 694 htc_hdr = (struct ath10k_htc_hdr *)(ar_sdio->vsg_buffer + pkt_offset); 695 695 pkt->act_len = le16_to_cpu(htc_hdr->len) + sizeof(*htc_hdr); 696 696 697 - if (pkt->act_len > pkt->alloc_len ) { 697 + if (pkt->act_len > pkt->alloc_len) { 698 698 ret = -EINVAL; 699 699 goto err; 700 700 } ··· 953 953 */ 954 954 ret = ath10k_sdio_read(ar, MBOX_HOST_INT_STATUS_ADDRESS, 955 955 irq_proc_reg, sizeof(*irq_proc_reg)); 956 - if (ret) 956 + if (ret) { 957 + queue_work(ar->workqueue, &ar->restart_work); 958 + ath10k_warn(ar, "read int status fail, start recovery\n"); 957 959 goto out; 960 + } 958 961 959 962 /* Update only those registers that are enabled */ 960 963 *host_int_status = irq_proc_reg->host_int_status & ··· 1650 1647 size_t buf_len) 1651 1648 { 1652 1649 int ret; 1650 + void *mem; 1651 + 1652 + mem = kzalloc(buf_len, GFP_KERNEL); 1653 + if (!mem) 1654 + return -ENOMEM; 1653 1655 1654 1656 /* set window register to start read cycle */ 1655 1657 ret = ath10k_sdio_write32(ar, MBOX_WINDOW_READ_ADDR_ADDRESS, address); 1656 1658 if (ret) { 1657 1659 ath10k_warn(ar, "failed to set mbox window read address: %d", ret); 1658 - return ret; 1660 + goto out; 1659 1661 } 1660 1662 1661 1663 /* read the data */ 1662 - ret = ath10k_sdio_read(ar, MBOX_WINDOW_DATA_ADDRESS, buf, buf_len); 1664 + ret = ath10k_sdio_read(ar, MBOX_WINDOW_DATA_ADDRESS, mem, buf_len); 1663 1665 if (ret) { 1664 1666 ath10k_warn(ar, "failed to read from mbox window data address: %d\n", 1665 1667 ret); 1666 - return ret; 1668 + goto out; 1667 1669 } 1668 1670 1669 - return 0; 1671 + memcpy(buf, mem, buf_len); 1672 + 1673 + out: 1674 + kfree(mem); 1675 + 1676 + return ret; 1670 1677 } 1671 1678 1672 1679 static int ath10k_sdio_hif_diag_read32(struct ath10k *ar, u32 address,
+1 -1
drivers/net/wireless/ath/ath10k/wmi.c
··· 8787 8787 cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data; 8788 8788 cmd->host_platform_config = __cpu_to_le32(type); 8789 8789 cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap); 8790 - cmd->wlan_gpio_priority = __cpu_to_le32(-1); 8790 + cmd->wlan_gpio_priority = __cpu_to_le32(ar->coex_gpio_pin); 8791 8791 cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT); 8792 8792 cmd->coex_gpio_pin1 = __cpu_to_le32(-1); 8793 8793 cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
+7
drivers/net/wireless/ath/ath10k/wmi.h
··· 371 371 WMI_10_4_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT, 372 372 WMI_10_4_SERVICE_REPORT_AIRTIME, 373 373 WMI_10_4_SERVICE_TX_PWR_PER_PEER, 374 + WMI_10_4_SERVICE_FETCH_PEER_TX_PN, 375 + WMI_10_4_SERVICE_MULTIPLE_VDEV_RESTART, 376 + WMI_10_4_SERVICE_ENHANCED_RADIO_COUNTERS, 377 + WMI_10_4_SERVICE_QINQ_SUPPORT, 378 + WMI_10_4_SERVICE_RESET_CHIP, 374 379 }; 375 380 376 381 static inline char *wmi_service_name(enum wmi_service service_id) ··· 832 827 WMI_SERVICE_REPORT_AIRTIME, len); 833 828 SVCMAP(WMI_10_4_SERVICE_TX_PWR_PER_PEER, 834 829 WMI_SERVICE_TX_PWR_PER_PEER, len); 830 + SVCMAP(WMI_10_4_SERVICE_RESET_CHIP, 831 + WMI_SERVICE_RESET_CHIP, len); 835 832 } 836 833 837 834 #undef SVCMAP
+1
drivers/net/wireless/ath/ath11k/Makefile
··· 20 20 ath11k-$(CONFIG_ATH11K_DEBUGFS) += debug_htt_stats.o debugfs_sta.o 21 21 ath11k-$(CONFIG_NL80211_TESTMODE) += testmode.o 22 22 ath11k-$(CONFIG_ATH11K_TRACING) += trace.o 23 + ath11k-$(CONFIG_THERMAL) += thermal.o 23 24 24 25 # for tracing framework to find trace.h 25 26 CFLAGS_trace.o := -I$(src)
+13 -1
drivers/net/wireless/ath/ath11k/core.c
··· 392 392 goto err_mac_unregister; 393 393 } 394 394 395 + ret = ath11k_thermal_register(ab); 396 + if (ret) { 397 + ath11k_err(ab, "could not register thermal device: %d\n", 398 + ret); 399 + goto err_dp_pdev_free; 400 + } 401 + 395 402 return 0; 396 403 404 + err_dp_pdev_free: 405 + ath11k_dp_pdev_free(ab); 397 406 err_mac_unregister: 398 407 ath11k_mac_unregister(ab); 399 - 400 408 err_pdev_debug: 401 409 ath11k_debug_pdev_destroy(ab); 402 410 ··· 413 405 414 406 static void ath11k_core_pdev_destroy(struct ath11k_base *ab) 415 407 { 408 + ath11k_thermal_unregister(ab); 416 409 ath11k_mac_unregister(ab); 417 410 ath11k_ahb_ext_irq_disable(ab); 418 411 ath11k_dp_pdev_free(ab); ··· 578 569 int ret; 579 570 580 571 mutex_lock(&ab->core_lock); 572 + ath11k_thermal_unregister(ab); 581 573 ath11k_ahb_ext_irq_disable(ab); 582 574 ath11k_dp_pdev_free(ab); 583 575 ath11k_ahb_stop(ab); ··· 617 607 lockdep_assert_held(&ar->conf_mutex); 618 608 619 609 ar->num_created_vdevs = 0; 610 + ar->allocated_vdev_map = 0; 620 611 621 612 ath11k_mac_scan_finish(ar); 622 613 ath11k_mac_peer_cleanup_all(ar); ··· 655 644 complete(&ar->install_key_done); 656 645 complete(&ar->vdev_setup_done); 657 646 complete(&ar->bss_survey_done); 647 + complete(&ar->thermal.wmi_sync); 658 648 659 649 wake_up(&ar->dp.tx_empty_waitq); 660 650 idr_for_each(&ar->txmgmt_idr,
+5 -1
drivers/net/wireless/ath/ath11k/core.h
··· 20 20 #include "hw.h" 21 21 #include "hal_rx.h" 22 22 #include "reg.h" 23 + #include "thermal.h" 23 24 24 25 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 25 26 ··· 244 243 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 245 244 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 246 245 u64 rx_duration; 246 + u64 dcm_count; 247 + u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 247 248 }; 248 249 249 250 #define ATH11K_HE_MCS_NUM 12 ··· 334 331 u32 smps; 335 332 336 333 struct work_struct update_wk; 337 - struct ieee80211_tx_info tx_info; 338 334 struct rate_info txrate; 339 335 struct rate_info last_txrate; 340 336 u64 rx_duration; ··· 488 486 int max_num_peers; 489 487 u32 num_started_vdevs; 490 488 u32 num_created_vdevs; 489 + unsigned long long allocated_vdev_map; 491 490 492 491 struct idr txmgmt_idr; 493 492 /* protects txmgmt_idr data */ ··· 527 524 struct ath11k_debug debug; 528 525 #endif 529 526 bool dfs_block_radar_events; 527 + struct ath11k_thermal thermal; 530 528 }; 531 529 532 530 struct ath11k_band_cap {
+10 -3
drivers/net/wireless/ath/ath11k/debug.h
··· 68 68 u8 buf[0]; 69 69 }; 70 70 71 + struct ath_pktlog_hdr { 72 + u16 flags; 73 + u16 missed_cnt; 74 + u16 log_type; 75 + u16 size; 76 + u32 timestamp; 77 + u32 type_specific_data; 78 + u8 payload[0]; 79 + }; 80 + 71 81 #define ATH11K_HTT_STATS_BUF_SIZE (1024 * 512) 72 - 73 82 #define ATH11K_FW_STATS_BUF_SIZE (1024 * 1024) 74 - 75 - #define ATH11K_HTT_PKTLOG_MAX_SIZE 2048 76 83 77 84 enum ath11k_pktlog_filter { 78 85 ATH11K_PKTLOG_RX = 0x000000001,
+6 -6
drivers/net/wireless/ath/ath11k/debug_htt_stats.c
··· 22 22 do { \ 23 23 int index = 0; u8 i; \ 24 24 for (i = 0; i < len; i++) { \ 25 - index += snprintf(out + index, HTT_MAX_STRING_LEN - index, \ 25 + index += scnprintf(out + index, HTT_MAX_STRING_LEN - index, \ 26 26 " %u:%u,", i, arr[i]); \ 27 27 if (index < 0 || index >= HTT_MAX_STRING_LEN) \ 28 28 break; \ ··· 46 46 len += HTT_DBG_OUT(buf + len, buf_len - len, "HTT_STATS_STRING_TLV:"); 47 47 48 48 for (i = 0; i < tag_len; i++) { 49 - index += snprintf(&data[index], 49 + index += scnprintf(&data[index], 50 50 HTT_MAX_STRING_LEN - index, 51 51 "%.*s", 4, (char *)&(htt_stats_buf->data[i])); 52 52 if (index >= HTT_MAX_STRING_LEN) ··· 3097 3097 index = 0; 3098 3098 3099 3099 for (i = 0; i < HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS; i++) 3100 - index += snprintf(&rx_pilot_evm_db[j][index], 3100 + index += scnprintf(&rx_pilot_evm_db[j][index], 3101 3101 HTT_MAX_STRING_LEN - index, 3102 3102 " %u:%d,", 3103 3103 i, ··· 3109 3109 index = 0; 3110 3110 memset(str_buf, 0x0, HTT_MAX_STRING_LEN); 3111 3111 for (i = 0; i < HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS; i++) 3112 - index += snprintf(&str_buf[index], 3112 + index += scnprintf(&str_buf[index], 3113 3113 HTT_MAX_STRING_LEN - index, 3114 3114 " %u:%d,", i, htt_stats_buf->rx_pilot_evm_db_mean[i]); 3115 3115 len += HTT_DBG_OUT(buf + len, buf_len - len, "pilot_evm_dB_mean = %s ", str_buf); ··· 3217 3217 index = 0; 3218 3218 memset(str_buf, 0x0, HTT_MAX_STRING_LEN); 3219 3219 for (i = 0; i < HTT_RX_PDEV_MAX_OFDMA_NUM_USER; i++) 3220 - index += snprintf(&str_buf[index], 3220 + index += scnprintf(&str_buf[index], 3221 3221 HTT_MAX_STRING_LEN - index, 3222 3222 " %u:%d,", 3223 3223 i, htt_stats_buf->rx_ul_fd_rssi[j][i]); ··· 3232 3232 index = 0; 3233 3233 memset(str_buf, 0x0, HTT_MAX_STRING_LEN); 3234 3234 for (i = 0; i < HTT_RX_PDEV_STATS_NUM_BW_COUNTERS; i++) 3235 - index += snprintf(&str_buf[index], 3235 + index += scnprintf(&str_buf[index], 3236 3236 HTT_MAX_STRING_LEN - index, 3237 3237 " %u:%d,", 3238 3238 i,
+9 -2
drivers/net/wireless/ath/ath11k/debugfs_sta.c
··· 24 24 tx_stats = arsta->tx_stats; 25 25 gi = FIELD_GET(RATE_INFO_FLAGS_SHORT_GI, arsta->txrate.flags); 26 26 mcs = txrate->mcs; 27 - bw = txrate->bw; 27 + bw = ath11k_mac_mac80211_bw_to_ath11k_bw(txrate->bw); 28 28 nss = txrate->nss - 1; 29 29 30 30 #define STATS_OP_FMT(name) tx_stats->stats[ATH11K_STATS_TYPE_##name] ··· 136 136 struct ath11k_sta *arsta; 137 137 struct ieee80211_sta *sta; 138 138 u16 rate; 139 - u8 rate_idx; 139 + u8 rate_idx = 0; 140 140 int ret; 141 141 u8 mcs; 142 142 ··· 379 379 len += scnprintf(buf + len, size - len, "%llu ", rx_stats->nss_count[i]); 380 380 len += scnprintf(buf + len, size - len, "\nRX Duration:%llu ", 381 381 rx_stats->rx_duration); 382 + len += scnprintf(buf + len, size - len, 383 + "\nDCM: %llu\nRU: 26 %llu 52: %llu 106: %llu 242: %llu 484: %llu 996: %llu\n", 384 + rx_stats->dcm_count, rx_stats->ru_alloc_cnt[0], 385 + rx_stats->ru_alloc_cnt[1], rx_stats->ru_alloc_cnt[2], 386 + rx_stats->ru_alloc_cnt[3], rx_stats->ru_alloc_cnt[4], 387 + rx_stats->ru_alloc_cnt[5]); 388 + 382 389 len += scnprintf(buf + len, size - len, "\n"); 383 390 384 391 spin_unlock_bh(&ar->ab->base_lock);
+27 -14
drivers/net/wireless/ath/ath11k/dp.c
··· 39 39 int ath11k_dp_peer_setup(struct ath11k *ar, int vdev_id, const u8 *addr) 40 40 { 41 41 struct ath11k_base *ab = ar->ab; 42 + struct ath11k_peer *peer; 42 43 u32 reo_dest; 43 - int ret; 44 + int ret = 0, tid; 44 45 45 46 /* NOTE: reo_dest ring id starts from 1 unlike mac_id which starts from 0 */ 46 47 reo_dest = ar->dp.mac_id + 1; ··· 55 54 return ret; 56 55 } 57 56 58 - ret = ath11k_peer_rx_tid_setup(ar, addr, vdev_id, 59 - HAL_DESC_REO_NON_QOS_TID, 1, 0); 60 - if (ret) { 61 - ath11k_warn(ab, "failed to setup rxd tid queue for non-qos tid %d\n", 62 - ret); 63 - return ret; 64 - } 65 - 66 - ret = ath11k_peer_rx_tid_setup(ar, addr, vdev_id, 0, 1, 0); 67 - if (ret) { 68 - ath11k_warn(ab, "failed to setup rxd tid queue for tid 0 %d\n", 69 - ret); 70 - return ret; 57 + for (tid = 0; tid <= IEEE80211_NUM_TIDS; tid++) { 58 + ret = ath11k_peer_rx_tid_setup(ar, addr, vdev_id, 59 + tid, 1, 0); 60 + if (ret) { 61 + ath11k_warn(ab, "failed to setup rxd tid queue for tid %d: %d\n", 62 + tid, ret); 63 + goto peer_clean; 64 + } 71 65 } 72 66 73 67 /* TODO: Setup other peer specific resource used in data path */ 74 68 75 69 return 0; 70 + 71 + peer_clean: 72 + spin_lock_bh(&ab->base_lock); 73 + 74 + peer = ath11k_peer_find(ab, vdev_id, addr); 75 + if (!peer) { 76 + ath11k_warn(ab, "failed to find the peer to del rx tid\n"); 77 + spin_unlock_bh(&ab->base_lock); 78 + return -ENOENT; 79 + } 80 + 81 + for (; tid >= 0; tid--) 82 + ath11k_peer_rx_tid_delete(ar, peer, tid); 83 + 84 + spin_unlock_bh(&ab->base_lock); 85 + 86 + return ret; 76 87 } 77 88 78 89 void ath11k_dp_srng_cleanup(struct ath11k_base *ab, struct dp_srng *ring)
+10 -1
drivers/net/wireless/ath/ath11k/dp.h
··· 168 168 #define DP_RX_RELEASE_RING_SIZE 1024 169 169 #define DP_REO_EXCEPTION_RING_SIZE 128 170 170 #define DP_REO_CMD_RING_SIZE 128 171 - #define DP_REO_STATUS_RING_SIZE 256 171 + #define DP_REO_STATUS_RING_SIZE 2048 172 172 #define DP_RXDMA_BUF_RING_SIZE 4096 173 173 #define DP_RXDMA_REFILL_RING_SIZE 2048 174 174 #define DP_RXDMA_ERR_DST_RING_SIZE 1024 ··· 1066 1066 u16 bw_mhz; 1067 1067 } __packed; 1068 1068 1069 + enum htt_ppdu_stats_gi { 1070 + HTT_PPDU_STATS_SGI_0_8_US, 1071 + HTT_PPDU_STATS_SGI_0_4_US, 1072 + HTT_PPDU_STATS_SGI_1_6_US, 1073 + HTT_PPDU_STATS_SGI_3_2_US, 1074 + }; 1075 + 1069 1076 #define HTT_PPDU_STATS_USER_RATE_INFO0_USER_POS_M GENMASK(3, 0) 1070 1077 #define HTT_PPDU_STATS_USER_RATE_INFO0_MU_GROUP_ID_M GENMASK(11, 4) 1071 1078 ··· 1101 1094 FIELD_GET(HTT_PPDU_STATS_USER_RATE_FLAGS_MCS_M, _val) 1102 1095 #define HTT_USR_RATE_GI(_val) \ 1103 1096 FIELD_GET(HTT_PPDU_STATS_USER_RATE_FLAGS_GI_M, _val) 1097 + #define HTT_USR_RATE_DCM(_val) \ 1098 + FIELD_GET(HTT_PPDU_STATS_USER_RATE_FLAGS_DCM_M, _val) 1104 1099 1105 1100 #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_LTF_SIZE_M GENMASK(1, 0) 1106 1101 #define HTT_PPDU_STATS_USER_RATE_RESP_FLAGS_STBC_M BIT(2)
+42 -55
drivers/net/wireless/ath/ath11k/dp_rx.c
··· 633 633 kfree(rx_tid->vaddr); 634 634 } 635 635 636 - static void ath11k_peer_rx_tid_delete(struct ath11k *ar, 637 - struct ath11k_peer *peer, u8 tid) 636 + void ath11k_peer_rx_tid_delete(struct ath11k *ar, 637 + struct ath11k_peer *peer, u8 tid) 638 638 { 639 639 struct ath11k_hal_reo_cmd cmd = {0}; 640 640 struct dp_rx_tid *rx_tid = &peer->rx_tid[tid]; ··· 1028 1028 return 0; 1029 1029 } 1030 1030 1031 - static u32 ath11k_bw_to_mac80211_bwflags(u8 bw) 1031 + static inline u32 ath11k_he_gi_to_nl80211_he_gi(u8 sgi) 1032 1032 { 1033 - u32 bwflags = 0; 1033 + u32 ret = 0; 1034 1034 1035 - switch (bw) { 1036 - case ATH11K_BW_40: 1037 - bwflags = IEEE80211_TX_RC_40_MHZ_WIDTH; 1035 + switch (sgi) { 1036 + case RX_MSDU_START_SGI_0_8_US: 1037 + ret = NL80211_RATE_INFO_HE_GI_0_8; 1038 1038 break; 1039 - case ATH11K_BW_80: 1040 - bwflags = IEEE80211_TX_RC_80_MHZ_WIDTH; 1039 + case RX_MSDU_START_SGI_1_6_US: 1040 + ret = NL80211_RATE_INFO_HE_GI_1_6; 1041 1041 break; 1042 - case ATH11K_BW_160: 1043 - bwflags = IEEE80211_TX_RC_160_MHZ_WIDTH; 1042 + case RX_MSDU_START_SGI_3_2_US: 1043 + ret = NL80211_RATE_INFO_HE_GI_3_2; 1044 1044 break; 1045 1045 } 1046 1046 1047 - return bwflags; 1047 + return ret; 1048 1048 } 1049 1049 1050 1050 static void ··· 1056 1056 struct ieee80211_sta *sta; 1057 1057 struct ath11k_sta *arsta; 1058 1058 struct htt_ppdu_stats_user_rate *user_rate; 1059 - struct ieee80211_chanctx_conf *conf = NULL; 1060 1059 struct ath11k_per_peer_tx_stats *peer_stats = &ar->peer_tx_stats; 1061 1060 struct htt_ppdu_user_stats *usr_stats = &ppdu_stats->user_stats[user]; 1062 1061 struct htt_ppdu_stats_common *common = &ppdu_stats->common; 1063 1062 int ret; 1064 - u8 flags, mcs, nss, bw, sgi, rate_idx = 0; 1063 + u8 flags, mcs, nss, bw, sgi, dcm, rate_idx = 0; 1065 1064 u32 succ_bytes = 0; 1066 1065 u16 rate = 0, succ_pkts = 0; 1067 1066 u32 tx_duration = 0; ··· 1095 1096 nss = HTT_USR_RATE_NSS(user_rate->rate_flags) + 1; 1096 1097 mcs = HTT_USR_RATE_MCS(user_rate->rate_flags); 1097 1098 sgi = HTT_USR_RATE_GI(user_rate->rate_flags); 1099 + dcm = HTT_USR_RATE_DCM(user_rate->rate_flags); 1098 1100 1099 1101 /* Note: If host configured fixed rates and in some other special 1100 1102 * cases, the broadcast/management frames are sent in different rates. 1101 1103 * Firmware rate's control to be skipped for this? 1102 1104 */ 1103 1105 1104 - if (flags == WMI_RATE_PREAMBLE_VHT && mcs > 9) { 1106 + if (flags == WMI_RATE_PREAMBLE_HE && mcs > 11) { 1107 + ath11k_warn(ab, "Invalid HE mcs %hhd peer stats", mcs); 1108 + return; 1109 + } 1110 + 1111 + if (flags == WMI_RATE_PREAMBLE_HE && mcs > ATH11K_HE_MCS_MAX) { 1112 + ath11k_warn(ab, "Invalid HE mcs %hhd peer stats", mcs); 1113 + return; 1114 + } 1115 + 1116 + if (flags == WMI_RATE_PREAMBLE_VHT && mcs > ATH11K_VHT_MCS_MAX) { 1105 1117 ath11k_warn(ab, "Invalid VHT mcs %hhd peer stats", mcs); 1106 1118 return; 1107 1119 } 1108 1120 1109 - if (flags == WMI_RATE_PREAMBLE_HT && (mcs > 7 || nss < 1)) { 1121 + if (flags == WMI_RATE_PREAMBLE_HT && (mcs > ATH11K_HT_MCS_MAX || nss < 1)) { 1110 1122 ath11k_warn(ab, "Invalid HT mcs %hhd nss %hhd peer stats", 1111 1123 mcs, nss); 1112 1124 return; ··· 1146 1136 arsta = (struct ath11k_sta *)sta->drv_priv; 1147 1137 1148 1138 memset(&arsta->txrate, 0, sizeof(arsta->txrate)); 1149 - memset(&arsta->tx_info.status, 0, sizeof(arsta->tx_info.status)); 1150 1139 1151 1140 switch (flags) { 1152 1141 case WMI_RATE_PREAMBLE_OFDM: 1153 1142 arsta->txrate.legacy = rate; 1154 - if (arsta->arvif && arsta->arvif->vif) 1155 - conf = rcu_dereference(arsta->arvif->vif->chanctx_conf); 1156 - if (conf && conf->def.chan->band == NL80211_BAND_5GHZ) 1157 - arsta->tx_info.status.rates[0].idx = rate_idx - 4; 1158 1143 break; 1159 1144 case WMI_RATE_PREAMBLE_CCK: 1160 1145 arsta->txrate.legacy = rate; 1161 - arsta->tx_info.status.rates[0].idx = rate_idx; 1162 - if (mcs > ATH11K_HW_RATE_CCK_LP_1M && 1163 - mcs <= ATH11K_HW_RATE_CCK_SP_2M) 1164 - arsta->tx_info.status.rates[0].flags |= 1165 - IEEE80211_TX_RC_USE_SHORT_PREAMBLE; 1166 1146 break; 1167 1147 case WMI_RATE_PREAMBLE_HT: 1168 1148 arsta->txrate.mcs = mcs + 8 * (nss - 1); 1169 - arsta->tx_info.status.rates[0].idx = arsta->txrate.mcs; 1170 1149 arsta->txrate.flags = RATE_INFO_FLAGS_MCS; 1171 - arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_MCS; 1172 - if (sgi) { 1150 + if (sgi) 1173 1151 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 1174 - arsta->tx_info.status.rates[0].flags |= 1175 - IEEE80211_TX_RC_SHORT_GI; 1176 - } 1177 1152 break; 1178 1153 case WMI_RATE_PREAMBLE_VHT: 1179 1154 arsta->txrate.mcs = mcs; 1180 - ieee80211_rate_set_vht(&arsta->tx_info.status.rates[0], mcs, nss); 1181 1155 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS; 1182 - arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_VHT_MCS; 1183 - if (sgi) { 1156 + if (sgi) 1184 1157 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 1185 - arsta->tx_info.status.rates[0].flags |= 1186 - IEEE80211_TX_RC_SHORT_GI; 1187 - } 1158 + break; 1159 + case WMI_RATE_PREAMBLE_HE: 1160 + arsta->txrate.mcs = mcs; 1161 + arsta->txrate.flags = RATE_INFO_FLAGS_HE_MCS; 1162 + arsta->txrate.he_dcm = dcm; 1163 + arsta->txrate.he_gi = ath11k_he_gi_to_nl80211_he_gi(sgi); 1164 + arsta->txrate.he_ru_alloc = ath11k_he_ru_tones_to_nl80211_he_ru_alloc( 1165 + (user_rate->ru_end - 1166 + user_rate->ru_start) + 1); 1188 1167 break; 1189 1168 } 1190 1169 1191 1170 arsta->txrate.nss = nss; 1192 1171 arsta->txrate.bw = ath11k_mac_bw_to_mac80211_bw(bw); 1193 - arsta->tx_info.status.rates[0].flags |= ath11k_bw_to_mac80211_bwflags(bw); 1194 1172 arsta->tx_duration += tx_duration; 1195 1173 memcpy(&arsta->last_txrate, &arsta->txrate, sizeof(struct rate_info)); 1196 - 1197 - if (succ_pkts) { 1198 - arsta->tx_info.flags = IEEE80211_TX_STAT_ACK; 1199 - arsta->tx_info.status.rates[0].count = 1; 1200 - ieee80211_tx_rate_update(ar->hw, sta, &arsta->tx_info); 1201 - } 1202 1174 1203 1175 /* PPDU stats reported for mgmt packet doesn't have valid tx bytes. 1204 1176 * So skip peer stats update for mgmt packets. ··· 1300 1308 static void ath11k_htt_pktlog(struct ath11k_base *ab, struct sk_buff *skb) 1301 1309 { 1302 1310 struct htt_pktlog_msg *data = (struct htt_pktlog_msg *)skb->data; 1311 + struct ath_pktlog_hdr *hdr = (struct ath_pktlog_hdr *)data; 1303 1312 struct ath11k *ar; 1304 - u32 len; 1305 1313 u8 pdev_id; 1306 - 1307 - len = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PAYLOAD_SIZE, data->hdr); 1308 - if (len > ATH11K_HTT_PKTLOG_MAX_SIZE) { 1309 - ath11k_warn(ab, "htt pktlog buffer size %d, expected < %d\n", 1310 - len, 1311 - ATH11K_HTT_PKTLOG_MAX_SIZE); 1312 - return; 1313 - } 1314 1314 1315 1315 pdev_id = FIELD_GET(HTT_T2H_PPDU_STATS_INFO_PDEV_ID, data->hdr); 1316 1316 ar = ath11k_mac_get_ar_by_pdev_id(ab, pdev_id); ··· 1311 1327 return; 1312 1328 } 1313 1329 1314 - trace_ath11k_htt_pktlog(ar, data->payload, len); 1330 + trace_ath11k_htt_pktlog(ar, data->payload, hdr->size); 1315 1331 } 1316 1332 1317 1333 void ath11k_dp_htt_htc_t2h_msg_handler(struct ath11k_base *ab, ··· 1972 1988 } 1973 1989 rx_status->encoding = RX_ENC_HE; 1974 1990 rx_status->nss = nss; 1991 + rx_status->he_gi = ath11k_he_gi_to_nl80211_he_gi(sgi); 1975 1992 rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw); 1976 1993 break; 1977 1994 } ··· 2396 2411 2397 2412 rx_stats->num_mpdu_fcs_ok += ppdu_info->num_mpdu_fcs_ok; 2398 2413 rx_stats->num_mpdu_fcs_err += ppdu_info->num_mpdu_fcs_err; 2414 + rx_stats->dcm_count += ppdu_info->dcm; 2415 + rx_stats->ru_alloc_cnt[ppdu_info->ru_alloc] += num_msdu; 2399 2416 2400 2417 arsta->rssi_comb = ppdu_info->rssi_comb; 2401 2418 rx_stats->rx_duration += ppdu_info->rx_duration;
+2
drivers/net/wireless/ath/ath11k/dp_rx.h
··· 44 44 int ath11k_dp_rx_ampdu_stop(struct ath11k *ar, 45 45 struct ieee80211_ampdu_params *params); 46 46 void ath11k_peer_rx_tid_cleanup(struct ath11k *ar, struct ath11k_peer *peer); 47 + void ath11k_peer_rx_tid_delete(struct ath11k *ar, 48 + struct ath11k_peer *peer, u8 tid); 47 49 int ath11k_peer_rx_tid_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id, 48 50 u8 tid, u32 ba_win_sz, u16 ssn); 49 51 void ath11k_dp_htt_htc_t2h_msg_handler(struct ath11k_base *ab,
+1
drivers/net/wireless/ath/ath11k/dp_tx.c
··· 7 7 #include "dp_tx.h" 8 8 #include "debug.h" 9 9 #include "hw.h" 10 + #include "peer.h" 10 11 11 12 /* NOTE: Any of the mapped ring id value must not exceed DP_TCL_NUM_RING_MAX */ 12 13 static const u8
+10 -3
drivers/net/wireless/ath/ath11k/hal_rx.c
··· 1001 1001 } 1002 1002 1003 1003 ppdu_info->nss = nsts + 1; 1004 + ppdu_info->dcm = dcm; 1004 1005 ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU; 1005 1006 break; 1006 1007 } ··· 1039 1038 break; 1040 1039 } 1041 1040 case HAL_PHYRX_HE_SIG_B1_MU: { 1042 - /* TODO: Check if resource unit(RU) allocation stats 1043 - * are required 1044 - */ 1041 + struct hal_rx_he_sig_b1_mu_info *he_sig_b1_mu = 1042 + (struct hal_rx_he_sig_b1_mu_info *)tlv_data; 1043 + u16 ru_tones; 1044 + 1045 + info0 = __le32_to_cpu(he_sig_b1_mu->info0); 1046 + 1047 + ru_tones = FIELD_GET(HAL_RX_HE_SIG_B1_MU_INFO_INFO0_RU_ALLOCATION, 1048 + info0); 1049 + ppdu_info->ru_alloc = ath11k_he_ru_tones_to_nl80211_he_ru_alloc(ru_tones); 1045 1050 ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_MIMO; 1046 1051 break; 1047 1052 }
+30
drivers/net/wireless/ath/ath11k/hal_rx.h
··· 99 99 u8 beamformed; 100 100 u8 rssi_comb; 101 101 u8 tid; 102 + u8 dcm; 103 + u8 ru_alloc; 102 104 u8 reception_type; 103 105 u64 rx_duration; 104 106 }; ··· 327 325 ath11k_hal_rx_parse_mon_status(struct ath11k_base *ab, 328 326 struct hal_rx_mon_ppdu_info *ppdu_info, 329 327 struct sk_buff *skb); 328 + 329 + static inline u32 ath11k_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones) 330 + { 331 + u32 ret = 0; 332 + 333 + switch (ru_tones) { 334 + case RU_26: 335 + ret = NL80211_RATE_INFO_HE_RU_ALLOC_26; 336 + break; 337 + case RU_52: 338 + ret = NL80211_RATE_INFO_HE_RU_ALLOC_52; 339 + break; 340 + case RU_106: 341 + ret = NL80211_RATE_INFO_HE_RU_ALLOC_106; 342 + break; 343 + case RU_242: 344 + ret = NL80211_RATE_INFO_HE_RU_ALLOC_242; 345 + break; 346 + case RU_484: 347 + ret = NL80211_RATE_INFO_HE_RU_ALLOC_484; 348 + break; 349 + case RU_996: 350 + ret = NL80211_RATE_INFO_HE_RU_ALLOC_996; 351 + break; 352 + } 353 + return ret; 354 + } 355 + 330 356 #define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_0 0xDDBEEF 331 357 #define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_1 0xADBEEF 332 358 #define REO_QUEUE_DESC_MAGIC_DEBUG_PATTERN_2 0xBDBEEF
+41 -7
drivers/net/wireless/ath/ath11k/mac.c
··· 178 178 return ret; 179 179 } 180 180 181 + enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw) 182 + { 183 + switch (bw) { 184 + case RATE_INFO_BW_20: 185 + return ATH11K_BW_20; 186 + case RATE_INFO_BW_40: 187 + return ATH11K_BW_40; 188 + case RATE_INFO_BW_80: 189 + return ATH11K_BW_80; 190 + case RATE_INFO_BW_160: 191 + return ATH11K_BW_160; 192 + default: 193 + return ATH11K_BW_20; 194 + } 195 + } 196 + 181 197 int ath11k_mac_hw_ratecode_to_legacy_rate(u8 hw_rc, u8 preamble, u8 *rateidx, 182 198 u16 *rate) 183 199 { ··· 385 369 flags, 386 370 ath11k_get_arvif_iter, 387 371 &arvif_iter); 388 - if (!arvif_iter.arvif) 372 + if (!arvif_iter.arvif) { 373 + ath11k_warn(ar->ab, "No VIF found for vdev %d\n", vdev_id); 389 374 return NULL; 375 + } 390 376 391 377 return arvif_iter.arvif; 392 378 } ··· 416 398 { 417 399 int i; 418 400 struct ath11k_pdev *pdev; 419 - struct ath11k_vif *arvif; 420 401 421 402 for (i = 0; i < ab->num_radios; i++) { 422 403 pdev = rcu_dereference(ab->pdevs_active[i]); 423 404 if (pdev && pdev->ar) { 424 - arvif = ath11k_mac_get_arvif(pdev->ar, vdev_id); 425 - if (arvif) 426 - return arvif->ar; 405 + if (pdev->ar->allocated_vdev_map & (1LL << vdev_id)) 406 + return pdev->ar; 427 407 } 428 408 } 429 409 ··· 2802 2786 struct ath11k *ar = hw->priv; 2803 2787 struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif); 2804 2788 struct ath11k_sta *arsta = (struct ath11k_sta *)sta->drv_priv; 2789 + struct ath11k_peer *peer; 2805 2790 int ret = 0; 2806 2791 2807 2792 /* cancel must be done outside the mutex to avoid deadlock */ ··· 2835 2818 sta->addr, arvif->vdev_id); 2836 2819 2837 2820 ath11k_mac_dec_num_stations(arvif, sta); 2821 + spin_lock_bh(&ar->ab->base_lock); 2822 + peer = ath11k_peer_find(ar->ab, arvif->vdev_id, sta->addr); 2823 + if (peer && peer->sta == sta) { 2824 + ath11k_warn(ar->ab, "Found peer entry %pM n vdev %i after it was supposedly removed\n", 2825 + vif->addr, arvif->vdev_id); 2826 + peer->sta = NULL; 2827 + list_del(&peer->list); 2828 + kfree(peer); 2829 + ar->num_peers--; 2830 + } 2831 + spin_unlock_bh(&ar->ab->base_lock); 2838 2832 2839 2833 kfree(arsta->tx_stats); 2840 2834 arsta->tx_stats = NULL; ··· 3902 3874 ar->num_started_vdevs = 0; 3903 3875 ar->num_created_vdevs = 0; 3904 3876 ar->num_peers = 0; 3877 + ar->allocated_vdev_map = 0; 3905 3878 3906 3879 /* Configure monitor status ring with default rx_filter to get rx status 3907 3880 * such as rssi, rx_duration. ··· 4141 4112 } 4142 4113 4143 4114 ar->num_created_vdevs++; 4144 - 4115 + ar->allocated_vdev_map |= 1LL << arvif->vdev_id; 4145 4116 ab->free_vdev_map &= ~(1LL << arvif->vdev_id); 4117 + 4146 4118 spin_lock_bh(&ar->data_lock); 4147 4119 list_add(&arvif->list, &ar->arvifs); 4148 4120 spin_unlock_bh(&ar->data_lock); ··· 4257 4227 err_vdev_del: 4258 4228 ath11k_wmi_vdev_delete(ar, arvif->vdev_id); 4259 4229 ar->num_created_vdevs--; 4230 + ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id); 4260 4231 ab->free_vdev_map |= 1LL << arvif->vdev_id; 4261 4232 spin_lock_bh(&ar->data_lock); 4262 4233 list_del(&arvif->list); ··· 4294 4263 ath11k_dbg(ab, ATH11K_DBG_MAC, "mac remove interface (vdev %d)\n", 4295 4264 arvif->vdev_id); 4296 4265 4297 - ab->free_vdev_map |= 1LL << (arvif->vdev_id); 4298 4266 spin_lock_bh(&ar->data_lock); 4299 4267 list_del(&arvif->list); 4300 4268 spin_unlock_bh(&ar->data_lock); ··· 4311 4281 arvif->vdev_id, ret); 4312 4282 4313 4283 ar->num_created_vdevs--; 4284 + ar->allocated_vdev_map &= ~(1LL << arvif->vdev_id); 4285 + ab->free_vdev_map |= 1LL << (arvif->vdev_id); 4314 4286 4315 4287 ath11k_peer_cleanup(ar, arvif->vdev_id); 4316 4288 ··· 5905 5873 init_completion(&ar->bss_survey_done); 5906 5874 init_completion(&ar->scan.started); 5907 5875 init_completion(&ar->scan.completed); 5876 + init_completion(&ar->thermal.wmi_sync); 5877 + 5908 5878 INIT_DELAYED_WORK(&ar->scan.timeout, ath11k_scan_timeout_work); 5909 5879 INIT_WORK(&ar->regd_update_work, ath11k_regd_update_work); 5910 5880
+1
drivers/net/wireless/ath/ath11k/mac.h
··· 144 144 void ath11k_mac_peer_cleanup_all(struct ath11k *ar); 145 145 int ath11k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx); 146 146 u8 ath11k_mac_bw_to_mac80211_bw(u8 bw); 147 + enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw); 147 148 #endif
+8
drivers/net/wireless/ath/ath11k/rx_desc.h
··· 1209 1209 u8 msdu_payload[0]; 1210 1210 } __packed; 1211 1211 1212 + #define HAL_RX_RU_ALLOC_TYPE_MAX 6 1213 + #define RU_26 1 1214 + #define RU_52 2 1215 + #define RU_106 4 1216 + #define RU_242 9 1217 + #define RU_484 18 1218 + #define RU_996 37 1219 + 1212 1220 #endif /* ATH11K_RX_DESC_H */
+224
drivers/net/wireless/ath/ath11k/thermal.c
··· 1 + // SPDX-License-Identifier: BSD-3-Clause-Clear 2 + /* 3 + * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4 + */ 5 + 6 + #include <linux/device.h> 7 + #include <linux/sysfs.h> 8 + #include <linux/thermal.h> 9 + #include <linux/hwmon.h> 10 + #include <linux/hwmon-sysfs.h> 11 + #include "core.h" 12 + #include "debug.h" 13 + 14 + static int 15 + ath11k_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev, 16 + unsigned long *state) 17 + { 18 + *state = ATH11K_THERMAL_THROTTLE_MAX; 19 + 20 + return 0; 21 + } 22 + 23 + static int 24 + ath11k_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev, 25 + unsigned long *state) 26 + { 27 + struct ath11k *ar = cdev->devdata; 28 + 29 + mutex_lock(&ar->conf_mutex); 30 + *state = ar->thermal.throttle_state; 31 + mutex_unlock(&ar->conf_mutex); 32 + 33 + return 0; 34 + } 35 + 36 + static int 37 + ath11k_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev, 38 + unsigned long throttle_state) 39 + { 40 + struct ath11k *ar = cdev->devdata; 41 + int ret; 42 + 43 + if (throttle_state > ATH11K_THERMAL_THROTTLE_MAX) { 44 + ath11k_warn(ar->ab, "throttle state %ld is exceeding the limit %d\n", 45 + throttle_state, ATH11K_THERMAL_THROTTLE_MAX); 46 + return -EINVAL; 47 + } 48 + mutex_lock(&ar->conf_mutex); 49 + ret = ath11k_thermal_set_throttling(ar, throttle_state); 50 + if (ret == 0) 51 + ar->thermal.throttle_state = throttle_state; 52 + mutex_unlock(&ar->conf_mutex); 53 + return ret; 54 + } 55 + 56 + static struct thermal_cooling_device_ops ath11k_thermal_ops = { 57 + .get_max_state = ath11k_thermal_get_max_throttle_state, 58 + .get_cur_state = ath11k_thermal_get_cur_throttle_state, 59 + .set_cur_state = ath11k_thermal_set_cur_throttle_state, 60 + }; 61 + 62 + static ssize_t ath11k_thermal_show_temp(struct device *dev, 63 + struct device_attribute *attr, 64 + char *buf) 65 + { 66 + struct ath11k *ar = dev_get_drvdata(dev); 67 + int ret, temperature; 68 + unsigned long time_left; 69 + 70 + mutex_lock(&ar->conf_mutex); 71 + 72 + /* Can't get temperature when the card is off */ 73 + if (ar->state != ATH11K_STATE_ON) { 74 + ret = -ENETDOWN; 75 + goto out; 76 + } 77 + 78 + reinit_completion(&ar->thermal.wmi_sync); 79 + ret = ath11k_wmi_send_pdev_temperature_cmd(ar); 80 + if (ret) { 81 + ath11k_warn(ar->ab, "failed to read temperature %d\n", ret); 82 + goto out; 83 + } 84 + 85 + if (test_bit(ATH11K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags)) { 86 + ret = -ESHUTDOWN; 87 + goto out; 88 + } 89 + 90 + time_left = wait_for_completion_timeout(&ar->thermal.wmi_sync, 91 + ATH11K_THERMAL_SYNC_TIMEOUT_HZ); 92 + if (!time_left) { 93 + ath11k_warn(ar->ab, "failed to synchronize thermal read\n"); 94 + ret = -ETIMEDOUT; 95 + goto out; 96 + } 97 + 98 + spin_lock_bh(&ar->data_lock); 99 + temperature = ar->thermal.temperature; 100 + spin_unlock_bh(&ar->data_lock); 101 + 102 + /* display in millidegree celcius */ 103 + ret = snprintf(buf, PAGE_SIZE, "%d\n", temperature * 1000); 104 + out: 105 + mutex_unlock(&ar->conf_mutex); 106 + return ret; 107 + } 108 + 109 + void ath11k_thermal_event_temperature(struct ath11k *ar, int temperature) 110 + { 111 + spin_lock_bh(&ar->data_lock); 112 + ar->thermal.temperature = temperature; 113 + spin_unlock_bh(&ar->data_lock); 114 + complete(&ar->thermal.wmi_sync); 115 + } 116 + 117 + static SENSOR_DEVICE_ATTR(temp1_input, 0444, ath11k_thermal_show_temp, 118 + NULL, 0); 119 + 120 + static struct attribute *ath11k_hwmon_attrs[] = { 121 + &sensor_dev_attr_temp1_input.dev_attr.attr, 122 + NULL, 123 + }; 124 + ATTRIBUTE_GROUPS(ath11k_hwmon); 125 + 126 + int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state) 127 + { 128 + struct ath11k_base *sc = ar->ab; 129 + struct thermal_mitigation_params param; 130 + int ret = 0; 131 + 132 + lockdep_assert_held(&ar->conf_mutex); 133 + 134 + if (ar->state != ATH11K_STATE_ON) 135 + return 0; 136 + 137 + memset(&param, 0, sizeof(param)); 138 + param.pdev_id = ar->pdev->pdev_id; 139 + param.enable = throttle_state ? 1 : 0; 140 + param.dc = ATH11K_THERMAL_DEFAULT_DUTY_CYCLE; 141 + param.dc_per_event = 0xFFFFFFFF; 142 + 143 + param.levelconf[0].tmplwm = ATH11K_THERMAL_TEMP_LOW_MARK; 144 + param.levelconf[0].tmphwm = ATH11K_THERMAL_TEMP_HIGH_MARK; 145 + param.levelconf[0].dcoffpercent = throttle_state; 146 + param.levelconf[0].priority = 0; /* disable all data tx queues */ 147 + 148 + ret = ath11k_wmi_send_thermal_mitigation_param_cmd(ar, &param); 149 + if (ret) { 150 + ath11k_warn(sc, "failed to send thermal mitigation duty cycle %u ret %d\n", 151 + throttle_state, ret); 152 + } 153 + 154 + return ret; 155 + } 156 + 157 + int ath11k_thermal_register(struct ath11k_base *sc) 158 + { 159 + struct thermal_cooling_device *cdev; 160 + struct device *hwmon_dev; 161 + struct ath11k *ar; 162 + struct ath11k_pdev *pdev; 163 + int i, ret; 164 + 165 + for (i = 0; i < sc->num_radios; i++) { 166 + pdev = &sc->pdevs[i]; 167 + ar = pdev->ar; 168 + if (!ar) 169 + continue; 170 + 171 + cdev = thermal_cooling_device_register("ath11k_thermal", ar, 172 + &ath11k_thermal_ops); 173 + 174 + if (IS_ERR(cdev)) { 175 + ath11k_err(sc, "failed to setup thermal device result: %ld\n", 176 + PTR_ERR(cdev)); 177 + return -EINVAL; 178 + } 179 + 180 + ret = sysfs_create_link(&ar->hw->wiphy->dev.kobj, &cdev->device.kobj, 181 + "cooling_device"); 182 + if (ret) { 183 + ath11k_err(sc, "failed to create cooling device symlink\n"); 184 + goto err_thermal_destroy; 185 + } 186 + 187 + ar->thermal.cdev = cdev; 188 + if (!IS_REACHABLE(CONFIG_HWMON)) 189 + return 0; 190 + 191 + hwmon_dev = devm_hwmon_device_register_with_groups(&ar->hw->wiphy->dev, 192 + "ath11k_hwmon", ar, 193 + ath11k_hwmon_groups); 194 + if (IS_ERR(hwmon_dev)) { 195 + ath11k_err(ar->ab, "failed to register hwmon device: %ld\n", 196 + PTR_ERR(hwmon_dev)); 197 + ret = -EINVAL; 198 + goto err_thermal_destroy; 199 + } 200 + } 201 + 202 + return 0; 203 + 204 + err_thermal_destroy: 205 + ath11k_thermal_unregister(sc); 206 + return ret; 207 + } 208 + 209 + void ath11k_thermal_unregister(struct ath11k_base *sc) 210 + { 211 + struct ath11k *ar; 212 + struct ath11k_pdev *pdev; 213 + int i; 214 + 215 + for (i = 0; i < sc->num_radios; i++) { 216 + pdev = &sc->pdevs[i]; 217 + ar = pdev->ar; 218 + if (!ar) 219 + continue; 220 + 221 + sysfs_remove_link(&ar->hw->wiphy->dev.kobj, "cooling_device"); 222 + thermal_cooling_device_unregister(ar->thermal.cdev); 223 + } 224 + }
+53
drivers/net/wireless/ath/ath11k/thermal.h
··· 1 + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 + /* 3 + * Copyright (c) 2020 The Linux Foundation. All rights reserved. 4 + */ 5 + 6 + #ifndef _ATH11K_THERMAL_ 7 + #define _ATH11K_THERMAL_ 8 + 9 + #define ATH11K_THERMAL_TEMP_LOW_MARK -100 10 + #define ATH11K_THERMAL_TEMP_HIGH_MARK 150 11 + #define ATH11K_THERMAL_THROTTLE_MAX 100 12 + #define ATH11K_THERMAL_DEFAULT_DUTY_CYCLE 100 13 + #define ATH11K_HWMON_NAME_LEN 15 14 + #define ATH11K_THERMAL_SYNC_TIMEOUT_HZ (5 * HZ) 15 + 16 + struct ath11k_thermal { 17 + struct thermal_cooling_device *cdev; 18 + struct completion wmi_sync; 19 + 20 + /* protected by conf_mutex */ 21 + u32 throttle_state; 22 + /* temperature value in Celcius degree 23 + * protected by data_lock 24 + */ 25 + int temperature; 26 + }; 27 + 28 + #if IS_REACHABLE(CONFIG_THERMAL) 29 + int ath11k_thermal_register(struct ath11k_base *sc); 30 + void ath11k_thermal_unregister(struct ath11k_base *sc); 31 + int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state); 32 + void ath11k_thermal_event_temperature(struct ath11k *ar, int temperature); 33 + #else 34 + static inline int ath11k_thermal_register(struct ath11k_base *sc) 35 + { 36 + return 0; 37 + } 38 + 39 + static inline void ath11k_thermal_unregister(struct ath11k *ar) 40 + { 41 + } 42 + 43 + static inline int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state) 44 + { 45 + } 46 + 47 + static inline void ath11k_thermal_event_temperature(struct ath11k *ar, 48 + int temperature) 49 + { 50 + } 51 + 52 + #endif 53 + #endif /* _ATH11K_THERMAL_ */
+147
drivers/net/wireless/ath/ath11k/wmi.c
··· 1471 1471 return ret; 1472 1472 } 1473 1473 1474 + int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar) 1475 + { 1476 + struct ath11k_pdev_wmi *wmi = ar->wmi; 1477 + struct wmi_get_pdev_temperature_cmd *cmd; 1478 + struct sk_buff *skb; 1479 + int ret; 1480 + 1481 + skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1482 + if (!skb) 1483 + return -ENOMEM; 1484 + 1485 + cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1486 + cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_PDEV_GET_TEMPERATURE_CMD) | 1487 + FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE); 1488 + cmd->pdev_id = ar->pdev->pdev_id; 1489 + 1490 + ret = ath11k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1491 + if (ret) { 1492 + ath11k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1493 + dev_kfree_skb(skb); 1494 + } 1495 + 1496 + ath11k_dbg(ar->ab, ATH11K_DBG_WMI, 1497 + "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1498 + 1499 + return ret; 1500 + } 1501 + 1474 1502 int ath11k_wmi_send_bcn_offload_control_cmd(struct ath11k *ar, 1475 1503 u32 vdev_id, u32 bcn_ctrl_op) 1476 1504 { ··· 2466 2438 ret); 2467 2439 dev_kfree_skb(skb); 2468 2440 } 2441 + 2442 + return ret; 2443 + } 2444 + 2445 + int 2446 + ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar, 2447 + struct thermal_mitigation_params *param) 2448 + { 2449 + struct ath11k_pdev_wmi *wmi = ar->wmi; 2450 + struct wmi_therm_throt_config_request_cmd *cmd; 2451 + struct wmi_therm_throt_level_config_info *lvl_conf; 2452 + struct wmi_tlv *tlv; 2453 + struct sk_buff *skb; 2454 + int i, ret, len; 2455 + 2456 + len = sizeof(*cmd) + TLV_HDR_SIZE + 2457 + THERMAL_LEVELS * sizeof(struct wmi_therm_throt_level_config_info); 2458 + 2459 + skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, len); 2460 + if (!skb) 2461 + return -ENOMEM; 2462 + 2463 + cmd = (struct wmi_therm_throt_config_request_cmd *)skb->data; 2464 + 2465 + cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_THERM_THROT_CONFIG_REQUEST) | 2466 + FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE); 2467 + 2468 + cmd->pdev_id = ar->pdev->pdev_id; 2469 + cmd->enable = param->enable; 2470 + cmd->dc = param->dc; 2471 + cmd->dc_per_event = param->dc_per_event; 2472 + cmd->therm_throt_levels = THERMAL_LEVELS; 2473 + 2474 + tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 2475 + tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_STRUCT) | 2476 + FIELD_PREP(WMI_TLV_LEN, 2477 + (THERMAL_LEVELS * 2478 + sizeof(struct wmi_therm_throt_level_config_info))); 2479 + 2480 + lvl_conf = (struct wmi_therm_throt_level_config_info *)(skb->data + 2481 + sizeof(*cmd) + 2482 + TLV_HDR_SIZE); 2483 + for (i = 0; i < THERMAL_LEVELS; i++) { 2484 + lvl_conf->tlv_header = 2485 + FIELD_PREP(WMI_TLV_TAG, WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO) | 2486 + FIELD_PREP(WMI_TLV_LEN, sizeof(*lvl_conf) - TLV_HDR_SIZE); 2487 + 2488 + lvl_conf->temp_lwm = param->levelconf[i].tmplwm; 2489 + lvl_conf->temp_hwm = param->levelconf[i].tmphwm; 2490 + lvl_conf->dc_off_percent = param->levelconf[i].dcoffpercent; 2491 + lvl_conf->prio = param->levelconf[i].priority; 2492 + lvl_conf++; 2493 + } 2494 + 2495 + ret = ath11k_wmi_cmd_send(wmi, skb, WMI_THERM_THROT_SET_CONF_CMDID); 2496 + if (ret) { 2497 + ath11k_warn(ar->ab, "failed to send THERM_THROT_SET_CONF cmd\n"); 2498 + dev_kfree_skb(skb); 2499 + } 2500 + 2501 + ath11k_dbg(ar->ab, ATH11K_DBG_WMI, 2502 + "WMI vdev set thermal throt pdev_id %d enable %d dc %d dc_per_event %x levels %d\n", 2503 + ar->pdev->pdev_id, param->enable, param->dc, 2504 + param->dc_per_event, THERMAL_LEVELS); 2469 2505 2470 2506 return ret; 2471 2507 } ··· 4260 4168 return 0; 4261 4169 } 4262 4170 4171 + static int 4172 + ath11k_pull_pdev_temp_ev(struct ath11k_base *ab, u8 *evt_buf, 4173 + u32 len, const struct wmi_pdev_temperature_event *ev) 4174 + { 4175 + const void **tb; 4176 + int ret; 4177 + 4178 + tb = ath11k_wmi_tlv_parse_alloc(ab, evt_buf, len, GFP_ATOMIC); 4179 + if (IS_ERR(tb)) { 4180 + ret = PTR_ERR(tb); 4181 + ath11k_warn(ab, "failed to parse tlv: %d\n", ret); 4182 + return ret; 4183 + } 4184 + 4185 + ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 4186 + if (!ev) { 4187 + ath11k_warn(ab, "failed to fetch pdev temp ev"); 4188 + kfree(tb); 4189 + return -EPROTO; 4190 + } 4191 + 4192 + kfree(tb); 4193 + return 0; 4194 + } 4195 + 4263 4196 size_t ath11k_wmi_fw_stats_num_vdevs(struct list_head *head) 4264 4197 { 4265 4198 struct ath11k_fw_stats_vdev *i; ··· 5462 5345 "peer assoc conf ev vdev id %d macaddr %pM\n", 5463 5346 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 5464 5347 5348 + rcu_read_lock(); 5465 5349 ar = ath11k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 5466 5350 5467 5351 if (!ar) { 5468 5352 ath11k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 5469 5353 peer_assoc_conf.vdev_id); 5354 + rcu_read_unlock(); 5470 5355 return; 5471 5356 } 5472 5357 5473 5358 complete(&ar->peer_assoc_done); 5359 + rcu_read_unlock(); 5474 5360 } 5475 5361 5476 5362 static void ath11k_update_stats_event(struct ath11k_base *ab, struct sk_buff *skb) ··· 5631 5511 kfree(tb); 5632 5512 } 5633 5513 5514 + static void 5515 + ath11k_wmi_pdev_temperature_event(struct ath11k_base *ab, 5516 + struct sk_buff *skb) 5517 + { 5518 + struct ath11k *ar; 5519 + struct wmi_pdev_temperature_event ev = {0}; 5520 + 5521 + if (ath11k_pull_pdev_temp_ev(ab, skb->data, skb->len, &ev) != 0) { 5522 + ath11k_warn(ab, "failed to extract pdev temperature event"); 5523 + return; 5524 + } 5525 + 5526 + ath11k_dbg(ab, ATH11K_DBG_WMI, 5527 + "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id); 5528 + 5529 + ar = ath11k_mac_get_ar_by_pdev_id(ab, ev.pdev_id); 5530 + if (!ar) { 5531 + ath11k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id); 5532 + return; 5533 + } 5534 + 5535 + ath11k_thermal_event_temperature(ar, ev.temp); 5536 + } 5537 + 5634 5538 static void ath11k_wmi_tlv_op_rx(struct ath11k_base *ab, struct sk_buff *skb) 5635 5539 { 5636 5540 struct wmi_cmd_hdr *cmd_hdr; ··· 5731 5587 break; 5732 5588 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 5733 5589 ath11k_wmi_pdev_csa_switch_count_status_event(ab, skb); 5590 + break; 5591 + case WMI_PDEV_TEMPERATURE_EVENTID: 5592 + ath11k_wmi_pdev_temperature_event(ab, skb); 5734 5593 break; 5735 5594 /* add Unsupported events here */ 5736 5595 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
+53
drivers/net/wireless/ath/ath11k/wmi.h
··· 442 442 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 443 443 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 444 444 WMI_READ_DATA_FROM_FLASH_CMDID, 445 + WMI_THERM_THROT_SET_CONF_CMDID, 446 + WMI_RUNTIME_DPD_RECAL_CMDID, 447 + WMI_GET_TPC_POWER_CMDID, 448 + WMI_IDLE_TRIGGER_MONITOR_CMDID, 445 449 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 446 450 WMI_GPIO_OUTPUT_CMDID, 447 451 WMI_TXBF_CMDID, ··· 3304 3300 u32 pdev_id; 3305 3301 } __packed; 3306 3302 3303 + struct wmi_get_pdev_temperature_cmd { 3304 + u32 tlv_header; 3305 + u32 param; 3306 + u32 pdev_id; 3307 + } __packed; 3308 + 3307 3309 #define WMI_BEACON_TX_BUFFER_SIZE 512 3308 3310 3309 3311 struct wmi_bcn_tmpl_cmd { ··· 3613 3603 u32 regdom_id; 3614 3604 u32 alpha2; 3615 3605 } cc_info; 3606 + } __packed; 3607 + 3608 + #define THERMAL_LEVELS 1 3609 + struct tt_level_config { 3610 + u32 tmplwm; 3611 + u32 tmphwm; 3612 + u32 dcoffpercent; 3613 + u32 priority; 3614 + }; 3615 + 3616 + struct thermal_mitigation_params { 3617 + u32 pdev_id; 3618 + u32 enable; 3619 + u32 dc; 3620 + u32 dc_per_event; 3621 + struct tt_level_config levelconf[THERMAL_LEVELS]; 3622 + }; 3623 + 3624 + struct wmi_therm_throt_config_request_cmd { 3625 + u32 tlv_header; 3626 + u32 pdev_id; 3627 + u32 enable; 3628 + u32 dc; 3629 + u32 dc_per_event; 3630 + u32 therm_throt_levels; 3631 + } __packed; 3632 + 3633 + struct wmi_therm_throt_level_config_info { 3634 + u32 tlv_header; 3635 + u32 temp_lwm; 3636 + u32 temp_hwm; 3637 + u32 dc_off_percent; 3638 + u32 prio; 3616 3639 } __packed; 3617 3640 3618 3641 struct wmi_pdev_pktlog_filter_info { ··· 4136 4093 u32 is_chirp; 4137 4094 s32 freq_offset; 4138 4095 s32 sidx; 4096 + } __packed; 4097 + 4098 + struct wmi_pdev_temperature_event { 4099 + /* temperature value in Celcius degree */ 4100 + s32 temp; 4101 + u32 pdev_id; 4139 4102 } __packed; 4140 4103 4141 4104 #define WMI_RX_STATUS_OK 0x00 ··· 4775 4726 enum wmi_bss_chan_info_req_type type); 4776 4727 int ath11k_wmi_send_stats_request_cmd(struct ath11k *ar, 4777 4728 struct stats_request_params *param); 4729 + int ath11k_wmi_send_pdev_temperature_cmd(struct ath11k *ar); 4778 4730 int ath11k_wmi_send_peer_flush_tids_cmd(struct ath11k *ar, 4779 4731 u8 peer_addr[ETH_ALEN], 4780 4732 struct peer_flush_params *param); ··· 4790 4740 int 4791 4741 ath11k_wmi_send_init_country_cmd(struct ath11k *ar, 4792 4742 struct wmi_init_country_params init_cc_param); 4743 + int 4744 + ath11k_wmi_send_thermal_mitigation_param_cmd(struct ath11k *ar, 4745 + struct thermal_mitigation_params *param); 4793 4746 int ath11k_wmi_pdev_pktlog_enable(struct ath11k *ar, u32 pktlog_filter); 4794 4747 int ath11k_wmi_pdev_pktlog_disable(struct ath11k *ar); 4795 4748 int ath11k_wmi_pdev_peer_pktlog_filter(struct ath11k *ar, u8 *addr, u8 enable);
+1 -1
drivers/net/wireless/ath/ath5k/Kconfig
··· 54 54 55 55 config ATH5K_AHB 56 56 bool "Atheros 5xxx AHB bus support" 57 - depends on ATH25 57 + depends on ATH25 && ATH5K 58 58 ---help--- 59 59 This adds support for WiSoC type chipsets of the 5xxx Atheros 60 60 family.
+87 -87
drivers/net/wireless/ath/ath5k/debug.c
··· 201 201 u64 tsf; 202 202 203 203 v = ath5k_hw_reg_read(ah, AR5K_BEACON); 204 - len += snprintf(buf + len, sizeof(buf) - len, 204 + len += scnprintf(buf + len, sizeof(buf) - len, 205 205 "%-24s0x%08x\tintval: %d\tTIM: 0x%x\n", 206 206 "AR5K_BEACON", v, v & AR5K_BEACON_PERIOD, 207 207 (v & AR5K_BEACON_TIM) >> AR5K_BEACON_TIM_S); 208 208 209 - len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n", 209 + len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n", 210 210 "AR5K_LAST_TSTP", ath5k_hw_reg_read(ah, AR5K_LAST_TSTP)); 211 211 212 - len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n", 212 + len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\n\n", 213 213 "AR5K_BEACON_CNT", ath5k_hw_reg_read(ah, AR5K_BEACON_CNT)); 214 214 215 215 v = ath5k_hw_reg_read(ah, AR5K_TIMER0); 216 - len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 216 + len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 217 217 "AR5K_TIMER0 (TBTT)", v, v); 218 218 219 219 v = ath5k_hw_reg_read(ah, AR5K_TIMER1); 220 - len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 220 + len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 221 221 "AR5K_TIMER1 (DMA)", v, v >> 3); 222 222 223 223 v = ath5k_hw_reg_read(ah, AR5K_TIMER2); 224 - len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 224 + len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 225 225 "AR5K_TIMER2 (SWBA)", v, v >> 3); 226 226 227 227 v = ath5k_hw_reg_read(ah, AR5K_TIMER3); 228 - len += snprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 228 + len += scnprintf(buf + len, sizeof(buf) - len, "%-24s0x%08x\tTU: %08x\n", 229 229 "AR5K_TIMER3 (ATIM)", v, v); 230 230 231 231 tsf = ath5k_hw_get_tsf64(ah); 232 - len += snprintf(buf + len, sizeof(buf) - len, 232 + len += scnprintf(buf + len, sizeof(buf) - len, 233 233 "TSF\t\t0x%016llx\tTU: %08x\n", 234 234 (unsigned long long)tsf, TSF_TO_TU(tsf)); 235 235 ··· 320 320 unsigned int len = 0; 321 321 unsigned int i; 322 322 323 - len += snprintf(buf + len, sizeof(buf) - len, 323 + len += scnprintf(buf + len, sizeof(buf) - len, 324 324 "DEBUG LEVEL: 0x%08x\n\n", ah->debug.level); 325 325 326 326 for (i = 0; i < ARRAY_SIZE(dbg_info) - 1; i++) { 327 - len += snprintf(buf + len, sizeof(buf) - len, 327 + len += scnprintf(buf + len, sizeof(buf) - len, 328 328 "%10s %c 0x%08x - %s\n", dbg_info[i].name, 329 329 ah->debug.level & dbg_info[i].level ? '+' : ' ', 330 330 dbg_info[i].level, dbg_info[i].desc); 331 331 } 332 - len += snprintf(buf + len, sizeof(buf) - len, 332 + len += scnprintf(buf + len, sizeof(buf) - len, 333 333 "%10s %c 0x%08x - %s\n", dbg_info[i].name, 334 334 ah->debug.level == dbg_info[i].level ? '+' : ' ', 335 335 dbg_info[i].level, dbg_info[i].desc); ··· 383 383 unsigned int i; 384 384 unsigned int v; 385 385 386 - len += snprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n", 386 + len += scnprintf(buf + len, sizeof(buf) - len, "antenna mode\t%d\n", 387 387 ah->ah_ant_mode); 388 - len += snprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n", 388 + len += scnprintf(buf + len, sizeof(buf) - len, "default antenna\t%d\n", 389 389 ah->ah_def_ant); 390 - len += snprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n", 390 + len += scnprintf(buf + len, sizeof(buf) - len, "tx antenna\t%d\n", 391 391 ah->ah_tx_ant); 392 392 393 - len += snprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n"); 393 + len += scnprintf(buf + len, sizeof(buf) - len, "\nANTENNA\t\tRX\tTX\n"); 394 394 for (i = 1; i < ARRAY_SIZE(ah->stats.antenna_rx); i++) { 395 - len += snprintf(buf + len, sizeof(buf) - len, 395 + len += scnprintf(buf + len, sizeof(buf) - len, 396 396 "[antenna %d]\t%d\t%d\n", 397 397 i, ah->stats.antenna_rx[i], ah->stats.antenna_tx[i]); 398 398 } 399 - len += snprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n", 399 + len += scnprintf(buf + len, sizeof(buf) - len, "[invalid]\t%d\t%d\n", 400 400 ah->stats.antenna_rx[0], ah->stats.antenna_tx[0]); 401 401 402 402 v = ath5k_hw_reg_read(ah, AR5K_DEFAULT_ANTENNA); 403 - len += snprintf(buf + len, sizeof(buf) - len, 403 + len += scnprintf(buf + len, sizeof(buf) - len, 404 404 "\nAR5K_DEFAULT_ANTENNA\t0x%08x\n", v); 405 405 406 406 v = ath5k_hw_reg_read(ah, AR5K_STA_ID1); 407 - len += snprintf(buf + len, sizeof(buf) - len, 407 + len += scnprintf(buf + len, sizeof(buf) - len, 408 408 "AR5K_STA_ID1_DEFAULT_ANTENNA\t%d\n", 409 409 (v & AR5K_STA_ID1_DEFAULT_ANTENNA) != 0); 410 - len += snprintf(buf + len, sizeof(buf) - len, 410 + len += scnprintf(buf + len, sizeof(buf) - len, 411 411 "AR5K_STA_ID1_DESC_ANTENNA\t%d\n", 412 412 (v & AR5K_STA_ID1_DESC_ANTENNA) != 0); 413 - len += snprintf(buf + len, sizeof(buf) - len, 413 + len += scnprintf(buf + len, sizeof(buf) - len, 414 414 "AR5K_STA_ID1_RTS_DEF_ANTENNA\t%d\n", 415 415 (v & AR5K_STA_ID1_RTS_DEF_ANTENNA) != 0); 416 - len += snprintf(buf + len, sizeof(buf) - len, 416 + len += scnprintf(buf + len, sizeof(buf) - len, 417 417 "AR5K_STA_ID1_SELFGEN_DEF_ANT\t%d\n", 418 418 (v & AR5K_STA_ID1_SELFGEN_DEF_ANT) != 0); 419 419 420 420 v = ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL); 421 - len += snprintf(buf + len, sizeof(buf) - len, 421 + len += scnprintf(buf + len, sizeof(buf) - len, 422 422 "\nAR5K_PHY_AGCCTL_OFDM_DIV_DIS\t%d\n", 423 423 (v & AR5K_PHY_AGCCTL_OFDM_DIV_DIS) != 0); 424 424 425 425 v = ath5k_hw_reg_read(ah, AR5K_PHY_RESTART); 426 - len += snprintf(buf + len, sizeof(buf) - len, 426 + len += scnprintf(buf + len, sizeof(buf) - len, 427 427 "AR5K_PHY_RESTART_DIV_GC\t\t%x\n", 428 428 (v & AR5K_PHY_RESTART_DIV_GC) >> AR5K_PHY_RESTART_DIV_GC_S); 429 429 430 430 v = ath5k_hw_reg_read(ah, AR5K_PHY_FAST_ANT_DIV); 431 - len += snprintf(buf + len, sizeof(buf) - len, 431 + len += scnprintf(buf + len, sizeof(buf) - len, 432 432 "AR5K_PHY_FAST_ANT_DIV_EN\t%d\n", 433 433 (v & AR5K_PHY_FAST_ANT_DIV_EN) != 0); 434 434 435 435 v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_0); 436 - len += snprintf(buf + len, sizeof(buf) - len, 436 + len += scnprintf(buf + len, sizeof(buf) - len, 437 437 "\nAR5K_PHY_ANT_SWITCH_TABLE_0\t0x%08x\n", v); 438 438 v = ath5k_hw_reg_read(ah, AR5K_PHY_ANT_SWITCH_TABLE_1); 439 - len += snprintf(buf + len, sizeof(buf) - len, 439 + len += scnprintf(buf + len, sizeof(buf) - len, 440 440 "AR5K_PHY_ANT_SWITCH_TABLE_1\t0x%08x\n", v); 441 441 442 442 if (len > sizeof(buf)) ··· 495 495 unsigned int len = 0; 496 496 u32 filt = ath5k_hw_get_rx_filter(ah); 497 497 498 - len += snprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n", 498 + len += scnprintf(buf + len, sizeof(buf) - len, "bssid-mask: %pM\n", 499 499 ah->bssidmask); 500 - len += snprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ", 500 + len += scnprintf(buf + len, sizeof(buf) - len, "filter-flags: 0x%x ", 501 501 filt); 502 502 if (filt & AR5K_RX_FILTER_UCAST) 503 - len += snprintf(buf + len, sizeof(buf) - len, " UCAST"); 503 + len += scnprintf(buf + len, sizeof(buf) - len, " UCAST"); 504 504 if (filt & AR5K_RX_FILTER_MCAST) 505 - len += snprintf(buf + len, sizeof(buf) - len, " MCAST"); 505 + len += scnprintf(buf + len, sizeof(buf) - len, " MCAST"); 506 506 if (filt & AR5K_RX_FILTER_BCAST) 507 - len += snprintf(buf + len, sizeof(buf) - len, " BCAST"); 507 + len += scnprintf(buf + len, sizeof(buf) - len, " BCAST"); 508 508 if (filt & AR5K_RX_FILTER_CONTROL) 509 - len += snprintf(buf + len, sizeof(buf) - len, " CONTROL"); 509 + len += scnprintf(buf + len, sizeof(buf) - len, " CONTROL"); 510 510 if (filt & AR5K_RX_FILTER_BEACON) 511 - len += snprintf(buf + len, sizeof(buf) - len, " BEACON"); 511 + len += scnprintf(buf + len, sizeof(buf) - len, " BEACON"); 512 512 if (filt & AR5K_RX_FILTER_PROM) 513 - len += snprintf(buf + len, sizeof(buf) - len, " PROM"); 513 + len += scnprintf(buf + len, sizeof(buf) - len, " PROM"); 514 514 if (filt & AR5K_RX_FILTER_XRPOLL) 515 - len += snprintf(buf + len, sizeof(buf) - len, " XRPOLL"); 515 + len += scnprintf(buf + len, sizeof(buf) - len, " XRPOLL"); 516 516 if (filt & AR5K_RX_FILTER_PROBEREQ) 517 - len += snprintf(buf + len, sizeof(buf) - len, " PROBEREQ"); 517 + len += scnprintf(buf + len, sizeof(buf) - len, " PROBEREQ"); 518 518 if (filt & AR5K_RX_FILTER_PHYERR_5212) 519 - len += snprintf(buf + len, sizeof(buf) - len, " PHYERR-5212"); 519 + len += scnprintf(buf + len, sizeof(buf) - len, " PHYERR-5212"); 520 520 if (filt & AR5K_RX_FILTER_RADARERR_5212) 521 - len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5212"); 521 + len += scnprintf(buf + len, sizeof(buf) - len, " RADARERR-5212"); 522 522 if (filt & AR5K_RX_FILTER_PHYERR_5211) 523 523 snprintf(buf + len, sizeof(buf) - len, " PHYERR-5211"); 524 524 if (filt & AR5K_RX_FILTER_RADARERR_5211) 525 - len += snprintf(buf + len, sizeof(buf) - len, " RADARERR-5211"); 525 + len += scnprintf(buf + len, sizeof(buf) - len, " RADARERR-5211"); 526 526 527 - len += snprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n", 527 + len += scnprintf(buf + len, sizeof(buf) - len, "\nopmode: %s (%d)\n", 528 528 ath_opmode_to_string(ah->opmode), ah->opmode); 529 529 530 530 if (len > sizeof(buf)) ··· 551 551 unsigned int len = 0; 552 552 int i; 553 553 554 - len += snprintf(buf + len, sizeof(buf) - len, 554 + len += scnprintf(buf + len, sizeof(buf) - len, 555 555 "RX\n---------------------\n"); 556 - len += snprintf(buf + len, sizeof(buf) - len, "CRC\t%u\t(%u%%)\n", 556 + len += scnprintf(buf + len, sizeof(buf) - len, "CRC\t%u\t(%u%%)\n", 557 557 st->rxerr_crc, 558 558 st->rx_all_count > 0 ? 559 559 st->rxerr_crc * 100 / st->rx_all_count : 0); 560 - len += snprintf(buf + len, sizeof(buf) - len, "PHY\t%u\t(%u%%)\n", 560 + len += scnprintf(buf + len, sizeof(buf) - len, "PHY\t%u\t(%u%%)\n", 561 561 st->rxerr_phy, 562 562 st->rx_all_count > 0 ? 563 563 st->rxerr_phy * 100 / st->rx_all_count : 0); 564 564 for (i = 0; i < 32; i++) { 565 565 if (st->rxerr_phy_code[i]) 566 - len += snprintf(buf + len, sizeof(buf) - len, 566 + len += scnprintf(buf + len, sizeof(buf) - len, 567 567 " phy_err[%u]\t%u\n", 568 568 i, st->rxerr_phy_code[i]); 569 569 } 570 570 571 - len += snprintf(buf + len, sizeof(buf) - len, "FIFO\t%u\t(%u%%)\n", 571 + len += scnprintf(buf + len, sizeof(buf) - len, "FIFO\t%u\t(%u%%)\n", 572 572 st->rxerr_fifo, 573 573 st->rx_all_count > 0 ? 574 574 st->rxerr_fifo * 100 / st->rx_all_count : 0); 575 - len += snprintf(buf + len, sizeof(buf) - len, "decrypt\t%u\t(%u%%)\n", 575 + len += scnprintf(buf + len, sizeof(buf) - len, "decrypt\t%u\t(%u%%)\n", 576 576 st->rxerr_decrypt, 577 577 st->rx_all_count > 0 ? 578 578 st->rxerr_decrypt * 100 / st->rx_all_count : 0); 579 - len += snprintf(buf + len, sizeof(buf) - len, "MIC\t%u\t(%u%%)\n", 579 + len += scnprintf(buf + len, sizeof(buf) - len, "MIC\t%u\t(%u%%)\n", 580 580 st->rxerr_mic, 581 581 st->rx_all_count > 0 ? 582 582 st->rxerr_mic * 100 / st->rx_all_count : 0); 583 - len += snprintf(buf + len, sizeof(buf) - len, "process\t%u\t(%u%%)\n", 583 + len += scnprintf(buf + len, sizeof(buf) - len, "process\t%u\t(%u%%)\n", 584 584 st->rxerr_proc, 585 585 st->rx_all_count > 0 ? 586 586 st->rxerr_proc * 100 / st->rx_all_count : 0); 587 - len += snprintf(buf + len, sizeof(buf) - len, "jumbo\t%u\t(%u%%)\n", 587 + len += scnprintf(buf + len, sizeof(buf) - len, "jumbo\t%u\t(%u%%)\n", 588 588 st->rxerr_jumbo, 589 589 st->rx_all_count > 0 ? 590 590 st->rxerr_jumbo * 100 / st->rx_all_count : 0); 591 - len += snprintf(buf + len, sizeof(buf) - len, "[RX all\t%u]\n", 591 + len += scnprintf(buf + len, sizeof(buf) - len, "[RX all\t%u]\n", 592 592 st->rx_all_count); 593 - len += snprintf(buf + len, sizeof(buf) - len, "RX-all-bytes\t%u\n", 593 + len += scnprintf(buf + len, sizeof(buf) - len, "RX-all-bytes\t%u\n", 594 594 st->rx_bytes_count); 595 595 596 - len += snprintf(buf + len, sizeof(buf) - len, 596 + len += scnprintf(buf + len, sizeof(buf) - len, 597 597 "\nTX\n---------------------\n"); 598 - len += snprintf(buf + len, sizeof(buf) - len, "retry\t%u\t(%u%%)\n", 598 + len += scnprintf(buf + len, sizeof(buf) - len, "retry\t%u\t(%u%%)\n", 599 599 st->txerr_retry, 600 600 st->tx_all_count > 0 ? 601 601 st->txerr_retry * 100 / st->tx_all_count : 0); 602 - len += snprintf(buf + len, sizeof(buf) - len, "FIFO\t%u\t(%u%%)\n", 602 + len += scnprintf(buf + len, sizeof(buf) - len, "FIFO\t%u\t(%u%%)\n", 603 603 st->txerr_fifo, 604 604 st->tx_all_count > 0 ? 605 605 st->txerr_fifo * 100 / st->tx_all_count : 0); 606 - len += snprintf(buf + len, sizeof(buf) - len, "filter\t%u\t(%u%%)\n", 606 + len += scnprintf(buf + len, sizeof(buf) - len, "filter\t%u\t(%u%%)\n", 607 607 st->txerr_filt, 608 608 st->tx_all_count > 0 ? 609 609 st->txerr_filt * 100 / st->tx_all_count : 0); 610 - len += snprintf(buf + len, sizeof(buf) - len, "[TX all\t%u]\n", 610 + len += scnprintf(buf + len, sizeof(buf) - len, "[TX all\t%u]\n", 611 611 st->tx_all_count); 612 - len += snprintf(buf + len, sizeof(buf) - len, "TX-all-bytes\t%u\n", 612 + len += scnprintf(buf + len, sizeof(buf) - len, "TX-all-bytes\t%u\n", 613 613 st->tx_bytes_count); 614 614 615 615 if (len > sizeof(buf)) ··· 670 670 char buf[700]; 671 671 unsigned int len = 0; 672 672 673 - len += snprintf(buf + len, sizeof(buf) - len, 673 + len += scnprintf(buf + len, sizeof(buf) - len, 674 674 "HW has PHY error counters:\t%s\n", 675 675 ah->ah_capabilities.cap_has_phyerr_counters ? 676 676 "yes" : "no"); 677 - len += snprintf(buf + len, sizeof(buf) - len, 677 + len += scnprintf(buf + len, sizeof(buf) - len, 678 678 "HW max spur immunity level:\t%d\n", 679 679 as->max_spur_level); 680 - len += snprintf(buf + len, sizeof(buf) - len, 680 + len += scnprintf(buf + len, sizeof(buf) - len, 681 681 "\nANI state\n--------------------------------------------\n"); 682 - len += snprintf(buf + len, sizeof(buf) - len, "operating mode:\t\t\t"); 682 + len += scnprintf(buf + len, sizeof(buf) - len, "operating mode:\t\t\t"); 683 683 switch (as->ani_mode) { 684 684 case ATH5K_ANI_MODE_OFF: 685 - len += snprintf(buf + len, sizeof(buf) - len, "OFF\n"); 685 + len += scnprintf(buf + len, sizeof(buf) - len, "OFF\n"); 686 686 break; 687 687 case ATH5K_ANI_MODE_MANUAL_LOW: 688 - len += snprintf(buf + len, sizeof(buf) - len, 688 + len += scnprintf(buf + len, sizeof(buf) - len, 689 689 "MANUAL LOW\n"); 690 690 break; 691 691 case ATH5K_ANI_MODE_MANUAL_HIGH: 692 - len += snprintf(buf + len, sizeof(buf) - len, 692 + len += scnprintf(buf + len, sizeof(buf) - len, 693 693 "MANUAL HIGH\n"); 694 694 break; 695 695 case ATH5K_ANI_MODE_AUTO: 696 - len += snprintf(buf + len, sizeof(buf) - len, "AUTO\n"); 696 + len += scnprintf(buf + len, sizeof(buf) - len, "AUTO\n"); 697 697 break; 698 698 default: 699 - len += snprintf(buf + len, sizeof(buf) - len, 699 + len += scnprintf(buf + len, sizeof(buf) - len, 700 700 "??? (not good)\n"); 701 701 break; 702 702 } 703 - len += snprintf(buf + len, sizeof(buf) - len, 703 + len += scnprintf(buf + len, sizeof(buf) - len, 704 704 "noise immunity level:\t\t%d\n", 705 705 as->noise_imm_level); 706 - len += snprintf(buf + len, sizeof(buf) - len, 706 + len += scnprintf(buf + len, sizeof(buf) - len, 707 707 "spur immunity level:\t\t%d\n", 708 708 as->spur_level); 709 - len += snprintf(buf + len, sizeof(buf) - len, 709 + len += scnprintf(buf + len, sizeof(buf) - len, 710 710 "firstep level:\t\t\t%d\n", 711 711 as->firstep_level); 712 - len += snprintf(buf + len, sizeof(buf) - len, 712 + len += scnprintf(buf + len, sizeof(buf) - len, 713 713 "OFDM weak signal detection:\t%s\n", 714 714 as->ofdm_weak_sig ? "on" : "off"); 715 - len += snprintf(buf + len, sizeof(buf) - len, 715 + len += scnprintf(buf + len, sizeof(buf) - len, 716 716 "CCK weak signal detection:\t%s\n", 717 717 as->cck_weak_sig ? "on" : "off"); 718 718 719 - len += snprintf(buf + len, sizeof(buf) - len, 719 + len += scnprintf(buf + len, sizeof(buf) - len, 720 720 "\nMIB INTERRUPTS:\t\t%u\n", 721 721 st->mib_intr); 722 - len += snprintf(buf + len, sizeof(buf) - len, 722 + len += scnprintf(buf + len, sizeof(buf) - len, 723 723 "beacon RSSI average:\t%d\n", 724 724 (int)ewma_beacon_rssi_read(&ah->ah_beacon_rssi_avg)); 725 725 ··· 728 728 _struct.cycles > 0 ? \ 729 729 _struct._field * 100 / _struct.cycles : 0 730 730 731 - len += snprintf(buf + len, sizeof(buf) - len, 731 + len += scnprintf(buf + len, sizeof(buf) - len, 732 732 "profcnt tx\t\t%u\t(%d%%)\n", 733 733 CC_PRINT(as->last_cc, tx_frame)); 734 - len += snprintf(buf + len, sizeof(buf) - len, 734 + len += scnprintf(buf + len, sizeof(buf) - len, 735 735 "profcnt rx\t\t%u\t(%d%%)\n", 736 736 CC_PRINT(as->last_cc, rx_frame)); 737 - len += snprintf(buf + len, sizeof(buf) - len, 737 + len += scnprintf(buf + len, sizeof(buf) - len, 738 738 "profcnt busy\t\t%u\t(%d%%)\n", 739 739 CC_PRINT(as->last_cc, rx_busy)); 740 740 #undef CC_PRINT 741 - len += snprintf(buf + len, sizeof(buf) - len, "profcnt cycles\t\t%u\n", 741 + len += scnprintf(buf + len, sizeof(buf) - len, "profcnt cycles\t\t%u\n", 742 742 as->last_cc.cycles); 743 - len += snprintf(buf + len, sizeof(buf) - len, 743 + len += scnprintf(buf + len, sizeof(buf) - len, 744 744 "listen time\t\t%d\tlast: %d\n", 745 745 as->listen_time, as->last_listen); 746 - len += snprintf(buf + len, sizeof(buf) - len, 746 + len += scnprintf(buf + len, sizeof(buf) - len, 747 747 "OFDM errors\t\t%u\tlast: %u\tsum: %u\n", 748 748 as->ofdm_errors, as->last_ofdm_errors, 749 749 as->sum_ofdm_errors); 750 - len += snprintf(buf + len, sizeof(buf) - len, 750 + len += scnprintf(buf + len, sizeof(buf) - len, 751 751 "CCK errors\t\t%u\tlast: %u\tsum: %u\n", 752 752 as->cck_errors, as->last_cck_errors, 753 753 as->sum_cck_errors); 754 - len += snprintf(buf + len, sizeof(buf) - len, 754 + len += scnprintf(buf + len, sizeof(buf) - len, 755 755 "AR5K_PHYERR_CNT1\t%x\t(=%d)\n", 756 756 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1), 757 757 ATH5K_ANI_OFDM_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX - 758 758 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT1))); 759 - len += snprintf(buf + len, sizeof(buf) - len, 759 + len += scnprintf(buf + len, sizeof(buf) - len, 760 760 "AR5K_PHYERR_CNT2\t%x\t(=%d)\n", 761 761 ath5k_hw_reg_read(ah, AR5K_PHYERR_CNT2), 762 762 ATH5K_ANI_CCK_TRIG_HIGH - (ATH5K_PHYERR_CNT_MAX - ··· 836 836 struct ath5k_buf *bf, *bf0; 837 837 int i, n; 838 838 839 - len += snprintf(buf + len, sizeof(buf) - len, 839 + len += scnprintf(buf + len, sizeof(buf) - len, 840 840 "available txbuffers: %d\n", ah->txbuf_len); 841 841 842 842 for (i = 0; i < ARRAY_SIZE(ah->txqs); i++) { 843 843 txq = &ah->txqs[i]; 844 844 845 - len += snprintf(buf + len, sizeof(buf) - len, 845 + len += scnprintf(buf + len, sizeof(buf) - len, 846 846 "%02d: %ssetup\n", i, txq->setup ? "" : "not "); 847 847 848 848 if (!txq->setup) ··· 854 854 n++; 855 855 spin_unlock_bh(&txq->lock); 856 856 857 - len += snprintf(buf + len, sizeof(buf) - len, 857 + len += scnprintf(buf + len, sizeof(buf) - len, 858 858 " len: %d bufs: %d\n", txq->txq_len, n); 859 - len += snprintf(buf + len, sizeof(buf) - len, 859 + len += scnprintf(buf + len, sizeof(buf) - len, 860 860 " stuck: %d\n", txq->txq_stuck); 861 861 } 862 862
+3
drivers/net/wireless/ath/ath9k/main.c
··· 1460 1460 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef); 1461 1461 } 1462 1462 1463 + if (changed & IEEE80211_CONF_CHANGE_POWER) 1464 + ath9k_set_txpower(sc, NULL); 1465 + 1463 1466 mutex_unlock(&sc->mutex); 1464 1467 ath9k_ps_restore(sc); 1465 1468
+1 -1
drivers/net/wireless/ath/carl9170/debug.c
··· 45 45 #include "cmd.h" 46 46 47 47 #define ADD(buf, off, max, fmt, args...) \ 48 - off += snprintf(&buf[off], max - off, fmt, ##args); 48 + off += scnprintf(&buf[off], max - off, fmt, ##args); 49 49 50 50 51 51 struct carl9170_debugfs_fops {
+1 -1
drivers/net/wireless/atmel/at76c50x-usb.h
··· 151 151 u8 cmd; 152 152 u8 reserved; 153 153 __le16 size; 154 - u8 data[0]; 154 + u8 data[]; 155 155 } __packed; 156 156 157 157 /* Length of Atmel-specific Rx header before 802.11 frame */
+1 -1
drivers/net/wireless/broadcom/b43/debugfs.c
··· 51 51 #define fappend(fmt, x...) \ 52 52 do { \ 53 53 if (bufsize - count) \ 54 - count += snprintf(buf + count, \ 54 + count += scnprintf(buf + count, \ 55 55 bufsize - count, \ 56 56 fmt , ##x); \ 57 57 else \
+1 -1
drivers/net/wireless/broadcom/b43legacy/debugfs.c
··· 54 54 #define fappend(fmt, x...) \ 55 55 do { \ 56 56 if (bufsize - count) \ 57 - count += snprintf(buf + count, \ 57 + count += scnprintf(buf + count, \ 58 58 bufsize - count, \ 59 59 fmt , ##x); \ 60 60 else \
+4 -2
drivers/net/wireless/broadcom/b43legacy/sysfs.c
··· 25 25 static int get_integer(const char *buf, size_t count) 26 26 { 27 27 char tmp[10 + 1] = { 0 }; 28 - int ret = -EINVAL; 28 + int ret = -EINVAL, res; 29 29 30 30 if (count == 0) 31 31 goto out; 32 32 count = min_t(size_t, count, 10); 33 33 memcpy(tmp, buf, count); 34 - ret = simple_strtol(tmp, NULL, 10); 34 + ret = kstrtoint(tmp, 10, &res); 35 + if (!ret) 36 + return res; 35 37 out: 36 38 return ret; 37 39 }
+1 -1
drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.h
··· 60 60 u16 bus_nr; 61 61 u32 n_items; 62 62 const char *board_type; 63 - struct brcmf_fw_item items[0]; 63 + struct brcmf_fw_item items[]; 64 64 }; 65 65 66 66 struct brcmf_fw_name {
+1 -1
drivers/net/wireless/broadcom/brcm80211/brcmfmac/fweh.c
··· 32 32 u8 ifaddr[ETH_ALEN]; 33 33 struct brcmf_event_msg_be emsg; 34 34 u32 datalen; 35 - u8 data[0]; 35 + u8 data[]; 36 36 }; 37 37 38 38 /**
+8 -8
drivers/net/wireless/intel/ipw2x00/ipw2100.c
··· 629 629 int out, i, j, l; 630 630 char c; 631 631 632 - out = snprintf(buf, count, "%08X", ofs); 632 + out = scnprintf(buf, count, "%08X", ofs); 633 633 634 634 for (l = 0, i = 0; i < 2; i++) { 635 - out += snprintf(buf + out, count - out, " "); 635 + out += scnprintf(buf + out, count - out, " "); 636 636 for (j = 0; j < 8 && l < len; j++, l++) 637 - out += snprintf(buf + out, count - out, "%02X ", 637 + out += scnprintf(buf + out, count - out, "%02X ", 638 638 data[(i * 8 + j)]); 639 639 for (; j < 8; j++) 640 - out += snprintf(buf + out, count - out, " "); 640 + out += scnprintf(buf + out, count - out, " "); 641 641 } 642 642 643 - out += snprintf(buf + out, count - out, " "); 643 + out += scnprintf(buf + out, count - out, " "); 644 644 for (l = 0, i = 0; i < 2; i++) { 645 - out += snprintf(buf + out, count - out, " "); 645 + out += scnprintf(buf + out, count - out, " "); 646 646 for (j = 0; j < 8 && l < len; j++, l++) { 647 647 c = data[(i * 8 + j)]; 648 648 if (!isascii(c) || !isprint(c)) 649 649 c = '.'; 650 650 651 - out += snprintf(buf + out, count - out, "%c", c); 651 + out += scnprintf(buf + out, count - out, "%c", c); 652 652 } 653 653 654 654 for (; j < 8; j++) 655 - out += snprintf(buf + out, count - out, " "); 655 + out += scnprintf(buf + out, count - out, " "); 656 656 } 657 657 658 658 return buf;
+24 -24
drivers/net/wireless/intel/ipw2x00/ipw2200.c
··· 223 223 int out, i, j, l; 224 224 char c; 225 225 226 - out = snprintf(buf, count, "%08X", ofs); 226 + out = scnprintf(buf, count, "%08X", ofs); 227 227 228 228 for (l = 0, i = 0; i < 2; i++) { 229 - out += snprintf(buf + out, count - out, " "); 229 + out += scnprintf(buf + out, count - out, " "); 230 230 for (j = 0; j < 8 && l < len; j++, l++) 231 - out += snprintf(buf + out, count - out, "%02X ", 231 + out += scnprintf(buf + out, count - out, "%02X ", 232 232 data[(i * 8 + j)]); 233 233 for (; j < 8; j++) 234 - out += snprintf(buf + out, count - out, " "); 234 + out += scnprintf(buf + out, count - out, " "); 235 235 } 236 236 237 - out += snprintf(buf + out, count - out, " "); 237 + out += scnprintf(buf + out, count - out, " "); 238 238 for (l = 0, i = 0; i < 2; i++) { 239 - out += snprintf(buf + out, count - out, " "); 239 + out += scnprintf(buf + out, count - out, " "); 240 240 for (j = 0; j < 8 && l < len; j++, l++) { 241 241 c = data[(i * 8 + j)]; 242 242 if (!isascii(c) || !isprint(c)) 243 243 c = '.'; 244 244 245 - out += snprintf(buf + out, count - out, "%c", c); 245 + out += scnprintf(buf + out, count - out, "%c", c); 246 246 } 247 247 248 248 for (; j < 8; j++) 249 - out += snprintf(buf + out, count - out, " "); 249 + out += scnprintf(buf + out, count - out, " "); 250 250 } 251 251 252 252 return out; ··· 1279 1279 log_len = log_size / sizeof(*log); 1280 1280 ipw_capture_event_log(priv, log_len, log); 1281 1281 1282 - len += snprintf(buf + len, PAGE_SIZE - len, "%08X", log_len); 1282 + len += scnprintf(buf + len, PAGE_SIZE - len, "%08X", log_len); 1283 1283 for (i = 0; i < log_len; i++) 1284 - len += snprintf(buf + len, PAGE_SIZE - len, 1284 + len += scnprintf(buf + len, PAGE_SIZE - len, 1285 1285 "\n%08X%08X%08X", 1286 1286 log[i].time, log[i].event, log[i].data); 1287 - len += snprintf(buf + len, PAGE_SIZE - len, "\n"); 1287 + len += scnprintf(buf + len, PAGE_SIZE - len, "\n"); 1288 1288 kfree(log); 1289 1289 return len; 1290 1290 } ··· 1298 1298 u32 len = 0, i; 1299 1299 if (!priv->error) 1300 1300 return 0; 1301 - len += snprintf(buf + len, PAGE_SIZE - len, 1301 + len += scnprintf(buf + len, PAGE_SIZE - len, 1302 1302 "%08lX%08X%08X%08X", 1303 1303 priv->error->jiffies, 1304 1304 priv->error->status, 1305 1305 priv->error->config, priv->error->elem_len); 1306 1306 for (i = 0; i < priv->error->elem_len; i++) 1307 - len += snprintf(buf + len, PAGE_SIZE - len, 1307 + len += scnprintf(buf + len, PAGE_SIZE - len, 1308 1308 "\n%08X%08X%08X%08X%08X%08X%08X", 1309 1309 priv->error->elem[i].time, 1310 1310 priv->error->elem[i].desc, ··· 1314 1314 priv->error->elem[i].link2, 1315 1315 priv->error->elem[i].data); 1316 1316 1317 - len += snprintf(buf + len, PAGE_SIZE - len, 1317 + len += scnprintf(buf + len, PAGE_SIZE - len, 1318 1318 "\n%08X", priv->error->log_len); 1319 1319 for (i = 0; i < priv->error->log_len; i++) 1320 - len += snprintf(buf + len, PAGE_SIZE - len, 1320 + len += scnprintf(buf + len, PAGE_SIZE - len, 1321 1321 "\n%08X%08X%08X", 1322 1322 priv->error->log[i].time, 1323 1323 priv->error->log[i].event, 1324 1324 priv->error->log[i].data); 1325 - len += snprintf(buf + len, PAGE_SIZE - len, "\n"); 1325 + len += scnprintf(buf + len, PAGE_SIZE - len, "\n"); 1326 1326 return len; 1327 1327 } 1328 1328 ··· 1350 1350 (i != priv->cmdlog_pos) && (len < PAGE_SIZE); 1351 1351 i = (i + 1) % priv->cmdlog_len) { 1352 1352 len += 1353 - snprintf(buf + len, PAGE_SIZE - len, 1353 + scnprintf(buf + len, PAGE_SIZE - len, 1354 1354 "\n%08lX%08X%08X%08X\n", priv->cmdlog[i].jiffies, 1355 1355 priv->cmdlog[i].retcode, priv->cmdlog[i].cmd.cmd, 1356 1356 priv->cmdlog[i].cmd.len); ··· 1358 1358 snprintk_buf(buf + len, PAGE_SIZE - len, 1359 1359 (u8 *) priv->cmdlog[i].cmd.param, 1360 1360 priv->cmdlog[i].cmd.len); 1361 - len += snprintf(buf + len, PAGE_SIZE - len, "\n"); 1361 + len += scnprintf(buf + len, PAGE_SIZE - len, "\n"); 1362 1362 } 1363 - len += snprintf(buf + len, PAGE_SIZE - len, "\n"); 1363 + len += scnprintf(buf + len, PAGE_SIZE - len, "\n"); 1364 1364 return len; 1365 1365 } 1366 1366 ··· 9608 9608 int level = IPW_POWER_LEVEL(priv->power_mode); 9609 9609 char *p = extra; 9610 9610 9611 - p += snprintf(p, MAX_WX_STRING, "Power save level: %d ", level); 9611 + p += scnprintf(p, MAX_WX_STRING, "Power save level: %d ", level); 9612 9612 9613 9613 switch (level) { 9614 9614 case IPW_POWER_AC: 9615 - p += snprintf(p, MAX_WX_STRING - (p - extra), "(AC)"); 9615 + p += scnprintf(p, MAX_WX_STRING - (p - extra), "(AC)"); 9616 9616 break; 9617 9617 case IPW_POWER_BATTERY: 9618 - p += snprintf(p, MAX_WX_STRING - (p - extra), "(BATTERY)"); 9618 + p += scnprintf(p, MAX_WX_STRING - (p - extra), "(BATTERY)"); 9619 9619 break; 9620 9620 default: 9621 - p += snprintf(p, MAX_WX_STRING - (p - extra), 9621 + p += scnprintf(p, MAX_WX_STRING - (p - extra), 9622 9622 "(Timeout %dms, Period %dms)", 9623 9623 timeout_duration[level - 1] / 1000, 9624 9624 period_duration[level - 1] / 1000); 9625 9625 } 9626 9626 9627 9627 if (!(priv->power_mode & IPW_POWER_ENABLED)) 9628 - p += snprintf(p, MAX_WX_STRING - (p - extra), " OFF"); 9628 + p += scnprintf(p, MAX_WX_STRING - (p - extra), " OFF"); 9629 9629 9630 9630 wrqu->data.length = p - extra + 1; 9631 9631
+2 -2
drivers/net/wireless/intel/ipw2x00/libipw_rx.c
··· 1156 1156 for (i = 0; i < network->rates_len; i++) { 1157 1157 network->rates[i] = info_element->data[i]; 1158 1158 #ifdef CONFIG_LIBIPW_DEBUG 1159 - p += snprintf(p, sizeof(rates_str) - 1159 + p += scnprintf(p, sizeof(rates_str) - 1160 1160 (p - rates_str), "%02X ", 1161 1161 network->rates[i]); 1162 1162 #endif ··· 1183 1183 for (i = 0; i < network->rates_ex_len; i++) { 1184 1184 network->rates_ex[i] = info_element->data[i]; 1185 1185 #ifdef CONFIG_LIBIPW_DEBUG 1186 - p += snprintf(p, sizeof(rates_str) - 1186 + p += scnprintf(p, sizeof(rates_str) - 1187 1187 (p - rates_str), "%02X ", 1188 1188 network->rates_ex[i]); 1189 1189 #endif
+4 -4
drivers/net/wireless/intel/ipw2x00/libipw_wx.c
··· 213 213 * for given network. */ 214 214 iwe.cmd = IWEVCUSTOM; 215 215 p = custom; 216 - p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), 216 + p += scnprintf(p, MAX_CUSTOM_LEN - (p - custom), 217 217 " Last beacon: %ums ago", 218 218 elapsed_jiffies_msecs(network->last_scanned)); 219 219 iwe.u.data.length = p - custom; ··· 223 223 /* Add spectrum management information */ 224 224 iwe.cmd = -1; 225 225 p = custom; 226 - p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Channel flags: "); 226 + p += scnprintf(p, MAX_CUSTOM_LEN - (p - custom), " Channel flags: "); 227 227 228 228 if (libipw_get_channel_flags(ieee, network->channel) & 229 229 LIBIPW_CH_INVALID) { 230 230 iwe.cmd = IWEVCUSTOM; 231 - p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), "INVALID "); 231 + p += scnprintf(p, MAX_CUSTOM_LEN - (p - custom), "INVALID "); 232 232 } 233 233 234 234 if (libipw_get_channel_flags(ieee, network->channel) & 235 235 LIBIPW_CH_RADAR_DETECT) { 236 236 iwe.cmd = IWEVCUSTOM; 237 - p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), "DFS "); 237 + p += scnprintf(p, MAX_CUSTOM_LEN - (p - custom), "DFS "); 238 238 } 239 239 240 240 if (iwe.cmd == IWEVCUSTOM) {
+1 -3
drivers/net/wireless/intel/iwlegacy/3945-mac.c
··· 228 228 static int 229 229 il3945_remove_static_key(struct il_priv *il) 230 230 { 231 - int ret = -EOPNOTSUPP; 232 - 233 - return ret; 231 + return -EOPNOTSUPP; 234 232 } 235 233 236 234 static int
+1 -2
drivers/net/wireless/intel/iwlegacy/4965.c
··· 416 416 { 417 417 dma_addr_t pinst; 418 418 dma_addr_t pdata; 419 - int ret = 0; 420 419 421 420 /* bits 35:4 for 4965 */ 422 421 pinst = il->ucode_code.p_addr >> 4; ··· 432 433 il->ucode_code.len | BSM_DRAM_INST_LOAD); 433 434 D_INFO("Runtime uCode pointers are set.\n"); 434 435 435 - return ret; 436 + return 0; 436 437 } 437 438 438 439 /**
+17 -30
drivers/net/wireless/intel/iwlwifi/cfg/22000.c
··· 246 246 #define IWL_NUM_RBDS_22000_HE 2048 247 247 #define IWL_NUM_RBDS_AX210_HE 4096 248 248 249 + const struct iwl_cfg_trans_params iwl_ax200_trans_cfg = { 250 + .device_family = IWL_DEVICE_FAMILY_22000, 251 + .base_params = &iwl_22000_base_params, 252 + .mq_rx_supported = true, 253 + .use_tfh = true, 254 + .rf_id = true, 255 + .gen2 = true, 256 + .bisr_workaround = 1, 257 + }; 258 + 259 + const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; 260 + 261 + const char iwl_ax200_killer_1650w_name[] = 262 + "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)"; 263 + const char iwl_ax200_killer_1650x_name[] = 264 + "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)"; 265 + 249 266 const struct iwl_cfg iwl_ax101_cfg_qu_hr = { 250 267 .name = "Intel(R) Wi-Fi 6 AX101", 251 268 .fw_name_pre = IWL_22000_QU_B_HR_B_FW_PRE, ··· 369 352 }; 370 353 371 354 const struct iwl_cfg iwl_ax200_cfg_cc = { 372 - .name = "Intel(R) Wi-Fi 6 AX200 160MHz", 373 355 .fw_name_pre = IWL_CC_A_FW_PRE, 374 356 IWL_DEVICE_22500, 375 357 /* ··· 377 361 * HT size; mac80211 would otherwise pick the HE max (256) by default. 378 362 */ 379 363 .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 380 - .trans.bisr_workaround = 1, 381 - .num_rbds = IWL_NUM_RBDS_22000_HE, 382 - }; 383 - 384 - const struct iwl_cfg killer1650x_2ax_cfg = { 385 - .name = "Killer(R) Wi-Fi 6 AX1650x 160MHz Wireless Network Adapter (200NGW)", 386 - .fw_name_pre = IWL_CC_A_FW_PRE, 387 - IWL_DEVICE_22500, 388 - /* 389 - * This device doesn't support receiving BlockAck with a large bitmap 390 - * so we need to restrict the size of transmitted aggregation to the 391 - * HT size; mac80211 would otherwise pick the HE max (256) by default. 392 - */ 393 - .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 394 - .trans.bisr_workaround = 1, 395 - .num_rbds = IWL_NUM_RBDS_22000_HE, 396 - }; 397 - 398 - const struct iwl_cfg killer1650w_2ax_cfg = { 399 - .name = "Killer(R) Wi-Fi 6 AX1650w 160MHz Wireless Network Adapter (200D2W)", 400 - .fw_name_pre = IWL_CC_A_FW_PRE, 401 - IWL_DEVICE_22500, 402 - /* 403 - * This device doesn't support receiving BlockAck with a large bitmap 404 - * so we need to restrict the size of transmitted aggregation to the 405 - * HT size; mac80211 would otherwise pick the HE max (256) by default. 406 - */ 407 - .max_tx_agg_size = IEEE80211_MAX_AMPDU_BUF_HT, 408 - .trans.bisr_workaround = 1, 409 364 .num_rbds = IWL_NUM_RBDS_22000_HE, 410 365 }; 411 366
+17 -144
drivers/net/wireless/intel/iwlwifi/cfg/9000.c
··· 123 123 #define IWL_DEVICE_9000 \ 124 124 .ucode_api_max = IWL9000_UCODE_API_MAX, \ 125 125 .ucode_api_min = IWL9000_UCODE_API_MIN, \ 126 - .trans.device_family = IWL_DEVICE_FAMILY_9000, \ 127 - .trans.base_params = &iwl9000_base_params, \ 128 126 .led_mode = IWL_LED_RF_STATE, \ 129 127 .nvm_hw_section_num = 10, \ 130 128 .non_shared_ant = ANT_B, \ ··· 135 137 .features = IWL_TX_CSUM_NETIF_FLAGS | NETIF_F_RXCSUM, \ 136 138 .thermal_params = &iwl9000_tt_params, \ 137 139 .apmg_not_supported = true, \ 138 - .trans.mq_rx_supported = true, \ 139 140 .num_rbds = 512, \ 140 141 .vht_mu_mimo_supported = true, \ 141 142 .mac_addr_from_csr = true, \ 142 - .trans.rf_id = true, \ 143 143 .nvm_type = IWL_NVM_EXT, \ 144 144 .dbgc_supported = true, \ 145 145 .min_umac_error_event_table = 0x800000, \ ··· 174 178 .rf_id = true, 175 179 }; 176 180 177 - const struct iwl_cfg iwl9160_2ac_cfg = { 178 - .name = "Intel(R) Dual Band Wireless AC 9160", 179 - .fw_name_pre = IWL9260_FW_PRE, 180 - IWL_DEVICE_9000, 181 - }; 182 - 183 181 const struct iwl_cfg iwl9260_2ac_cfg = { 184 - .name = "Intel(R) Dual Band Wireless AC 9260", 185 182 .fw_name_pre = IWL9260_FW_PRE, 186 183 IWL_DEVICE_9000, 187 184 }; 188 185 186 + const char iwl9162_name[] = "Intel(R) Wireless-AC 9162"; 187 + const char iwl9260_name[] = "Intel(R) Wireless-AC 9260"; 188 + const char iwl9260_1_name[] = "Intel(R) Wireless-AC 9260-1"; 189 + const char iwl9270_name[] = "Intel(R) Wireless-AC 9270"; 190 + const char iwl9461_name[] = "Intel(R) Wireless-AC 9461"; 191 + const char iwl9462_name[] = "Intel(R) Wireless-AC 9462"; 192 + const char iwl9560_name[] = "Intel(R) Wireless-AC 9560"; 193 + const char iwl9162_160_name[] = "Intel(R) Wireless-AC 9162 160MHz"; 189 194 const char iwl9260_160_name[] = "Intel(R) Wireless-AC 9260 160MHz"; 195 + const char iwl9270_160_name[] = "Intel(R) Wireless-AC 9270 160MHz"; 196 + const char iwl9461_160_name[] = "Intel(R) Wireless-AC 9461 160MHz"; 197 + const char iwl9462_160_name[] = "Intel(R) Wireless-AC 9462 160MHz"; 190 198 const char iwl9560_160_name[] = "Intel(R) Wireless-AC 9560 160MHz"; 191 199 192 - const struct iwl_cfg iwl9260_2ac_160_cfg = { 193 - .fw_name_pre = IWL9260_FW_PRE, 194 - IWL_DEVICE_9000, 195 - }; 196 - 197 - const struct iwl_cfg iwl9260_killer_2ac_cfg = { 198 - .name = "Killer (R) Wireless-AC 1550 Wireless Network Adapter (9260NGW)", 199 - .fw_name_pre = IWL9260_FW_PRE, 200 - IWL_DEVICE_9000, 201 - }; 202 - 203 - const struct iwl_cfg iwl9270_2ac_cfg = { 204 - .name = "Intel(R) Dual Band Wireless AC 9270", 205 - .fw_name_pre = IWL9260_FW_PRE, 206 - IWL_DEVICE_9000, 207 - }; 208 - 209 - const struct iwl_cfg iwl9460_2ac_cfg = { 210 - .name = "Intel(R) Dual Band Wireless AC 9460", 211 - .fw_name_pre = IWL9260_FW_PRE, 212 - IWL_DEVICE_9000, 213 - }; 214 - 215 - const struct iwl_cfg iwl9460_2ac_cfg_soc = { 216 - .name = "Intel(R) Dual Band Wireless AC 9460", 217 - .fw_name_pre = IWL9000_FW_PRE, 218 - IWL_DEVICE_9000, 219 - .integrated = true, 220 - .soc_latency = 5000, 221 - }; 222 - 223 - const struct iwl_cfg iwl9461_2ac_cfg_soc = { 224 - .name = "Intel(R) Dual Band Wireless AC 9461", 225 - .fw_name_pre = IWL9000_FW_PRE, 226 - IWL_DEVICE_9000, 227 - .integrated = true, 228 - .soc_latency = 5000, 229 - }; 230 - 231 - const struct iwl_cfg iwl9462_2ac_cfg_soc = { 232 - .name = "Intel(R) Dual Band Wireless AC 9462", 233 - .fw_name_pre = IWL9000_FW_PRE, 234 - IWL_DEVICE_9000, 235 - .integrated = true, 236 - .soc_latency = 5000, 237 - }; 200 + const char iwl9260_killer_1550_name[] = 201 + "Killer (R) Wireless-AC 1550 Wireless Network Adapter (9260NGW)"; 202 + const char iwl9560_killer_1550i_name[] = 203 + "Killer (R) Wireless-AC 1550i Wireless Network Adapter (9560NGW)"; 204 + const char iwl9560_killer_1550s_name[] = 205 + "Killer (R) Wireless-AC 1550s Wireless Network Adapter (9560NGW)"; 238 206 239 207 const struct iwl_cfg iwl9560_2ac_cfg = { 240 - .name = "Intel(R) Dual Band Wireless AC 9560", 241 - .fw_name_pre = IWL9260_FW_PRE, 242 - IWL_DEVICE_9000, 243 - }; 244 - 245 - const struct iwl_cfg iwl9560_2ac_160_cfg = { 246 - .name = "Intel(R) Wireless-AC 9560 160MHz", 247 208 .fw_name_pre = IWL9260_FW_PRE, 248 209 IWL_DEVICE_9000, 249 210 }; 250 211 251 212 const struct iwl_cfg iwl9560_2ac_cfg_soc = { 252 - .name = "Intel(R) Dual Band Wireless AC 9560", 253 213 .fw_name_pre = IWL9000_FW_PRE, 254 214 IWL_DEVICE_9000, 255 215 .integrated = true, 256 216 .soc_latency = 5000, 257 - }; 258 - 259 - const struct iwl_cfg iwl9560_2ac_160_cfg_soc = { 260 - .name = "Intel(R) Wireless-AC 9560 160MHz", 261 - .fw_name_pre = IWL9000_FW_PRE, 262 - IWL_DEVICE_9000, 263 - .integrated = true, 264 - .soc_latency = 5000, 265 - }; 266 - 267 - const struct iwl_cfg iwl9560_killer_2ac_cfg_soc = { 268 - .name = "Killer (R) Wireless-AC 1550i Wireless Network Adapter (9560NGW)", 269 - .fw_name_pre = IWL9000_FW_PRE, 270 - IWL_DEVICE_9000, 271 - .integrated = true, 272 - .soc_latency = 5000, 273 - }; 274 - 275 - const struct iwl_cfg iwl9560_killer_s_2ac_cfg_soc = { 276 - .name = "Killer (R) Wireless-AC 1550s Wireless Network Adapter (9560NGW)", 277 - .fw_name_pre = IWL9000_FW_PRE, 278 - IWL_DEVICE_9000, 279 - .integrated = true, 280 - .soc_latency = 5000, 281 - }; 282 - 283 - const struct iwl_cfg iwl9460_2ac_cfg_shared_clk = { 284 - .name = "Intel(R) Dual Band Wireless AC 9460", 285 - .fw_name_pre = IWL9000_FW_PRE, 286 - IWL_DEVICE_9000, 287 - .integrated = true, 288 - .soc_latency = 5000, 289 - .extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK 290 - }; 291 - 292 - const struct iwl_cfg iwl9461_2ac_cfg_shared_clk = { 293 - .name = "Intel(R) Dual Band Wireless AC 9461", 294 - .fw_name_pre = IWL9000_FW_PRE, 295 - IWL_DEVICE_9000, 296 - .integrated = true, 297 - .soc_latency = 5000, 298 - .extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK 299 - }; 300 - 301 - const struct iwl_cfg iwl9462_2ac_cfg_shared_clk = { 302 - .name = "Intel(R) Dual Band Wireless AC 9462", 303 - .fw_name_pre = IWL9000_FW_PRE, 304 - IWL_DEVICE_9000, 305 - .integrated = true, 306 - .soc_latency = 5000, 307 - .extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK 308 217 }; 309 218 310 219 const struct iwl_cfg iwl9560_2ac_cfg_shared_clk = { 311 - .name = "Intel(R) Dual Band Wireless AC 9560", 312 - .fw_name_pre = IWL9000_FW_PRE, 313 - IWL_DEVICE_9000, 314 - .integrated = true, 315 - .soc_latency = 5000, 316 - .extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK 317 - }; 318 - 319 - const struct iwl_cfg iwl9560_2ac_160_cfg_shared_clk = { 320 - .name = "Intel(R) Wireless-AC 9560 160MHz", 321 - .fw_name_pre = IWL9000_FW_PRE, 322 - IWL_DEVICE_9000, 323 - .integrated = true, 324 - .soc_latency = 5000, 325 - .extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK 326 - }; 327 - 328 - const struct iwl_cfg iwl9560_killer_2ac_cfg_shared_clk = { 329 - .name = "Killer (R) Wireless-AC 1550i Wireless Network Adapter (9560NGW)", 330 - .fw_name_pre = IWL9000_FW_PRE, 331 - IWL_DEVICE_9000, 332 - .integrated = true, 333 - .soc_latency = 5000, 334 - .extra_phy_cfg_flags = FW_PHY_CFG_SHARED_CLK 335 - }; 336 - 337 - const struct iwl_cfg iwl9560_killer_s_2ac_cfg_shared_clk = { 338 - .name = "Killer (R) Wireless-AC 1550s Wireless Network Adapter (9560NGW)", 339 220 .fw_name_pre = IWL9000_FW_PRE, 340 221 IWL_DEVICE_9000, 341 222 .integrated = true,
+49 -10
drivers/net/wireless/intel/iwlwifi/iwl-config.h
··· 454 454 455 455 #define IWL_CFG_ANY (~0) 456 456 457 + #define IWL_CFG_MAC_TYPE_PU 0x31 458 + #define IWL_CFG_MAC_TYPE_PNJ 0x32 459 + #define IWL_CFG_MAC_TYPE_TH 0x32 460 + #define IWL_CFG_MAC_TYPE_QU 0x33 461 + 462 + #define IWL_CFG_RF_TYPE_TH 0x105 463 + #define IWL_CFG_RF_TYPE_TH1 0x108 464 + #define IWL_CFG_RF_TYPE_JF2 0x105 465 + #define IWL_CFG_RF_TYPE_JF1 0x108 466 + 467 + #define IWL_CFG_RF_ID_TH 0x1 468 + #define IWL_CFG_RF_ID_TH1 0x1 469 + #define IWL_CFG_RF_ID_JF 0x3 470 + #define IWL_CFG_RF_ID_JF1 0x6 471 + #define IWL_CFG_RF_ID_JF1_DIV 0xA 472 + 473 + #define IWL_CFG_NO_160 0x0 474 + #define IWL_CFG_160 0x1 475 + 476 + #define IWL_CFG_CORES_BT 0x0 477 + #define IWL_CFG_CORES_BT_GNSS 0x5 478 + 479 + #define IWL_SUBDEVICE_RF_ID(subdevice) ((u16)((subdevice) & 0x00F0) >> 4) 480 + #define IWL_SUBDEVICE_NO_160(subdevice) ((u16)((subdevice) & 0x0100) >> 9) 481 + #define IWL_SUBDEVICE_CORES(subdevice) ((u16)((subdevice) & 0x1C00) >> 10) 482 + 457 483 struct iwl_dev_info { 458 484 u16 device; 459 485 u16 subdevice; 486 + u16 mac_type; 487 + u16 rf_type; 488 + u8 rf_id; 489 + u8 no_160; 490 + u8 cores; 460 491 const struct iwl_cfg *cfg; 461 492 const char *name; 462 493 }; ··· 496 465 * This list declares the config structures for all devices. 497 466 */ 498 467 extern const struct iwl_cfg_trans_params iwl9000_trans_cfg; 468 + extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg; 469 + extern const char iwl9162_name[]; 470 + extern const char iwl9260_name[]; 471 + extern const char iwl9260_1_name[]; 472 + extern const char iwl9270_name[]; 473 + extern const char iwl9461_name[]; 474 + extern const char iwl9462_name[]; 475 + extern const char iwl9560_name[]; 476 + extern const char iwl9162_160_name[]; 499 477 extern const char iwl9260_160_name[]; 478 + extern const char iwl9270_160_name[]; 479 + extern const char iwl9461_160_name[]; 480 + extern const char iwl9462_160_name[]; 500 481 extern const char iwl9560_160_name[]; 482 + extern const char iwl9260_killer_1550_name[]; 483 + extern const char iwl9560_killer_1550i_name[]; 484 + extern const char iwl9560_killer_1550s_name[]; 485 + extern const char iwl_ax200_name[]; 486 + extern const char iwl_ax200_killer_1650w_name[]; 487 + extern const char iwl_ax200_killer_1650x_name[]; 501 488 502 489 #if IS_ENABLED(CONFIG_IWLDVM) 503 490 extern const struct iwl_cfg iwl5300_agn_cfg; ··· 582 533 extern const struct iwl_cfg iwl8265_2ac_cfg; 583 534 extern const struct iwl_cfg iwl8275_2ac_cfg; 584 535 extern const struct iwl_cfg iwl4165_2ac_cfg; 585 - extern const struct iwl_cfg iwl9160_2ac_cfg; 586 536 extern const struct iwl_cfg iwl9260_2ac_cfg; 587 537 extern const struct iwl_cfg iwl9260_2ac_160_cfg; 588 538 extern const struct iwl_cfg iwl9260_killer_2ac_cfg; 589 539 extern const struct iwl_cfg iwl9270_2ac_cfg; 590 - extern const struct iwl_cfg iwl9460_2ac_cfg; 591 540 extern const struct iwl_cfg iwl9560_2ac_cfg; 592 541 extern const struct iwl_cfg iwl9560_2ac_cfg_quz_a0_jf_b0_soc; 593 - extern const struct iwl_cfg iwl9560_2ac_160_cfg; 594 542 extern const struct iwl_cfg iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc; 595 - extern const struct iwl_cfg iwl9460_2ac_cfg_soc; 596 - extern const struct iwl_cfg iwl9461_2ac_cfg_soc; 597 543 extern const struct iwl_cfg iwl9461_2ac_cfg_quz_a0_jf_b0_soc; 598 - extern const struct iwl_cfg iwl9462_2ac_cfg_soc; 599 544 extern const struct iwl_cfg iwl9462_2ac_cfg_quz_a0_jf_b0_soc; 600 545 extern const struct iwl_cfg iwl9560_2ac_cfg_soc; 601 - extern const struct iwl_cfg iwl9560_2ac_160_cfg_soc; 602 - extern const struct iwl_cfg iwl9560_killer_2ac_cfg_soc; 603 - extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_soc; 604 546 extern const struct iwl_cfg iwl9560_killer_i_2ac_cfg_quz_a0_jf_b0_soc; 605 547 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_quz_a0_jf_b0_soc; 606 - extern const struct iwl_cfg iwl9460_2ac_cfg_shared_clk; 607 548 extern const struct iwl_cfg iwl9461_2ac_cfg_shared_clk; 608 549 extern const struct iwl_cfg iwl9462_2ac_cfg_shared_clk; 609 550 extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk;
+157 -196
drivers/net/wireless/intel/iwlwifi/pcie/drv.c
··· 566 566 {IWL_PCI_DEVICE(0x06F0, 0x4234, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)}, 567 567 {IWL_PCI_DEVICE(0x06F0, 0x42A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)}, 568 568 569 - {IWL_PCI_DEVICE(0x2526, 0x0034, iwl9560_2ac_cfg)}, 570 - {IWL_PCI_DEVICE(0x2526, 0x0060, iwl9461_2ac_cfg_soc)}, 571 - {IWL_PCI_DEVICE(0x2526, 0x0064, iwl9461_2ac_cfg_soc)}, 572 - {IWL_PCI_DEVICE(0x2526, 0x00A0, iwl9462_2ac_cfg_soc)}, 573 - {IWL_PCI_DEVICE(0x2526, 0x00A4, iwl9462_2ac_cfg_soc)}, 574 - {IWL_PCI_DEVICE(0x2526, 0x0210, iwl9260_2ac_cfg)}, 575 - {IWL_PCI_DEVICE(0x2526, 0x0214, iwl9260_2ac_cfg)}, 576 - {IWL_PCI_DEVICE(0x2526, 0x0230, iwl9560_2ac_cfg)}, 577 - {IWL_PCI_DEVICE(0x2526, 0x0234, iwl9560_2ac_cfg)}, 578 - {IWL_PCI_DEVICE(0x2526, 0x0238, iwl9560_2ac_cfg)}, 579 - {IWL_PCI_DEVICE(0x2526, 0x023C, iwl9560_2ac_cfg)}, 580 - {IWL_PCI_DEVICE(0x2526, 0x0260, iwl9461_2ac_cfg_soc)}, 581 - {IWL_PCI_DEVICE(0x2526, 0x0264, iwl9461_2ac_cfg_soc)}, 582 - {IWL_PCI_DEVICE(0x2526, 0x02A0, iwl9462_2ac_cfg_soc)}, 583 - {IWL_PCI_DEVICE(0x2526, 0x02A4, iwl9462_2ac_cfg_soc)}, 584 - {IWL_PCI_DEVICE(0x2526, 0x1010, iwl9260_2ac_cfg)}, 585 - {IWL_PCI_DEVICE(0x2526, 0x1030, iwl9560_2ac_cfg)}, 586 - {IWL_PCI_DEVICE(0x2526, 0x1210, iwl9260_2ac_cfg)}, 587 - {IWL_PCI_DEVICE(0x2526, 0x1410, iwl9270_2ac_cfg)}, 588 - {IWL_PCI_DEVICE(0x2526, 0x1420, iwl9460_2ac_cfg_soc)}, 589 - {IWL_PCI_DEVICE(0x2526, 0x1550, iwl9260_killer_2ac_cfg)}, 590 - {IWL_PCI_DEVICE(0x2526, 0x1551, iwl9560_killer_s_2ac_cfg_soc)}, 591 - {IWL_PCI_DEVICE(0x2526, 0x1552, iwl9560_killer_2ac_cfg_soc)}, 592 - {IWL_PCI_DEVICE(0x2526, 0x1610, iwl9270_2ac_cfg)}, 593 - {IWL_PCI_DEVICE(0x2526, 0x2030, iwl9560_2ac_160_cfg_soc)}, 594 - {IWL_PCI_DEVICE(0x2526, 0x2034, iwl9560_2ac_160_cfg_soc)}, 595 - {IWL_PCI_DEVICE(0x2526, 0x4034, iwl9560_2ac_160_cfg_soc)}, 596 - {IWL_PCI_DEVICE(0x2526, 0x40A4, iwl9462_2ac_cfg_soc)}, 597 - {IWL_PCI_DEVICE(0x2526, 0x4234, iwl9560_2ac_cfg_soc)}, 598 - {IWL_PCI_DEVICE(0x2526, 0x42A4, iwl9462_2ac_cfg_soc)}, 599 569 {IWL_PCI_DEVICE(0x2526, PCI_ANY_ID, iwl9000_trans_cfg)}, 600 - 601 - {IWL_PCI_DEVICE(0x271B, 0x0010, iwl9160_2ac_cfg)}, 602 - {IWL_PCI_DEVICE(0x271B, 0x0014, iwl9160_2ac_cfg)}, 603 - {IWL_PCI_DEVICE(0x271B, 0x0210, iwl9160_2ac_cfg)}, 604 - {IWL_PCI_DEVICE(0x271B, 0x0214, iwl9260_2ac_cfg)}, 605 - {IWL_PCI_DEVICE(0x271C, 0x0214, iwl9260_2ac_cfg)}, 570 + {IWL_PCI_DEVICE(0x271B, PCI_ANY_ID, iwl9000_trans_cfg)}, 571 + {IWL_PCI_DEVICE(0x271C, PCI_ANY_ID, iwl9000_trans_cfg)}, 572 + {IWL_PCI_DEVICE(0x30DC, PCI_ANY_ID, iwl9000_trans_cfg)}, 573 + {IWL_PCI_DEVICE(0x31DC, PCI_ANY_ID, iwl9000_trans_cfg)}, 574 + {IWL_PCI_DEVICE(0x9DF0, PCI_ANY_ID, iwl9000_trans_cfg)}, 575 + {IWL_PCI_DEVICE(0xA370, PCI_ANY_ID, iwl9000_trans_cfg)}, 606 576 607 577 {IWL_PCI_DEVICE(0x2720, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)}, 608 578 {IWL_PCI_DEVICE(0x2720, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, ··· 599 629 {IWL_PCI_DEVICE(0x2720, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, 600 630 {IWL_PCI_DEVICE(0x2720, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, 601 631 {IWL_PCI_DEVICE(0x2720, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, 602 - 603 - {IWL_PCI_DEVICE(0x30DC, 0x0030, iwl9560_2ac_160_cfg_soc)}, 604 - {IWL_PCI_DEVICE(0x30DC, 0x0034, iwl9560_2ac_cfg_soc)}, 605 - {IWL_PCI_DEVICE(0x30DC, 0x0038, iwl9560_2ac_160_cfg_soc)}, 606 - {IWL_PCI_DEVICE(0x30DC, 0x003C, iwl9560_2ac_160_cfg_soc)}, 607 - {IWL_PCI_DEVICE(0x30DC, 0x0060, iwl9460_2ac_cfg_soc)}, 608 - {IWL_PCI_DEVICE(0x30DC, 0x0064, iwl9461_2ac_cfg_soc)}, 609 - {IWL_PCI_DEVICE(0x30DC, 0x00A0, iwl9462_2ac_cfg_soc)}, 610 - {IWL_PCI_DEVICE(0x30DC, 0x00A4, iwl9462_2ac_cfg_soc)}, 611 - {IWL_PCI_DEVICE(0x30DC, 0x0230, iwl9560_2ac_cfg_soc)}, 612 - {IWL_PCI_DEVICE(0x30DC, 0x0234, iwl9560_2ac_cfg_soc)}, 613 - {IWL_PCI_DEVICE(0x30DC, 0x0238, iwl9560_2ac_cfg_soc)}, 614 - {IWL_PCI_DEVICE(0x30DC, 0x023C, iwl9560_2ac_cfg_soc)}, 615 - {IWL_PCI_DEVICE(0x30DC, 0x0260, iwl9461_2ac_cfg_soc)}, 616 - {IWL_PCI_DEVICE(0x30DC, 0x0264, iwl9461_2ac_cfg_soc)}, 617 - {IWL_PCI_DEVICE(0x30DC, 0x02A0, iwl9462_2ac_cfg_soc)}, 618 - {IWL_PCI_DEVICE(0x30DC, 0x02A4, iwl9462_2ac_cfg_soc)}, 619 - {IWL_PCI_DEVICE(0x30DC, 0x1010, iwl9260_2ac_cfg)}, 620 - {IWL_PCI_DEVICE(0x30DC, 0x1030, iwl9560_2ac_cfg_soc)}, 621 - {IWL_PCI_DEVICE(0x30DC, 0x1210, iwl9260_2ac_cfg)}, 622 - {IWL_PCI_DEVICE(0x30DC, 0x1551, iwl9560_killer_s_2ac_cfg_soc)}, 623 - {IWL_PCI_DEVICE(0x30DC, 0x1552, iwl9560_killer_2ac_cfg_soc)}, 624 - {IWL_PCI_DEVICE(0x30DC, 0x2030, iwl9560_2ac_160_cfg_soc)}, 625 - {IWL_PCI_DEVICE(0x30DC, 0x2034, iwl9560_2ac_160_cfg_soc)}, 626 - {IWL_PCI_DEVICE(0x30DC, 0x4030, iwl9560_2ac_160_cfg_soc)}, 627 - {IWL_PCI_DEVICE(0x30DC, 0x4034, iwl9560_2ac_160_cfg_soc)}, 628 - {IWL_PCI_DEVICE(0x30DC, 0x40A4, iwl9462_2ac_cfg_soc)}, 629 - {IWL_PCI_DEVICE(0x30DC, 0x4234, iwl9560_2ac_cfg_soc)}, 630 - {IWL_PCI_DEVICE(0x30DC, 0x42A4, iwl9462_2ac_cfg_soc)}, 631 - 632 - {IWL_PCI_DEVICE(0x31DC, 0x0030, iwl9560_2ac_160_cfg_shared_clk)}, 633 - {IWL_PCI_DEVICE(0x31DC, 0x0034, iwl9560_2ac_cfg_shared_clk)}, 634 - {IWL_PCI_DEVICE(0x31DC, 0x0038, iwl9560_2ac_160_cfg_shared_clk)}, 635 - {IWL_PCI_DEVICE(0x31DC, 0x003C, iwl9560_2ac_160_cfg_shared_clk)}, 636 - {IWL_PCI_DEVICE(0x31DC, 0x0060, iwl9460_2ac_cfg_shared_clk)}, 637 - {IWL_PCI_DEVICE(0x31DC, 0x0064, iwl9461_2ac_cfg_shared_clk)}, 638 - {IWL_PCI_DEVICE(0x31DC, 0x00A0, iwl9462_2ac_cfg_shared_clk)}, 639 - {IWL_PCI_DEVICE(0x31DC, 0x00A4, iwl9462_2ac_cfg_shared_clk)}, 640 - {IWL_PCI_DEVICE(0x31DC, 0x0230, iwl9560_2ac_cfg_shared_clk)}, 641 - {IWL_PCI_DEVICE(0x31DC, 0x0234, iwl9560_2ac_cfg_shared_clk)}, 642 - {IWL_PCI_DEVICE(0x31DC, 0x0238, iwl9560_2ac_cfg_shared_clk)}, 643 - {IWL_PCI_DEVICE(0x31DC, 0x023C, iwl9560_2ac_cfg_shared_clk)}, 644 - {IWL_PCI_DEVICE(0x31DC, 0x0260, iwl9461_2ac_cfg_shared_clk)}, 645 - {IWL_PCI_DEVICE(0x31DC, 0x0264, iwl9461_2ac_cfg_shared_clk)}, 646 - {IWL_PCI_DEVICE(0x31DC, 0x02A0, iwl9462_2ac_cfg_shared_clk)}, 647 - {IWL_PCI_DEVICE(0x31DC, 0x02A4, iwl9462_2ac_cfg_shared_clk)}, 648 - {IWL_PCI_DEVICE(0x31DC, 0x1010, iwl9260_2ac_cfg)}, 649 - {IWL_PCI_DEVICE(0x31DC, 0x1030, iwl9560_2ac_cfg_shared_clk)}, 650 - {IWL_PCI_DEVICE(0x31DC, 0x1210, iwl9260_2ac_cfg)}, 651 - {IWL_PCI_DEVICE(0x31DC, 0x1551, iwl9560_killer_s_2ac_cfg_shared_clk)}, 652 - {IWL_PCI_DEVICE(0x31DC, 0x1552, iwl9560_killer_2ac_cfg_shared_clk)}, 653 - {IWL_PCI_DEVICE(0x31DC, 0x2030, iwl9560_2ac_160_cfg_shared_clk)}, 654 - {IWL_PCI_DEVICE(0x31DC, 0x2034, iwl9560_2ac_160_cfg_shared_clk)}, 655 - {IWL_PCI_DEVICE(0x31DC, 0x4030, iwl9560_2ac_160_cfg_shared_clk)}, 656 - {IWL_PCI_DEVICE(0x31DC, 0x4034, iwl9560_2ac_160_cfg_shared_clk)}, 657 - {IWL_PCI_DEVICE(0x31DC, 0x40A4, iwl9462_2ac_cfg_shared_clk)}, 658 - {IWL_PCI_DEVICE(0x31DC, 0x4234, iwl9560_2ac_cfg_shared_clk)}, 659 - {IWL_PCI_DEVICE(0x31DC, 0x42A4, iwl9462_2ac_cfg_shared_clk)}, 660 632 661 633 {IWL_PCI_DEVICE(0x34F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, 662 634 {IWL_PCI_DEVICE(0x34F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)}, ··· 680 768 {IWL_PCI_DEVICE(0x43F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, 681 769 {IWL_PCI_DEVICE(0x43F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, 682 770 683 - {IWL_PCI_DEVICE(0x9DF0, 0x0000, iwl9460_2ac_cfg_soc)}, 684 - {IWL_PCI_DEVICE(0x9DF0, 0x0010, iwl9460_2ac_cfg_soc)}, 685 - {IWL_PCI_DEVICE(0x9DF0, 0x0030, iwl9560_2ac_160_cfg_soc)}, 686 - {IWL_PCI_DEVICE(0x9DF0, 0x0034, iwl9560_2ac_cfg_soc)}, 687 - {IWL_PCI_DEVICE(0x9DF0, 0x0038, iwl9560_2ac_160_cfg_soc)}, 688 - {IWL_PCI_DEVICE(0x9DF0, 0x003C, iwl9560_2ac_160_cfg_soc)}, 689 - {IWL_PCI_DEVICE(0x9DF0, 0x0060, iwl9460_2ac_cfg_soc)}, 690 - {IWL_PCI_DEVICE(0x9DF0, 0x0064, iwl9461_2ac_cfg_soc)}, 691 - {IWL_PCI_DEVICE(0x9DF0, 0x00A0, iwl9462_2ac_cfg_soc)}, 692 - {IWL_PCI_DEVICE(0x9DF0, 0x00A4, iwl9462_2ac_cfg_soc)}, 693 - {IWL_PCI_DEVICE(0x9DF0, 0x0210, iwl9460_2ac_cfg_soc)}, 694 - {IWL_PCI_DEVICE(0x9DF0, 0x0230, iwl9560_2ac_cfg_soc)}, 695 - {IWL_PCI_DEVICE(0x9DF0, 0x0234, iwl9560_2ac_cfg_soc)}, 696 - {IWL_PCI_DEVICE(0x9DF0, 0x0238, iwl9560_2ac_cfg_soc)}, 697 - {IWL_PCI_DEVICE(0x9DF0, 0x023C, iwl9560_2ac_cfg_soc)}, 698 - {IWL_PCI_DEVICE(0x9DF0, 0x0260, iwl9461_2ac_cfg_soc)}, 699 - {IWL_PCI_DEVICE(0x9DF0, 0x0264, iwl9461_2ac_cfg_soc)}, 700 - {IWL_PCI_DEVICE(0x9DF0, 0x02A0, iwl9462_2ac_cfg_soc)}, 701 - {IWL_PCI_DEVICE(0x9DF0, 0x02A4, iwl9462_2ac_cfg_soc)}, 702 - {IWL_PCI_DEVICE(0x9DF0, 0x0310, iwl9460_2ac_cfg_soc)}, 703 - {IWL_PCI_DEVICE(0x9DF0, 0x0410, iwl9460_2ac_cfg_soc)}, 704 - {IWL_PCI_DEVICE(0x9DF0, 0x0510, iwl9460_2ac_cfg_soc)}, 705 - {IWL_PCI_DEVICE(0x9DF0, 0x0610, iwl9460_2ac_cfg_soc)}, 706 - {IWL_PCI_DEVICE(0x9DF0, 0x0710, iwl9460_2ac_cfg_soc)}, 707 - {IWL_PCI_DEVICE(0x9DF0, 0x0A10, iwl9460_2ac_cfg_soc)}, 708 - {IWL_PCI_DEVICE(0x9DF0, 0x1010, iwl9260_2ac_cfg)}, 709 - {IWL_PCI_DEVICE(0x9DF0, 0x1030, iwl9560_2ac_cfg_soc)}, 710 - {IWL_PCI_DEVICE(0x9DF0, 0x1210, iwl9260_2ac_cfg)}, 711 - {IWL_PCI_DEVICE(0x9DF0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)}, 712 - {IWL_PCI_DEVICE(0x9DF0, 0x1552, iwl9560_killer_2ac_cfg_soc)}, 713 - {IWL_PCI_DEVICE(0x9DF0, 0x2010, iwl9460_2ac_cfg_soc)}, 714 - {IWL_PCI_DEVICE(0x9DF0, 0x2030, iwl9560_2ac_160_cfg_soc)}, 715 - {IWL_PCI_DEVICE(0x9DF0, 0x2034, iwl9560_2ac_160_cfg_soc)}, 716 - {IWL_PCI_DEVICE(0x9DF0, 0x2A10, iwl9460_2ac_cfg_soc)}, 717 - {IWL_PCI_DEVICE(0x9DF0, 0x4030, iwl9560_2ac_160_cfg_soc)}, 718 - {IWL_PCI_DEVICE(0x9DF0, 0x4034, iwl9560_2ac_160_cfg_soc)}, 719 - {IWL_PCI_DEVICE(0x9DF0, 0x40A4, iwl9462_2ac_cfg_soc)}, 720 - {IWL_PCI_DEVICE(0x9DF0, 0x4234, iwl9560_2ac_cfg_soc)}, 721 - {IWL_PCI_DEVICE(0x9DF0, 0x42A4, iwl9462_2ac_cfg_soc)}, 722 - 723 771 {IWL_PCI_DEVICE(0xA0F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, 724 772 {IWL_PCI_DEVICE(0xA0F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)}, 725 773 {IWL_PCI_DEVICE(0xA0F0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, ··· 707 835 {IWL_PCI_DEVICE(0xA0F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, 708 836 {IWL_PCI_DEVICE(0xA0F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, 709 837 710 - {IWL_PCI_DEVICE(0xA370, 0x0030, iwl9560_2ac_160_cfg_soc)}, 711 - {IWL_PCI_DEVICE(0xA370, 0x0034, iwl9560_2ac_cfg_soc)}, 712 - {IWL_PCI_DEVICE(0xA370, 0x0038, iwl9560_2ac_160_cfg_soc)}, 713 - {IWL_PCI_DEVICE(0xA370, 0x003C, iwl9560_2ac_160_cfg_soc)}, 714 - {IWL_PCI_DEVICE(0xA370, 0x0060, iwl9460_2ac_cfg_soc)}, 715 - {IWL_PCI_DEVICE(0xA370, 0x0064, iwl9461_2ac_cfg_soc)}, 716 - {IWL_PCI_DEVICE(0xA370, 0x00A0, iwl9462_2ac_cfg_soc)}, 717 - {IWL_PCI_DEVICE(0xA370, 0x00A4, iwl9462_2ac_cfg_soc)}, 718 - {IWL_PCI_DEVICE(0xA370, 0x0230, iwl9560_2ac_cfg_soc)}, 719 - {IWL_PCI_DEVICE(0xA370, 0x0234, iwl9560_2ac_cfg_soc)}, 720 - {IWL_PCI_DEVICE(0xA370, 0x0238, iwl9560_2ac_cfg_soc)}, 721 - {IWL_PCI_DEVICE(0xA370, 0x023C, iwl9560_2ac_cfg_soc)}, 722 - {IWL_PCI_DEVICE(0xA370, 0x0260, iwl9461_2ac_cfg_soc)}, 723 - {IWL_PCI_DEVICE(0xA370, 0x0264, iwl9461_2ac_cfg_soc)}, 724 - {IWL_PCI_DEVICE(0xA370, 0x02A0, iwl9462_2ac_cfg_soc)}, 725 - {IWL_PCI_DEVICE(0xA370, 0x02A4, iwl9462_2ac_cfg_soc)}, 726 - {IWL_PCI_DEVICE(0xA370, 0x1010, iwl9260_2ac_cfg)}, 727 - {IWL_PCI_DEVICE(0xA370, 0x1030, iwl9560_2ac_cfg_soc)}, 728 - {IWL_PCI_DEVICE(0xA370, 0x1210, iwl9260_2ac_cfg)}, 729 - {IWL_PCI_DEVICE(0xA370, 0x1551, iwl9560_killer_s_2ac_cfg_soc)}, 730 - {IWL_PCI_DEVICE(0xA370, 0x1552, iwl9560_killer_2ac_cfg_soc)}, 731 - {IWL_PCI_DEVICE(0xA370, 0x2030, iwl9560_2ac_160_cfg_soc)}, 732 - {IWL_PCI_DEVICE(0xA370, 0x2034, iwl9560_2ac_160_cfg_soc)}, 733 - {IWL_PCI_DEVICE(0xA370, 0x4030, iwl9560_2ac_160_cfg_soc)}, 734 - {IWL_PCI_DEVICE(0xA370, 0x4034, iwl9560_2ac_160_cfg_soc)}, 735 - {IWL_PCI_DEVICE(0xA370, 0x40A4, iwl9462_2ac_cfg_soc)}, 736 - {IWL_PCI_DEVICE(0xA370, 0x4234, iwl9560_2ac_cfg_soc)}, 737 - {IWL_PCI_DEVICE(0xA370, 0x42A4, iwl9462_2ac_cfg_soc)}, 738 838 {IWL_PCI_DEVICE(0x2720, 0x0030, iwl9560_2ac_cfg_qnj_jf_b0)}, 739 839 740 840 /* 22000 Series */ 841 + {IWL_PCI_DEVICE(0x2723, PCI_ANY_ID, iwl_ax200_trans_cfg)}, 842 + 741 843 {IWL_PCI_DEVICE(0x02F0, 0x0070, iwl_ax201_cfg_quz_hr)}, 742 844 {IWL_PCI_DEVICE(0x02F0, 0x0074, iwl_ax201_cfg_quz_hr)}, 743 845 {IWL_PCI_DEVICE(0x02F0, 0x0078, iwl_ax201_cfg_quz_hr)}, ··· 786 940 {IWL_PCI_DEVICE(0xA0F0, 0x4070, iwl_ax201_cfg_qu_hr)}, 787 941 {IWL_PCI_DEVICE(0xA0F0, 0x4244, iwl_ax101_cfg_qu_hr)}, 788 942 789 - {IWL_PCI_DEVICE(0x2723, 0x0080, iwl_ax200_cfg_cc)}, 790 - {IWL_PCI_DEVICE(0x2723, 0x0084, iwl_ax200_cfg_cc)}, 791 - {IWL_PCI_DEVICE(0x2723, 0x0088, iwl_ax200_cfg_cc)}, 792 - {IWL_PCI_DEVICE(0x2723, 0x008C, iwl_ax200_cfg_cc)}, 793 - {IWL_PCI_DEVICE(0x2723, 0x1653, killer1650w_2ax_cfg)}, 794 - {IWL_PCI_DEVICE(0x2723, 0x1654, killer1650x_2ax_cfg)}, 795 - {IWL_PCI_DEVICE(0x2723, 0x2080, iwl_ax200_cfg_cc)}, 796 - {IWL_PCI_DEVICE(0x2723, 0x4080, iwl_ax200_cfg_cc)}, 797 - {IWL_PCI_DEVICE(0x2723, 0x4088, iwl_ax200_cfg_cc)}, 798 - 799 943 {IWL_PCI_DEVICE(0x2725, 0x0090, iwlax211_2ax_cfg_so_gf_a0)}, 800 944 {IWL_PCI_DEVICE(0x2725, 0x0020, iwlax210_2ax_cfg_ty_gf_a0)}, 801 945 {IWL_PCI_DEVICE(0x2725, 0x0310, iwlax210_2ax_cfg_ty_gf_a0)}, ··· 807 971 }; 808 972 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids); 809 973 810 - #define IWL_DEV_INFO(_device, _subdevice, _cfg, _name) \ 811 - { .device = (_device), .subdevice = (_subdevice), .cfg = &(_cfg), \ 812 - .name = _name } 974 + #define _IWL_DEV_INFO(_device, _subdevice, _mac_type, _rf_type, _rf_id, \ 975 + _no_160, _cores, _cfg, _name) \ 976 + { .device = (_device), .subdevice = (_subdevice), .cfg = &(_cfg), \ 977 + .name = _name, .mac_type = _mac_type, .rf_type = _rf_type, \ 978 + .no_160 = _no_160, .cores = _cores, .rf_id = _rf_id, } 979 + 980 + #define IWL_DEV_INFO(_device, _subdevice, _cfg, _name) \ 981 + _IWL_DEV_INFO(_device, _subdevice, IWL_CFG_ANY, IWL_CFG_ANY, \ 982 + IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, _cfg, _name) 813 983 814 984 static const struct iwl_dev_info iwl_dev_info_table[] = { 815 985 #if IS_ENABLED(CONFIG_IWLMVM) 816 - IWL_DEV_INFO(0x2526, 0x0010, iwl9260_2ac_160_cfg, iwl9260_160_name), 817 - IWL_DEV_INFO(0x2526, 0x0014, iwl9260_2ac_160_cfg, iwl9260_160_name), 818 - IWL_DEV_INFO(0x2526, 0x0018, iwl9260_2ac_160_cfg, iwl9260_160_name), 819 - IWL_DEV_INFO(0x2526, 0x001C, iwl9260_2ac_160_cfg, iwl9260_160_name), 820 - IWL_DEV_INFO(0x2526, 0x6010, iwl9260_2ac_160_cfg, iwl9260_160_name), 821 - IWL_DEV_INFO(0x2526, 0x6014, iwl9260_2ac_160_cfg, iwl9260_160_name), 822 - IWL_DEV_INFO(0x2526, 0x8014, iwl9260_2ac_160_cfg, iwl9260_160_name), 823 - IWL_DEV_INFO(0x2526, 0x8010, iwl9260_2ac_160_cfg, iwl9260_160_name), 824 - IWL_DEV_INFO(0x2526, 0xA014, iwl9260_2ac_160_cfg, iwl9260_160_name), 825 - IWL_DEV_INFO(0x2526, 0xE010, iwl9260_2ac_160_cfg, iwl9260_160_name), 826 - IWL_DEV_INFO(0x2526, 0xE014, iwl9260_2ac_160_cfg, iwl9260_160_name), 986 + /* 9000 */ 987 + IWL_DEV_INFO(0x2526, 0x1550, iwl9260_2ac_cfg, iwl9260_killer_1550_name), 988 + IWL_DEV_INFO(0x2526, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name), 989 + IWL_DEV_INFO(0x2526, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name), 990 + IWL_DEV_INFO(0x30DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name), 991 + IWL_DEV_INFO(0x30DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name), 992 + IWL_DEV_INFO(0x31DC, 0x1551, iwl9560_2ac_cfg_shared_clk, iwl9560_killer_1550s_name), 993 + IWL_DEV_INFO(0x31DC, 0x1552, iwl9560_2ac_cfg_shared_clk, iwl9560_killer_1550i_name), 827 994 828 - IWL_DEV_INFO(0x2526, 0x0030, iwl9560_2ac_160_cfg, iwl9560_160_name), 829 - IWL_DEV_INFO(0x2526, 0x0038, iwl9560_2ac_160_cfg, iwl9560_160_name), 830 - IWL_DEV_INFO(0x2526, 0x003C, iwl9560_2ac_160_cfg, iwl9560_160_name), 831 - IWL_DEV_INFO(0x2526, 0x4030, iwl9560_2ac_160_cfg, iwl9560_160_name), 995 + IWL_DEV_INFO(0x271C, 0x0214, iwl9260_2ac_cfg, iwl9260_1_name), 996 + 997 + _IWL_DEV_INFO(0x31DC, IWL_CFG_ANY, 998 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, 999 + IWL_CFG_160, IWL_CFG_CORES_BT, 1000 + iwl9560_2ac_cfg_shared_clk, iwl9461_160_name), 1001 + _IWL_DEV_INFO(0x31DC, IWL_CFG_ANY, 1002 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, 1003 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1004 + iwl9560_2ac_cfg_shared_clk, iwl9461_name), 1005 + _IWL_DEV_INFO(0x31DC, IWL_CFG_ANY, 1006 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, 1007 + IWL_CFG_160, IWL_CFG_CORES_BT, 1008 + iwl9560_2ac_cfg_shared_clk, iwl9462_160_name), 1009 + _IWL_DEV_INFO(0x31DC, IWL_CFG_ANY, 1010 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, 1011 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1012 + iwl9560_2ac_cfg_shared_clk, iwl9462_name), 1013 + 1014 + _IWL_DEV_INFO(0x31DC, IWL_CFG_ANY, 1015 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, 1016 + IWL_CFG_160, IWL_CFG_CORES_BT, 1017 + iwl9560_2ac_cfg_shared_clk, iwl9560_160_name), 1018 + _IWL_DEV_INFO(0x31DC, IWL_CFG_ANY, 1019 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, 1020 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1021 + iwl9560_2ac_cfg_shared_clk, iwl9560_name), 1022 + 1023 + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, 1024 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, 1025 + IWL_CFG_160, IWL_CFG_CORES_BT, 1026 + iwl9560_2ac_cfg_soc, iwl9461_160_name), 1027 + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, 1028 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, 1029 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1030 + iwl9560_2ac_cfg_soc, iwl9461_name), 1031 + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, 1032 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, 1033 + IWL_CFG_160, IWL_CFG_CORES_BT, 1034 + iwl9560_2ac_cfg_soc, iwl9462_160_name), 1035 + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, 1036 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, 1037 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1038 + iwl9560_2ac_cfg_soc, iwl9462_name), 1039 + 1040 + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, 1041 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, 1042 + IWL_CFG_160, IWL_CFG_CORES_BT, 1043 + iwl9560_2ac_cfg_soc, iwl9560_160_name), 1044 + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, 1045 + IWL_CFG_MAC_TYPE_PU, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, 1046 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1047 + iwl9560_2ac_cfg_soc, iwl9560_name), 1048 + 1049 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1050 + IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, 1051 + IWL_CFG_160, IWL_CFG_CORES_BT, 1052 + iwl9560_2ac_cfg, iwl9461_160_name), 1053 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1054 + IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1, 1055 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1056 + iwl9560_2ac_cfg, iwl9461_name), 1057 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1058 + IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, 1059 + IWL_CFG_160, IWL_CFG_CORES_BT, 1060 + iwl9560_2ac_cfg, iwl9462_160_name), 1061 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1062 + IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, 1063 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1064 + iwl9560_2ac_cfg, iwl9462_name), 1065 + 1066 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1067 + IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, 1068 + IWL_CFG_160, IWL_CFG_CORES_BT, 1069 + iwl9560_2ac_cfg, iwl9560_160_name), 1070 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1071 + IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF, 1072 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1073 + iwl9560_2ac_cfg, iwl9560_name), 1074 + 1075 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1076 + IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, 1077 + IWL_CFG_160, IWL_CFG_CORES_BT_GNSS, 1078 + iwl9260_2ac_cfg, iwl9270_160_name), 1079 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1080 + IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, 1081 + IWL_CFG_NO_160, IWL_CFG_CORES_BT_GNSS, 1082 + iwl9260_2ac_cfg, iwl9270_name), 1083 + 1084 + _IWL_DEV_INFO(0x271B, IWL_CFG_ANY, 1085 + IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY, 1086 + IWL_CFG_160, IWL_CFG_CORES_BT, 1087 + iwl9260_2ac_cfg, iwl9162_160_name), 1088 + _IWL_DEV_INFO(0x271B, IWL_CFG_ANY, 1089 + IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY, 1090 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1091 + iwl9260_2ac_cfg, iwl9162_name), 1092 + 1093 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1094 + IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, 1095 + IWL_CFG_160, IWL_CFG_CORES_BT, 1096 + iwl9260_2ac_cfg, iwl9260_160_name), 1097 + _IWL_DEV_INFO(0x2526, IWL_CFG_ANY, 1098 + IWL_CFG_MAC_TYPE_TH, IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY, 1099 + IWL_CFG_NO_160, IWL_CFG_CORES_BT, 1100 + iwl9260_2ac_cfg, iwl9260_name), 1101 + 1102 + /* AX200 */ 1103 + IWL_DEV_INFO(0x2723, 0x1653, iwl_ax200_cfg_cc, iwl_ax200_killer_1650w_name), 1104 + IWL_DEV_INFO(0x2723, 0x1654, iwl_ax200_cfg_cc, iwl_ax200_killer_1650x_name), 1105 + IWL_DEV_INFO(0x2723, IWL_CFG_ANY, iwl_ax200_cfg_cc, iwl_ax200_name), 1106 + 832 1107 #endif /* CONFIG_IWLMVM */ 833 1108 }; 834 1109 ··· 975 1028 /* the trans_cfg should never change, so set it now */ 976 1029 iwl_trans->trans_cfg = trans; 977 1030 1031 + iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID); 1032 + 978 1033 for (i = 0; i < ARRAY_SIZE(iwl_dev_info_table); i++) { 979 1034 const struct iwl_dev_info *dev_info = &iwl_dev_info_table[i]; 980 - 981 - if ((dev_info->device == IWL_CFG_ANY || 1035 + if ((dev_info->device == (u16)IWL_CFG_ANY || 982 1036 dev_info->device == pdev->device) && 983 - (dev_info->subdevice == IWL_CFG_ANY || 984 - dev_info->subdevice == pdev->subsystem_device)) { 1037 + (dev_info->subdevice == (u16)IWL_CFG_ANY || 1038 + dev_info->subdevice == pdev->subsystem_device) && 1039 + (dev_info->mac_type == (u16)IWL_CFG_ANY || 1040 + dev_info->mac_type == 1041 + CSR_HW_REV_TYPE(iwl_trans->hw_rev)) && 1042 + (dev_info->rf_type == (u16)IWL_CFG_ANY || 1043 + dev_info->rf_type == 1044 + CSR_HW_RFID_TYPE(iwl_trans->hw_rf_id)) && 1045 + (dev_info->rf_id == (u8)IWL_CFG_ANY || 1046 + dev_info->rf_id == 1047 + IWL_SUBDEVICE_RF_ID(pdev->subsystem_device)) && 1048 + (dev_info->no_160 == (u8)IWL_CFG_ANY || 1049 + dev_info->no_160 == 1050 + IWL_SUBDEVICE_NO_160(pdev->subsystem_device)) && 1051 + (dev_info->cores == (u8)IWL_CFG_ANY || 1052 + dev_info->cores == 1053 + IWL_SUBDEVICE_CORES(pdev->subsystem_device))) { 985 1054 iwl_trans->cfg = dev_info->cfg; 986 1055 iwl_trans->name = dev_info->name; 987 1056 goto found; ··· 1021 1058 if (cfg_7265d && 1022 1059 (iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D) 1023 1060 iwl_trans->cfg = cfg_7265d; 1024 - 1025 - iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID); 1026 1061 1027 1062 if (cfg == &iwlax210_2ax_cfg_so_hr_a0) { 1028 1063 if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_TY) {
+1 -1
drivers/net/wireless/intersil/hostap/hostap_common.h
··· 322 322 u32 addr; /* wlan card address */ 323 323 u32 len; 324 324 void __user *ptr; /* pointer to data in user space */ 325 - } data[0]; 325 + } data[]; 326 326 }; 327 327 328 328 #define PRISM2_MAX_DOWNLOAD_AREA_LEN 131072
+1 -1
drivers/net/wireless/intersil/hostap/hostap_wlan.h
··· 615 615 u32 addr; /* wlan card address */ 616 616 u32 len; 617 617 u8 *data; /* allocated data */ 618 - } data[0]; 618 + } data[]; 619 619 }; 620 620 621 621
+1 -1
drivers/net/wireless/intersil/orinoco/fw.c
··· 49 49 __le32 pdr_offset; /* Offset to PDR data from eof header */ 50 50 __le32 pri_offset; /* Offset to primary plug data */ 51 51 __le32 compat_offset; /* Offset to compatibility data*/ 52 - char signature[0]; /* FW signature length headersize-20 */ 52 + char signature[]; /* FW signature length headersize-20 */ 53 53 } __packed; 54 54 55 55 /* Check the range of various header entries. Return a pointer to a
+1 -1
drivers/net/wireless/intersil/orinoco/hermes.h
··· 341 341 __le64 timestamp; 342 342 __le16 beacon_interval; 343 343 __le16 capabilities; 344 - u8 data[0]; 344 + u8 data[]; 345 345 } __packed; 346 346 347 347 #define HERMES_LINKSTATUS_NOT_CONNECTED (0x0000)
+3 -3
drivers/net/wireless/intersil/orinoco/hermes_dld.c
··· 64 64 struct dblock { 65 65 __le32 addr; /* adapter address where to write the block */ 66 66 __le16 len; /* length of the data only, in bytes */ 67 - char data[0]; /* data to be written */ 67 + char data[]; /* data to be written */ 68 68 } __packed; 69 69 70 70 /* ··· 76 76 __le32 id; /* record ID */ 77 77 __le32 addr; /* adapter address where to write the data */ 78 78 __le32 len; /* expected length of the data, in bytes */ 79 - char next[0]; /* next PDR starts here */ 79 + char next[]; /* next PDR starts here */ 80 80 } __packed; 81 81 82 82 /* ··· 87 87 struct pdi { 88 88 __le16 len; /* length of ID and data, in words */ 89 89 __le16 id; /* record ID */ 90 - char data[0]; /* plug data */ 90 + char data[]; /* plug data */ 91 91 } __packed; 92 92 93 93 /*** FW data block access functions ***/
+1 -1
drivers/net/wireless/intersil/orinoco/orinoco_usb.c
··· 202 202 __le16 crc; /* CRC up to here */ 203 203 __le16 hermes_len; 204 204 __le16 hermes_rid; 205 - u8 data[0]; 205 + u8 data[]; 206 206 } __packed; 207 207 208 208 /* Table of devices that work or may work with this driver */
+4 -4
drivers/net/wireless/intersil/p54/eeprom.h
··· 24 24 struct pda_entry { 25 25 __le16 len; /* includes both code and data */ 26 26 __le16 code; 27 - u8 data[0]; 27 + u8 data[]; 28 28 } __packed; 29 29 30 30 struct eeprom_pda_wrap { ··· 32 32 __le16 pad; 33 33 __le16 len; 34 34 __le32 arm_opcode; 35 - u8 data[0]; 35 + u8 data[]; 36 36 } __packed; 37 37 38 38 struct p54_iq_autocal_entry { ··· 87 87 u8 channels; 88 88 u8 points_per_channel; 89 89 u8 padding; 90 - u8 data[0]; 90 + u8 data[]; 91 91 } __packed; 92 92 93 93 struct pda_rssi_cal_ext_entry { ··· 119 119 __le16 entry_size; 120 120 __le16 offset; 121 121 __le16 len; 122 - u8 data[0]; 122 + u8 data[]; 123 123 } __packed; 124 124 125 125 /*
+3 -3
drivers/net/wireless/intersil/p54/lmac.h
··· 81 81 __le16 type; /* enum p54_control_frame_types */ 82 82 u8 rts_tries; 83 83 u8 tries; 84 - u8 data[0]; 84 + u8 data[]; 85 85 } __packed; 86 86 87 87 #define GET_REQ_ID(skb) \ ··· 176 176 u8 rssi_raw; 177 177 __le32 tsf32; 178 178 __le32 unalloc0; 179 - u8 align[0]; 179 + u8 align[]; 180 180 } __packed; 181 181 182 182 enum p54_trap_type { ··· 267 267 } __packed normal; 268 268 } __packed; 269 269 u8 unalloc2[2]; 270 - u8 align[0]; 270 + u8 align[]; 271 271 } __packed; 272 272 273 273 /* unit is ms */
+1 -1
drivers/net/wireless/intersil/p54/p54.h
··· 126 126 size_t entry_size; 127 127 size_t offset; 128 128 size_t len; 129 - u8 data[0]; 129 + u8 data[]; 130 130 }; 131 131 132 132 #define EEPROM_READBACK_LEN 0x3fc
+17 -17
drivers/net/wireless/intersil/prism54/oid_mgt.c
··· 780 780 { 781 781 switch (isl_oid[n].flags & OID_FLAG_TYPE) { 782 782 case OID_TYPE_U32: 783 - return snprintf(str, PRIV_STR_SIZE, "%u\n", r->u); 783 + return scnprintf(str, PRIV_STR_SIZE, "%u\n", r->u); 784 784 case OID_TYPE_BUFFER:{ 785 785 struct obj_buffer *buff = r->ptr; 786 - return snprintf(str, PRIV_STR_SIZE, 786 + return scnprintf(str, PRIV_STR_SIZE, 787 787 "size=%u\naddr=0x%X\n", buff->size, 788 788 buff->addr); 789 789 } 790 790 break; 791 791 case OID_TYPE_BSS:{ 792 792 struct obj_bss *bss = r->ptr; 793 - return snprintf(str, PRIV_STR_SIZE, 793 + return scnprintf(str, PRIV_STR_SIZE, 794 794 "age=%u\nchannel=%u\n" 795 795 "capinfo=0x%X\nrates=0x%X\n" 796 796 "basic_rates=0x%X\n", bss->age, ··· 801 801 case OID_TYPE_BSSLIST:{ 802 802 struct obj_bsslist *list = r->ptr; 803 803 int i, k; 804 - k = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", list->nr); 804 + k = scnprintf(str, PRIV_STR_SIZE, "nr=%u\n", list->nr); 805 805 for (i = 0; i < list->nr; i++) 806 - k += snprintf(str + k, PRIV_STR_SIZE - k, 806 + k += scnprintf(str + k, PRIV_STR_SIZE - k, 807 807 "bss[%u] :\nage=%u\nchannel=%u\n" 808 808 "capinfo=0x%X\nrates=0x%X\n" 809 809 "basic_rates=0x%X\n", ··· 819 819 struct obj_frequencies *freq = r->ptr; 820 820 int i, t; 821 821 printk("nr : %u\n", freq->nr); 822 - t = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", freq->nr); 822 + t = scnprintf(str, PRIV_STR_SIZE, "nr=%u\n", freq->nr); 823 823 for (i = 0; i < freq->nr; i++) 824 - t += snprintf(str + t, PRIV_STR_SIZE - t, 824 + t += scnprintf(str + t, PRIV_STR_SIZE - t, 825 825 "mhz[%u]=%u\n", i, freq->mhz[i]); 826 826 return t; 827 827 } 828 828 break; 829 829 case OID_TYPE_MLME:{ 830 830 struct obj_mlme *mlme = r->ptr; 831 - return snprintf(str, PRIV_STR_SIZE, 831 + return scnprintf(str, PRIV_STR_SIZE, 832 832 "id=0x%X\nstate=0x%X\ncode=0x%X\n", 833 833 mlme->id, mlme->state, mlme->code); 834 834 } 835 835 break; 836 836 case OID_TYPE_MLMEEX:{ 837 837 struct obj_mlmeex *mlme = r->ptr; 838 - return snprintf(str, PRIV_STR_SIZE, 838 + return scnprintf(str, PRIV_STR_SIZE, 839 839 "id=0x%X\nstate=0x%X\n" 840 840 "code=0x%X\nsize=0x%X\n", mlme->id, 841 841 mlme->state, mlme->code, mlme->size); ··· 843 843 break; 844 844 case OID_TYPE_ATTACH:{ 845 845 struct obj_attachment *attach = r->ptr; 846 - return snprintf(str, PRIV_STR_SIZE, 846 + return scnprintf(str, PRIV_STR_SIZE, 847 847 "id=%d\nsize=%d\n", 848 848 attach->id, 849 849 attach->size); ··· 851 851 break; 852 852 case OID_TYPE_SSID:{ 853 853 struct obj_ssid *ssid = r->ptr; 854 - return snprintf(str, PRIV_STR_SIZE, 854 + return scnprintf(str, PRIV_STR_SIZE, 855 855 "length=%u\noctets=%.*s\n", 856 856 ssid->length, ssid->length, 857 857 ssid->octets); ··· 860 860 case OID_TYPE_KEY:{ 861 861 struct obj_key *key = r->ptr; 862 862 int t, i; 863 - t = snprintf(str, PRIV_STR_SIZE, 863 + t = scnprintf(str, PRIV_STR_SIZE, 864 864 "type=0x%X\nlength=0x%X\nkey=0x", 865 865 key->type, key->length); 866 866 for (i = 0; i < key->length; i++) 867 - t += snprintf(str + t, PRIV_STR_SIZE - t, 867 + t += scnprintf(str + t, PRIV_STR_SIZE - t, 868 868 "%02X:", key->key[i]); 869 - t += snprintf(str + t, PRIV_STR_SIZE - t, "\n"); 869 + t += scnprintf(str + t, PRIV_STR_SIZE - t, "\n"); 870 870 return t; 871 871 } 872 872 break; ··· 874 874 case OID_TYPE_ADDR:{ 875 875 unsigned char *buff = r->ptr; 876 876 int t, i; 877 - t = snprintf(str, PRIV_STR_SIZE, "hex data="); 877 + t = scnprintf(str, PRIV_STR_SIZE, "hex data="); 878 878 for (i = 0; i < isl_oid[n].size; i++) 879 - t += snprintf(str + t, PRIV_STR_SIZE - t, 879 + t += scnprintf(str + t, PRIV_STR_SIZE - t, 880 880 "%02X:", buff[i]); 881 - t += snprintf(str + t, PRIV_STR_SIZE - t, "\n"); 881 + t += scnprintf(str + t, PRIV_STR_SIZE - t, "\n"); 882 882 return t; 883 883 } 884 884 break;
+2 -2
drivers/net/wireless/marvell/libertas/host.h
··· 461 461 462 462 uint8_t bsstype; 463 463 uint8_t bssid[ETH_ALEN]; 464 - uint8_t tlvbuffer[0]; 464 + uint8_t tlvbuffer[]; 465 465 } __packed; 466 466 467 467 struct cmd_ds_802_11_scan_rsp { ··· 469 469 470 470 __le16 bssdescriptsize; 471 471 uint8_t nr_sets; 472 - uint8_t bssdesc_and_tlvbuffer[0]; 472 + uint8_t bssdesc_and_tlvbuffer[]; 473 473 } __packed; 474 474 475 475 struct cmd_ds_802_11_get_log {
+1 -1
drivers/net/wireless/marvell/libertas/if_sdio.c
··· 103 103 struct if_sdio_packet { 104 104 struct if_sdio_packet *next; 105 105 u16 nb; 106 - u8 buffer[0] __attribute__((aligned(4))); 106 + u8 buffer[] __aligned(4); 107 107 }; 108 108 109 109 struct if_sdio_card {
+3 -2
drivers/net/wireless/marvell/libertas/if_spi.c
··· 35 35 struct if_spi_packet { 36 36 struct list_head list; 37 37 u16 blen; 38 - u8 buffer[0] __attribute__((aligned(4))); 38 + u8 buffer[] __aligned(4); 39 39 }; 40 40 41 41 struct if_spi_card { ··· 235 235 spi_message_add_tail(&dummy_trans, &m); 236 236 } else { 237 237 /* Busy-wait while the SPU fills the FIFO */ 238 - reg_trans.delay_usecs = 238 + reg_trans.delay.value = 239 239 DIV_ROUND_UP((100 + (delay * 10)), 1000); 240 + reg_trans.delay.unit = SPI_DELAY_UNIT_USECS; 240 241 } 241 242 242 243 /* read in data */
+1 -1
drivers/net/wireless/marvell/libertas/if_usb.h
··· 91 91 struct fwdata { 92 92 struct fwheader hdr; 93 93 __le32 seqnum; 94 - uint8_t data[0]; 94 + uint8_t data[]; 95 95 }; 96 96 97 97 /* fwsyncheader */
+1 -1
drivers/net/wireless/marvell/libertas_tf/if_usb.h
··· 81 81 struct fwdata { 82 82 struct fwheader hdr; 83 83 __le32 seqnum; 84 - uint8_t data[0]; 84 + uint8_t data[]; 85 85 }; 86 86 87 87 /** fwsyncheader */
+1 -1
drivers/net/wireless/marvell/mwifiex/cfg80211.c
··· 3052 3052 3053 3053 dev->flags |= IFF_BROADCAST | IFF_MULTICAST; 3054 3054 dev->watchdog_timeo = MWIFIEX_DEFAULT_WATCHDOG_TIMEOUT; 3055 - dev->hard_header_len += MWIFIEX_MIN_DATA_HEADER_LEN; 3055 + dev->needed_headroom = MWIFIEX_MIN_DATA_HEADER_LEN; 3056 3056 dev->ethtool_ops = &mwifiex_ethtool_ops; 3057 3057 3058 3058 mdev_priv = netdev_priv(dev);
+20 -20
drivers/net/wireless/marvell/mwifiex/fw.h
··· 846 846 847 847 struct mwifiex_ietypes_chanstats { 848 848 struct mwifiex_ie_types_header header; 849 - struct mwifiex_fw_chan_stats chanstats[0]; 849 + struct mwifiex_fw_chan_stats chanstats[]; 850 850 } __packed; 851 851 852 852 struct mwifiex_ie_types_wildcard_ssid_params { ··· 1082 1082 __le32 reserved_6; 1083 1083 __le32 dot_11ac_dev_cap; 1084 1084 __le32 dot_11ac_mcs_support; 1085 - u8 tlvs[0]; 1085 + u8 tlvs[]; 1086 1086 } __packed; 1087 1087 1088 1088 struct host_cmd_ds_802_11_rssi_info { ··· 1140 1140 __le16 cap_info_bitmap; 1141 1141 __le16 status_code; 1142 1142 __le16 a_id; 1143 - u8 ie_buffer[0]; 1143 + u8 ie_buffer[]; 1144 1144 } __packed; 1145 1145 1146 1146 struct host_cmd_ds_802_11_associate_rsp { ··· 1455 1455 __le32 result; 1456 1456 __le64 start_tsf; 1457 1457 __le32 duration; 1458 - u8 tlvbuf[0]; 1458 + u8 tlvbuf[]; 1459 1459 } __packed; 1460 1460 1461 1461 struct host_cmd_sdio_sp_rx_aggr_cfg { ··· 1625 1625 __le32 reserved2; 1626 1626 __le32 report_condition; 1627 1627 __le16 reserved3; 1628 - u8 tlv[0]; 1628 + u8 tlv[]; 1629 1629 } __packed; 1630 1630 1631 1631 struct host_cmd_ds_802_11_bg_scan_query { ··· 1720 1720 1721 1721 struct host_cmd_ds_sta_list { 1722 1722 __le16 sta_count; 1723 - u8 tlv[0]; 1723 + u8 tlv[]; 1724 1724 } __packed; 1725 1725 1726 1726 struct mwifiex_ie_types_pwr_capability { ··· 1743 1743 struct mwifiex_ie_types_mgmt_frame { 1744 1744 struct mwifiex_ie_types_header header; 1745 1745 __le16 frame_control; 1746 - u8 frame_contents[0]; 1746 + u8 frame_contents[]; 1747 1747 }; 1748 1748 1749 1749 struct mwifiex_ie_types_wmm_queue_status { ··· 1861 1861 1862 1862 struct mwifiex_ie_types_extcap { 1863 1863 struct mwifiex_ie_types_header header; 1864 - u8 ext_capab[0]; 1864 + u8 ext_capab[]; 1865 1865 } __packed; 1866 1866 1867 1867 struct host_cmd_ds_mem_access { ··· 1918 1918 __le16 frame_control; 1919 1919 __le16 cap_info; 1920 1920 __le16 listen_interval; 1921 - u8 data[0]; 1921 + u8 data[]; 1922 1922 } __packed; 1923 1923 1924 1924 struct host_cmd_ds_sys_config { 1925 1925 __le16 action; 1926 - u8 tlv[0]; 1926 + u8 tlv[]; 1927 1927 }; 1928 1928 1929 1929 struct host_cmd_11ac_vht_cfg { ··· 1956 1956 1957 1957 struct host_cmd_tlv_passphrase { 1958 1958 struct mwifiex_ie_types_header header; 1959 - u8 passphrase[0]; 1959 + u8 passphrase[]; 1960 1960 } __packed; 1961 1961 1962 1962 struct host_cmd_tlv_wep_key { ··· 1978 1978 1979 1979 struct host_cmd_tlv_ssid { 1980 1980 struct mwifiex_ie_types_header header; 1981 - u8 ssid[0]; 1981 + u8 ssid[]; 1982 1982 } __packed; 1983 1983 1984 1984 struct host_cmd_tlv_rates { 1985 1985 struct mwifiex_ie_types_header header; 1986 - u8 rates[0]; 1986 + u8 rates[]; 1987 1987 } __packed; 1988 1988 1989 1989 struct mwifiex_ie_types_bssid_list { ··· 2100 2100 u8 mode; 2101 2101 u8 action; 2102 2102 __le16 exprsize; 2103 - u8 expr[0]; 2103 + u8 expr[]; 2104 2104 } __packed; 2105 2105 2106 2106 struct host_cmd_ds_mef_cfg { 2107 2107 __le32 criteria; 2108 2108 __le16 num_entries; 2109 - struct mwifiex_fw_mef_entry mef_entry[0]; 2109 + struct mwifiex_fw_mef_entry mef_entry[]; 2110 2110 } __packed; 2111 2111 2112 2112 #define CONNECTION_TYPE_INFRA 0 ··· 2169 2169 struct mwifiex_ie_types_multi_chan_info { 2170 2170 struct mwifiex_ie_types_header header; 2171 2171 __le16 status; 2172 - u8 tlv_buffer[0]; 2172 + u8 tlv_buffer[]; 2173 2173 } __packed; 2174 2174 2175 2175 struct mwifiex_ie_types_mc_group_info { ··· 2185 2185 u8 usb_ep_num; 2186 2186 } hid_num; 2187 2187 u8 intf_num; 2188 - u8 bss_type_numlist[0]; 2188 + u8 bss_type_numlist[]; 2189 2189 } __packed; 2190 2190 2191 2191 struct meas_rpt_map { ··· 2250 2250 u8 num_of_fields; 2251 2251 u8 pkt_type; 2252 2252 __le16 max_coalescing_delay; 2253 - struct coalesce_filt_field_param params[0]; 2253 + struct coalesce_filt_field_param params[]; 2254 2254 } __packed; 2255 2255 2256 2256 struct host_cmd_ds_coalesce_cfg { 2257 2257 __le16 action; 2258 2258 __le16 num_of_rules; 2259 - struct coalesce_receive_filt_rule rule[0]; 2259 + struct coalesce_receive_filt_rule rule[]; 2260 2260 } __packed; 2261 2261 2262 2262 struct host_cmd_ds_multi_chan_policy { ··· 2295 2295 2296 2296 struct host_cmd_ds_sta_configure { 2297 2297 __le16 action; 2298 - u8 tlv_buffer[0]; 2298 + u8 tlv_buffer[]; 2299 2299 } __packed; 2300 2300 2301 2301 struct host_cmd_ds_command {
+3 -3
drivers/net/wireless/marvell/mwl8k.c
··· 592 592 __u8 seq_num; 593 593 __u8 macid; 594 594 __le16 result; 595 - char payload[0]; 595 + char payload[]; 596 596 } __packed; 597 597 598 598 /* ··· 806 806 struct mwl8k_dma_data { 807 807 __le16 fwlen; 808 808 struct ieee80211_hdr wh; 809 - char data[0]; 809 + char data[]; 810 810 } __packed; 811 811 812 812 /* Routines to add/remove DMA header from skb. */ ··· 2955 2955 struct mwl8k_cmd_set_beacon { 2956 2956 struct mwl8k_cmd_pkt header; 2957 2957 __le16 beacon_len; 2958 - __u8 beacon[0]; 2958 + __u8 beacon[]; 2959 2959 }; 2960 2960 2961 2961 static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
+4 -2
drivers/net/wireless/mediatek/mt76/mcu.c
··· 9 9 mt76_mcu_msg_alloc(const void *data, int head_len, 10 10 int data_len, int tail_len) 11 11 { 12 + int length = head_len + data_len + tail_len; 12 13 struct sk_buff *skb; 13 14 14 - skb = alloc_skb(head_len + data_len + tail_len, 15 - GFP_KERNEL); 15 + skb = alloc_skb(length, GFP_KERNEL); 16 16 if (!skb) 17 17 return NULL; 18 18 19 + memset(skb->head, 0, length); 19 20 skb_reserve(skb, head_len); 21 + 20 22 if (data && data_len) 21 23 skb_put_data(skb, data, data_len); 22 24
+4 -1
drivers/net/wireless/mediatek/mt76/mt76.h
··· 139 139 struct mt76_mcu_ops { 140 140 int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data, 141 141 int len, bool wait_resp); 142 + int (*mcu_skb_send_msg)(struct mt76_dev *dev, struct sk_buff *skb, 143 + int cmd, bool wait_resp); 142 144 int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base, 143 145 const struct mt76_reg_pair *rp, int len); 144 146 int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base, ··· 405 403 #define MCU_RESP_URB_SIZE 1024 406 404 struct mt76_usb { 407 405 struct mutex usb_ctrl_mtx; 408 - __le32 reg_val; 409 406 u8 *data; 410 407 u16 data_len; 411 408 ··· 590 589 #define mt76_rd_rp(dev, ...) (dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__) 591 590 592 591 #define mt76_mcu_send_msg(dev, ...) (dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__) 592 + 593 593 #define __mt76_mcu_send_msg(dev, ...) (dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__) 594 + #define __mt76_mcu_skb_send_msg(dev, ...) (dev)->mcu_ops->mcu_skb_send_msg((dev), __VA_ARGS__) 594 595 #define mt76_mcu_restart(dev, ...) (dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76)) 595 596 #define __mt76_mcu_restart(dev, ...) (dev)->mcu_ops->mcu_restart((dev)) 596 597
+4
drivers/net/wireless/mediatek/mt76/mt7603/debugfs.c
··· 121 121 mt7603_reset_read); 122 122 debugfs_create_devm_seqfile(dev->mt76.dev, "radio", dir, 123 123 mt7603_radio_read); 124 + debugfs_create_u8("sensitivity_limit", 0600, dir, 125 + &dev->sensitivity_limit); 126 + debugfs_create_bool("dynamic_sensitivity", 0600, dir, 127 + &dev->dynamic_sensitivity); 124 128 }
+2
drivers/net/wireless/mediatek/mt76/mt7603/init.c
··· 540 540 dev->mphy.antenna_mask = 1; 541 541 542 542 dev->slottime = 9; 543 + dev->sensitivity_limit = 28; 544 + dev->dynamic_sensitivity = true; 543 545 544 546 ret = mt7603_init_hardware(dev); 545 547 if (ret)
+5 -1
drivers/net/wireless/mediatek/mt76/mt7603/mac.c
··· 1727 1727 int min_signal; 1728 1728 u32 val; 1729 1729 1730 + if (!dev->dynamic_sensitivity) 1731 + return; 1732 + 1730 1733 val = mt76_rr(dev, MT_PHYCTRL_STAT_PD); 1731 1734 pd_cck = FIELD_GET(MT_PHYCTRL_STAT_PD_CCK, val); 1732 1735 pd_ofdm = FIELD_GET(MT_PHYCTRL_STAT_PD_OFDM, val); ··· 1753 1750 min_signal -= 15; 1754 1751 1755 1752 false_cca = dev->false_cca_ofdm + dev->false_cca_cck; 1756 - if (false_cca > 600) { 1753 + if (false_cca > 600 && 1754 + dev->sensitivity < -100 + dev->sensitivity_limit) { 1757 1755 if (!dev->sensitivity) 1758 1756 dev->sensitivity = -92; 1759 1757 else
-1
drivers/net/wireless/mediatek/mt76/mt7603/mcu.c
··· 27 27 seq = ++mdev->mcu.msg_seq & 0xf; 28 28 29 29 txd = (struct mt7603_mcu_txd *)skb_push(skb, hdrlen); 30 - memset(txd, 0, hdrlen); 31 30 32 31 txd->len = cpu_to_le16(skb->len); 33 32 if (cmd == -MCU_CMD_FW_SCATTER)
+2
drivers/net/wireless/mediatek/mt76/mt7603/mt7603.h
··· 142 142 u8 ed_strict_mode; 143 143 u8 ed_strong_signal; 144 144 145 + bool dynamic_sensitivity; 145 146 s8 sensitivity; 147 + u8 sensitivity_limit; 146 148 147 149 u8 beacon_check; 148 150 u8 tx_hang_check;
+46 -4
drivers/net/wireless/mediatek/mt76/mt7615/dma.c
··· 101 101 __le32 *rxd = (__le32 *)skb->data; 102 102 __le32 *end = (__le32 *)&skb->data[skb->len]; 103 103 enum rx_pkt_type type; 104 + u16 flag; 104 105 105 106 type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); 107 + flag = FIELD_GET(MT_RXD0_PKT_FLAG, le32_to_cpu(rxd[0])); 108 + if (type == PKT_TYPE_RX_EVENT && flag == 0x1) 109 + type = PKT_TYPE_NORMAL_MCU; 106 110 107 111 switch (type) { 108 112 case PKT_TYPE_TXS: ··· 120 116 case PKT_TYPE_RX_EVENT: 121 117 mt7615_mcu_rx_event(dev, skb); 122 118 break; 119 + case PKT_TYPE_NORMAL_MCU: 123 120 case PKT_TYPE_NORMAL: 124 121 if (!mt7615_mac_fill_rx(dev, skb)) { 125 122 mt76_rx(&dev->mt76, q, skb); ··· 191 186 mt76_wr(dev, reg + MT_DMASHDL_SCHED_SET1, 0xedcba987); 192 187 } 193 188 189 + static void mt7663_dma_sched_init(struct mt7615_dev *dev) 190 + { 191 + int i; 192 + 193 + mt76_rmw(dev, MT_DMA_SHDL(MT_DMASHDL_PKT_MAX_SIZE), 194 + MT_DMASHDL_PKT_MAX_SIZE_PLE | MT_DMASHDL_PKT_MAX_SIZE_PSE, 195 + FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PLE, 1) | 196 + FIELD_PREP(MT_DMASHDL_PKT_MAX_SIZE_PSE, 8)); 197 + 198 + /* enable refill control group 0, 1, 2, 4, 5 */ 199 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_REFILL), 0xffc80000); 200 + /* enable group 0, 1, 2, 4, 5, 15 */ 201 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_OPTIONAL), 0x70068037); 202 + 203 + /* each group min quota must larger then PLE_PKT_MAX_SIZE_NUM */ 204 + for (i = 0; i < 5; i++) 205 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(i)), 206 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x40) | 207 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x800)); 208 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(5)), 209 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x40) | 210 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x40)); 211 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_GROUP_QUOTA(15)), 212 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MIN, 0x20) | 213 + FIELD_PREP(MT_DMASHDL_GROUP_QUOTA_MAX, 0x20)); 214 + 215 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(0)), 0x42104210); 216 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(1)), 0x42104210); 217 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(2)), 0x00050005); 218 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_Q_MAP(3)), 0); 219 + /* ALTX0 and ALTX1 QID mapping to group 5 */ 220 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET0), 0x6012345f); 221 + mt76_wr(dev, MT_DMA_SHDL(MT_DMASHDL_SCHED_SET1), 0xedcba987); 222 + } 223 + 194 224 int mt7615_dma_init(struct mt7615_dev *dev) 195 225 { 196 226 int rx_ring_size = MT7615_RX_RING_SIZE; ··· 237 197 MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE | 238 198 MT_WPDMA_GLO_CFG_FIFO_LITTLE_ENDIAN | 239 199 MT_WPDMA_GLO_CFG_OMIT_TX_INFO); 240 - 241 - if (!is_mt7622(&dev->mt76)) 242 - mt76_set(dev, MT_WPDMA_GLO_CFG, 243 - MT_WPDMA_GLO_CFG_FIRST_TOKEN_ONLY); 244 200 245 201 mt76_rmw_field(dev, MT_WPDMA_GLO_CFG, 246 202 MT_WPDMA_GLO_CFG_TX_BT_SIZE_BIT0, 0x1); ··· 251 215 MT_WPDMA_GLO_CFG_MULTI_DMA_EN, 0x3); 252 216 253 217 if (is_mt7615(&dev->mt76)) { 218 + mt76_set(dev, MT_WPDMA_GLO_CFG, 219 + MT_WPDMA_GLO_CFG_FIRST_TOKEN_ONLY); 220 + 254 221 mt76_wr(dev, MT_WPDMA_GLO_CFG1, 0x1); 255 222 mt76_wr(dev, MT_WPDMA_TX_PRE_CFG, 0xf0000); 256 223 mt76_wr(dev, MT_WPDMA_RX_PRE_CFG, 0xf7f0000); ··· 309 270 310 271 if (is_mt7622(&dev->mt76)) 311 272 mt7622_dma_sched_init(dev); 273 + 274 + if (is_mt7663(&dev->mt76)) 275 + mt7663_dma_sched_init(dev); 312 276 313 277 return 0; 314 278 }
+50 -16
drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c
··· 91 91 } 92 92 } 93 93 94 - static void mt7615_eeprom_parse_hw_cap(struct mt7615_dev *dev) 94 + static void 95 + mt7615_eeprom_parse_hw_band_cap(struct mt7615_dev *dev) 95 96 { 96 - u8 *eeprom = dev->mt76.eeprom.data; 97 - u8 tx_mask, max_nss; 98 - u32 val; 97 + u8 val, *eeprom = dev->mt76.eeprom.data; 98 + 99 + if (is_mt7663(&dev->mt76)) { 100 + /* dual band */ 101 + dev->mt76.cap.has_2ghz = true; 102 + dev->mt76.cap.has_5ghz = true; 103 + return; 104 + } 105 + 106 + if (is_mt7622(&dev->mt76)) { 107 + /* 2GHz only */ 108 + dev->mt76.cap.has_2ghz = true; 109 + return; 110 + } 99 111 100 112 val = FIELD_GET(MT_EE_NIC_WIFI_CONF_BAND_SEL, 101 113 eeprom[MT_EE_WIFI_CONF]); ··· 123 111 dev->mt76.cap.has_5ghz = true; 124 112 break; 125 113 } 114 + } 126 115 127 - if (is_mt7622(&dev->mt76)) 128 - dev->mt76.cap.has_5ghz = false; 116 + static void mt7615_eeprom_parse_hw_cap(struct mt7615_dev *dev) 117 + { 118 + u8 *eeprom = dev->mt76.eeprom.data; 119 + u8 tx_mask; 129 120 130 - /* read tx-rx mask from eeprom */ 131 - val = mt76_rr(dev, MT_TOP_STRAP_STA); 132 - max_nss = val & MT_TOP_3NSS ? 3 : 4; 121 + mt7615_eeprom_parse_hw_band_cap(dev); 133 122 134 - tx_mask = FIELD_GET(MT_EE_NIC_CONF_TX_MASK, 135 - eeprom[MT_EE_NIC_CONF_0]); 136 - if (!tx_mask || tx_mask > max_nss) 137 - tx_mask = max_nss; 123 + if (is_mt7663(&dev->mt76)) { 124 + tx_mask = 2; 125 + } else { 126 + u8 max_nss; 127 + u32 val; 128 + 129 + /* read tx-rx mask from eeprom */ 130 + val = mt76_rr(dev, MT_TOP_STRAP_STA); 131 + max_nss = val & MT_TOP_3NSS ? 3 : 4; 132 + 133 + tx_mask = FIELD_GET(MT_EE_NIC_CONF_TX_MASK, 134 + eeprom[MT_EE_NIC_CONF_0]); 135 + if (!tx_mask || tx_mask > max_nss) 136 + tx_mask = max_nss; 137 + } 138 138 139 139 dev->chainmask = BIT(tx_mask) - 1; 140 140 dev->mphy.antenna_mask = dev->chainmask; ··· 253 229 } 254 230 } 255 231 232 + static void mt7615_cal_free_data(struct mt7615_dev *dev) 233 + { 234 + switch (mt76_chip(&dev->mt76)) { 235 + case 0x7622: 236 + mt7622_apply_cal_free_data(dev); 237 + break; 238 + case 0x7615: 239 + mt7615_apply_cal_free_data(dev); 240 + break; 241 + } 242 + } 243 + 256 244 int mt7615_eeprom_init(struct mt7615_dev *dev) 257 245 { 258 246 int ret; ··· 277 241 if (ret && dev->mt76.otp.data) 278 242 memcpy(dev->mt76.eeprom.data, dev->mt76.otp.data, 279 243 MT7615_EEPROM_SIZE); 280 - else if (is_mt7622(&dev->mt76)) 281 - mt7622_apply_cal_free_data(dev); 282 244 else 283 - mt7615_apply_cal_free_data(dev); 245 + mt7615_cal_free_data(dev); 284 246 285 247 mt7615_eeprom_parse_hw_cap(dev); 286 248 memcpy(dev->mt76.macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR,
+2
drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h
··· 18 18 MT_EE_TX1_5G_G0_TARGET_POWER = 0x098, 19 19 MT_EE_EXT_PA_2G_TARGET_POWER = 0x0f2, 20 20 MT_EE_EXT_PA_5G_TARGET_POWER = 0x0f3, 21 + MT7663_EE_TX0_2G_TARGET_POWER = 0x123, 21 22 MT_EE_TX2_5G_G0_TARGET_POWER = 0x142, 22 23 MT_EE_TX3_5G_G0_TARGET_POWER = 0x16a, 23 24 24 25 MT7615_EE_MAX = 0x3bf, 25 26 MT7622_EE_MAX = 0x3db, 27 + MT7663_EE_MAX = 0x400, 26 28 }; 27 29 28 30 #define MT_EE_NIC_CONF_TX_MASK GENMASK(7, 4)
+91 -66
drivers/net/wireless/mediatek/mt76/mt7615/init.c
··· 4 4 * Author: Roy Luo <royluo@google.com> 5 5 * Ryder Lee <ryder.lee@mediatek.com> 6 6 * Felix Fietkau <nbd@nbd.name> 7 + * Lorenzo Bianconi <lorenzo@kernel.org> 7 8 */ 8 9 9 10 #include <linux/etherdevice.h> ··· 19 18 mt76_set(dev, MT_WF_PHY_WF2_RFCTRL0(1), MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN); 20 19 } 21 20 22 - static void mt7615_mac_init(struct mt7615_dev *dev) 21 + static void 22 + mt7615_init_mac_chain(struct mt7615_dev *dev, int chain) 23 23 { 24 24 u32 val, mask, set; 25 - int i; 25 + 26 + if (!chain) 27 + val = MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN; 28 + else 29 + val = MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN; 26 30 27 31 /* enable band 0/1 clk */ 28 - mt76_set(dev, MT_CFG_CCR, 29 - MT_CFG_CCR_MAC_D0_1X_GC_EN | MT_CFG_CCR_MAC_D0_2X_GC_EN | 30 - MT_CFG_CCR_MAC_D1_1X_GC_EN | MT_CFG_CCR_MAC_D1_2X_GC_EN); 32 + mt76_set(dev, MT_CFG_CCR, val); 31 33 32 - val = mt76_rmw(dev, MT_TMAC_TRCR(0), 33 - MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL, 34 - FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) | 35 - FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0)); 36 - mt76_wr(dev, MT_TMAC_TRCR(1), val); 34 + mt76_rmw(dev, MT_TMAC_TRCR(chain), 35 + MT_TMAC_TRCR_CCA_SEL | MT_TMAC_TRCR_SEC_CCA_SEL, 36 + FIELD_PREP(MT_TMAC_TRCR_CCA_SEL, 2) | 37 + FIELD_PREP(MT_TMAC_TRCR_SEC_CCA_SEL, 0)); 37 38 38 - val = MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE | 39 - FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) | 40 - FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT); 41 - mt76_wr(dev, MT_AGG_ACR(0), val); 42 - mt76_wr(dev, MT_AGG_ACR(1), val); 39 + mt76_wr(dev, MT_AGG_ACR(chain), 40 + MT_AGG_ACR_PKT_TIME_EN | MT_AGG_ACR_NO_BA_AR_RULE | 41 + FIELD_PREP(MT_AGG_ACR_CFEND_RATE, MT7615_CFEND_RATE_DEFAULT) | 42 + FIELD_PREP(MT_AGG_ACR_BAR_RATE, MT7615_BAR_RATE_DEFAULT)); 43 + 44 + mt76_wr(dev, MT_AGG_ARUCR(chain), 45 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) | 46 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) | 47 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) | 48 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) | 49 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) | 50 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) | 51 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) | 52 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1)); 53 + 54 + mt76_wr(dev, MT_AGG_ARDCR(chain), 55 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) | 56 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) | 57 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) | 58 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) | 59 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) | 60 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) | 61 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) | 62 + FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1)); 63 + 64 + mask = MT_DMA_RCFR0_MCU_RX_MGMT | 65 + MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR | 66 + MT_DMA_RCFR0_MCU_RX_CTL_BAR | 67 + MT_DMA_RCFR0_MCU_RX_BYPASS | 68 + MT_DMA_RCFR0_RX_DROPPED_UCAST | 69 + MT_DMA_RCFR0_RX_DROPPED_MCAST; 70 + set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) | 71 + FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2); 72 + mt76_rmw(dev, MT_DMA_RCFR0(chain), mask, set); 73 + } 74 + 75 + static void mt7615_mac_init(struct mt7615_dev *dev) 76 + { 77 + int i; 78 + 79 + mt7615_init_mac_chain(dev, 0); 43 80 44 81 mt76_rmw_field(dev, MT_TMAC_CTCR0, 45 82 MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f); ··· 95 56 mt76_rmw(dev, MT_AGG_SCR, MT_AGG_SCR_NLNAV_MID_PTEC_DIS, 96 57 MT_AGG_SCR_NLNAV_MID_PTEC_DIS); 97 58 98 - mt76_wr(dev, MT_DMA_DCR0, MT_DMA_DCR0_RX_VEC_DROP | 99 - FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072)); 100 - 101 - val = FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), 7) | 102 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), 2) | 103 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), 2) | 104 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), 2) | 105 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), 1) | 106 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), 1) | 107 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), 1) | 108 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), 1); 109 - mt76_wr(dev, MT_AGG_ARUCR(0), val); 110 - mt76_wr(dev, MT_AGG_ARUCR(1), val); 111 - 112 - val = FIELD_PREP(MT_AGG_ARxCR_LIMIT(0), MT7615_RATE_RETRY - 1) | 113 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(1), MT7615_RATE_RETRY - 1) | 114 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(2), MT7615_RATE_RETRY - 1) | 115 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(3), MT7615_RATE_RETRY - 1) | 116 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(4), MT7615_RATE_RETRY - 1) | 117 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(5), MT7615_RATE_RETRY - 1) | 118 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(6), MT7615_RATE_RETRY - 1) | 119 - FIELD_PREP(MT_AGG_ARxCR_LIMIT(7), MT7615_RATE_RETRY - 1); 120 - mt76_wr(dev, MT_AGG_ARDCR(0), val); 121 - mt76_wr(dev, MT_AGG_ARDCR(1), val); 122 - 123 59 mt76_wr(dev, MT_AGG_ARCR, 124 - (FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) | 125 - MT_AGG_ARCR_RATE_DOWN_RATIO_EN | 126 - FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) | 127 - FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4))); 128 - 129 - mask = MT_DMA_RCFR0_MCU_RX_MGMT | 130 - MT_DMA_RCFR0_MCU_RX_CTL_NON_BAR | 131 - MT_DMA_RCFR0_MCU_RX_CTL_BAR | 132 - MT_DMA_RCFR0_MCU_RX_BYPASS | 133 - MT_DMA_RCFR0_RX_DROPPED_UCAST | 134 - MT_DMA_RCFR0_RX_DROPPED_MCAST; 135 - set = FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_UCAST, 2) | 136 - FIELD_PREP(MT_DMA_RCFR0_RX_DROPPED_MCAST, 2); 137 - mt76_rmw(dev, MT_DMA_RCFR0(0), mask, set); 138 - mt76_rmw(dev, MT_DMA_RCFR0(1), mask, set); 60 + FIELD_PREP(MT_AGG_ARCR_RTS_RATE_THR, 2) | 61 + MT_AGG_ARCR_RATE_DOWN_RATIO_EN | 62 + FIELD_PREP(MT_AGG_ARCR_RATE_DOWN_RATIO, 1) | 63 + FIELD_PREP(MT_AGG_ARCR_RATE_UP_EXTRA_TH, 4)); 139 64 140 65 for (i = 0; i < MT7615_WTBL_SIZE; i++) 141 66 mt7615_mac_wtbl_update(dev, i, ··· 107 104 108 105 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_EN); 109 106 mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0, MT_WF_RMAC_MIB_RXTIME_EN); 107 + 108 + /* disable hdr translation and hw AMSDU */ 109 + mt76_wr(dev, MT_DMA_DCR0, 110 + FIELD_PREP(MT_DMA_DCR0_MAX_RX_LEN, 3072) | 111 + MT_DMA_DCR0_RX_VEC_DROP); 112 + if (is_mt7663(&dev->mt76)) { 113 + mt76_wr(dev, MT_CSR(0x010), 0x8208); 114 + mt76_wr(dev, 0x44064, 0x2000000); 115 + mt76_wr(dev, MT_WF_AGG(0x160), 0x5c341c02); 116 + mt76_wr(dev, MT_WF_AGG(0x164), 0x70708040); 117 + } else { 118 + mt7615_init_mac_chain(dev, 1); 119 + } 110 120 } 111 121 112 122 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev) ··· 366 350 else 367 351 dev->mphy.antenna_mask = dev->chainmask >> 1; 368 352 dev->phy.chainmask = dev->mphy.antenna_mask; 353 + dev->mphy.hw->wiphy->available_antennas_rx = dev->phy.chainmask; 354 + dev->mphy.hw->wiphy->available_antennas_tx = dev->phy.chainmask; 369 355 mt76_set_stream_caps(&dev->mt76, true); 370 356 } 371 357 ··· 379 361 IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ; 380 362 dev->mphy.antenna_mask = dev->chainmask; 381 363 dev->phy.chainmask = dev->chainmask; 364 + dev->mphy.hw->wiphy->available_antennas_rx = dev->chainmask; 365 + dev->mphy.hw->wiphy->available_antennas_tx = dev->chainmask; 382 366 mt76_set_stream_caps(&dev->mt76, true); 383 367 } 384 368 ··· 445 425 ieee80211_free_hw(mphy->hw); 446 426 } 447 427 448 - 449 - int mt7615_register_device(struct mt7615_dev *dev) 428 + void mt7615_init_device(struct mt7615_dev *dev) 450 429 { 451 430 struct ieee80211_hw *hw = mt76_hw(dev); 452 - int ret; 453 431 454 432 dev->phy.dev = dev; 455 433 dev->phy.mt76 = &dev->mt76.phy; ··· 458 440 init_waitqueue_head(&dev->reset_wait); 459 441 INIT_WORK(&dev->reset_work, mt7615_mac_reset_work); 460 442 461 - ret = mt7622_wmac_init(dev); 462 - if (ret) 463 - return ret; 464 - 465 - ret = mt7615_init_hardware(dev); 466 - if (ret) 467 - return ret; 468 - 469 443 mt7615_init_wiphy(hw); 470 444 dev->mphy.sband_2g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; 471 445 dev->mphy.sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING; ··· 466 456 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; 467 457 mt7615_cap_dbdc_disable(dev); 468 458 dev->phy.dfs_state = -1; 459 + } 460 + 461 + int mt7615_register_device(struct mt7615_dev *dev) 462 + { 463 + int ret; 464 + 465 + mt7615_init_device(dev); 469 466 470 467 /* init led callbacks */ 471 468 if (IS_ENABLED(CONFIG_MT76_LEDS)) { 472 469 dev->mt76.led_cdev.brightness_set = mt7615_led_set_brightness; 473 470 dev->mt76.led_cdev.blink_set = mt7615_led_set_blink; 474 471 } 472 + 473 + ret = mt7622_wmac_init(dev); 474 + if (ret) 475 + return ret; 476 + 477 + ret = mt7615_init_hardware(dev); 478 + if (ret) 479 + return ret; 475 480 476 481 ret = mt76_register_device(&dev->mt76, true, mt7615_rates, 477 482 ARRAY_SIZE(mt7615_rates));
+18 -12
drivers/net/wireless/mediatek/mt76/mt7615/mac.c
··· 503 503 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, 504 504 struct sk_buff *skb, struct mt76_wcid *wcid, 505 505 struct ieee80211_sta *sta, int pid, 506 - struct ieee80211_key_conf *key) 506 + struct ieee80211_key_conf *key, bool beacon) 507 507 { 508 508 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 509 509 struct ieee80211_tx_rate *rate = &info->control.rates[0]; ··· 541 541 q_idx = wmm_idx * MT7615_MAX_WMM_SETS + 542 542 skb_get_queue_mapping(skb); 543 543 p_fmt = MT_TX_TYPE_CT; 544 - } else if (ieee80211_is_beacon(fc)) { 544 + } else if (beacon) { 545 545 if (ext_phy) 546 546 q_idx = MT_LMAC_BCN1; 547 547 else ··· 703 703 mt7615_txp_skb_unmap_hw(dev, &txp->hw); 704 704 } 705 705 706 - static u32 mt7615_mac_wtbl_addr(int wcid) 706 + static u32 mt7615_mac_wtbl_addr(struct mt7615_dev *dev, int wcid) 707 707 { 708 - return MT_WTBL_BASE + wcid * MT_WTBL_ENTRY_SIZE; 708 + return MT_WTBL_BASE(dev) + wcid * MT_WTBL_ENTRY_SIZE; 709 709 } 710 710 711 711 bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask) ··· 751 751 list_del_init(&msta->poll_list); 752 752 spin_unlock_bh(&dev->sta_poll_lock); 753 753 754 - addr = mt7615_mac_wtbl_addr(msta->wcid.idx) + 19 * 4; 754 + addr = mt7615_mac_wtbl_addr(dev, msta->wcid.idx) + 19 * 4; 755 755 756 756 for (i = 0; i < 4; i++, addr += 8) { 757 757 u32 tx_last = msta->airtime_ac[i]; ··· 801 801 struct mt76_phy *mphy = phy->mt76; 802 802 struct ieee80211_tx_rate *ref; 803 803 int wcid = sta->wcid.idx; 804 - u32 addr = mt7615_mac_wtbl_addr(wcid); 804 + u32 addr = mt7615_mac_wtbl_addr(dev, wcid); 805 805 bool stbc = false; 806 806 int n_rates = sta->n_rates; 807 807 u8 bw, bw_prev, bw_idx = 0; ··· 966 966 enum mt7615_cipher_type cipher, 967 967 enum set_key_cmd cmd) 968 968 { 969 - u32 addr = mt7615_mac_wtbl_addr(wcid->idx) + 30 * 4; 969 + u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx) + 30 * 4; 970 970 u8 data[32] = {}; 971 971 972 972 if (key->keylen > sizeof(data)) ··· 1004 1004 enum mt7615_cipher_type cipher, int keyidx, 1005 1005 enum set_key_cmd cmd) 1006 1006 { 1007 - u32 addr = mt7615_mac_wtbl_addr(wcid->idx), w0, w1; 1007 + u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx), w0, w1; 1008 1008 1009 1009 if (!mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000)) 1010 1010 return -ETIMEDOUT; ··· 1040 1040 enum mt7615_cipher_type cipher, 1041 1041 enum set_key_cmd cmd) 1042 1042 { 1043 - u32 addr = mt7615_mac_wtbl_addr(wcid->idx); 1043 + u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx); 1044 1044 1045 1045 if (cmd == SET_KEY) { 1046 1046 if (cipher != MT_CIPHER_BIP_CMAC_128 || !wcid->cipher) ··· 1208 1208 return id; 1209 1209 1210 1210 mt7615_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, sta, 1211 - pid, key); 1211 + pid, key, false); 1212 1212 1213 1213 txp = txwi + MT_TXD_SIZE; 1214 1214 memset(txp, 0, sizeof(struct mt7615_txp_common)); ··· 1524 1524 if (dev->scs_en == enable) 1525 1525 goto out; 1526 1526 1527 + if (is_mt7663(&dev->mt76)) 1528 + goto out; 1529 + 1527 1530 if (enable) { 1528 1531 mt76_set(dev, MT_WF_PHY_MIN_PRI_PWR(0), 1529 1532 MT_WF_PHY_PD_BLK(0)); ··· 1557 1554 void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy) 1558 1555 { 1559 1556 u32 rxtd; 1557 + 1558 + if (is_mt7663(&dev->mt76)) 1559 + return; 1560 1560 1561 1561 if (ext_phy) 1562 1562 rxtd = MT_WF_PHY_RXTD2(10); ··· 1636 1630 MT_WF_PHY_PD_OFDM(ext_phy, val)); 1637 1631 } else { 1638 1632 val = *sensitivity + 256; 1639 - if (!ext_phy) 1640 1633 mt76_rmw(dev, MT_WF_PHY_RXTD_CCK_PD(ext_phy), 1641 1634 MT_WF_PHY_PD_CCK_MASK(ext_phy), 1642 1635 MT_WF_PHY_PD_CCK(ext_phy, val)); ··· 1828 1823 mt7615_update_vif_beacon(void *priv, u8 *mac, struct ieee80211_vif *vif) 1829 1824 { 1830 1825 struct ieee80211_hw *hw = priv; 1826 + struct mt7615_dev *dev = mt7615_hw_dev(hw); 1831 1827 1832 - mt7615_mcu_set_bcn(hw, vif, vif->bss_conf.enable_beacon); 1828 + mt7615_mcu_add_beacon(dev, hw, vif, vif->bss_conf.enable_beacon); 1833 1829 } 1834 1830 1835 1831 static void
+10 -1
drivers/net/wireless/mediatek/mt76/mt7615/mac.h
··· 8 8 #define MT_CT_DMA_BUF_NUM 2 9 9 10 10 #define MT_RXD0_LENGTH GENMASK(15, 0) 11 + #define MT_RXD0_PKT_FLAG GENMASK(19, 16) 11 12 #define MT_RXD0_PKT_TYPE GENMASK(31, 29) 12 13 13 14 #define MT_RXD0_NORMAL_ETH_TYPE_OFS GENMASK(22, 16) ··· 27 26 PKT_TYPE_RX_TMR, 28 27 PKT_TYPE_RETRIEVE, 29 28 PKT_TYPE_TXRX_NOTIFY, 30 - PKT_TYPE_RX_EVENT 29 + PKT_TYPE_RX_EVENT, 30 + PKT_TYPE_NORMAL_MCU, 31 31 }; 32 32 33 33 #define MT_RXD1_NORMAL_BSSID GENMASK(31, 26) ··· 231 229 #define MT_TXD6_FIXED_BW BIT(2) 232 230 #define MT_TXD6_BW GENMASK(1, 0) 233 231 232 + /* MT7663 DW7 HW-AMSDU */ 233 + #define MT_TXD7_HW_AMSDU_CAP BIT(30) 234 234 #define MT_TXD7_TYPE GENMASK(21, 20) 235 235 #define MT_TXD7_SUB_TYPE GENMASK(19, 16) 236 + #define MT_TXD7_SPE_IDX GENMASK(15, 11) 237 + #define MT_TXD7_SPE_IDX_SLE BIT(10) 238 + 239 + #define MT_TXD8_L_TYPE GENMASK(5, 4) 240 + #define MT_TXD8_L_SUB_TYPE GENMASK(3, 0) 236 241 237 242 #define MT_TX_RATE_STBC BIT(11) 238 243 #define MT_TX_RATE_NSS GENMASK(10, 9)
+25 -19
drivers/net/wireless/mediatek/mt76/mt7615/main.c
··· 39 39 running = mt7615_dev_running(dev); 40 40 41 41 if (!running) { 42 - mt7615_mcu_ctrl_pm_state(dev, 0, 0); 42 + mt7615_mcu_set_pm(dev, 0, 0); 43 43 mt7615_mcu_set_mac_enable(dev, 0, true); 44 44 mt7615_mac_enable_nf(dev, 0); 45 45 } 46 46 47 47 if (phy != &dev->phy) { 48 - mt7615_mcu_ctrl_pm_state(dev, 1, 0); 48 + mt7615_mcu_set_pm(dev, 1, 0); 49 49 mt7615_mcu_set_mac_enable(dev, 1, true); 50 50 mt7615_mac_enable_nf(dev, 1); 51 51 } ··· 78 78 clear_bit(MT76_STATE_RUNNING, &phy->mt76->state); 79 79 80 80 if (phy != &dev->phy) { 81 - mt7615_mcu_ctrl_pm_state(dev, 1, 1); 81 + mt7615_mcu_set_pm(dev, 1, 1); 82 82 mt7615_mcu_set_mac_enable(dev, 1, false); 83 83 } 84 84 85 85 if (!mt7615_dev_running(dev)) { 86 86 cancel_delayed_work_sync(&dev->mt76.mac_work); 87 87 88 - mt7615_mcu_ctrl_pm_state(dev, 0, 1); 88 + mt7615_mcu_set_pm(dev, 0, 1); 89 89 mt7615_mcu_set_mac_enable(dev, 0, false); 90 90 } 91 91 ··· 157 157 else 158 158 mvif->wmm_idx = mvif->idx % MT7615_MAX_WMM_SETS; 159 159 160 - ret = mt7615_mcu_set_dev_info(dev, vif, 1); 160 + ret = mt7615_mcu_add_dev_info(dev, vif, true); 161 161 if (ret) 162 162 goto out; 163 163 ··· 200 200 201 201 /* TODO: disable beacon for the bss */ 202 202 203 - mt7615_mcu_set_dev_info(dev, vif, 0); 203 + mt7615_mcu_add_dev_info(dev, vif, false); 204 204 205 205 rcu_assign_pointer(dev->mt76.wcid[idx], NULL); 206 206 if (vif->txq) ··· 412 412 mutex_lock(&dev->mt76.mutex); 413 413 414 414 if (changed & BSS_CHANGED_ASSOC) 415 - mt7615_mcu_set_bss_info(dev, vif, info->assoc); 415 + mt7615_mcu_add_bss_info(dev, vif, info->assoc); 416 416 417 417 if (changed & BSS_CHANGED_ERP_SLOT) { 418 418 int slottime = info->use_short_slot ? 9 : 20; ··· 425 425 } 426 426 427 427 if (changed & BSS_CHANGED_BEACON_ENABLED) { 428 - mt7615_mcu_set_bss_info(dev, vif, info->enable_beacon); 429 - mt7615_mcu_set_bmc(dev, vif, info->enable_beacon); 428 + mt7615_mcu_add_bss_info(dev, vif, info->enable_beacon); 429 + mt7615_mcu_sta_add(dev, vif, NULL, info->enable_beacon); 430 430 } 431 431 432 432 if (changed & (BSS_CHANGED_BEACON | 433 433 BSS_CHANGED_BEACON_ENABLED)) 434 - mt7615_mcu_set_bcn(hw, vif, info->enable_beacon); 434 + mt7615_mcu_add_beacon(dev, hw, vif, info->enable_beacon); 435 435 436 436 mutex_unlock(&dev->mt76.mutex); 437 437 } ··· 444 444 struct mt7615_dev *dev = mt7615_hw_dev(hw); 445 445 446 446 mutex_lock(&dev->mt76.mutex); 447 - mt7615_mcu_set_bcn(hw, vif, true); 447 + mt7615_mcu_add_beacon(dev, hw, vif, true); 448 448 mutex_unlock(&dev->mt76.mutex); 449 449 } 450 450 ··· 469 469 mt7615_mac_wtbl_update(dev, idx, 470 470 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 471 471 472 - mt7615_mcu_set_sta(dev, vif, sta, 1); 472 + mt7615_mcu_sta_add(dev, vif, sta, true); 473 473 474 474 return 0; 475 475 } ··· 480 480 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); 481 481 struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv; 482 482 483 - mt7615_mcu_set_sta(dev, vif, sta, 0); 483 + mt7615_mcu_sta_add(dev, vif, sta, false); 484 484 mt7615_mac_wtbl_update(dev, msta->wcid.idx, 485 485 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 486 486 ··· 578 578 case IEEE80211_AMPDU_RX_START: 579 579 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn, 580 580 params->buf_size); 581 - mt7615_mcu_set_rx_ba(dev, params, 1); 581 + mt7615_mcu_add_rx_ba(dev, params, true); 582 582 break; 583 583 case IEEE80211_AMPDU_RX_STOP: 584 584 mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid); 585 - mt7615_mcu_set_rx_ba(dev, params, 0); 585 + mt7615_mcu_add_rx_ba(dev, params, false); 586 586 break; 587 587 case IEEE80211_AMPDU_TX_OPERATIONAL: 588 588 mtxq->aggr = true; 589 589 mtxq->send_bar = false; 590 - mt7615_mcu_set_tx_ba(dev, params, 1); 590 + mt7615_mcu_add_tx_ba(dev, params, true); 591 591 break; 592 592 case IEEE80211_AMPDU_TX_STOP_FLUSH: 593 593 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: 594 594 mtxq->aggr = false; 595 - mt7615_mcu_set_tx_ba(dev, params, 0); 595 + mt7615_mcu_add_tx_ba(dev, params, false); 596 596 break; 597 597 case IEEE80211_AMPDU_TX_START: 598 598 mtxq->agg_ssn = IEEE80211_SN_TO_SEQ(ssn); ··· 600 600 break; 601 601 case IEEE80211_AMPDU_TX_STOP_CONT: 602 602 mtxq->aggr = false; 603 - mt7615_mcu_set_tx_ba(dev, params, 0); 603 + mt7615_mcu_add_tx_ba(dev, params, false); 604 604 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); 605 605 break; 606 606 } ··· 686 686 mutex_lock(&dev->mt76.mutex); 687 687 688 688 phy->mt76->antenna_mask = tx_ant; 689 - phy->chainmask = ext_phy ? tx_ant << 2 : tx_ant; 689 + if (ext_phy) { 690 + if (dev->chainmask == 0xf) 691 + tx_ant <<= 2; 692 + else 693 + tx_ant <<= 1; 694 + } 695 + phy->chainmask = tx_ant; 690 696 691 697 mt76_set_stream_caps(&dev->mt76, true); 692 698
+1360 -805
drivers/net/wireless/mediatek/mt76/mt7615/mcu.c
··· 29 29 __le32 len; 30 30 } __packed; 31 31 32 + #define FW_V3_COMMON_TAILER_SIZE 36 33 + #define FW_V3_REGION_TAILER_SIZE 40 34 + #define FW_START_OVERRIDE BIT(0) 35 + #define FW_START_DLYCAL BIT(1) 36 + #define FW_START_WORKING_PDA_CR4 BIT(2) 37 + 38 + struct mt7663_fw_trailer { 39 + u8 chip_id; 40 + u8 eco_code; 41 + u8 n_region; 42 + u8 format_ver; 43 + u8 format_flag; 44 + u8 reserv[2]; 45 + char fw_ver[10]; 46 + char build_date[15]; 47 + __le32 crc; 48 + } __packed; 49 + 50 + struct mt7663_fw_buf { 51 + __le32 crc; 52 + __le32 d_img_size; 53 + __le32 block_size; 54 + u8 rsv[4]; 55 + __le32 img_dest_addr; 56 + __le32 img_size; 57 + u8 feature_set; 58 + }; 59 + 32 60 #define MT7615_PATCH_ADDRESS 0x80000 33 61 #define MT7622_PATCH_ADDRESS 0x9c000 62 + #define MT7663_PATCH_ADDRESS 0xdc000 34 63 35 64 #define N9_REGION_NUM 2 36 65 #define CR4_REGION_NUM 1 ··· 73 44 #define DL_MODE_KEY_IDX GENMASK(2, 1) 74 45 #define DL_MODE_RESET_SEC_IV BIT(3) 75 46 #define DL_MODE_WORKING_PDA_CR4 BIT(4) 47 + #define DL_MODE_VALID_RAM_ENTRY BIT(5) 76 48 #define DL_MODE_NEED_RSP BIT(31) 77 49 78 50 #define FW_START_OVERRIDE BIT(0) 79 51 #define FW_START_WORKING_PDA_CR4 BIT(2) 80 52 81 - static int __mt7615_mcu_msg_send(struct mt7615_dev *dev, struct sk_buff *skb, 82 - int cmd, int *wait_seq) 53 + void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb, 54 + int cmd, int *wait_seq) 83 55 { 56 + int txd_len, mcu_cmd = cmd & MCU_CMD_MASK; 57 + struct mt7615_uni_txd *uni_txd; 84 58 struct mt7615_mcu_txd *mcu_txd; 85 59 u8 seq, q_idx, pkt_fmt; 86 - enum mt76_txq_id qid; 87 - u32 val; 88 60 __le32 *txd; 61 + u32 val; 89 62 90 63 seq = ++dev->mt76.mcu.msg_seq & 0xf; 91 64 if (!seq) 92 65 seq = ++dev->mt76.mcu.msg_seq & 0xf; 66 + if (wait_seq) 67 + *wait_seq = seq; 93 68 94 - mcu_txd = (struct mt7615_mcu_txd *)skb_push(skb, 95 - sizeof(struct mt7615_mcu_txd)); 96 - memset(mcu_txd, 0, sizeof(struct mt7615_mcu_txd)); 69 + txd_len = cmd & MCU_UNI_PREFIX ? sizeof(*uni_txd) : sizeof(*mcu_txd); 70 + txd = (__le32 *)skb_push(skb, txd_len); 97 71 98 - if (cmd != -MCU_CMD_FW_SCATTER) { 72 + if (cmd != MCU_CMD_FW_SCATTER) { 99 73 q_idx = MT_TX_MCU_PORT_RX_Q0; 100 74 pkt_fmt = MT_TX_TYPE_CMD; 101 75 } else { 102 76 q_idx = MT_TX_MCU_PORT_RX_FWDL; 103 77 pkt_fmt = MT_TX_TYPE_FW; 104 78 } 105 - 106 - txd = mcu_txd->txd; 107 79 108 80 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 109 81 FIELD_PREP(MT_TXD0_P_IDX, MT_TX_PORT_IDX_MCU) | ··· 116 86 FIELD_PREP(MT_TXD1_PKT_FMT, pkt_fmt); 117 87 txd[1] = cpu_to_le32(val); 118 88 89 + if (cmd & MCU_UNI_PREFIX) { 90 + uni_txd = (struct mt7615_uni_txd *)txd; 91 + uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 92 + uni_txd->option = MCU_CMD_UNI_EXT_ACK; 93 + uni_txd->cid = cpu_to_le16(mcu_cmd); 94 + uni_txd->s2d_index = MCU_S2D_H2N; 95 + uni_txd->pkt_type = MCU_PKT_ID; 96 + uni_txd->seq = seq; 97 + 98 + return; 99 + } 100 + 101 + mcu_txd = (struct mt7615_mcu_txd *)txd; 119 102 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 120 103 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, q_idx)); 104 + mcu_txd->s2d_index = MCU_S2D_H2N; 121 105 mcu_txd->pkt_type = MCU_PKT_ID; 122 106 mcu_txd->seq = seq; 123 107 124 - if (cmd < 0) { 108 + if (cmd & MCU_FW_PREFIX) { 125 109 mcu_txd->set_query = MCU_Q_NA; 126 - mcu_txd->cid = -cmd; 110 + mcu_txd->cid = mcu_cmd; 127 111 } else { 128 112 mcu_txd->cid = MCU_CMD_EXT_CID; 129 113 mcu_txd->set_query = MCU_Q_SET; 130 114 mcu_txd->ext_cid = cmd; 131 115 mcu_txd->ext_cid_ack = 1; 132 116 } 133 - mcu_txd->s2d_index = MCU_S2D_H2N; 117 + } 134 118 135 - if (wait_seq) 136 - *wait_seq = seq; 119 + static int __mt7615_mcu_msg_send(struct mt7615_dev *dev, struct sk_buff *skb, 120 + int cmd, int *wait_seq) 121 + { 122 + enum mt76_txq_id qid; 137 123 124 + mt7615_mcu_fill_msg(dev, skb, cmd, wait_seq); 138 125 if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) 139 126 qid = MT_TXQ_MCU; 140 127 else ··· 171 124 return -EAGAIN; 172 125 173 126 switch (cmd) { 174 - case -MCU_CMD_PATCH_SEM_CONTROL: 127 + case MCU_CMD_PATCH_SEM_CONTROL: 175 128 skb_pull(skb, sizeof(*rxd) - 4); 176 129 ret = *skb->data; 177 130 break; ··· 187 140 return ret; 188 141 } 189 142 190 - static int 191 - mt7615_mcu_msg_send(struct mt76_dev *mdev, int cmd, const void *data, 192 - int len, bool wait_resp) 143 + int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq) 193 144 { 194 - struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); 195 145 unsigned long expires = jiffies + 20 * HZ; 196 146 struct sk_buff *skb; 197 - int ret, seq; 147 + int ret = 0; 198 148 199 - skb = mt7615_mcu_msg_alloc(data, len); 200 - if (!skb) 201 - return -ENOMEM; 202 - 203 - mutex_lock(&mdev->mcu.mutex); 204 - 205 - ret = __mt7615_mcu_msg_send(dev, skb, cmd, &seq); 206 - if (ret) 207 - goto out; 208 - 209 - while (wait_resp) { 210 - skb = mt76_mcu_get_response(mdev, expires); 149 + while (true) { 150 + skb = mt76_mcu_get_response(&dev->mt76, expires); 211 151 if (!skb) { 212 - dev_err(mdev->dev, "Message %d (seq %d) timeout\n", 213 - cmd, seq); 214 - ret = -ETIMEDOUT; 215 - break; 152 + dev_err(dev->mt76.dev, "Message %ld (seq %d) timeout\n", 153 + cmd & MCU_CMD_MASK, seq); 154 + return -ETIMEDOUT; 216 155 } 217 156 218 157 ret = mt7615_mcu_parse_response(dev, cmd, skb, seq); ··· 206 173 break; 207 174 } 208 175 176 + return ret; 177 + } 178 + 179 + static int 180 + mt7615_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, 181 + int cmd, bool wait_resp) 182 + { 183 + struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); 184 + int ret, seq; 185 + 186 + mutex_lock(&mdev->mcu.mutex); 187 + 188 + ret = __mt7615_mcu_msg_send(dev, skb, cmd, &seq); 189 + if (ret) 190 + goto out; 191 + 192 + if (wait_resp) 193 + ret = mt7615_mcu_wait_response(dev, cmd, seq); 194 + 209 195 out: 210 196 mutex_unlock(&mdev->mcu.mutex); 211 197 212 198 return ret; 199 + } 200 + 201 + static int 202 + mt7615_mcu_msg_send(struct mt76_dev *mdev, int cmd, const void *data, 203 + int len, bool wait_resp) 204 + { 205 + struct sk_buff *skb; 206 + 207 + skb = mt7615_mcu_msg_alloc(data, len); 208 + if (!skb) 209 + return -ENOMEM; 210 + 211 + return __mt76_mcu_skb_send_msg(mdev, skb, cmd, wait_resp); 213 212 } 214 213 215 214 static void ··· 352 287 .mode = cpu_to_le32(mode), 353 288 }; 354 289 355 - return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_TARGET_ADDRESS_LEN_REQ, 290 + return __mt76_mcu_send_msg(&dev->mt76, MCU_CMD_TARGET_ADDRESS_LEN_REQ, 356 291 &req, sizeof(req), true); 357 292 } 293 + 294 + static int 295 + mt7615_mcu_add_dev(struct mt7615_dev *dev, struct ieee80211_vif *vif, 296 + bool enable) 297 + { 298 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 299 + struct { 300 + struct req_hdr { 301 + u8 omac_idx; 302 + u8 band_idx; 303 + __le16 tlv_num; 304 + u8 is_tlv_append; 305 + u8 rsv[3]; 306 + } __packed hdr; 307 + struct req_tlv { 308 + __le16 tag; 309 + __le16 len; 310 + u8 active; 311 + u8 band_idx; 312 + u8 omac_addr[ETH_ALEN]; 313 + } __packed tlv; 314 + } data = { 315 + .hdr = { 316 + .omac_idx = mvif->omac_idx, 317 + .band_idx = mvif->band_idx, 318 + .tlv_num = cpu_to_le16(1), 319 + .is_tlv_append = 1, 320 + }, 321 + .tlv = { 322 + .tag = cpu_to_le16(DEV_INFO_ACTIVE), 323 + .len = cpu_to_le16(sizeof(struct req_tlv)), 324 + .active = enable, 325 + .band_idx = mvif->band_idx, 326 + }, 327 + }; 328 + 329 + memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 330 + return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_DEV_INFO_UPDATE, 331 + &data, sizeof(data), true); 332 + } 333 + 334 + static int 335 + mt7615_mcu_add_beacon_offload(struct mt7615_dev *dev, 336 + struct ieee80211_hw *hw, 337 + struct ieee80211_vif *vif, bool enable) 338 + { 339 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 340 + struct mt76_wcid *wcid = &dev->mt76.global_wcid; 341 + struct ieee80211_mutable_offsets offs; 342 + struct ieee80211_tx_info *info; 343 + struct req { 344 + u8 omac_idx; 345 + u8 enable; 346 + u8 wlan_idx; 347 + u8 band_idx; 348 + u8 pkt_type; 349 + u8 need_pre_tbtt_int; 350 + __le16 csa_ie_pos; 351 + __le16 pkt_len; 352 + __le16 tim_ie_pos; 353 + u8 pkt[512]; 354 + u8 csa_cnt; 355 + /* bss color change */ 356 + u8 bcc_cnt; 357 + __le16 bcc_ie_pos; 358 + } __packed req = { 359 + .omac_idx = mvif->omac_idx, 360 + .enable = enable, 361 + .wlan_idx = wcid->idx, 362 + .band_idx = mvif->band_idx, 363 + }; 364 + struct sk_buff *skb; 365 + 366 + skb = ieee80211_beacon_get_template(hw, vif, &offs); 367 + if (!skb) 368 + return -EINVAL; 369 + 370 + if (skb->len > 512 - MT_TXD_SIZE) { 371 + dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 372 + dev_kfree_skb(skb); 373 + return -EINVAL; 374 + } 375 + 376 + if (mvif->band_idx) { 377 + info = IEEE80211_SKB_CB(skb); 378 + info->hw_queue |= MT_TX_HW_QUEUE_EXT_PHY; 379 + } 380 + 381 + mt7615_mac_write_txwi(dev, (__le32 *)(req.pkt), skb, wcid, NULL, 382 + 0, NULL, true); 383 + memcpy(req.pkt + MT_TXD_SIZE, skb->data, skb->len); 384 + req.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 385 + req.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset); 386 + if (offs.csa_counter_offs[0]) { 387 + u16 csa_offs; 388 + 389 + csa_offs = MT_TXD_SIZE + offs.csa_counter_offs[0] - 4; 390 + req.csa_ie_pos = cpu_to_le16(csa_offs); 391 + req.csa_cnt = skb->data[offs.csa_counter_offs[0]]; 392 + } 393 + dev_kfree_skb(skb); 394 + 395 + return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_BCN_OFFLOAD, 396 + &req, sizeof(req), true); 397 + } 398 + 399 + static int 400 + mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int band, int state) 401 + { 402 + #define ENTER_PM_STATE 1 403 + #define EXIT_PM_STATE 2 404 + struct { 405 + u8 pm_number; 406 + u8 pm_state; 407 + u8 bssid[ETH_ALEN]; 408 + u8 dtim_period; 409 + u8 wlan_idx; 410 + __le16 bcn_interval; 411 + __le32 aid; 412 + __le32 rx_filter; 413 + u8 band_idx; 414 + u8 rsv[3]; 415 + __le32 feature; 416 + u8 omac_idx; 417 + u8 wmm_idx; 418 + u8 bcn_loss_cnt; 419 + u8 bcn_sp_duration; 420 + } __packed req = { 421 + .pm_number = 5, 422 + .pm_state = state ? ENTER_PM_STATE : EXIT_PM_STATE, 423 + .band_idx = band, 424 + }; 425 + 426 + return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_PM_STATE_CTRL, 427 + &req, sizeof(req), true); 428 + } 429 + 430 + static struct sk_buff * 431 + mt7615_mcu_alloc_sta_req(struct mt7615_vif *mvif, struct mt7615_sta *msta) 432 + { 433 + struct sta_req_hdr hdr = { 434 + .bss_idx = mvif->idx, 435 + .wlan_idx = msta ? msta->wcid.idx : 0, 436 + .muar_idx = msta ? mvif->omac_idx : 0, 437 + .is_tlv_append = 1, 438 + }; 439 + struct sk_buff *skb; 440 + 441 + skb = mt7615_mcu_msg_alloc(NULL, MT7615_STA_UPDATE_MAX_SIZE); 442 + if (!skb) 443 + return ERR_PTR(-ENOMEM); 444 + 445 + skb_put_data(skb, &hdr, sizeof(hdr)); 446 + 447 + return skb; 448 + } 449 + 450 + static struct wtbl_req_hdr * 451 + mt7615_mcu_alloc_wtbl_req(struct mt7615_sta *msta, int cmd, 452 + void *sta_wtbl, struct sk_buff **skb) 453 + { 454 + struct tlv *sta_hdr = sta_wtbl; 455 + struct wtbl_req_hdr hdr = { 456 + .wlan_idx = msta->wcid.idx, 457 + .operation = cmd, 458 + }; 459 + struct sk_buff *nskb = *skb; 460 + 461 + if (!nskb) { 462 + nskb = mt7615_mcu_msg_alloc(NULL, MT7615_WTBL_UPDATE_BA_SIZE); 463 + if (!nskb) 464 + return ERR_PTR(-ENOMEM); 465 + 466 + *skb = nskb; 467 + } 468 + 469 + if (sta_hdr) 470 + sta_hdr->len = cpu_to_le16(sizeof(hdr)); 471 + 472 + return skb_put_data(nskb, &hdr, sizeof(hdr)); 473 + } 474 + 475 + static struct tlv * 476 + mt7615_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len, 477 + void *sta_ntlv, void *sta_wtbl) 478 + { 479 + struct sta_ntlv_hdr *ntlv_hdr = sta_ntlv; 480 + struct tlv *sta_hdr = sta_wtbl; 481 + struct tlv *ptlv, tlv = { 482 + .tag = cpu_to_le16(tag), 483 + .len = cpu_to_le16(len), 484 + }; 485 + u16 ntlv; 486 + 487 + ptlv = skb_put(skb, len); 488 + memcpy(ptlv, &tlv, sizeof(tlv)); 489 + 490 + ntlv = le16_to_cpu(ntlv_hdr->tlv_num); 491 + ntlv_hdr->tlv_num = cpu_to_le16(ntlv + 1); 492 + 493 + if (sta_hdr) { 494 + u16 size = le16_to_cpu(sta_hdr->len); 495 + 496 + sta_hdr->len = cpu_to_le16(size + len); 497 + } 498 + 499 + return ptlv; 500 + } 501 + 502 + static struct tlv * 503 + mt7615_mcu_add_tlv(struct sk_buff *skb, int tag, int len) 504 + { 505 + return mt7615_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); 506 + } 507 + 508 + static int 509 + mt7615_mcu_bss_basic_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 510 + bool enable) 511 + { 512 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 513 + struct bss_info_basic *bss; 514 + u8 wlan_idx = mvif->sta.wcid.idx; 515 + u32 type = NETWORK_INFRA; 516 + struct tlv *tlv; 517 + 518 + tlv = mt7615_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss)); 519 + 520 + switch (vif->type) { 521 + case NL80211_IFTYPE_MESH_POINT: 522 + case NL80211_IFTYPE_AP: 523 + break; 524 + case NL80211_IFTYPE_STATION: 525 + /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 526 + if (enable) { 527 + struct ieee80211_sta *sta; 528 + struct mt7615_sta *msta; 529 + 530 + rcu_read_lock(); 531 + sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); 532 + if (!sta) { 533 + rcu_read_unlock(); 534 + return -EINVAL; 535 + } 536 + 537 + msta = (struct mt7615_sta *)sta->drv_priv; 538 + wlan_idx = msta->wcid.idx; 539 + rcu_read_unlock(); 540 + } 541 + break; 542 + case NL80211_IFTYPE_ADHOC: 543 + type = NETWORK_IBSS; 544 + break; 545 + default: 546 + WARN_ON(1); 547 + break; 548 + } 549 + 550 + bss = (struct bss_info_basic *)tlv; 551 + memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); 552 + bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 553 + bss->network_type = cpu_to_le32(type); 554 + bss->dtim_period = vif->bss_conf.dtim_period; 555 + bss->bmc_tx_wlan_idx = wlan_idx; 556 + bss->wmm_idx = mvif->wmm_idx; 557 + bss->active = enable; 558 + 559 + return 0; 560 + } 561 + 562 + static void 563 + mt7615_mcu_bss_omac_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) 564 + { 565 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 566 + struct bss_info_omac *omac; 567 + struct tlv *tlv; 568 + u32 type = 0; 569 + u8 idx; 570 + 571 + tlv = mt7615_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac)); 572 + 573 + switch (vif->type) { 574 + case NL80211_IFTYPE_MESH_POINT: 575 + case NL80211_IFTYPE_AP: 576 + type = CONNECTION_INFRA_AP; 577 + break; 578 + case NL80211_IFTYPE_STATION: 579 + type = CONNECTION_INFRA_STA; 580 + break; 581 + case NL80211_IFTYPE_ADHOC: 582 + type = CONNECTION_IBSS_ADHOC; 583 + break; 584 + default: 585 + WARN_ON(1); 586 + break; 587 + } 588 + 589 + omac = (struct bss_info_omac *)tlv; 590 + idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 591 + omac->conn_type = cpu_to_le32(type); 592 + omac->omac_idx = mvif->omac_idx; 593 + omac->band_idx = mvif->band_idx; 594 + omac->hw_bss_idx = idx; 595 + } 596 + 597 + /* SIFS 20us + 512 byte beacon tranmitted by 1Mbps (3906us) */ 598 + #define BCN_TX_ESTIMATE_TIME (4096 + 20) 599 + static void 600 + mt7615_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt7615_vif *mvif) 601 + { 602 + struct bss_info_ext_bss *ext; 603 + int ext_bss_idx, tsf_offset; 604 + struct tlv *tlv; 605 + 606 + ext_bss_idx = mvif->omac_idx - EXT_BSSID_START; 607 + if (ext_bss_idx < 0) 608 + return; 609 + 610 + tlv = mt7615_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext)); 611 + 612 + ext = (struct bss_info_ext_bss *)tlv; 613 + tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; 614 + ext->mbss_tsf_offset = cpu_to_le32(tsf_offset); 615 + } 616 + 617 + static void 618 + mt7615_mcu_sta_ba_tlv(struct sk_buff *skb, 619 + struct ieee80211_ampdu_params *params, 620 + bool enable, bool tx) 621 + { 622 + struct sta_rec_ba *ba; 623 + struct tlv *tlv; 624 + 625 + tlv = mt7615_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 626 + 627 + ba = (struct sta_rec_ba *)tlv; 628 + ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT, 629 + ba->winsize = cpu_to_le16(params->buf_size); 630 + ba->ssn = cpu_to_le16(params->ssn); 631 + ba->ba_en = enable << params->tid; 632 + ba->amsdu = params->amsdu; 633 + ba->tid = params->tid; 634 + } 635 + 636 + static void 637 + mt7615_mcu_sta_basic_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 638 + struct ieee80211_sta *sta, bool enable) 639 + { 640 + struct sta_rec_basic *basic; 641 + struct tlv *tlv; 642 + 643 + tlv = mt7615_mcu_add_tlv(skb, STA_REC_BASIC, sizeof(*basic)); 644 + 645 + basic = (struct sta_rec_basic *)tlv; 646 + basic->extra_info = cpu_to_le16(EXTRA_INFO_VER); 647 + 648 + if (enable) { 649 + basic->extra_info |= cpu_to_le16(EXTRA_INFO_NEW); 650 + basic->conn_state = CONN_STATE_PORT_SECURE; 651 + } else { 652 + basic->conn_state = CONN_STATE_DISCONNECT; 653 + } 654 + 655 + if (!sta) { 656 + basic->conn_type = cpu_to_le32(CONNECTION_INFRA_BC); 657 + eth_broadcast_addr(basic->peer_addr); 658 + return; 659 + } 660 + 661 + switch (vif->type) { 662 + case NL80211_IFTYPE_MESH_POINT: 663 + case NL80211_IFTYPE_AP: 664 + basic->conn_type = cpu_to_le32(CONNECTION_INFRA_STA); 665 + break; 666 + case NL80211_IFTYPE_STATION: 667 + basic->conn_type = cpu_to_le32(CONNECTION_INFRA_AP); 668 + break; 669 + case NL80211_IFTYPE_ADHOC: 670 + basic->conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 671 + break; 672 + default: 673 + WARN_ON(1); 674 + break; 675 + } 676 + 677 + memcpy(basic->peer_addr, sta->addr, ETH_ALEN); 678 + basic->aid = cpu_to_le16(sta->aid); 679 + basic->qos = sta->wme; 680 + } 681 + 682 + static void 683 + mt7615_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 684 + { 685 + struct tlv *tlv; 686 + 687 + if (sta->ht_cap.ht_supported) { 688 + struct sta_rec_ht *ht; 689 + 690 + tlv = mt7615_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 691 + ht = (struct sta_rec_ht *)tlv; 692 + ht->ht_cap = cpu_to_le16(sta->ht_cap.cap); 693 + } 694 + if (sta->vht_cap.vht_supported) { 695 + struct sta_rec_vht *vht; 696 + 697 + tlv = mt7615_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); 698 + vht = (struct sta_rec_vht *)tlv; 699 + vht->vht_rx_mcs_map = sta->vht_cap.vht_mcs.rx_mcs_map; 700 + vht->vht_tx_mcs_map = sta->vht_cap.vht_mcs.tx_mcs_map; 701 + vht->vht_cap = cpu_to_le32(sta->vht_cap.cap); 702 + } 703 + } 704 + 705 + static void 706 + mt7615_mcu_wtbl_ba_tlv(struct sk_buff *skb, 707 + struct ieee80211_ampdu_params *params, 708 + bool enable, bool tx, void *sta_wtbl, 709 + void *wtbl_tlv) 710 + { 711 + struct wtbl_ba *ba; 712 + struct tlv *tlv; 713 + 714 + tlv = mt7615_mcu_add_nested_tlv(skb, WTBL_BA, sizeof(*ba), 715 + wtbl_tlv, sta_wtbl); 716 + 717 + ba = (struct wtbl_ba *)tlv; 718 + ba->tid = params->tid; 719 + 720 + if (tx) { 721 + ba->ba_type = MT_BA_TYPE_ORIGINATOR; 722 + ba->sn = enable ? cpu_to_le16(params->ssn) : 0; 723 + ba->ba_winsize = cpu_to_le16(params->buf_size); 724 + ba->ba_en = enable; 725 + } else { 726 + memcpy(ba->peer_addr, params->sta->addr, ETH_ALEN); 727 + ba->ba_type = MT_BA_TYPE_RECIPIENT; 728 + ba->rst_ba_tid = params->tid; 729 + ba->rst_ba_sel = RST_BA_MAC_TID_MATCH; 730 + ba->rst_ba_sb = 1; 731 + } 732 + 733 + if (enable && tx) { 734 + u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; 735 + int i; 736 + 737 + for (i = 7; i > 0; i--) { 738 + if (params->buf_size >= ba_range[i]) 739 + break; 740 + } 741 + ba->ba_winsize_idx = i; 742 + } 743 + } 744 + 745 + static void 746 + mt7615_mcu_wtbl_generic_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, 747 + struct ieee80211_sta *sta, void *sta_wtbl, 748 + void *wtbl_tlv) 749 + { 750 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 751 + struct wtbl_generic *generic; 752 + struct wtbl_rx *rx; 753 + struct tlv *tlv; 754 + 755 + tlv = mt7615_mcu_add_nested_tlv(skb, WTBL_GENERIC, sizeof(*generic), 756 + wtbl_tlv, sta_wtbl); 757 + 758 + generic = (struct wtbl_generic *)tlv; 759 + 760 + if (sta) { 761 + memcpy(generic->peer_addr, sta->addr, ETH_ALEN); 762 + generic->partial_aid = cpu_to_le16(sta->aid); 763 + generic->muar_idx = mvif->omac_idx; 764 + generic->qos = sta->wme; 765 + } else { 766 + eth_broadcast_addr(generic->peer_addr); 767 + generic->muar_idx = 0xe; 768 + } 769 + 770 + tlv = mt7615_mcu_add_nested_tlv(skb, WTBL_RX, sizeof(*rx), 771 + wtbl_tlv, sta_wtbl); 772 + 773 + rx = (struct wtbl_rx *)tlv; 774 + rx->rca1 = sta ? vif->type != NL80211_IFTYPE_AP : 1; 775 + rx->rca2 = 1; 776 + rx->rv = 1; 777 + } 778 + 779 + static void 780 + mt7615_mcu_wtbl_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, 781 + void *sta_wtbl, void *wtbl_tlv) 782 + { 783 + struct tlv *tlv; 784 + u32 flags = 0; 785 + 786 + if (sta->ht_cap.ht_supported) { 787 + struct wtbl_ht *ht; 788 + 789 + tlv = mt7615_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht), 790 + wtbl_tlv, sta_wtbl); 791 + ht = (struct wtbl_ht *)tlv; 792 + ht->ldpc = sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING; 793 + ht->af = sta->ht_cap.ampdu_factor; 794 + ht->mm = sta->ht_cap.ampdu_density; 795 + ht->ht = 1; 796 + 797 + if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 798 + flags |= MT_WTBL_W5_SHORT_GI_20; 799 + if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 800 + flags |= MT_WTBL_W5_SHORT_GI_40; 801 + } 802 + 803 + if (sta->vht_cap.vht_supported) { 804 + struct wtbl_vht *vht; 805 + 806 + tlv = mt7615_mcu_add_nested_tlv(skb, WTBL_VHT, sizeof(*vht), 807 + wtbl_tlv, sta_wtbl); 808 + vht = (struct wtbl_vht *)tlv; 809 + vht->ldpc = sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC, 810 + vht->vht = 1; 811 + 812 + if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 813 + flags |= MT_WTBL_W5_SHORT_GI_80; 814 + if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 815 + flags |= MT_WTBL_W5_SHORT_GI_160; 816 + } 817 + 818 + /* wtbl smps */ 819 + if (sta->smps_mode == IEEE80211_SMPS_DYNAMIC) { 820 + struct wtbl_smps *smps; 821 + 822 + tlv = mt7615_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps), 823 + wtbl_tlv, sta_wtbl); 824 + smps = (struct wtbl_smps *)tlv; 825 + smps->smps = 1; 826 + } 827 + 828 + if (sta->ht_cap.ht_supported) { 829 + /* sgi */ 830 + u32 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 | 831 + MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160; 832 + struct wtbl_raw *raw; 833 + 834 + tlv = mt7615_mcu_add_nested_tlv(skb, WTBL_RAW_DATA, 835 + sizeof(*raw), wtbl_tlv, 836 + sta_wtbl); 837 + raw = (struct wtbl_raw *)tlv; 838 + raw->val = cpu_to_le32(flags); 839 + raw->msk = cpu_to_le32(~msk); 840 + raw->wtbl_idx = 1; 841 + raw->dw = 5; 842 + } 843 + } 844 + 845 + static int 846 + mt7615_mcu_add_bss(struct mt7615_dev *dev, struct ieee80211_vif *vif, 847 + bool enable) 848 + { 849 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 850 + struct sk_buff *skb; 851 + 852 + skb = mt7615_mcu_alloc_sta_req(mvif, NULL); 853 + if (IS_ERR(skb)) 854 + return PTR_ERR(skb); 855 + 856 + if (enable) 857 + mt7615_mcu_bss_omac_tlv(skb, vif); 858 + 859 + mt7615_mcu_bss_basic_tlv(skb, vif, enable); 860 + 861 + if (enable && mvif->omac_idx > EXT_BSSID_START) 862 + mt7615_mcu_bss_ext_tlv(skb, mvif); 863 + 864 + return __mt76_mcu_skb_send_msg(&dev->mt76, skb, 865 + MCU_EXT_CMD_BSS_INFO_UPDATE, true); 866 + } 867 + 868 + static int 869 + mt7615_mcu_wtbl_tx_ba(struct mt7615_dev *dev, 870 + struct ieee80211_ampdu_params *params, 871 + bool enable) 872 + { 873 + struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 874 + struct mt7615_vif *mvif = msta->vif; 875 + struct wtbl_req_hdr *wtbl_hdr; 876 + struct sk_buff *skb = NULL; 877 + int err; 878 + 879 + wtbl_hdr = mt7615_mcu_alloc_wtbl_req(msta, WTBL_SET, NULL, &skb); 880 + if (IS_ERR(wtbl_hdr)) 881 + return PTR_ERR(wtbl_hdr); 882 + 883 + mt7615_mcu_wtbl_ba_tlv(skb, params, enable, true, NULL, wtbl_hdr); 884 + 885 + err = __mt76_mcu_skb_send_msg(&dev->mt76, skb, 886 + MCU_EXT_CMD_WTBL_UPDATE, true); 887 + if (err < 0) 888 + return err; 889 + 890 + skb = mt7615_mcu_alloc_sta_req(mvif, msta); 891 + if (IS_ERR(skb)) 892 + return PTR_ERR(skb); 893 + 894 + mt7615_mcu_sta_ba_tlv(skb, params, enable, true); 895 + 896 + return __mt76_mcu_skb_send_msg(&dev->mt76, skb, 897 + MCU_EXT_CMD_STA_REC_UPDATE, true); 898 + } 899 + 900 + static int 901 + mt7615_mcu_wtbl_rx_ba(struct mt7615_dev *dev, 902 + struct ieee80211_ampdu_params *params, 903 + bool enable) 904 + { 905 + struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 906 + struct mt7615_vif *mvif = msta->vif; 907 + struct wtbl_req_hdr *wtbl_hdr; 908 + struct sk_buff *skb; 909 + int err; 910 + 911 + skb = mt7615_mcu_alloc_sta_req(mvif, msta); 912 + if (IS_ERR(skb)) 913 + return PTR_ERR(skb); 914 + 915 + mt7615_mcu_sta_ba_tlv(skb, params, enable, false); 916 + 917 + err = __mt76_mcu_skb_send_msg(&dev->mt76, skb, 918 + MCU_EXT_CMD_STA_REC_UPDATE, true); 919 + if (err < 0 || !enable) 920 + return err; 921 + 922 + skb = NULL; 923 + wtbl_hdr = mt7615_mcu_alloc_wtbl_req(msta, WTBL_SET, NULL, &skb); 924 + if (IS_ERR(wtbl_hdr)) 925 + return PTR_ERR(wtbl_hdr); 926 + 927 + mt7615_mcu_wtbl_ba_tlv(skb, params, enable, false, NULL, wtbl_hdr); 928 + 929 + return __mt76_mcu_skb_send_msg(&dev->mt76, skb, 930 + MCU_EXT_CMD_WTBL_UPDATE, true); 931 + } 932 + 933 + static int 934 + mt7615_mcu_wtbl_sta_add(struct mt7615_dev *dev, struct ieee80211_vif *vif, 935 + struct ieee80211_sta *sta, bool enable) 936 + { 937 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 938 + struct sk_buff *skb, *sskb, *wskb = NULL; 939 + struct wtbl_req_hdr *wtbl_hdr; 940 + struct mt7615_sta *msta; 941 + int cmd, err; 942 + 943 + msta = sta ? (struct mt7615_sta *)sta->drv_priv : &mvif->sta; 944 + 945 + sskb = mt7615_mcu_alloc_sta_req(mvif, msta); 946 + if (IS_ERR(sskb)) 947 + return PTR_ERR(sskb); 948 + 949 + mt7615_mcu_sta_basic_tlv(sskb, vif, sta, enable); 950 + if (enable && sta) 951 + mt7615_mcu_sta_ht_tlv(sskb, sta); 952 + 953 + wtbl_hdr = mt7615_mcu_alloc_wtbl_req(msta, WTBL_RESET_AND_SET, NULL, 954 + &wskb); 955 + if (IS_ERR(wtbl_hdr)) 956 + return PTR_ERR(wtbl_hdr); 957 + 958 + if (enable) { 959 + mt7615_mcu_wtbl_generic_tlv(wskb, vif, sta, NULL, wtbl_hdr); 960 + if (sta) 961 + mt7615_mcu_wtbl_ht_tlv(wskb, sta, NULL, wtbl_hdr); 962 + } 963 + 964 + cmd = enable ? MCU_EXT_CMD_WTBL_UPDATE : MCU_EXT_CMD_STA_REC_UPDATE; 965 + skb = enable ? wskb : sskb; 966 + 967 + err = __mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, true); 968 + if (err < 0) 969 + return err; 970 + 971 + cmd = enable ? MCU_EXT_CMD_STA_REC_UPDATE : MCU_EXT_CMD_WTBL_UPDATE; 972 + skb = enable ? sskb : wskb; 973 + 974 + return __mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, true); 975 + } 976 + 977 + static const struct mt7615_mcu_ops wtbl_update_ops = { 978 + .add_beacon_offload = mt7615_mcu_add_beacon_offload, 979 + .set_pm_state = mt7615_mcu_ctrl_pm_state, 980 + .add_dev_info = mt7615_mcu_add_dev, 981 + .add_bss_info = mt7615_mcu_add_bss, 982 + .add_tx_ba = mt7615_mcu_wtbl_tx_ba, 983 + .add_rx_ba = mt7615_mcu_wtbl_rx_ba, 984 + .sta_add = mt7615_mcu_wtbl_sta_add, 985 + }; 986 + 987 + static int 988 + mt7615_mcu_sta_ba(struct mt7615_dev *dev, 989 + struct ieee80211_ampdu_params *params, 990 + bool enable, bool tx) 991 + { 992 + struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 993 + struct mt7615_vif *mvif = msta->vif; 994 + struct wtbl_req_hdr *wtbl_hdr; 995 + struct tlv *sta_wtbl; 996 + struct sk_buff *skb; 997 + 998 + skb = mt7615_mcu_alloc_sta_req(mvif, msta); 999 + if (IS_ERR(skb)) 1000 + return PTR_ERR(skb); 1001 + 1002 + mt7615_mcu_sta_ba_tlv(skb, params, enable, tx); 1003 + 1004 + sta_wtbl = mt7615_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); 1005 + 1006 + wtbl_hdr = mt7615_mcu_alloc_wtbl_req(msta, WTBL_SET, sta_wtbl, &skb); 1007 + mt7615_mcu_wtbl_ba_tlv(skb, params, enable, tx, sta_wtbl, wtbl_hdr); 1008 + 1009 + return __mt76_mcu_skb_send_msg(&dev->mt76, skb, 1010 + MCU_EXT_CMD_STA_REC_UPDATE, true); 1011 + } 1012 + 1013 + static int 1014 + mt7615_mcu_sta_tx_ba(struct mt7615_dev *dev, 1015 + struct ieee80211_ampdu_params *params, 1016 + bool enable) 1017 + { 1018 + return mt7615_mcu_sta_ba(dev, params, enable, true); 1019 + } 1020 + 1021 + static int 1022 + mt7615_mcu_sta_rx_ba(struct mt7615_dev *dev, 1023 + struct ieee80211_ampdu_params *params, 1024 + bool enable) 1025 + { 1026 + return mt7615_mcu_sta_ba(dev, params, enable, false); 1027 + } 1028 + 1029 + static int 1030 + mt7615_mcu_add_sta_cmd(struct mt7615_dev *dev, struct ieee80211_vif *vif, 1031 + struct ieee80211_sta *sta, bool enable, int cmd) 1032 + { 1033 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1034 + struct wtbl_req_hdr *wtbl_hdr; 1035 + struct mt7615_sta *msta; 1036 + struct tlv *sta_wtbl; 1037 + struct sk_buff *skb; 1038 + 1039 + msta = sta ? (struct mt7615_sta *)sta->drv_priv : &mvif->sta; 1040 + 1041 + skb = mt7615_mcu_alloc_sta_req(mvif, msta); 1042 + if (IS_ERR(skb)) 1043 + return PTR_ERR(skb); 1044 + 1045 + mt7615_mcu_sta_basic_tlv(skb, vif, sta, enable); 1046 + if (enable && sta) 1047 + mt7615_mcu_sta_ht_tlv(skb, sta); 1048 + 1049 + sta_wtbl = mt7615_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); 1050 + 1051 + wtbl_hdr = mt7615_mcu_alloc_wtbl_req(msta, WTBL_RESET_AND_SET, 1052 + sta_wtbl, &skb); 1053 + if (enable) { 1054 + mt7615_mcu_wtbl_generic_tlv(skb, vif, sta, sta_wtbl, wtbl_hdr); 1055 + if (sta) 1056 + mt7615_mcu_wtbl_ht_tlv(skb, sta, sta_wtbl, wtbl_hdr); 1057 + } 1058 + 1059 + return __mt76_mcu_skb_send_msg(&dev->mt76, skb, cmd, true); 1060 + } 1061 + 1062 + static int 1063 + mt7615_mcu_add_sta(struct mt7615_dev *dev, struct ieee80211_vif *vif, 1064 + struct ieee80211_sta *sta, bool enable) 1065 + { 1066 + return mt7615_mcu_add_sta_cmd(dev, vif, sta, enable, 1067 + MCU_EXT_CMD_STA_REC_UPDATE); 1068 + } 1069 + 1070 + static const struct mt7615_mcu_ops sta_update_ops = { 1071 + .add_beacon_offload = mt7615_mcu_add_beacon_offload, 1072 + .set_pm_state = mt7615_mcu_ctrl_pm_state, 1073 + .add_dev_info = mt7615_mcu_add_dev, 1074 + .add_bss_info = mt7615_mcu_add_bss, 1075 + .add_tx_ba = mt7615_mcu_sta_tx_ba, 1076 + .add_rx_ba = mt7615_mcu_sta_rx_ba, 1077 + .sta_add = mt7615_mcu_add_sta, 1078 + }; 1079 + 1080 + static int 1081 + mt7615_mcu_uni_add_dev(struct mt7615_dev *dev, 1082 + struct ieee80211_vif *vif, bool enable) 1083 + { 1084 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1085 + struct { 1086 + struct req_hdr { 1087 + u8 omac_idx; 1088 + u8 band_idx; 1089 + __le16 pad; 1090 + } __packed hdr; 1091 + struct req_tlv { 1092 + __le16 tag; 1093 + __le16 len; 1094 + u8 active; 1095 + u8 pad; 1096 + u8 omac_addr[ETH_ALEN]; 1097 + } __packed tlv; 1098 + } data = { 1099 + .hdr = { 1100 + .omac_idx = mvif->omac_idx, 1101 + .band_idx = mvif->band_idx, 1102 + }, 1103 + .tlv = { 1104 + .tag = cpu_to_le16(DEV_INFO_ACTIVE), 1105 + .len = cpu_to_le16(sizeof(struct req_tlv)), 1106 + .active = enable, 1107 + }, 1108 + }; 1109 + 1110 + memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 1111 + 1112 + return __mt76_mcu_send_msg(&dev->mt76, MCU_UNI_CMD_DEV_INFO_UPDATE, 1113 + &data, sizeof(data), true); 1114 + } 1115 + 1116 + static int 1117 + mt7615_mcu_uni_ctrl_pm_state(struct mt7615_dev *dev, int band, int state) 1118 + { 1119 + return 0; 1120 + } 1121 + 1122 + static int 1123 + mt7615_mcu_uni_add_bss(struct mt7615_dev *dev, 1124 + struct ieee80211_vif *vif, bool enable) 1125 + { 1126 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1127 + struct { 1128 + struct req_hdr { 1129 + u8 bss_idx; 1130 + u8 pad[3]; 1131 + } __packed hdr; 1132 + struct basic_tlv { 1133 + __le16 tag; 1134 + __le16 len; 1135 + u8 active; 1136 + u8 omac_idx; 1137 + u8 hw_bss_idx; 1138 + u8 band_idx; 1139 + __le32 conn_type; 1140 + u8 conn_state; 1141 + u8 wmm_idx; 1142 + u8 bssid[ETH_ALEN]; 1143 + __le16 bmc_tx_wlan_idx; 1144 + __le16 bcn_interval; 1145 + u8 dtim_period; 1146 + u8 phymode; 1147 + __le16 sta_idx; 1148 + u8 nonht_basic_phy; 1149 + u8 pad[3]; 1150 + } __packed basic; 1151 + } req = { 1152 + .hdr = { 1153 + .bss_idx = mvif->idx, 1154 + }, 1155 + .basic = { 1156 + .tag = cpu_to_le16(UNI_BSS_INFO_BASIC), 1157 + .len = cpu_to_le16(sizeof(struct basic_tlv)), 1158 + .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int), 1159 + .dtim_period = vif->bss_conf.dtim_period, 1160 + .omac_idx = mvif->omac_idx, 1161 + .band_idx = mvif->band_idx, 1162 + .wmm_idx = mvif->wmm_idx, 1163 + .active = enable, 1164 + }, 1165 + }; 1166 + u8 idx, tx_wlan_idx = 0; 1167 + 1168 + idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1169 + req.basic.hw_bss_idx = idx; 1170 + 1171 + switch (vif->type) { 1172 + case NL80211_IFTYPE_MESH_POINT: 1173 + case NL80211_IFTYPE_AP: 1174 + req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP); 1175 + tx_wlan_idx = mvif->sta.wcid.idx; 1176 + break; 1177 + case NL80211_IFTYPE_STATION: 1178 + if (enable) { 1179 + struct ieee80211_sta *sta; 1180 + struct mt7615_sta *msta; 1181 + 1182 + rcu_read_lock(); 1183 + sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); 1184 + if (!sta) { 1185 + rcu_read_unlock(); 1186 + return -EINVAL; 1187 + } 1188 + 1189 + msta = (struct mt7615_sta *)sta->drv_priv; 1190 + tx_wlan_idx = msta->wcid.idx; 1191 + rcu_read_unlock(); 1192 + } 1193 + req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA); 1194 + break; 1195 + default: 1196 + WARN_ON(1); 1197 + break; 1198 + } 1199 + 1200 + memcpy(req.basic.bssid, vif->bss_conf.bssid, ETH_ALEN); 1201 + req.basic.bmc_tx_wlan_idx = cpu_to_le16(tx_wlan_idx); 1202 + req.basic.sta_idx = cpu_to_le16(tx_wlan_idx); 1203 + req.basic.conn_state = !enable; 1204 + 1205 + return __mt76_mcu_send_msg(&dev->mt76, MCU_UNI_CMD_BSS_INFO_UPDATE, 1206 + &req, sizeof(req), true); 1207 + } 1208 + 1209 + static int 1210 + mt7615_mcu_uni_add_beacon_offload(struct mt7615_dev *dev, 1211 + struct ieee80211_hw *hw, 1212 + struct ieee80211_vif *vif, 1213 + bool enable) 1214 + { 1215 + struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1216 + struct mt76_wcid *wcid = &dev->mt76.global_wcid; 1217 + struct ieee80211_mutable_offsets offs; 1218 + struct { 1219 + struct req_hdr { 1220 + u8 bss_idx; 1221 + u8 pad[3]; 1222 + } __packed hdr; 1223 + struct bcn_content_tlv { 1224 + __le16 tag; 1225 + __le16 len; 1226 + __le16 tim_ie_pos; 1227 + __le16 csa_ie_pos; 1228 + __le16 bcc_ie_pos; 1229 + /* 0: enable beacon offload 1230 + * 1: disable beacon offload 1231 + * 2: update probe respond offload 1232 + */ 1233 + u8 enable; 1234 + /* 0: legacy format (TXD + payload) 1235 + * 1: only cap field IE 1236 + */ 1237 + u8 type; 1238 + __le16 pkt_len; 1239 + u8 pkt[512]; 1240 + } __packed beacon_tlv; 1241 + } req = { 1242 + .hdr = { 1243 + .bss_idx = mvif->idx, 1244 + }, 1245 + .beacon_tlv = { 1246 + .tag = cpu_to_le16(UNI_BSS_INFO_BCN_CONTENT), 1247 + .len = cpu_to_le16(sizeof(struct bcn_content_tlv)), 1248 + .enable = enable, 1249 + }, 1250 + }; 1251 + struct sk_buff *skb; 1252 + 1253 + skb = ieee80211_beacon_get_template(mt76_hw(dev), vif, &offs); 1254 + if (!skb) 1255 + return -EINVAL; 1256 + 1257 + if (skb->len > 512 - MT_TXD_SIZE) { 1258 + dev_err(dev->mt76.dev, "beacon size limit exceed\n"); 1259 + dev_kfree_skb(skb); 1260 + return -EINVAL; 1261 + } 1262 + 1263 + mt7615_mac_write_txwi(dev, (__le32 *)(req.beacon_tlv.pkt), skb, 1264 + wcid, NULL, 0, NULL, true); 1265 + memcpy(req.beacon_tlv.pkt + MT_TXD_SIZE, skb->data, skb->len); 1266 + req.beacon_tlv.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 1267 + req.beacon_tlv.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset); 1268 + 1269 + if (offs.csa_counter_offs[0]) { 1270 + u16 csa_offs; 1271 + 1272 + csa_offs = MT_TXD_SIZE + offs.csa_counter_offs[0] - 4; 1273 + req.beacon_tlv.csa_ie_pos = cpu_to_le16(csa_offs); 1274 + } 1275 + dev_kfree_skb(skb); 1276 + 1277 + return __mt76_mcu_send_msg(&dev->mt76, MCU_UNI_CMD_BSS_INFO_UPDATE, 1278 + &req, sizeof(req), true); 1279 + } 1280 + 1281 + static int 1282 + mt7615_mcu_uni_tx_ba(struct mt7615_dev *dev, 1283 + struct ieee80211_ampdu_params *params, 1284 + bool enable) 1285 + { 1286 + struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 1287 + struct mt7615_vif *mvif = msta->vif; 1288 + struct wtbl_req_hdr *wtbl_hdr; 1289 + struct tlv *sta_wtbl; 1290 + struct sk_buff *skb; 1291 + int err; 1292 + 1293 + skb = mt7615_mcu_alloc_sta_req(mvif, msta); 1294 + if (IS_ERR(skb)) 1295 + return PTR_ERR(skb); 1296 + 1297 + sta_wtbl = mt7615_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); 1298 + 1299 + wtbl_hdr = mt7615_mcu_alloc_wtbl_req(msta, WTBL_SET, sta_wtbl, &skb); 1300 + if (IS_ERR(wtbl_hdr)) 1301 + return PTR_ERR(wtbl_hdr); 1302 + 1303 + mt7615_mcu_wtbl_ba_tlv(skb, params, enable, true, sta_wtbl, 1304 + wtbl_hdr); 1305 + 1306 + err = __mt76_mcu_skb_send_msg(&dev->mt76, skb, 1307 + MCU_UNI_CMD_STA_REC_UPDATE, true); 1308 + if (err < 0) 1309 + return err; 1310 + 1311 + skb = mt7615_mcu_alloc_sta_req(mvif, msta); 1312 + if (IS_ERR(skb)) 1313 + return PTR_ERR(skb); 1314 + 1315 + mt7615_mcu_sta_ba_tlv(skb, params, enable, true); 1316 + 1317 + return __mt76_mcu_skb_send_msg(&dev->mt76, skb, 1318 + MCU_UNI_CMD_STA_REC_UPDATE, true); 1319 + } 1320 + 1321 + static int 1322 + mt7615_mcu_uni_rx_ba(struct mt7615_dev *dev, 1323 + struct ieee80211_ampdu_params *params, 1324 + bool enable) 1325 + { 1326 + struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 1327 + struct mt7615_vif *mvif = msta->vif; 1328 + struct wtbl_req_hdr *wtbl_hdr; 1329 + struct tlv *sta_wtbl; 1330 + struct sk_buff *skb; 1331 + int err; 1332 + 1333 + skb = mt7615_mcu_alloc_sta_req(mvif, msta); 1334 + if (IS_ERR(skb)) 1335 + return PTR_ERR(skb); 1336 + 1337 + mt7615_mcu_sta_ba_tlv(skb, params, enable, false); 1338 + 1339 + err = __mt76_mcu_skb_send_msg(&dev->mt76, skb, 1340 + MCU_UNI_CMD_STA_REC_UPDATE, true); 1341 + if (err < 0 || !enable) 1342 + return err; 1343 + 1344 + skb = mt7615_mcu_alloc_sta_req(mvif, msta); 1345 + if (IS_ERR(skb)) 1346 + return PTR_ERR(skb); 1347 + 1348 + sta_wtbl = mt7615_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); 1349 + 1350 + wtbl_hdr = mt7615_mcu_alloc_wtbl_req(msta, WTBL_SET, sta_wtbl, &skb); 1351 + if (IS_ERR(wtbl_hdr)) 1352 + return PTR_ERR(wtbl_hdr); 1353 + 1354 + mt7615_mcu_wtbl_ba_tlv(skb, params, enable, false, sta_wtbl, 1355 + wtbl_hdr); 1356 + 1357 + return __mt76_mcu_skb_send_msg(&dev->mt76, skb, 1358 + MCU_UNI_CMD_STA_REC_UPDATE, true); 1359 + } 1360 + 1361 + static int 1362 + mt7615_mcu_uni_add_sta(struct mt7615_dev *dev, struct ieee80211_vif *vif, 1363 + struct ieee80211_sta *sta, bool enable) 1364 + { 1365 + return mt7615_mcu_add_sta_cmd(dev, vif, sta, enable, 1366 + MCU_UNI_CMD_STA_REC_UPDATE); 1367 + } 1368 + 1369 + static const struct mt7615_mcu_ops uni_update_ops = { 1370 + .add_beacon_offload = mt7615_mcu_uni_add_beacon_offload, 1371 + .set_pm_state = mt7615_mcu_uni_ctrl_pm_state, 1372 + .add_dev_info = mt7615_mcu_uni_add_dev, 1373 + .add_bss_info = mt7615_mcu_uni_add_bss, 1374 + .add_tx_ba = mt7615_mcu_uni_tx_ba, 1375 + .add_rx_ba = mt7615_mcu_uni_rx_ba, 1376 + .sta_add = mt7615_mcu_uni_add_sta, 1377 + }; 358 1378 359 1379 static int mt7615_mcu_send_firmware(struct mt7615_dev *dev, const void *data, 360 1380 int len) ··· 1450 300 cur_len = min_t(int, 4096 - sizeof(struct mt7615_mcu_txd), 1451 301 len); 1452 302 1453 - ret = __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_FW_SCATTER, 303 + ret = __mt76_mcu_send_msg(&dev->mt76, MCU_CMD_FW_SCATTER, 1454 304 data, cur_len, false); 1455 305 if (ret) 1456 306 break; 1457 307 1458 308 data += cur_len; 1459 309 len -= cur_len; 1460 - mt76_queue_tx_cleanup(dev, MT_TXQ_FWDL, false); 310 + 311 + if (mt76_is_mmio(&dev->mt76)) 312 + mt76_queue_tx_cleanup(dev, MT_TXQ_FWDL, false); 1461 313 } 1462 314 1463 315 return ret; ··· 1476 324 .addr = cpu_to_le32(addr), 1477 325 }; 1478 326 1479 - return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_FW_START_REQ, 327 + return __mt76_mcu_send_msg(&dev->mt76, MCU_CMD_FW_START_REQ, 1480 328 &req, sizeof(req), true); 1481 329 } 1482 330 1483 331 static int mt7615_mcu_restart(struct mt76_dev *dev) 1484 332 { 1485 - return __mt76_mcu_send_msg(dev, -MCU_CMD_RESTART_DL_REQ, NULL, 333 + return __mt76_mcu_send_msg(dev, MCU_CMD_RESTART_DL_REQ, NULL, 1486 334 0, true); 1487 335 } 1488 336 ··· 1494 342 .op = cpu_to_le32(get ? PATCH_SEM_GET : PATCH_SEM_RELEASE), 1495 343 }; 1496 344 1497 - return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_PATCH_SEM_CONTROL, 345 + return __mt76_mcu_send_msg(&dev->mt76, MCU_CMD_PATCH_SEM_CONTROL, 1498 346 &req, sizeof(req), true); 1499 347 } 1500 348 ··· 1507 355 .check_crc = 0, 1508 356 }; 1509 357 1510 - return __mt76_mcu_send_msg(&dev->mt76, -MCU_CMD_PATCH_FINISH_REQ, 358 + return __mt76_mcu_send_msg(&dev->mt76, MCU_CMD_PATCH_FINISH_REQ, 1511 359 &req, sizeof(req), true); 1512 360 } 1513 361 ··· 1523 371 1524 372 static int mt7615_driver_own(struct mt7615_dev *dev) 1525 373 { 1526 - mt76_wr(dev, MT_CFG_LPCR_HOST, MT_CFG_LPCR_HOST_DRV_OWN); 374 + u32 addr; 375 + 376 + addr = is_mt7663(&dev->mt76) ? MT_CONN_HIF_ON_LPCTL : MT_CFG_LPCR_HOST; 377 + mt76_wr(dev, addr, MT_CFG_LPCR_HOST_DRV_OWN); 1527 378 1528 379 mt7622_trigger_hif_int(dev, true); 1529 - if (!mt76_poll_msec(dev, MT_CFG_LPCR_HOST, 1530 - MT_CFG_LPCR_HOST_FW_OWN, 0, 3000)) { 380 + if (!mt76_poll_msec(dev, addr, MT_CFG_LPCR_HOST_FW_OWN, 0, 3000)) { 1531 381 dev_err(dev->mt76.dev, "Timeout for driver own\n"); 1532 382 return -EIO; 1533 383 } ··· 1540 386 1541 387 static int mt7615_firmware_own(struct mt7615_dev *dev) 1542 388 { 389 + u32 addr; 390 + 391 + addr = is_mt7663(&dev->mt76) ? MT_CONN_HIF_ON_LPCTL : MT_CFG_LPCR_HOST; 1543 392 mt7622_trigger_hif_int(dev, true); 1544 393 1545 - mt76_wr(dev, MT_CFG_LPCR_HOST, MT_CFG_LPCR_HOST_FW_OWN); 394 + mt76_wr(dev, addr, MT_CFG_LPCR_HOST_FW_OWN); 1546 395 1547 396 if (is_mt7622(&dev->mt76) && 1548 397 !mt76_poll_msec(dev, MT_CFG_LPCR_HOST, ··· 1708 551 sizeof(dev->mt76.hw->wiphy->fw_version), 1709 552 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 1710 553 1711 - if (!strncmp(hdr->fw_ver, "2.0", sizeof(hdr->fw_ver))) 554 + if (!strncmp(hdr->fw_ver, "2.0", sizeof(hdr->fw_ver))) { 1712 555 dev->fw_ver = MT7615_FIRMWARE_V2; 1713 - else 556 + dev->mcu_ops = &sta_update_ops; 557 + } else { 1714 558 dev->fw_ver = MT7615_FIRMWARE_V1; 559 + dev->mcu_ops = &wtbl_update_ops; 560 + } 1715 561 1716 562 out: 1717 563 release_firmware(fw); ··· 1846 686 &data, sizeof(data), true); 1847 687 } 1848 688 689 + static int mt7663_load_n9(struct mt7615_dev *dev, const char *name) 690 + { 691 + u32 offset = 0, override_addr = 0, flag = 0; 692 + const struct mt7663_fw_trailer *hdr; 693 + const struct mt7663_fw_buf *buf; 694 + const struct firmware *fw; 695 + const u8 *base_addr; 696 + int i, ret; 697 + 698 + ret = request_firmware(&fw, name, dev->mt76.dev); 699 + if (ret) 700 + return ret; 701 + 702 + if (!fw || !fw->data || fw->size < FW_V3_COMMON_TAILER_SIZE) { 703 + dev_err(dev->mt76.dev, "Invalid firmware\n"); 704 + ret = -EINVAL; 705 + goto out; 706 + } 707 + 708 + hdr = (const struct mt7663_fw_trailer *)(fw->data + fw->size - 709 + FW_V3_COMMON_TAILER_SIZE); 710 + 711 + dev_info(dev->mt76.dev, "N9 Firmware Version: %.10s, Build Time: %.15s\n", 712 + hdr->fw_ver, hdr->build_date); 713 + dev_info(dev->mt76.dev, "Region number: 0x%x\n", hdr->n_region); 714 + 715 + base_addr = fw->data + fw->size - FW_V3_COMMON_TAILER_SIZE; 716 + for (i = 0; i < hdr->n_region; i++) { 717 + u32 shift = (hdr->n_region - i) * FW_V3_REGION_TAILER_SIZE; 718 + u32 len, addr, mode; 719 + 720 + dev_info(dev->mt76.dev, "Parsing tailer Region: %d\n", i); 721 + 722 + buf = (const struct mt7663_fw_buf *)(base_addr - shift); 723 + mode = mt7615_mcu_gen_dl_mode(buf->feature_set, false); 724 + addr = le32_to_cpu(buf->img_dest_addr); 725 + len = le32_to_cpu(buf->img_size); 726 + 727 + ret = mt7615_mcu_init_download(dev, addr, len, mode); 728 + if (ret) { 729 + dev_err(dev->mt76.dev, "Download request failed\n"); 730 + goto out; 731 + } 732 + 733 + ret = mt7615_mcu_send_firmware(dev, fw->data + offset, len); 734 + if (ret) { 735 + dev_err(dev->mt76.dev, "Failed to send firmware\n"); 736 + goto out; 737 + } 738 + 739 + offset += le32_to_cpu(buf->img_size); 740 + if (buf->feature_set & DL_MODE_VALID_RAM_ENTRY) { 741 + override_addr = le32_to_cpu(buf->img_dest_addr); 742 + dev_info(dev->mt76.dev, "Region %d, override_addr = 0x%08x\n", 743 + i, override_addr); 744 + } 745 + } 746 + 747 + if (is_mt7663(&dev->mt76)) { 748 + flag |= FW_START_DLYCAL; 749 + if (override_addr) 750 + flag |= FW_START_OVERRIDE; 751 + 752 + dev_info(dev->mt76.dev, "override_addr = 0x%08x, option = %d\n", 753 + override_addr, flag); 754 + } 755 + 756 + ret = mt7615_mcu_start_firmware(dev, override_addr, flag); 757 + if (ret) 758 + dev_err(dev->mt76.dev, "Failed to start N9 firmware\n"); 759 + 760 + out: 761 + release_firmware(fw); 762 + 763 + return ret; 764 + } 765 + 766 + static int mt7663_load_firmware(struct mt7615_dev *dev) 767 + { 768 + int ret; 769 + 770 + mt76_set(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_BYPASS_TX_SCH); 771 + 772 + ret = mt76_get_field(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY); 773 + if (ret) { 774 + dev_dbg(dev->mt76.dev, "Firmware is already download\n"); 775 + return -EIO; 776 + } 777 + 778 + ret = mt7615_load_patch(dev, MT7663_PATCH_ADDRESS, MT7663_ROM_PATCH); 779 + if (ret) 780 + return ret; 781 + 782 + dev->fw_ver = MT7615_FIRMWARE_V3; 783 + dev->mcu_ops = &uni_update_ops; 784 + 785 + ret = mt7663_load_n9(dev, MT7663_FIRMWARE_N9); 786 + if (ret) 787 + return ret; 788 + 789 + if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY, 790 + MT_TOP_MISC2_FW_N9_RDY, 1500)) { 791 + ret = mt76_get_field(dev, MT_CONN_ON_MISC, 792 + MT7663_TOP_MISC2_FW_STATE); 793 + dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); 794 + return -EIO; 795 + } 796 + 797 + mt76_clear(dev, MT_WPDMA_GLO_CFG, MT_WPDMA_GLO_CFG_BYPASS_TX_SCH); 798 + 799 + dev_dbg(dev->mt76.dev, "Firmware init done\n"); 800 + 801 + return 0; 802 + } 803 + 1849 804 int mt7615_mcu_init(struct mt7615_dev *dev) 1850 805 { 1851 806 static const struct mt76_mcu_ops mt7615_mcu_ops = { 807 + .mcu_skb_send_msg = mt7615_mcu_send_message, 1852 808 .mcu_send_msg = mt7615_mcu_msg_send, 1853 809 .mcu_restart = mt7615_mcu_restart, 1854 810 }; ··· 1976 700 if (ret) 1977 701 return ret; 1978 702 1979 - if (is_mt7622(&dev->mt76)) 703 + switch (mt76_chip(&dev->mt76)) { 704 + case 0x7622: 1980 705 ret = mt7622_load_firmware(dev); 1981 - else 706 + break; 707 + case 0x7663: 708 + ret = mt7663_load_firmware(dev); 709 + break; 710 + default: 1982 711 ret = mt7615_load_firmware(dev); 712 + break; 713 + } 1983 714 if (ret) 1984 715 return ret; 1985 716 ··· 2009 726 { 2010 727 struct { 2011 728 u8 buffer_mode; 2012 - u8 pad; 729 + u8 content_format; 2013 730 __le16 len; 2014 731 } __packed req_hdr = { 2015 732 .buffer_mode = 1, 2016 733 }; 2017 - int ret, len, eep_len; 2018 - u8 *req, *eep = (u8 *)dev->mt76.eeprom.data; 734 + u8 *eep = (u8 *)dev->mt76.eeprom.data; 735 + struct sk_buff *skb; 736 + int eep_len, offset; 2019 737 2020 - if (is_mt7622(&dev->mt76)) 738 + switch (mt76_chip(&dev->mt76)) { 739 + case 0x7622: 2021 740 eep_len = MT7622_EE_MAX - MT_EE_NIC_CONF_0; 2022 - else 741 + offset = MT_EE_NIC_CONF_0; 742 + break; 743 + case 0x7663: 744 + eep_len = MT7663_EE_MAX - MT_EE_CHIP_ID; 745 + req_hdr.content_format = 1; 746 + offset = MT_EE_CHIP_ID; 747 + break; 748 + default: 2023 749 eep_len = MT7615_EE_MAX - MT_EE_NIC_CONF_0; 2024 - 2025 - len = sizeof(req_hdr) + eep_len; 2026 - req = kzalloc(len, GFP_KERNEL); 2027 - if (!req) 2028 - return -ENOMEM; 750 + offset = MT_EE_NIC_CONF_0; 751 + break; 752 + } 2029 753 2030 754 req_hdr.len = cpu_to_le16(eep_len); 2031 - memcpy(req, &req_hdr, sizeof(req_hdr)); 2032 - memcpy(req + sizeof(req_hdr), eep + MT_EE_NIC_CONF_0, eep_len); 2033 755 2034 - ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_EFUSE_BUFFER_MODE, 2035 - req, len, true); 2036 - kfree(req); 756 + skb = mt7615_mcu_msg_alloc(NULL, sizeof(req_hdr) + eep_len); 757 + if (!skb) 758 + return -ENOMEM; 2037 759 2038 - return ret; 760 + skb_put_data(skb, &req_hdr, sizeof(req_hdr)); 761 + skb_put_data(skb, eep + offset, eep_len); 762 + 763 + return __mt76_mcu_skb_send_msg(&dev->mt76, skb, 764 + MCU_EXT_CMD_EFUSE_BUFFER_MODE, true); 2039 765 } 2040 766 2041 767 int mt7615_mcu_set_mac_enable(struct mt7615_dev *dev, int band, bool enable) ··· 2119 827 &req, sizeof(req), true); 2120 828 } 2121 829 2122 - int mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int band, int enter) 2123 - { 2124 - #define ENTER_PM_STATE 1 2125 - #define EXIT_PM_STATE 2 2126 - struct { 2127 - u8 pm_number; 2128 - u8 pm_state; 2129 - u8 bssid[ETH_ALEN]; 2130 - u8 dtim_period; 2131 - u8 wlan_idx; 2132 - __le16 bcn_interval; 2133 - __le32 aid; 2134 - __le32 rx_filter; 2135 - u8 band_idx; 2136 - u8 rsv[3]; 2137 - __le32 feature; 2138 - u8 omac_idx; 2139 - u8 wmm_idx; 2140 - u8 bcn_loss_cnt; 2141 - u8 bcn_sp_duration; 2142 - } __packed req = { 2143 - .pm_number = 5, 2144 - .pm_state = (enter) ? ENTER_PM_STATE : EXIT_PM_STATE, 2145 - .band_idx = band, 2146 - }; 2147 - 2148 - return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_PM_STATE_CTRL, 2149 - &req, sizeof(req), true); 2150 - } 2151 - 2152 830 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev) 2153 831 { 2154 832 struct mt7615_phy *ext_phy = mt7615_ext_phy(dev); ··· 2178 916 &req, sizeof(req), true); 2179 917 } 2180 918 2181 - int mt7615_mcu_set_dev_info(struct mt7615_dev *dev, 2182 - struct ieee80211_vif *vif, bool enable) 2183 - { 2184 - struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 2185 - struct { 2186 - struct req_hdr { 2187 - u8 omac_idx; 2188 - u8 band_idx; 2189 - __le16 tlv_num; 2190 - u8 is_tlv_append; 2191 - u8 rsv[3]; 2192 - } __packed hdr; 2193 - struct req_tlv { 2194 - __le16 tag; 2195 - __le16 len; 2196 - u8 active; 2197 - u8 band_idx; 2198 - u8 omac_addr[ETH_ALEN]; 2199 - } __packed tlv; 2200 - } data = { 2201 - .hdr = { 2202 - .omac_idx = mvif->omac_idx, 2203 - .band_idx = mvif->band_idx, 2204 - .tlv_num = cpu_to_le16(1), 2205 - .is_tlv_append = 1, 2206 - }, 2207 - .tlv = { 2208 - .tag = cpu_to_le16(DEV_INFO_ACTIVE), 2209 - .len = cpu_to_le16(sizeof(struct req_tlv)), 2210 - .active = enable, 2211 - .band_idx = mvif->band_idx, 2212 - }, 2213 - }; 2214 - 2215 - memcpy(data.tlv.omac_addr, vif->addr, ETH_ALEN); 2216 - return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_DEV_INFO_UPDATE, 2217 - &data, sizeof(data), true); 2218 - } 2219 - 2220 - static void 2221 - mt7615_mcu_bss_info_omac_header(struct mt7615_vif *mvif, u8 *data, 2222 - u32 conn_type) 2223 - { 2224 - struct bss_info_omac *hdr = (struct bss_info_omac *)data; 2225 - u8 idx; 2226 - 2227 - idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 2228 - hdr->tag = cpu_to_le16(BSS_INFO_OMAC); 2229 - hdr->len = cpu_to_le16(sizeof(struct bss_info_omac)); 2230 - hdr->hw_bss_idx = idx; 2231 - hdr->omac_idx = mvif->omac_idx; 2232 - hdr->band_idx = mvif->band_idx; 2233 - hdr->conn_type = cpu_to_le32(conn_type); 2234 - } 2235 - 2236 - static void 2237 - mt7615_mcu_bss_info_basic_header(struct ieee80211_vif *vif, u8 *data, 2238 - u32 net_type, u8 tx_wlan_idx, 2239 - bool enable) 2240 - { 2241 - struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 2242 - struct bss_info_basic *hdr = (struct bss_info_basic *)data; 2243 - 2244 - hdr->tag = cpu_to_le16(BSS_INFO_BASIC); 2245 - hdr->len = cpu_to_le16(sizeof(struct bss_info_basic)); 2246 - hdr->network_type = cpu_to_le32(net_type); 2247 - hdr->active = enable; 2248 - hdr->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 2249 - memcpy(hdr->bssid, vif->bss_conf.bssid, ETH_ALEN); 2250 - hdr->wmm_idx = mvif->wmm_idx; 2251 - hdr->dtim_period = vif->bss_conf.dtim_period; 2252 - hdr->bmc_tx_wlan_idx = tx_wlan_idx; 2253 - } 2254 - 2255 - static void 2256 - mt7615_mcu_bss_info_ext_header(struct mt7615_vif *mvif, u8 *data) 2257 - { 2258 - /* SIFS 20us + 512 byte beacon tranmitted by 1Mbps (3906us) */ 2259 - #define BCN_TX_ESTIMATE_TIME (4096 + 20) 2260 - struct bss_info_ext_bss *hdr = (struct bss_info_ext_bss *)data; 2261 - int ext_bss_idx, tsf_offset; 2262 - 2263 - ext_bss_idx = mvif->omac_idx - EXT_BSSID_START; 2264 - if (ext_bss_idx < 0) 2265 - return; 2266 - 2267 - hdr->tag = cpu_to_le16(BSS_INFO_EXT_BSS); 2268 - hdr->len = cpu_to_le16(sizeof(struct bss_info_ext_bss)); 2269 - tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; 2270 - hdr->mbss_tsf_offset = cpu_to_le32(tsf_offset); 2271 - } 2272 - 2273 - int mt7615_mcu_set_bss_info(struct mt7615_dev *dev, 2274 - struct ieee80211_vif *vif, int en) 2275 - { 2276 - struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 2277 - struct req_hdr { 2278 - u8 bss_idx; 2279 - u8 rsv0; 2280 - __le16 tlv_num; 2281 - u8 is_tlv_append; 2282 - u8 rsv1[3]; 2283 - } __packed; 2284 - int len = sizeof(struct req_hdr) + sizeof(struct bss_info_basic); 2285 - int ret, i, features = BIT(BSS_INFO_BASIC), ntlv = 1; 2286 - u32 conn_type = 0, net_type = NETWORK_INFRA; 2287 - u8 *buf, *data, tx_wlan_idx = 0; 2288 - struct req_hdr *hdr; 2289 - 2290 - if (en) { 2291 - len += sizeof(struct bss_info_omac); 2292 - features |= BIT(BSS_INFO_OMAC); 2293 - if (mvif->omac_idx > EXT_BSSID_START) { 2294 - len += sizeof(struct bss_info_ext_bss); 2295 - features |= BIT(BSS_INFO_EXT_BSS); 2296 - ntlv++; 2297 - } 2298 - ntlv++; 2299 - } 2300 - 2301 - switch (vif->type) { 2302 - case NL80211_IFTYPE_AP: 2303 - case NL80211_IFTYPE_MESH_POINT: 2304 - tx_wlan_idx = mvif->sta.wcid.idx; 2305 - conn_type = CONNECTION_INFRA_AP; 2306 - break; 2307 - case NL80211_IFTYPE_STATION: { 2308 - /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 2309 - if (en) { 2310 - struct ieee80211_sta *sta; 2311 - struct mt7615_sta *msta; 2312 - 2313 - rcu_read_lock(); 2314 - sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); 2315 - if (!sta) { 2316 - rcu_read_unlock(); 2317 - return -EINVAL; 2318 - } 2319 - 2320 - msta = (struct mt7615_sta *)sta->drv_priv; 2321 - tx_wlan_idx = msta->wcid.idx; 2322 - rcu_read_unlock(); 2323 - } 2324 - conn_type = CONNECTION_INFRA_STA; 2325 - break; 2326 - } 2327 - case NL80211_IFTYPE_ADHOC: 2328 - conn_type = CONNECTION_IBSS_ADHOC; 2329 - tx_wlan_idx = mvif->sta.wcid.idx; 2330 - net_type = NETWORK_IBSS; 2331 - break; 2332 - default: 2333 - WARN_ON(1); 2334 - break; 2335 - } 2336 - 2337 - buf = kzalloc(len, GFP_KERNEL); 2338 - if (!buf) 2339 - return -ENOMEM; 2340 - 2341 - hdr = (struct req_hdr *)buf; 2342 - hdr->bss_idx = mvif->idx; 2343 - hdr->tlv_num = cpu_to_le16(ntlv); 2344 - hdr->is_tlv_append = 1; 2345 - 2346 - data = buf + sizeof(*hdr); 2347 - for (i = 0; i < BSS_INFO_MAX_NUM; i++) { 2348 - int tag = ffs(features & BIT(i)) - 1; 2349 - 2350 - switch (tag) { 2351 - case BSS_INFO_OMAC: 2352 - mt7615_mcu_bss_info_omac_header(mvif, data, 2353 - conn_type); 2354 - data += sizeof(struct bss_info_omac); 2355 - break; 2356 - case BSS_INFO_BASIC: 2357 - mt7615_mcu_bss_info_basic_header(vif, data, net_type, 2358 - tx_wlan_idx, en); 2359 - data += sizeof(struct bss_info_basic); 2360 - break; 2361 - case BSS_INFO_EXT_BSS: 2362 - mt7615_mcu_bss_info_ext_header(mvif, data); 2363 - data += sizeof(struct bss_info_ext_bss); 2364 - break; 2365 - default: 2366 - break; 2367 - } 2368 - } 2369 - 2370 - ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_BSS_INFO_UPDATE, 2371 - buf, len, true); 2372 - kfree(buf); 2373 - 2374 - return ret; 2375 - } 2376 - 2377 919 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev) 2378 920 { 2379 921 struct wtbl_req_hdr req = { ··· 2185 1119 }; 2186 1120 2187 1121 return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 2188 - &req, sizeof(req), true); 2189 - } 2190 - 2191 - static int 2192 - mt7615_mcu_send_sta_rec(struct mt7615_dev *dev, u8 *req, u8 *wreq, 2193 - u8 wlen, bool enable) 2194 - { 2195 - bool is_v1 = (dev->fw_ver == MT7615_FIRMWARE_V1); 2196 - u32 slen = is_v1 ? wreq - req : wreq - req + wlen; 2197 - int ret; 2198 - 2199 - if (is_v1 && !enable) { 2200 - ret = __mt76_mcu_send_msg(&dev->mt76, 2201 - MCU_EXT_CMD_STA_REC_UPDATE, 2202 - req, slen, true); 2203 - if (ret) 2204 - return ret; 2205 - 2206 - return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 2207 - wreq, wlen, true); 2208 - } 2209 - 2210 - if (is_v1) { 2211 - ret = __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_WTBL_UPDATE, 2212 - wreq, wlen, true); 2213 - if (ret) 2214 - return ret; 2215 - } 2216 - 2217 - return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_STA_REC_UPDATE, 2218 - req, slen, true); 2219 - } 2220 - 2221 - int mt7615_mcu_set_bmc(struct mt7615_dev *dev, 2222 - struct ieee80211_vif *vif, bool en) 2223 - { 2224 - struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 2225 - struct { 2226 - struct sta_req_hdr hdr; 2227 - struct sta_rec_basic basic; 2228 - u8 buf[MT7615_WTBL_UPDATE_MAX_SIZE]; 2229 - } __packed req = { 2230 - .hdr = { 2231 - .bss_idx = mvif->idx, 2232 - .wlan_idx = mvif->sta.wcid.idx, 2233 - .tlv_num = cpu_to_le16(1), 2234 - .is_tlv_append = 1, 2235 - .muar_idx = mvif->omac_idx, 2236 - }, 2237 - .basic = { 2238 - .tag = cpu_to_le16(STA_REC_BASIC), 2239 - .len = cpu_to_le16(sizeof(struct sta_rec_basic)), 2240 - .conn_type = cpu_to_le32(CONNECTION_INFRA_BC), 2241 - }, 2242 - }; 2243 - struct sta_rec_wtbl *wtbl = NULL; 2244 - struct wtbl_req_hdr *wtbl_hdr; 2245 - struct wtbl_generic *wtbl_g; 2246 - struct wtbl_rx *wtbl_rx; 2247 - u8 *buf = req.buf; 2248 - 2249 - eth_broadcast_addr(req.basic.peer_addr); 2250 - 2251 - if (dev->fw_ver > MT7615_FIRMWARE_V1) { 2252 - req.hdr.tlv_num = cpu_to_le16(2); 2253 - wtbl = (struct sta_rec_wtbl *)buf; 2254 - wtbl->tag = cpu_to_le16(STA_REC_WTBL); 2255 - buf += sizeof(*wtbl); 2256 - } 2257 - 2258 - wtbl_hdr = (struct wtbl_req_hdr *)buf; 2259 - buf += sizeof(*wtbl_hdr); 2260 - wtbl_hdr->wlan_idx = mvif->sta.wcid.idx; 2261 - wtbl_hdr->operation = WTBL_RESET_AND_SET; 2262 - 2263 - if (en) { 2264 - req.basic.conn_state = CONN_STATE_PORT_SECURE; 2265 - req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER | 2266 - EXTRA_INFO_NEW); 2267 - } else { 2268 - req.basic.conn_state = CONN_STATE_DISCONNECT; 2269 - req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER); 2270 - goto out; 2271 - } 2272 - 2273 - wtbl_g = (struct wtbl_generic *)buf; 2274 - buf += sizeof(*wtbl_g); 2275 - wtbl_g->tag = cpu_to_le16(WTBL_GENERIC); 2276 - wtbl_g->len = cpu_to_le16(sizeof(*wtbl_g)); 2277 - wtbl_g->muar_idx = 0xe; 2278 - eth_broadcast_addr(wtbl_g->peer_addr); 2279 - 2280 - wtbl_rx = (struct wtbl_rx *)buf; 2281 - buf += sizeof(*wtbl_rx); 2282 - wtbl_rx->tag = cpu_to_le16(WTBL_RX); 2283 - wtbl_rx->len = cpu_to_le16(sizeof(*wtbl_rx)); 2284 - wtbl_rx->rv = 1; 2285 - wtbl_rx->rca1 = 1; 2286 - wtbl_rx->rca2 = 1; 2287 - 2288 - wtbl_hdr->tlv_num = cpu_to_le16(2); 2289 - 2290 - out: 2291 - if (wtbl) 2292 - wtbl->len = cpu_to_le16(buf - (u8 *)wtbl_hdr); 2293 - 2294 - return mt7615_mcu_send_sta_rec(dev, (u8 *)&req, (u8 *)wtbl_hdr, 2295 - buf - (u8 *)wtbl_hdr, en); 2296 - } 2297 - 2298 - int mt7615_mcu_set_sta(struct mt7615_dev *dev, struct ieee80211_vif *vif, 2299 - struct ieee80211_sta *sta, bool en) 2300 - { 2301 - struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 2302 - struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv; 2303 - 2304 - struct { 2305 - struct sta_req_hdr hdr; 2306 - struct sta_rec_basic basic; 2307 - u8 buf[MT7615_WTBL_UPDATE_MAX_SIZE]; 2308 - } __packed req = { 2309 - .hdr = { 2310 - .bss_idx = mvif->idx, 2311 - .wlan_idx = msta->wcid.idx, 2312 - .is_tlv_append = 1, 2313 - .muar_idx = mvif->omac_idx, 2314 - }, 2315 - .basic = { 2316 - .tag = cpu_to_le16(STA_REC_BASIC), 2317 - .len = cpu_to_le16(sizeof(struct sta_rec_basic)), 2318 - .qos = sta->wme, 2319 - .aid = cpu_to_le16(sta->aid), 2320 - }, 2321 - }; 2322 - struct sta_rec_wtbl *wtbl = NULL; 2323 - struct wtbl_req_hdr *wtbl_hdr; 2324 - struct wtbl_generic *wtbl_g; 2325 - struct wtbl_rx *wtbl_rx; 2326 - u8 *buf = req.buf; 2327 - u8 wtlv = 0, stlv = 1; 2328 - 2329 - memcpy(req.basic.peer_addr, sta->addr, ETH_ALEN); 2330 - 2331 - switch (vif->type) { 2332 - case NL80211_IFTYPE_AP: 2333 - case NL80211_IFTYPE_MESH_POINT: 2334 - req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA); 2335 - break; 2336 - case NL80211_IFTYPE_STATION: 2337 - req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP); 2338 - break; 2339 - case NL80211_IFTYPE_ADHOC: 2340 - req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 2341 - break; 2342 - default: 2343 - WARN_ON(1); 2344 - break; 2345 - } 2346 - 2347 - if (en) { 2348 - req.basic.conn_state = CONN_STATE_PORT_SECURE; 2349 - req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER | 2350 - EXTRA_INFO_NEW); 2351 - 2352 - /* sta_rec ht */ 2353 - if (sta->ht_cap.ht_supported) { 2354 - struct sta_rec_ht *sta_ht; 2355 - 2356 - sta_ht = (struct sta_rec_ht *)buf; 2357 - buf += sizeof(*sta_ht); 2358 - sta_ht->tag = cpu_to_le16(STA_REC_HT); 2359 - sta_ht->len = cpu_to_le16(sizeof(*sta_ht)); 2360 - sta_ht->ht_cap = cpu_to_le16(sta->ht_cap.cap); 2361 - stlv++; 2362 - 2363 - /* sta_rec vht */ 2364 - if (sta->vht_cap.vht_supported) { 2365 - struct sta_rec_vht *sta_vht; 2366 - 2367 - sta_vht = (struct sta_rec_vht *)buf; 2368 - buf += sizeof(*sta_vht); 2369 - sta_vht->tag = cpu_to_le16(STA_REC_VHT); 2370 - sta_vht->len = cpu_to_le16(sizeof(*sta_vht)); 2371 - sta_vht->vht_cap = 2372 - cpu_to_le32(sta->vht_cap.cap); 2373 - sta_vht->vht_rx_mcs_map = 2374 - sta->vht_cap.vht_mcs.rx_mcs_map; 2375 - sta_vht->vht_tx_mcs_map = 2376 - sta->vht_cap.vht_mcs.tx_mcs_map; 2377 - stlv++; 2378 - } 2379 - } 2380 - } else { 2381 - req.basic.conn_state = CONN_STATE_DISCONNECT; 2382 - req.basic.extra_info = cpu_to_le16(EXTRA_INFO_VER); 2383 - } 2384 - 2385 - /* wtbl */ 2386 - if (dev->fw_ver > MT7615_FIRMWARE_V1) { 2387 - wtbl = (struct sta_rec_wtbl *)buf; 2388 - wtbl->tag = cpu_to_le16(STA_REC_WTBL); 2389 - buf += sizeof(*wtbl); 2390 - stlv++; 2391 - } 2392 - 2393 - wtbl_hdr = (struct wtbl_req_hdr *)buf; 2394 - buf += sizeof(*wtbl_hdr); 2395 - wtbl_hdr->wlan_idx = msta->wcid.idx; 2396 - wtbl_hdr->operation = WTBL_RESET_AND_SET; 2397 - 2398 - if (!en) 2399 - goto out; 2400 - 2401 - wtbl_g = (struct wtbl_generic *)buf; 2402 - buf += sizeof(*wtbl_g); 2403 - wtbl_g->tag = cpu_to_le16(WTBL_GENERIC); 2404 - wtbl_g->len = cpu_to_le16(sizeof(*wtbl_g)); 2405 - wtbl_g->muar_idx = mvif->omac_idx; 2406 - wtbl_g->qos = sta->wme; 2407 - wtbl_g->partial_aid = cpu_to_le16(sta->aid); 2408 - memcpy(wtbl_g->peer_addr, sta->addr, ETH_ALEN); 2409 - wtlv++; 2410 - 2411 - wtbl_rx = (struct wtbl_rx *)buf; 2412 - buf += sizeof(*wtbl_rx); 2413 - wtbl_rx->tag = cpu_to_le16(WTBL_RX); 2414 - wtbl_rx->len = cpu_to_le16(sizeof(*wtbl_rx)); 2415 - wtbl_rx->rv = 1; 2416 - wtbl_rx->rca1 = vif->type != NL80211_IFTYPE_AP; 2417 - wtbl_rx->rca2 = 1; 2418 - wtlv++; 2419 - 2420 - /* wtbl ht */ 2421 - if (sta->ht_cap.ht_supported) { 2422 - struct wtbl_ht *wtbl_ht; 2423 - struct wtbl_raw *wtbl_raw; 2424 - u32 val = 0, msk; 2425 - 2426 - wtbl_ht = (struct wtbl_ht *)buf; 2427 - buf += sizeof(*wtbl_ht); 2428 - wtbl_ht->tag = cpu_to_le16(WTBL_HT); 2429 - wtbl_ht->len = cpu_to_le16(sizeof(*wtbl_ht)); 2430 - wtbl_ht->ht = 1; 2431 - wtbl_ht->ldpc = sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING; 2432 - wtbl_ht->af = sta->ht_cap.ampdu_factor; 2433 - wtbl_ht->mm = sta->ht_cap.ampdu_density; 2434 - wtlv++; 2435 - 2436 - /* wtbl vht */ 2437 - if (sta->vht_cap.vht_supported) { 2438 - struct wtbl_vht *wtbl_vht; 2439 - 2440 - wtbl_vht = (struct wtbl_vht *)buf; 2441 - buf += sizeof(*wtbl_vht); 2442 - wtbl_vht->tag = cpu_to_le16(WTBL_VHT); 2443 - wtbl_vht->len = cpu_to_le16(sizeof(*wtbl_vht)); 2444 - wtbl_vht->vht = 1; 2445 - wtbl_vht->ldpc = sta->vht_cap.cap & 2446 - IEEE80211_VHT_CAP_RXLDPC; 2447 - wtlv++; 2448 - 2449 - if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 2450 - val |= MT_WTBL_W5_SHORT_GI_80; 2451 - if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 2452 - val |= MT_WTBL_W5_SHORT_GI_160; 2453 - } 2454 - 2455 - /* wtbl smps */ 2456 - if (sta->smps_mode == IEEE80211_SMPS_DYNAMIC) { 2457 - struct wtbl_smps *wtbl_smps; 2458 - 2459 - wtbl_smps = (struct wtbl_smps *)buf; 2460 - buf += sizeof(*wtbl_smps); 2461 - wtbl_smps->tag = cpu_to_le16(WTBL_SMPS); 2462 - wtbl_smps->len = cpu_to_le16(sizeof(*wtbl_smps)); 2463 - wtbl_smps->smps = 1; 2464 - wtlv++; 2465 - } 2466 - 2467 - /* sgi */ 2468 - msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 | 2469 - MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160; 2470 - 2471 - if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 2472 - val |= MT_WTBL_W5_SHORT_GI_20; 2473 - if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 2474 - val |= MT_WTBL_W5_SHORT_GI_40; 2475 - 2476 - wtbl_raw = (struct wtbl_raw *)buf; 2477 - buf += sizeof(*wtbl_raw); 2478 - wtbl_raw->tag = cpu_to_le16(WTBL_RAW_DATA); 2479 - wtbl_raw->len = cpu_to_le16(sizeof(*wtbl_raw)); 2480 - wtbl_raw->wtbl_idx = 1; 2481 - wtbl_raw->dw = 5; 2482 - wtbl_raw->msk = cpu_to_le32(~msk); 2483 - wtbl_raw->val = cpu_to_le32(val); 2484 - wtlv++; 2485 - } 2486 - 2487 - out: 2488 - if (wtbl) 2489 - wtbl->len = cpu_to_le16(buf - (u8 *)wtbl_hdr); 2490 - 2491 - wtbl_hdr->tlv_num = cpu_to_le16(wtlv); 2492 - req.hdr.tlv_num = cpu_to_le16(stlv); 2493 - 2494 - return mt7615_mcu_send_sta_rec(dev, (u8 *)&req, (u8 *)wtbl_hdr, 2495 - buf - (u8 *)wtbl_hdr, en); 2496 - } 2497 - 2498 - int mt7615_mcu_set_bcn(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2499 - int en) 2500 - { 2501 - struct mt7615_dev *dev = mt7615_hw_dev(hw); 2502 - struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 2503 - struct mt76_wcid *wcid = &dev->mt76.global_wcid; 2504 - struct ieee80211_mutable_offsets offs; 2505 - struct ieee80211_tx_info *info; 2506 - struct req { 2507 - u8 omac_idx; 2508 - u8 enable; 2509 - u8 wlan_idx; 2510 - u8 band_idx; 2511 - u8 pkt_type; 2512 - u8 need_pre_tbtt_int; 2513 - __le16 csa_ie_pos; 2514 - __le16 pkt_len; 2515 - __le16 tim_ie_pos; 2516 - u8 pkt[512]; 2517 - u8 csa_cnt; 2518 - /* bss color change */ 2519 - u8 bcc_cnt; 2520 - __le16 bcc_ie_pos; 2521 - } __packed req = { 2522 - .omac_idx = mvif->omac_idx, 2523 - .enable = en, 2524 - .wlan_idx = wcid->idx, 2525 - .band_idx = mvif->band_idx, 2526 - }; 2527 - struct sk_buff *skb; 2528 - 2529 - skb = ieee80211_beacon_get_template(hw, vif, &offs); 2530 - if (!skb) 2531 - return -EINVAL; 2532 - 2533 - if (skb->len > 512 - MT_TXD_SIZE) { 2534 - dev_err(dev->mt76.dev, "Bcn size limit exceed\n"); 2535 - dev_kfree_skb(skb); 2536 - return -EINVAL; 2537 - } 2538 - 2539 - if (mvif->band_idx) { 2540 - info = IEEE80211_SKB_CB(skb); 2541 - info->hw_queue |= MT_TX_HW_QUEUE_EXT_PHY; 2542 - } 2543 - 2544 - mt7615_mac_write_txwi(dev, (__le32 *)(req.pkt), skb, wcid, NULL, 2545 - 0, NULL); 2546 - memcpy(req.pkt + MT_TXD_SIZE, skb->data, skb->len); 2547 - req.pkt_len = cpu_to_le16(MT_TXD_SIZE + skb->len); 2548 - req.tim_ie_pos = cpu_to_le16(MT_TXD_SIZE + offs.tim_offset); 2549 - if (offs.csa_counter_offs[0]) { 2550 - u16 csa_offs; 2551 - 2552 - csa_offs = MT_TXD_SIZE + offs.csa_counter_offs[0] - 4; 2553 - req.csa_ie_pos = cpu_to_le16(csa_offs); 2554 - req.csa_cnt = skb->data[offs.csa_counter_offs[0]]; 2555 - } 2556 - dev_kfree_skb(skb); 2557 - 2558 - return __mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_BCN_OFFLOAD, 2559 1122 &req, sizeof(req), true); 2560 1123 } 2561 1124 ··· 2383 1688 mt7615_mcu_set_txpower_sku(phy, req.txpower_sku); 2384 1689 2385 1690 return __mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true); 2386 - } 2387 - 2388 - int mt7615_mcu_set_tx_ba(struct mt7615_dev *dev, 2389 - struct ieee80211_ampdu_params *params, 2390 - bool add) 2391 - { 2392 - struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 2393 - struct mt7615_vif *mvif = msta->vif; 2394 - struct { 2395 - struct sta_req_hdr hdr; 2396 - struct sta_rec_ba ba; 2397 - u8 buf[MT7615_WTBL_UPDATE_MAX_SIZE]; 2398 - } __packed req = { 2399 - .hdr = { 2400 - .bss_idx = mvif->idx, 2401 - .wlan_idx = msta->wcid.idx, 2402 - .tlv_num = cpu_to_le16(1), 2403 - .is_tlv_append = 1, 2404 - .muar_idx = mvif->omac_idx, 2405 - }, 2406 - .ba = { 2407 - .tag = cpu_to_le16(STA_REC_BA), 2408 - .len = cpu_to_le16(sizeof(struct sta_rec_ba)), 2409 - .tid = params->tid, 2410 - .ba_type = MT_BA_TYPE_ORIGINATOR, 2411 - .amsdu = params->amsdu, 2412 - .ba_en = add << params->tid, 2413 - .ssn = cpu_to_le16(params->ssn), 2414 - .winsize = cpu_to_le16(params->buf_size), 2415 - }, 2416 - }; 2417 - struct sta_rec_wtbl *wtbl = NULL; 2418 - struct wtbl_req_hdr *wtbl_hdr; 2419 - struct wtbl_ba *wtbl_ba; 2420 - u8 *buf = req.buf; 2421 - 2422 - if (dev->fw_ver > MT7615_FIRMWARE_V1) { 2423 - req.hdr.tlv_num = cpu_to_le16(2); 2424 - wtbl = (struct sta_rec_wtbl *)buf; 2425 - wtbl->tag = cpu_to_le16(STA_REC_WTBL); 2426 - buf += sizeof(*wtbl); 2427 - } 2428 - 2429 - wtbl_hdr = (struct wtbl_req_hdr *)buf; 2430 - buf += sizeof(*wtbl_hdr); 2431 - wtbl_hdr->wlan_idx = msta->wcid.idx; 2432 - wtbl_hdr->operation = WTBL_SET; 2433 - wtbl_hdr->tlv_num = cpu_to_le16(1); 2434 - 2435 - wtbl_ba = (struct wtbl_ba *)buf; 2436 - buf += sizeof(*wtbl_ba); 2437 - wtbl_ba->tag = cpu_to_le16(WTBL_BA); 2438 - wtbl_ba->len = cpu_to_le16(sizeof(*wtbl_ba)); 2439 - wtbl_ba->tid = params->tid; 2440 - wtbl_ba->ba_type = MT_BA_TYPE_ORIGINATOR; 2441 - wtbl_ba->sn = add ? cpu_to_le16(params->ssn) : 0; 2442 - wtbl_ba->ba_en = add; 2443 - 2444 - if (add) { 2445 - u8 idx, ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; 2446 - 2447 - for (idx = 7; idx > 0; idx--) { 2448 - if (params->buf_size >= ba_range[idx]) 2449 - break; 2450 - } 2451 - 2452 - wtbl_ba->ba_winsize_idx = idx; 2453 - } 2454 - 2455 - if (wtbl) 2456 - wtbl->len = cpu_to_le16(buf - (u8 *)wtbl_hdr); 2457 - 2458 - return mt7615_mcu_send_sta_rec(dev, (u8 *)&req, (u8 *)wtbl_hdr, 2459 - buf - (u8 *)wtbl_hdr, true); 2460 - } 2461 - 2462 - int mt7615_mcu_set_rx_ba(struct mt7615_dev *dev, 2463 - struct ieee80211_ampdu_params *params, 2464 - bool add) 2465 - { 2466 - struct mt7615_sta *msta = (struct mt7615_sta *)params->sta->drv_priv; 2467 - struct mt7615_vif *mvif = msta->vif; 2468 - struct { 2469 - struct sta_req_hdr hdr; 2470 - struct sta_rec_ba ba; 2471 - u8 buf[MT7615_WTBL_UPDATE_MAX_SIZE]; 2472 - } __packed req = { 2473 - .hdr = { 2474 - .bss_idx = mvif->idx, 2475 - .wlan_idx = msta->wcid.idx, 2476 - .tlv_num = cpu_to_le16(1), 2477 - .is_tlv_append = 1, 2478 - .muar_idx = mvif->omac_idx, 2479 - }, 2480 - .ba = { 2481 - .tag = cpu_to_le16(STA_REC_BA), 2482 - .len = cpu_to_le16(sizeof(struct sta_rec_ba)), 2483 - .tid = params->tid, 2484 - .ba_type = MT_BA_TYPE_RECIPIENT, 2485 - .amsdu = params->amsdu, 2486 - .ba_en = add << params->tid, 2487 - .ssn = cpu_to_le16(params->ssn), 2488 - .winsize = cpu_to_le16(params->buf_size), 2489 - }, 2490 - }; 2491 - struct sta_rec_wtbl *wtbl = NULL; 2492 - struct wtbl_req_hdr *wtbl_hdr; 2493 - struct wtbl_ba *wtbl_ba; 2494 - u8 *buf = req.buf; 2495 - 2496 - if (dev->fw_ver > MT7615_FIRMWARE_V1) { 2497 - req.hdr.tlv_num = cpu_to_le16(2); 2498 - wtbl = (struct sta_rec_wtbl *)buf; 2499 - wtbl->tag = cpu_to_le16(STA_REC_WTBL); 2500 - buf += sizeof(*wtbl); 2501 - } 2502 - 2503 - wtbl_hdr = (struct wtbl_req_hdr *)buf; 2504 - buf += sizeof(*wtbl_hdr); 2505 - wtbl_hdr->wlan_idx = msta->wcid.idx; 2506 - wtbl_hdr->operation = WTBL_SET; 2507 - wtbl_hdr->tlv_num = cpu_to_le16(1); 2508 - 2509 - wtbl_ba = (struct wtbl_ba *)buf; 2510 - buf += sizeof(*wtbl_ba); 2511 - wtbl_ba->tag = cpu_to_le16(WTBL_BA); 2512 - wtbl_ba->len = cpu_to_le16(sizeof(*wtbl_ba)); 2513 - wtbl_ba->tid = params->tid; 2514 - wtbl_ba->ba_type = MT_BA_TYPE_RECIPIENT; 2515 - wtbl_ba->rst_ba_tid = params->tid; 2516 - wtbl_ba->rst_ba_sel = RST_BA_MAC_TID_MATCH; 2517 - wtbl_ba->rst_ba_sb = 1; 2518 - 2519 - memcpy(wtbl_ba->peer_addr, params->sta->addr, ETH_ALEN); 2520 - 2521 - if (wtbl) 2522 - wtbl->len = cpu_to_le16(buf - (u8 *)wtbl_hdr); 2523 - 2524 - return mt7615_mcu_send_sta_rec(dev, (u8 *)&req, (u8 *)wtbl_hdr, 2525 - buf - (u8 *)wtbl_hdr, add); 2526 1691 } 2527 1692 2528 1693 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index)
+120 -24
drivers/net/wireless/mediatek/mt76/mt7615/mcu.h
··· 23 23 u32 reserved[5]; 24 24 } __packed __aligned(4); 25 25 26 + /** 27 + * struct mt7615_uni_txd - mcu command descriptor for firmware v3 28 + * @txd: hardware descriptor 29 + * @len: total length not including txd 30 + * @cid: command identifier 31 + * @pkt_type: must be 0xa0 (cmd packet by long format) 32 + * @frag_n: fragment number 33 + * @seq: sequence number 34 + * @checksum: 0 mean there is no checksum 35 + * @s2d_index: index for command source and destination 36 + * Definition | value | note 37 + * CMD_S2D_IDX_H2N | 0x00 | command from HOST to WM 38 + * CMD_S2D_IDX_C2N | 0x01 | command from WA to WM 39 + * CMD_S2D_IDX_H2C | 0x02 | command from HOST to WA 40 + * CMD_S2D_IDX_H2N_AND_H2C | 0x03 | command from HOST to WA and WM 41 + * 42 + * @option: command option 43 + * BIT[0]: UNI_CMD_OPT_BIT_ACK 44 + * set to 1 to request a fw reply 45 + * if UNI_CMD_OPT_BIT_0_ACK is set and UNI_CMD_OPT_BIT_2_SET_QUERY 46 + * is set, mcu firmware will send response event EID = 0x01 47 + * (UNI_EVENT_ID_CMD_RESULT) to the host. 48 + * BIT[1]: UNI_CMD_OPT_BIT_UNI_CMD 49 + * 0: original command 50 + * 1: unified command 51 + * BIT[2]: UNI_CMD_OPT_BIT_SET_QUERY 52 + * 0: QUERY command 53 + * 1: SET command 54 + */ 55 + struct mt7615_uni_txd { 56 + __le32 txd[8]; 57 + 58 + /* DW1 */ 59 + __le16 len; 60 + __le16 cid; 61 + 62 + /* DW2 */ 63 + u8 reserved; 64 + u8 pkt_type; 65 + u8 frag_n; 66 + u8 seq; 67 + 68 + /* DW3 */ 69 + __le16 checksum; 70 + u8 s2d_index; 71 + u8 option; 72 + 73 + /* DW4 */ 74 + u8 reserved2[4]; 75 + } __packed __aligned(4); 76 + 26 77 /* event table */ 27 78 enum { 28 79 MCU_EVENT_TARGET_ADDRESS_LEN = 0x01, ··· 230 179 MCU_S2D_H2CN 231 180 }; 232 181 182 + #define MCU_FW_PREFIX BIT(31) 183 + #define MCU_UNI_PREFIX BIT(30) 184 + #define MCU_CMD_MASK ~(MCU_FW_PREFIX | MCU_UNI_PREFIX) 185 + 233 186 enum { 234 - MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01, 235 - MCU_CMD_FW_START_REQ = 0x02, 187 + MCU_CMD_TARGET_ADDRESS_LEN_REQ = MCU_FW_PREFIX | 0x01, 188 + MCU_CMD_FW_START_REQ = MCU_FW_PREFIX | 0x02, 236 189 MCU_CMD_INIT_ACCESS_REG = 0x3, 237 190 MCU_CMD_PATCH_START_REQ = 0x05, 238 - MCU_CMD_PATCH_FINISH_REQ = 0x07, 239 - MCU_CMD_PATCH_SEM_CONTROL = 0x10, 191 + MCU_CMD_PATCH_FINISH_REQ = MCU_FW_PREFIX | 0x07, 192 + MCU_CMD_PATCH_SEM_CONTROL = MCU_FW_PREFIX | 0x10, 240 193 MCU_CMD_EXT_CID = 0xED, 241 - MCU_CMD_FW_SCATTER = 0xEE, 242 - MCU_CMD_RESTART_DL_REQ = 0xEF, 194 + MCU_CMD_FW_SCATTER = MCU_FW_PREFIX | 0xEE, 195 + MCU_CMD_RESTART_DL_REQ = MCU_FW_PREFIX | 0xEF, 243 196 }; 244 197 245 198 enum { ··· 267 212 MCU_EXT_CMD_TX_POWER_FEATURE_CTRL = 0x58, 268 213 MCU_EXT_CMD_SET_RDD_TH = 0x7c, 269 214 MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d, 215 + }; 216 + 217 + enum { 218 + MCU_UNI_CMD_DEV_INFO_UPDATE = MCU_UNI_PREFIX | 0x01, 219 + MCU_UNI_CMD_BSS_INFO_UPDATE = MCU_UNI_PREFIX | 0x02, 220 + MCU_UNI_CMD_STA_REC_UPDATE = MCU_UNI_PREFIX | 0x03, 221 + }; 222 + 223 + #define MCU_CMD_ACK BIT(0) 224 + #define MCU_CMD_UNI BIT(1) 225 + #define MCU_CMD_QUERY BIT(2) 226 + 227 + #define MCU_CMD_UNI_EXT_ACK (MCU_CMD_ACK | MCU_CMD_UNI | MCU_CMD_QUERY) 228 + 229 + enum { 230 + UNI_BSS_INFO_BASIC = 0, 231 + UNI_BSS_INFO_BCN_CONTENT = 7, 270 232 }; 271 233 272 234 enum { ··· 345 273 DBDC_TYPE_PTA, 346 274 __DBDC_TYPE_MAX, 347 275 }; 276 + 277 + struct tlv { 278 + __le16 tag; 279 + __le16 len; 280 + } __packed; 348 281 349 282 struct bss_info_omac { 350 283 __le16 tag; ··· 560 483 __le32 val; 561 484 } __packed; 562 485 563 - #define MT7615_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 564 - sizeof(struct wtbl_generic) + \ 565 - sizeof(struct wtbl_rx) + \ 566 - sizeof(struct wtbl_ht) + \ 567 - sizeof(struct wtbl_vht) + \ 568 - sizeof(struct wtbl_tx_ps) + \ 569 - sizeof(struct wtbl_hdr_trans) + \ 570 - sizeof(struct wtbl_ba) + \ 571 - sizeof(struct wtbl_bf) + \ 572 - sizeof(struct wtbl_smps) + \ 573 - sizeof(struct wtbl_pn) + \ 574 - sizeof(struct wtbl_spe)) 486 + #define MT7615_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \ 487 + sizeof(struct wtbl_generic) + \ 488 + sizeof(struct wtbl_rx) + \ 489 + sizeof(struct wtbl_ht) + \ 490 + sizeof(struct wtbl_vht) + \ 491 + sizeof(struct wtbl_tx_ps) + \ 492 + sizeof(struct wtbl_hdr_trans) +\ 493 + sizeof(struct wtbl_ba) + \ 494 + sizeof(struct wtbl_bf) + \ 495 + sizeof(struct wtbl_smps) + \ 496 + sizeof(struct wtbl_pn) + \ 497 + sizeof(struct wtbl_spe)) 498 + 499 + #define MT7615_STA_UPDATE_MAX_SIZE (sizeof(struct sta_req_hdr) + \ 500 + sizeof(struct sta_rec_basic) + \ 501 + sizeof(struct sta_rec_ht) + \ 502 + sizeof(struct sta_rec_vht) + \ 503 + sizeof(struct tlv) + \ 504 + MT7615_WTBL_UPDATE_MAX_SIZE) 505 + 506 + #define MT7615_WTBL_UPDATE_BA_SIZE (sizeof(struct wtbl_req_hdr) + \ 507 + sizeof(struct wtbl_ba)) 575 508 576 509 enum { 577 510 WTBL_GENERIC, ··· 604 517 WTBL_MAX_NUM 605 518 }; 606 519 520 + struct sta_ntlv_hdr { 521 + u8 rsv[2]; 522 + __le16 tlv_num; 523 + } __packed; 524 + 607 525 struct sta_req_hdr { 608 526 u8 bss_idx; 609 527 u8 wlan_idx; ··· 616 524 u8 is_tlv_append; 617 525 u8 muar_idx; 618 526 u8 rsv[2]; 527 + } __packed; 528 + 529 + struct sta_rec_state { 530 + __le16 tag; 531 + __le16 len; 532 + u8 state; 533 + __le32 flags; 534 + u8 vhtop; 535 + u8 pad[2]; 619 536 } __packed; 620 537 621 538 struct sta_rec_basic { ··· 666 565 __le16 winsize; 667 566 } __packed; 668 567 669 - struct sta_rec_wtbl { 670 - __le16 tag; 671 - __le16 len; 672 - } __packed; 673 - 674 568 enum { 675 569 STA_REC_BASIC, 676 570 STA_REC_RA, ··· 674 578 STA_REC_BF, 675 579 STA_REC_AMSDU, /* for CR4 */ 676 580 STA_REC_BA, 677 - STA_REC_RED, /* not used */ 581 + STA_REC_STATE, 678 582 STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */ 679 583 STA_REC_HT, 680 584 STA_REC_VHT,
+62 -3
drivers/net/wireless/mediatek/mt76/mt7615/mmio.c
··· 2 2 #include <linux/module.h> 3 3 4 4 #include "mt7615.h" 5 + #include "regs.h" 5 6 #include "mac.h" 6 7 #include "../trace.h" 7 8 9 + const u32 mt7615e_reg_map[] = { 10 + [MT_TOP_CFG_BASE] = 0x01000, 11 + [MT_HW_BASE] = 0x01000, 12 + [MT_PCIE_REMAP_2] = 0x02504, 13 + [MT_ARB_BASE] = 0x20c00, 14 + [MT_HIF_BASE] = 0x04000, 15 + [MT_CSR_BASE] = 0x07000, 16 + [MT_PHY_BASE] = 0x10000, 17 + [MT_CFG_BASE] = 0x20200, 18 + [MT_AGG_BASE] = 0x20a00, 19 + [MT_TMAC_BASE] = 0x21000, 20 + [MT_RMAC_BASE] = 0x21200, 21 + [MT_DMA_BASE] = 0x21800, 22 + [MT_WTBL_BASE_ON] = 0x23000, 23 + [MT_WTBL_BASE_OFF] = 0x23400, 24 + [MT_LPON_BASE] = 0x24200, 25 + [MT_MIB_BASE] = 0x24800, 26 + [MT_WTBL_BASE_ADDR] = 0x30000, 27 + [MT_PCIE_REMAP_BASE2] = 0x80000, 28 + [MT_TOP_MISC_BASE] = 0xc0000, 29 + [MT_EFUSE_ADDR_BASE] = 0x81070000, 30 + }; 31 + 32 + const u32 mt7663e_reg_map[] = { 33 + [MT_TOP_CFG_BASE] = 0x01000, 34 + [MT_HW_BASE] = 0x02000, 35 + [MT_DMA_SHDL_BASE] = 0x06000, 36 + [MT_PCIE_REMAP_2] = 0x0700c, 37 + [MT_ARB_BASE] = 0x20c00, 38 + [MT_HIF_BASE] = 0x04000, 39 + [MT_CSR_BASE] = 0x07000, 40 + [MT_PHY_BASE] = 0x10000, 41 + [MT_CFG_BASE] = 0x20000, 42 + [MT_AGG_BASE] = 0x22000, 43 + [MT_TMAC_BASE] = 0x24000, 44 + [MT_RMAC_BASE] = 0x25000, 45 + [MT_DMA_BASE] = 0x27000, 46 + [MT_WTBL_BASE_ON] = 0x29000, 47 + [MT_WTBL_BASE_OFF] = 0x29800, 48 + [MT_LPON_BASE] = 0x2b000, 49 + [MT_MIB_BASE] = 0x2d000, 50 + [MT_WTBL_BASE_ADDR] = 0x30000, 51 + [MT_PCIE_REMAP_BASE2] = 0x90000, 52 + [MT_TOP_MISC_BASE] = 0xc0000, 53 + [MT_EFUSE_ADDR_BASE] = 0x78011000, 54 + }; 55 + 8 56 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr) 9 57 { 10 - u32 base = addr & MT_MCU_PCIE_REMAP_2_BASE; 11 - u32 offset = addr & MT_MCU_PCIE_REMAP_2_OFFSET; 58 + u32 base, offset; 12 59 60 + if (is_mt7663(&dev->mt76)) { 61 + base = addr & MT7663_MCU_PCIE_REMAP_2_BASE; 62 + offset = addr & MT7663_MCU_PCIE_REMAP_2_OFFSET; 63 + } else { 64 + base = addr & MT_MCU_PCIE_REMAP_2_BASE; 65 + offset = addr & MT_MCU_PCIE_REMAP_2_OFFSET; 66 + } 13 67 mt76_wr(dev, MT_MCU_PCIE_REMAP_2, base); 14 68 15 69 return MT_PCIE_REMAP_BASE_2 + offset; ··· 120 66 return IRQ_HANDLED; 121 67 } 122 68 123 - int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq) 69 + int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, 70 + int irq, const u32 *map) 124 71 { 125 72 static const struct mt76_driver_ops drv_ops = { 126 73 /* txwi_size = txd size + txp size */ ··· 150 95 dev = container_of(mdev, struct mt7615_dev, mt76); 151 96 mt76_mmio_init(&dev->mt76, mem_base); 152 97 98 + dev->reg_map = map; 153 99 mdev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) | 154 100 (mt76_rr(dev, MT_HW_REV) & 0xff); 155 101 dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev); ··· 159 103 IRQF_SHARED, KBUILD_MODNAME, dev); 160 104 if (ret) 161 105 goto error; 106 + 107 + if (is_mt7663(mdev)) 108 + mt76_wr(dev, MT_PCIE_IRQ_ENABLE, 1); 162 109 163 110 ret = mt7615_register_device(dev); 164 111 if (ret)
+47 -19
drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h
··· 38 38 39 39 #define MT7615_FIRMWARE_V1 1 40 40 #define MT7615_FIRMWARE_V2 2 41 + #define MT7615_FIRMWARE_V3 3 42 + 43 + #define MT7663_ROM_PATCH "mediatek/mt7663pr2h_v3.bin" 44 + #define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin" 41 45 42 46 #define MT7615_EEPROM_SIZE 1024 43 47 #define MT7615_TOKEN_SIZE 4096 ··· 148 144 struct mib_stats mib; 149 145 }; 150 146 147 + #define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__) 148 + #define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__) 149 + #define mt7615_mcu_sta_add(dev, ...) (dev)->mcu_ops->sta_add((dev), __VA_ARGS__) 150 + #define mt7615_mcu_add_dev_info(dev, ...) (dev)->mcu_ops->add_dev_info((dev), __VA_ARGS__) 151 + #define mt7615_mcu_add_bss_info(dev, ...) (dev)->mcu_ops->add_bss_info((dev), __VA_ARGS__) 152 + #define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__) 153 + #define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__) 154 + struct mt7615_mcu_ops { 155 + int (*add_tx_ba)(struct mt7615_dev *dev, 156 + struct ieee80211_ampdu_params *params, 157 + bool enable); 158 + int (*add_rx_ba)(struct mt7615_dev *dev, 159 + struct ieee80211_ampdu_params *params, 160 + bool enable); 161 + int (*sta_add)(struct mt7615_dev *dev, 162 + struct ieee80211_vif *vif, 163 + struct ieee80211_sta *sta, bool enable); 164 + int (*add_dev_info)(struct mt7615_dev *dev, 165 + struct ieee80211_vif *vif, bool enable); 166 + int (*add_bss_info)(struct mt7615_dev *dev, struct ieee80211_vif *vif, 167 + bool enable); 168 + int (*add_beacon_offload)(struct mt7615_dev *dev, 169 + struct ieee80211_hw *hw, 170 + struct ieee80211_vif *vif, bool enable); 171 + int (*set_pm_state)(struct mt7615_dev *dev, int band, int state); 172 + }; 173 + 151 174 struct mt7615_dev { 152 175 union { /* must be first */ 153 176 struct mt76_dev mt76; ··· 187 156 188 157 u16 chainmask; 189 158 159 + const struct mt7615_mcu_ops *mcu_ops; 190 160 struct regmap *infracfg; 161 + const u32 *reg_map; 191 162 192 163 struct work_struct mcu_work; 193 164 ··· 290 257 } 291 258 292 259 extern const struct ieee80211_ops mt7615_ops; 260 + extern const u32 mt7615e_reg_map[__MT_BASE_MAX]; 261 + extern const u32 mt7663e_reg_map[__MT_BASE_MAX]; 293 262 extern struct pci_driver mt7615_pci_driver; 294 263 extern struct platform_driver mt7622_wmac_driver; 295 264 ··· 304 269 } 305 270 #endif 306 271 307 - int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq); 272 + int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, 273 + int irq, const u32 *map); 308 274 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr); 309 275 276 + void mt7615_init_device(struct mt7615_dev *dev); 310 277 int mt7615_register_device(struct mt7615_dev *dev); 311 278 void mt7615_unregister_device(struct mt7615_dev *dev); 312 279 int mt7615_register_ext_phy(struct mt7615_dev *dev); ··· 321 284 void mt7615_dma_cleanup(struct mt7615_dev *dev); 322 285 int mt7615_mcu_init(struct mt7615_dev *dev); 323 286 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev); 324 - int mt7615_mcu_set_dev_info(struct mt7615_dev *dev, 325 - struct ieee80211_vif *vif, bool enable); 326 - int mt7615_mcu_set_bss_info(struct mt7615_dev *dev, struct ieee80211_vif *vif, 327 - int en); 328 287 void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta, 329 288 struct ieee80211_tx_rate *probe_rate, 330 289 struct ieee80211_tx_rate *rates); 331 290 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev); 332 - int mt7615_mcu_set_bmc(struct mt7615_dev *dev, struct ieee80211_vif *vif, 333 - bool en); 334 - int mt7615_mcu_set_sta(struct mt7615_dev *dev, struct ieee80211_vif *vif, 335 - struct ieee80211_sta *sta, bool en); 336 - int mt7615_mcu_set_bcn(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 337 - int en); 338 291 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd); 339 292 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue, 340 293 const struct ieee80211_tx_queue_params *params); 341 - int mt7615_mcu_set_tx_ba(struct mt7615_dev *dev, 342 - struct ieee80211_ampdu_params *params, 343 - bool add); 344 - int mt7615_mcu_set_rx_ba(struct mt7615_dev *dev, 345 - struct ieee80211_ampdu_params *params, 346 - bool add); 347 294 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb); 348 295 int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev, 349 296 enum mt7615_rdd_cmd cmd, u8 index, ··· 346 325 static inline bool is_mt7615(struct mt76_dev *dev) 347 326 { 348 327 return mt76_chip(dev) == 0x7615; 328 + } 329 + 330 + static inline bool is_mt7663(struct mt76_dev *dev) 331 + { 332 + return mt76_chip(dev) == 0x7663; 349 333 } 350 334 351 335 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask) ··· 373 347 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, 374 348 struct sk_buff *skb, struct mt76_wcid *wcid, 375 349 struct ieee80211_sta *sta, int pid, 376 - struct ieee80211_key_conf *key); 350 + struct ieee80211_key_conf *key, bool beacon); 377 351 void mt7615_mac_set_timing(struct mt7615_phy *phy); 378 352 int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb); 379 353 void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data); ··· 383 357 enum set_key_cmd cmd); 384 358 void mt7615_mac_reset_work(struct work_struct *work); 385 359 360 + int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq); 386 361 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev); 387 362 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev); 388 363 int mt7615_mcu_set_mac_enable(struct mt7615_dev *dev, int band, bool enable); 389 364 int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val); 390 - int mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int band, int enter); 391 365 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index); 392 366 void mt7615_mcu_exit(struct mt7615_dev *dev); 367 + void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb, 368 + int cmd, int *wait_seq); 393 369 394 370 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 395 371 enum mt76_txq_id qid, struct mt76_wcid *wcid,
+7 -1
drivers/net/wireless/mediatek/mt76/mt7615/pci.c
··· 13 13 14 14 static const struct pci_device_id mt7615_pci_device_table[] = { 15 15 { PCI_DEVICE(0x14c3, 0x7615) }, 16 + { PCI_DEVICE(0x14c3, 0x7663) }, 16 17 { }, 17 18 }; 18 19 19 20 static int mt7615_pci_probe(struct pci_dev *pdev, 20 21 const struct pci_device_id *id) 21 22 { 23 + const u32 *map; 22 24 int ret; 23 25 24 26 ret = pcim_enable_device(pdev); ··· 37 35 if (ret) 38 36 return ret; 39 37 40 - return mt7615_mmio_probe(&pdev->dev, pcim_iomap_table(pdev)[0], pdev->irq); 38 + map = id->device == 0x7663 ? mt7663e_reg_map : mt7615e_reg_map; 39 + return mt7615_mmio_probe(&pdev->dev, pcim_iomap_table(pdev)[0], 40 + pdev->irq, map); 41 41 } 42 42 43 43 static void mt7615_pci_remove(struct pci_dev *pdev) ··· 61 57 MODULE_FIRMWARE(MT7615_FIRMWARE_CR4); 62 58 MODULE_FIRMWARE(MT7615_FIRMWARE_N9); 63 59 MODULE_FIRMWARE(MT7615_ROM_PATCH); 60 + MODULE_FIRMWARE(MT7663_FIRMWARE_N9); 61 + MODULE_FIRMWARE(MT7663_ROM_PATCH);
+65 -22
drivers/net/wireless/mediatek/mt76/mt7615/regs.h
··· 4 4 #ifndef __MT7615_REGS_H 5 5 #define __MT7615_REGS_H 6 6 7 - #define MT_HW_REV 0x1000 8 - #define MT_HW_CHIPID 0x1008 9 - #define MT_TOP_STRAP_STA 0x1010 7 + enum mt7615_reg_base { 8 + MT_TOP_CFG_BASE, 9 + MT_HW_BASE, 10 + MT_DMA_SHDL_BASE, 11 + MT_PCIE_REMAP_2, 12 + MT_ARB_BASE, 13 + MT_HIF_BASE, 14 + MT_CSR_BASE, 15 + MT_PHY_BASE, 16 + MT_CFG_BASE, 17 + MT_AGG_BASE, 18 + MT_TMAC_BASE, 19 + MT_RMAC_BASE, 20 + MT_DMA_BASE, 21 + MT_WTBL_BASE_ON, 22 + MT_WTBL_BASE_OFF, 23 + MT_LPON_BASE, 24 + MT_MIB_BASE, 25 + MT_WTBL_BASE_ADDR, 26 + MT_PCIE_REMAP_BASE2, 27 + MT_TOP_MISC_BASE, 28 + MT_EFUSE_ADDR_BASE, 29 + __MT_BASE_MAX, 30 + }; 31 + 32 + #define MT_HW_INFO_BASE ((dev)->reg_map[MT_HW_BASE]) 33 + #define MT_HW_INFO(ofs) (MT_HW_INFO_BASE + (ofs)) 34 + #define MT_HW_REV MT_HW_INFO(0x000) 35 + #define MT_HW_CHIPID MT_HW_INFO(0x008) 36 + #define MT_TOP_STRAP_STA MT_HW_INFO(0x010) 10 37 #define MT_TOP_3NSS BIT(24) 11 38 12 39 #define MT_TOP_OFF_RSV 0x1128 13 40 #define MT_TOP_OFF_RSV_FW_STATE GENMASK(18, 16) 14 41 15 - #define MT_TOP_MISC2 0x1134 42 + #define MT_TOP_MISC2 ((dev)->reg_map[MT_TOP_CFG_BASE] + 0x134) 16 43 #define MT_TOP_MISC2_FW_STATE GENMASK(2, 0) 44 + 45 + #define MT7663_TOP_MISC2_FW_STATE GENMASK(3, 1) 17 46 18 47 #define MT_MCU_BASE 0x2000 19 48 #define MT_MCU(ofs) (MT_MCU_BASE + (ofs)) ··· 52 23 #define MT_MCU_PCIE_REMAP_1_BASE GENMASK(31, 18) 53 24 #define MT_PCIE_REMAP_BASE_1 0x40000 54 25 55 - #define MT_MCU_PCIE_REMAP_2 MT_MCU(0x504) 26 + #define MT_MCU_PCIE_REMAP_2 ((dev)->reg_map[MT_PCIE_REMAP_2]) 56 27 #define MT_MCU_PCIE_REMAP_2_OFFSET GENMASK(18, 0) 57 28 #define MT_MCU_PCIE_REMAP_2_BASE GENMASK(31, 19) 58 - #define MT_PCIE_REMAP_BASE_2 0x80000 29 + #define MT_PCIE_REMAP_BASE_2 ((dev)->reg_map[MT_PCIE_REMAP_BASE2]) 59 30 60 - #define MT_HIF_BASE 0x4000 61 - #define MT_HIF(ofs) (MT_HIF_BASE + (ofs)) 31 + #define MT_HIF(ofs) ((dev)->reg_map[MT_HIF_BASE] + (ofs)) 32 + 33 + #define MT7663_MCU_PCIE_REMAP_2_OFFSET GENMASK(15, 0) 34 + #define MT7663_MCU_PCIE_REMAP_2_BASE GENMASK(31, 16) 35 + 36 + #define MT_HIF2_BASE 0xf0000 37 + #define MT_HIF2(ofs) (MT_HIF2_BASE + (ofs)) 38 + #define MT_PCIE_IRQ_ENABLE MT_HIF2(0x188) 62 39 63 40 #define MT_CFG_LPCR_HOST MT_HIF(0x1f0) 64 41 #define MT_CFG_LPCR_HOST_FW_OWN BIT(0) ··· 130 95 #define MT_WPDMA_ABT_CFG MT_HIF(0x530) 131 96 #define MT_WPDMA_ABT_CFG1 MT_HIF(0x534) 132 97 98 + #define MT_CSR(ofs) ((dev)->reg_map[MT_CSR_BASE] + (ofs)) 99 + #define MT_CONN_HIF_ON_LPCTL MT_CSR(0x000) 100 + 133 101 #define MT_PLE_BASE 0x8000 134 102 #define MT_PLE(ofs) (MT_PLE_BASE + (ofs)) 135 103 ··· 144 106 #define MT_PLE_AC_QEMPTY(ac, n) MT_PLE(0x300 + 0x10 * (ac) + \ 145 107 ((n) << 2)) 146 108 147 - #define MT_WF_PHY_BASE 0x10000 109 + #define MT_WF_PHY_BASE ((dev)->reg_map[MT_PHY_BASE]) 148 110 #define MT_WF_PHY(ofs) (MT_WF_PHY_BASE + (ofs)) 149 111 150 112 #define MT_WF_PHY_WF2_RFCTRL0(n) MT_WF_PHY(0x1900 + (n) * 0x400) ··· 177 139 #define MT_WF_PHY_RXTD2_BASE MT_WF_PHY(0x2a00) 178 140 #define MT_WF_PHY_RXTD2(_n) (MT_WF_PHY_RXTD2_BASE + ((_n) << 2)) 179 141 180 - #define MT_WF_CFG_BASE 0x20200 142 + #define MT_WF_CFG_BASE ((dev)->reg_map[MT_CFG_BASE]) 181 143 #define MT_WF_CFG(ofs) (MT_WF_CFG_BASE + (ofs)) 182 144 183 145 #define MT_CFG_CCR MT_WF_CFG(0x000) ··· 186 148 #define MT_CFG_CCR_MAC_D1_2X_GC_EN BIT(30) 187 149 #define MT_CFG_CCR_MAC_D0_2X_GC_EN BIT(31) 188 150 189 - #define MT_WF_AGG_BASE 0x20a00 151 + #define MT_WF_AGG_BASE ((dev)->reg_map[MT_AGG_BASE]) 190 152 #define MT_WF_AGG(ofs) (MT_WF_AGG_BASE + (ofs)) 191 153 192 154 #define MT_AGG_ARCR MT_WF_AGG(0x010) ··· 217 179 #define MT_AGG_SCR MT_WF_AGG(0x0fc) 218 180 #define MT_AGG_SCR_NLNAV_MID_PTEC_DIS BIT(3) 219 181 220 - #define MT_WF_ARB_BASE 0x20c00 182 + #define MT_WF_ARB_BASE ((dev)->reg_map[MT_ARB_BASE]) 221 183 #define MT_WF_ARB(ofs) (MT_WF_ARB_BASE + (ofs)) 222 184 223 185 #define MT_ARB_SCR MT_WF_ARB(0x080) ··· 226 188 #define MT_ARB_SCR_TX1_DISABLE BIT(10) 227 189 #define MT_ARB_SCR_RX1_DISABLE BIT(11) 228 190 229 - #define MT_WF_TMAC_BASE 0x21000 191 + #define MT_WF_TMAC_BASE ((dev)->reg_map[MT_TMAC_BASE]) 230 192 #define MT_WF_TMAC(ofs) (MT_WF_TMAC_BASE + (ofs)) 231 193 232 194 #define MT_TMAC_CDTR MT_WF_TMAC(0x090) ··· 250 212 #define MT_TMAC_CTCR0_INS_DDLMT_EN BIT(17) 251 213 #define MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN BIT(18) 252 214 253 - #define MT_WF_RMAC_BASE 0x21200 215 + #define MT_WF_RMAC_BASE ((dev)->reg_map[MT_RMAC_BASE]) 254 216 #define MT_WF_RMAC(ofs) (MT_WF_RMAC_BASE + (ofs)) 255 217 256 218 #define MT_WF_RFCR(_band) MT_WF_RMAC((_band) ? 0x100 : 0x000) ··· 295 257 #define MT_WF_RMAC_MIB_TIME6 MT_WF_RMAC(0x03dc) 296 258 #define MT_MIB_OBSSTIME_MASK GENMASK(23, 0) 297 259 298 - #define MT_WF_DMA_BASE 0x21800 260 + #define MT_WF_DMA_BASE ((dev)->reg_map[MT_DMA_BASE]) 299 261 #define MT_WF_DMA(ofs) (MT_WF_DMA_BASE + (ofs)) 300 262 301 263 #define MT_DMA_DCR0 MT_WF_DMA(0x000) ··· 310 272 #define MT_DMA_RCFR0_RX_DROPPED_UCAST GENMASK(25, 24) 311 273 #define MT_DMA_RCFR0_RX_DROPPED_MCAST GENMASK(27, 26) 312 274 313 - #define MT_WTBL_BASE 0x30000 275 + #define MT_WTBL_BASE(dev) ((dev)->reg_map[MT_WTBL_BASE_ADDR]) 314 276 #define MT_WTBL_ENTRY_SIZE 256 315 277 316 - #define MT_WTBL_OFF_BASE 0x23400 278 + #define MT_WTBL_OFF_BASE ((dev)->reg_map[MT_WTBL_BASE_OFF]) 317 279 #define MT_WTBL_OFF(n) (MT_WTBL_OFF_BASE + (n)) 318 280 319 281 #define MT_WTBL_W0_KEY_IDX GENMASK(24, 23) ··· 330 292 #define MT_WTBL_UPDATE_TX_COUNT_CLEAR BIT(14) 331 293 #define MT_WTBL_UPDATE_BUSY BIT(31) 332 294 333 - #define MT_WTBL_ON_BASE 0x23000 295 + #define MT_TOP_MISC(ofs) ((dev)->reg_map[MT_TOP_MISC_BASE] + (ofs)) 296 + #define MT_CONN_ON_MISC MT_TOP_MISC(0x1140) 297 + #define MT_TOP_MISC2_FW_N9_RDY BIT(2) 298 + 299 + #define MT_WTBL_ON_BASE ((dev)->reg_map[MT_WTBL_BASE_ON]) 334 300 #define MT_WTBL_ON(_n) (MT_WTBL_ON_BASE + (_n)) 335 301 336 302 #define MT_WTBL_RICR0 MT_WTBL_ON(0x010) ··· 370 328 371 329 #define MT_WTBL_W27_CC_BW_SEL GENMASK(6, 5) 372 330 373 - #define MT_LPON_BASE 0x24200 374 - #define MT_LPON(_n) (MT_LPON_BASE + (_n)) 331 + #define MT_LPON(_n) ((dev)->reg_map[MT_LPON_BASE] + (_n)) 375 332 376 333 #define MT_LPON_T0CR MT_LPON(0x010) 377 334 #define MT_LPON_T0CR_MODE GENMASK(1, 0) ··· 378 337 #define MT_LPON_UTTR0 MT_LPON(0x018) 379 338 #define MT_LPON_UTTR1 MT_LPON(0x01c) 380 339 381 - #define MT_WF_MIB_BASE 0x24800 340 + #define MT_WF_MIB_BASE (dev->reg_map[MT_MIB_BASE]) 382 341 #define MT_WF_MIB(ofs) (MT_WF_MIB_BASE + (ofs)) 383 342 384 343 #define MT_MIB_M0_MISC_CR MT_WF_MIB(0x00c) ··· 407 366 #define MT_MIB_ACK_FAIL_COUNT_MASK GENMASK(31, 16) 408 367 409 368 #define MT_TX_AGG_CNT(n) MT_WF_MIB(0xa8 + ((n) << 2)) 369 + 370 + #define MT_DMA_SHDL(ofs) (dev->reg_map[MT_DMA_SHDL_BASE] + (ofs)) 410 371 411 372 #define MT_DMASHDL_BASE 0x5000a000 412 373 #define MT_DMASHDL_OPTIONAL 0x008 ··· 449 406 #define MT_LED_STATUS_ON GENMASK(23, 16) 450 407 #define MT_LED_STATUS_DURATION GENMASK(15, 0) 451 408 452 - #define MT_EFUSE_BASE 0x81070000 409 + #define MT_EFUSE_BASE ((dev)->reg_map[MT_EFUSE_ADDR_BASE]) 453 410 #define MT_EFUSE_BASE_CTRL 0x000 454 411 #define MT_EFUSE_BASE_CTRL_EMPTY BIT(30) 455 412
+1 -1
drivers/net/wireless/mediatek/mt76/mt7615/soc.c
··· 47 47 return PTR_ERR(mem_base); 48 48 } 49 49 50 - return mt7615_mmio_probe(&pdev->dev, mem_base, irq); 50 + return mt7615_mmio_probe(&pdev->dev, mem_base, irq, mt7615e_reg_map); 51 51 } 52 52 53 53 static int mt7622_wmac_remove(struct platform_device *pdev)
+1 -2
drivers/net/wireless/mediatek/mt76/mt76x0/phy.c
··· 1155 1155 static void mt76x0_phy_rf_init(struct mt76x02_dev *dev) 1156 1156 { 1157 1157 int i; 1158 - u8 val; 1159 1158 1160 1159 mt76x0_rf_patch_reg_array(dev, mt76x0_rf_central_tab, 1161 1160 ARRAY_SIZE(mt76x0_rf_central_tab)); ··· 1187 1188 */ 1188 1189 mt76x0_rf_wr(dev, MT_RF(0, 22), 1189 1190 min_t(u8, dev->cal.rx.freq_offset, 0xbf)); 1190 - val = mt76x0_rf_rr(dev, MT_RF(0, 22)); 1191 + mt76x0_rf_rr(dev, MT_RF(0, 22)); 1191 1192 1192 1193 /* Reset procedure DAC during power-up: 1193 1194 * - set B0.R73<7>
+1 -4
drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c
··· 461 461 462 462 mutex_lock(&dev->mt76.mutex); 463 463 464 + dev->mcu_timeout = 0; 464 465 if (restart) 465 466 mt76x02_reset_state(dev); 466 467 ··· 544 543 545 544 restart: 546 545 mt76x02_watchdog_reset(dev); 547 - 548 - mutex_lock(&dev->mt76.mcu.mutex); 549 - dev->mcu_timeout = 0; 550 - mutex_unlock(&dev->mt76.mcu.mutex); 551 546 552 547 dev->tx_hang_reset++; 553 548 dev->tx_hang_check = 0;
+25 -11
drivers/net/wireless/mediatek/mt76/usb.c
··· 70 70 71 71 ret = __mt76u_vendor_request(dev, req, 72 72 USB_DIR_IN | USB_TYPE_VENDOR, 73 - addr >> 16, addr, &usb->reg_val, 73 + addr >> 16, addr, usb->data, 74 74 sizeof(__le32)); 75 75 if (ret == sizeof(__le32)) 76 - data = le32_to_cpu(usb->reg_val); 76 + data = get_unaligned_le32(usb->data); 77 77 trace_usb_reg_rr(dev, addr, data); 78 78 79 79 return data; ··· 125 125 { 126 126 struct mt76_usb *usb = &dev->usb; 127 127 128 - usb->reg_val = cpu_to_le32(val); 128 + put_unaligned_le32(val, usb->data); 129 129 __mt76u_vendor_request(dev, req, 130 130 USB_DIR_OUT | USB_TYPE_VENDOR, 131 - addr >> 16, addr, &usb->reg_val, 131 + addr >> 16, addr, usb->data, 132 132 sizeof(__le32)); 133 133 trace_usb_reg_wr(dev, addr, val); 134 134 } ··· 672 672 static void mt76u_rx_tasklet(unsigned long data) 673 673 { 674 674 struct mt76_dev *dev = (struct mt76_dev *)data; 675 - struct mt76_queue *q = &dev->q_rx[MT_RXQ_MAIN]; 675 + struct mt76_queue *q; 676 + int i; 676 677 677 678 rcu_read_lock(); 678 - mt76u_process_rx_queue(dev, q); 679 + for (i = 0; i < __MT_RXQ_MAX; i++) { 680 + q = &dev->q_rx[i]; 681 + if (!q->ndesc) 682 + continue; 683 + 684 + mt76u_process_rx_queue(dev, q); 685 + } 679 686 rcu_read_unlock(); 680 687 } 681 688 ··· 1157 1150 }; 1158 1151 struct usb_device *udev = interface_to_usbdev(intf); 1159 1152 struct mt76_usb *usb = &dev->usb; 1153 + int err = -ENOMEM; 1160 1154 1161 1155 mt76u_ops.rr = ext ? mt76u_rr_ext : mt76u_rr; 1162 1156 mt76u_ops.wr = ext ? mt76u_wr_ext : mt76u_wr; ··· 1177 1169 usb->data_len = 32; 1178 1170 1179 1171 usb->data = devm_kmalloc(dev->dev, usb->data_len, GFP_KERNEL); 1180 - if (!usb->data) { 1181 - mt76u_deinit(dev); 1182 - return -ENOMEM; 1183 - } 1172 + if (!usb->data) 1173 + goto error; 1184 1174 1185 1175 mutex_init(&usb->usb_ctrl_mtx); 1186 1176 dev->bus = &mt76u_ops; ··· 1188 1182 1189 1183 usb->sg_en = mt76u_check_sg(dev); 1190 1184 1191 - return mt76u_set_endpoints(intf, usb); 1185 + err = mt76u_set_endpoints(intf, usb); 1186 + if (err < 0) 1187 + goto error; 1188 + 1189 + return 0; 1190 + 1191 + error: 1192 + mt76u_deinit(dev); 1193 + return err; 1192 1194 } 1193 1195 EXPORT_SYMBOL_GPL(mt76u_init); 1194 1196
+46 -7
drivers/net/wireless/quantenna/qtnfmac/cfg80211.c
··· 60 60 BIT(IEEE80211_STYPE_AUTH >> 4), 61 61 }, 62 62 [NL80211_IFTYPE_AP] = { 63 - .tx = BIT(IEEE80211_STYPE_ACTION >> 4), 63 + .tx = BIT(IEEE80211_STYPE_ACTION >> 4) | 64 + BIT(IEEE80211_STYPE_AUTH >> 4), 64 65 .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | 65 66 BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | 66 67 BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ··· 101 100 } 102 101 103 102 ret = cfg80211_check_combinations(wiphy, &params); 103 + 104 + if (ret) 105 + return ret; 106 + 107 + /* Check repeater interface combination: primary VIF should be STA only. 108 + * STA (primary) + AP (secondary) is OK. 109 + * AP (primary) + STA (secondary) is not supported. 110 + */ 111 + vif = qtnf_mac_get_base_vif(mac); 112 + if (vif && vif->wdev.iftype == NL80211_IFTYPE_AP && 113 + vif != change_vif && new_type == NL80211_IFTYPE_STATION) { 114 + ret = -EINVAL; 115 + pr_err("MAC%u invalid combination: AP as primary repeater interface is not supported\n", 116 + mac->macid); 117 + } 104 118 105 119 return ret; 106 120 } ··· 695 679 struct qtnf_vif *vif = qtnf_netdev_get_priv(dev); 696 680 int ret; 697 681 698 - if (vif->wdev.iftype != NL80211_IFTYPE_STATION) 699 - return -EOPNOTSUPP; 700 - 701 - if (!ether_addr_equal(vif->bssid, auth->bssid)) 682 + if (vif->wdev.iftype == NL80211_IFTYPE_STATION && 683 + !ether_addr_equal(vif->bssid, auth->bssid)) 702 684 pr_warn("unexpected bssid: %pM", auth->bssid); 703 685 704 686 ret = qtnf_cmd_send_external_auth(vif, auth); ··· 923 909 return ret; 924 910 } 925 911 912 + static int qtnf_update_owe_info(struct wiphy *wiphy, struct net_device *dev, 913 + struct cfg80211_update_owe_info *owe_info) 914 + { 915 + struct qtnf_vif *vif = qtnf_netdev_get_priv(dev); 916 + int ret; 917 + 918 + if (vif->wdev.iftype != NL80211_IFTYPE_AP) 919 + return -EOPNOTSUPP; 920 + 921 + ret = qtnf_cmd_send_update_owe(vif, owe_info); 922 + if (ret) { 923 + pr_err("VIF%u.%u: failed to update owe info\n", 924 + vif->mac->macid, vif->vifid); 925 + goto out; 926 + } 927 + 928 + out: 929 + return ret; 930 + } 931 + 926 932 #ifdef CONFIG_PM 927 933 static int qtnf_suspend(struct wiphy *wiphy, struct cfg80211_wowlan *wowlan) 928 934 { ··· 1039 1005 .set_power_mgmt = qtnf_set_power_mgmt, 1040 1006 .get_tx_power = qtnf_get_tx_power, 1041 1007 .set_tx_power = qtnf_set_tx_power, 1008 + .update_owe_info = qtnf_update_owe_info, 1042 1009 #ifdef CONFIG_PM 1043 1010 .suspend = qtnf_suspend, 1044 1011 .resume = qtnf_resume, ··· 1076 1041 } 1077 1042 } 1078 1043 1079 - struct wiphy *qtnf_wiphy_allocate(struct qtnf_bus *bus) 1044 + struct wiphy *qtnf_wiphy_allocate(struct qtnf_bus *bus, 1045 + struct platform_device *pdev) 1080 1046 { 1081 1047 struct wiphy *wiphy; 1082 1048 ··· 1092 1056 if (!wiphy) 1093 1057 return NULL; 1094 1058 1095 - set_wiphy_dev(wiphy, bus->dev); 1059 + if (pdev) 1060 + set_wiphy_dev(wiphy, &pdev->dev); 1061 + else 1062 + set_wiphy_dev(wiphy, bus->dev); 1096 1063 1097 1064 return wiphy; 1098 1065 }
+37 -1
drivers/net/wireless/quantenna/qtnfmac/commands.c
··· 2211 2211 2212 2212 cmd = (struct qlink_cmd_external_auth *)cmd_skb->data; 2213 2213 2214 - ether_addr_copy(cmd->bssid, auth->bssid); 2214 + ether_addr_copy(cmd->peer, auth->bssid); 2215 2215 cmd->status = cpu_to_le16(auth->status); 2216 2216 2217 2217 qtnf_bus_lock(vif->mac->bus); ··· 2788 2788 if (ret) 2789 2789 pr_err("[VIF%u.%u] failed to set broadcast domain\n", 2790 2790 vif->mac->macid, vif->vifid); 2791 + 2792 + return ret; 2793 + } 2794 + 2795 + int qtnf_cmd_send_update_owe(struct qtnf_vif *vif, 2796 + struct cfg80211_update_owe_info *owe) 2797 + { 2798 + struct qlink_cmd_update_owe *cmd; 2799 + struct sk_buff *cmd_skb; 2800 + int ret; 2801 + 2802 + if (sizeof(*cmd) + owe->ie_len > QTNF_MAX_CMD_BUF_SIZE) { 2803 + pr_warn("VIF%u.%u: OWE update IEs too big: %zu\n", 2804 + vif->mac->macid, vif->vifid, owe->ie_len); 2805 + return -E2BIG; 2806 + } 2807 + 2808 + cmd_skb = qtnf_cmd_alloc_new_cmdskb(vif->mac->macid, vif->vifid, 2809 + QLINK_CMD_UPDATE_OWE, 2810 + sizeof(*cmd)); 2811 + if (!cmd_skb) 2812 + return -ENOMEM; 2813 + 2814 + cmd = (struct qlink_cmd_update_owe *)cmd_skb->data; 2815 + ether_addr_copy(cmd->peer, owe->peer); 2816 + cmd->status = cpu_to_le16(owe->status); 2817 + if (owe->ie_len && owe->ie) 2818 + qtnf_cmd_skb_put_buffer(cmd_skb, owe->ie, owe->ie_len); 2819 + 2820 + qtnf_bus_lock(vif->mac->bus); 2821 + ret = qtnf_cmd_send(vif->mac->bus, cmd_skb); 2822 + if (ret) 2823 + goto out; 2824 + 2825 + out: 2826 + qtnf_bus_unlock(vif->mac->bus); 2791 2827 2792 2828 return ret; 2793 2829 }
+2
drivers/net/wireless/quantenna/qtnfmac/commands.h
··· 76 76 int qtnf_cmd_send_wowlan_set(const struct qtnf_vif *vif, 77 77 const struct cfg80211_wowlan *wowl); 78 78 int qtnf_cmd_netdev_changeupper(const struct qtnf_vif *vif, int br_domain); 79 + int qtnf_cmd_send_update_owe(struct qtnf_vif *vif, 80 + struct cfg80211_update_owe_info *owe); 79 81 80 82 #endif /* QLINK_COMMANDS_H_ */
+14 -4
drivers/net/wireless/quantenna/qtnfmac/core.c
··· 431 431 static struct qtnf_wmac *qtnf_core_mac_alloc(struct qtnf_bus *bus, 432 432 unsigned int macid) 433 433 { 434 + struct platform_device *pdev = NULL; 435 + struct qtnf_wmac *mac; 434 436 struct qtnf_vif *vif; 435 437 struct wiphy *wiphy; 436 - struct qtnf_wmac *mac; 437 438 unsigned int i; 438 439 439 - wiphy = qtnf_wiphy_allocate(bus); 440 + if (bus->hw_info.num_mac > 1) { 441 + pdev = platform_device_register_data(bus->dev, 442 + dev_name(bus->dev), 443 + macid, NULL, 0); 444 + if (IS_ERR(pdev)) 445 + return ERR_PTR(-EINVAL); 446 + } 447 + 448 + wiphy = qtnf_wiphy_allocate(bus, pdev); 440 449 if (!wiphy) 441 450 return ERR_PTR(-ENOMEM); 442 451 443 452 mac = wiphy_priv(wiphy); 444 453 445 454 mac->macid = macid; 455 + mac->pdev = pdev; 446 456 mac->bus = bus; 447 457 mutex_init(&mac->mac_lock); 448 458 INIT_DELAYED_WORK(&mac->scan_timeout, qtnf_mac_scan_timeout); ··· 503 493 dev_net_set(dev, wiphy_net(wiphy)); 504 494 dev->ieee80211_ptr = &vif->wdev; 505 495 ether_addr_copy(dev->dev_addr, vif->mac_addr); 506 - SET_NETDEV_DEV(dev, wiphy_dev(wiphy)); 507 496 dev->flags |= IFF_BROADCAST | IFF_MULTICAST; 508 497 dev->watchdog_timeo = QTNF_DEF_WDOG_TIMEOUT; 509 498 dev->tx_queue_len = 100; ··· 514 505 qdev_vif = netdev_priv(dev); 515 506 *((void **)qdev_vif) = vif; 516 507 517 - SET_NETDEV_DEV(dev, mac->bus->dev); 508 + SET_NETDEV_DEV(dev, wiphy_dev(wiphy)); 518 509 519 510 ret = register_netdevice(dev); 520 511 if (ret) { ··· 570 561 wiphy->bands[band] = NULL; 571 562 } 572 563 564 + platform_device_unregister(mac->pdev); 573 565 qtnf_mac_iface_comb_free(mac); 574 566 qtnf_mac_ext_caps_free(mac); 575 567 kfree(mac->macinfo.wowlan);
+4 -1
drivers/net/wireless/quantenna/qtnfmac/core.h
··· 20 20 #include <linux/ctype.h> 21 21 #include <linux/workqueue.h> 22 22 #include <linux/slab.h> 23 + #include <linux/platform_device.h> 23 24 24 25 #include "qlink.h" 25 26 #include "trans.h" ··· 108 107 struct mutex mac_lock; /* lock during wmac speicific ops */ 109 108 struct delayed_work scan_timeout; 110 109 struct ieee80211_regdomain *rd; 110 + struct platform_device *pdev; 111 111 }; 112 112 113 113 struct qtnf_hw_info { ··· 129 127 void qtnf_mac_ext_caps_free(struct qtnf_wmac *mac); 130 128 bool qtnf_slave_radar_get(void); 131 129 bool qtnf_dfs_offload_get(void); 132 - struct wiphy *qtnf_wiphy_allocate(struct qtnf_bus *bus); 130 + struct wiphy *qtnf_wiphy_allocate(struct qtnf_bus *bus, 131 + struct platform_device *pdev); 133 132 int qtnf_core_net_attach(struct qtnf_wmac *mac, struct qtnf_vif *priv, 134 133 const char *name, unsigned char name_assign_type); 135 134 void qtnf_main_work_queue(struct work_struct *work);
+51 -3
drivers/net/wireless/quantenna/qtnfmac/event.c
··· 578 578 ether_addr_copy(auth.bssid, ev->bssid); 579 579 auth.action = ev->action; 580 580 581 - pr_info("%s: external auth bss=%pM action=%u akm=%u\n", 582 - vif->netdev->name, auth.bssid, auth.action, 583 - auth.key_mgmt_suite); 581 + pr_debug("%s: external SAE processing: bss=%pM action=%u akm=%u\n", 582 + vif->netdev->name, auth.bssid, auth.action, 583 + auth.key_mgmt_suite); 584 584 585 585 ret = cfg80211_external_auth_request(vif->netdev, &auth, GFP_KERNEL); 586 586 if (ret) ··· 621 621 622 622 cfg80211_michael_mic_failure(vif->netdev, mic_ev->src, pairwise, 623 623 mic_ev->key_index, NULL, GFP_KERNEL); 624 + 625 + return 0; 626 + } 627 + 628 + static int 629 + qtnf_event_handle_update_owe(struct qtnf_vif *vif, 630 + const struct qlink_event_update_owe *owe_ev, 631 + u16 len) 632 + { 633 + struct wiphy *wiphy = priv_to_wiphy(vif->mac); 634 + struct cfg80211_update_owe_info owe_info = {}; 635 + const u16 ie_len = len - sizeof(*owe_ev); 636 + u8 *ie; 637 + 638 + if (len < sizeof(*owe_ev)) { 639 + pr_err("VIF%u.%u: payload is too short (%u < %zu)\n", 640 + vif->mac->macid, vif->vifid, len, 641 + sizeof(struct qlink_event_update_owe)); 642 + return -EINVAL; 643 + } 644 + 645 + if (!wiphy->registered || !vif->netdev) 646 + return 0; 647 + 648 + if (vif->wdev.iftype != NL80211_IFTYPE_AP) { 649 + pr_err("VIF%u.%u: UPDATE_OWE event when not in AP mode\n", 650 + vif->mac->macid, vif->vifid); 651 + return -EPROTO; 652 + } 653 + 654 + ie = kzalloc(ie_len, GFP_KERNEL); 655 + if (!ie) 656 + return -ENOMEM; 657 + 658 + memcpy(owe_info.peer, owe_ev->peer, ETH_ALEN); 659 + memcpy(ie, owe_ev->ies, ie_len); 660 + owe_info.ie_len = ie_len; 661 + owe_info.ie = ie; 662 + 663 + pr_info("%s: external OWE processing: peer=%pM\n", 664 + vif->netdev->name, owe_ev->peer); 665 + 666 + cfg80211_update_owe_info_event(vif->netdev, &owe_info, GFP_KERNEL); 667 + kfree(ie); 624 668 625 669 return 0; 626 670 } ··· 736 692 case QLINK_EVENT_MIC_FAILURE: 737 693 ret = qtnf_event_handle_mic_failure(vif, (const void *)event, 738 694 event_len); 695 + break; 696 + case QLINK_EVENT_UPDATE_OWE: 697 + ret = qtnf_event_handle_update_owe(vif, (const void *)event, 698 + event_len); 739 699 break; 740 700 default: 741 701 pr_warn("unknown event type: %x\n", event_id);
+31 -2
drivers/net/wireless/quantenna/qtnfmac/qlink.h
··· 15 15 #define QLINK_VER(_maj, _min) (((_maj) << QLINK_PROTO_VER_MAJOR_S) | (_min)) 16 16 17 17 #define QLINK_PROTO_VER_MAJOR 18 18 - #define QLINK_PROTO_VER_MINOR 0 18 + #define QLINK_PROTO_VER_MINOR 1 19 19 #define QLINK_PROTO_VER \ 20 20 QLINK_VER(QLINK_PROTO_VER_MAJOR, QLINK_PROTO_VER_MINOR) 21 21 ··· 322 322 QLINK_CMD_WOWLAN_SET = 0x0063, 323 323 QLINK_CMD_EXTERNAL_AUTH = 0x0066, 324 324 QLINK_CMD_TXPWR = 0x0067, 325 + QLINK_CMD_UPDATE_OWE = 0x0068, 325 326 }; 326 327 327 328 /** ··· 590 589 */ 591 590 struct qlink_cmd_external_auth { 592 591 struct qlink_cmd chdr; 593 - u8 bssid[ETH_ALEN]; 592 + u8 peer[ETH_ALEN]; 594 593 __le16 status; 595 594 u8 payload[0]; 596 595 } __packed; ··· 961 960 u8 var_info[0]; 962 961 } __packed; 963 962 963 + /** 964 + * struct qlink_cmd_update_owe - data for QLINK_CMD_UPDATE_OWE_INFO command 965 + * 966 + * @peer: MAC of the peer device for which OWE processing has been completed 967 + * @status: OWE external processing status code 968 + * @ies: IEs for the peer constructed by the user space 969 + */ 970 + struct qlink_cmd_update_owe { 971 + struct qlink_cmd chdr; 972 + u8 peer[ETH_ALEN]; 973 + __le16 status; 974 + u8 ies[0]; 975 + } __packed; 976 + 964 977 /* QLINK Command Responses messages related definitions 965 978 */ 966 979 ··· 1237 1222 QLINK_EVENT_RADAR = 0x0029, 1238 1223 QLINK_EVENT_EXTERNAL_AUTH = 0x0030, 1239 1224 QLINK_EVENT_MIC_FAILURE = 0x0031, 1225 + QLINK_EVENT_UPDATE_OWE = 0x0032, 1240 1226 }; 1241 1227 1242 1228 /** ··· 1444 1428 u8 src[ETH_ALEN]; 1445 1429 u8 key_index; 1446 1430 u8 pairwise; 1431 + } __packed; 1432 + 1433 + /** 1434 + * struct qlink_event_update_owe - data for QLINK_EVENT_UPDATE_OWE event 1435 + * 1436 + * @peer: MAC addr of the peer device for which OWE processing needs to be done 1437 + * @ies: IEs from the peer 1438 + */ 1439 + struct qlink_event_update_owe { 1440 + struct qlink_event ehdr; 1441 + u8 peer[ETH_ALEN]; 1442 + u8 rsvd[2]; 1443 + u8 ies[0]; 1447 1444 } __packed; 1448 1445 1449 1446 /* QLINK TLVs (Type-Length Values) definitions
+1 -1
drivers/net/wireless/rayctl.h
··· 570 570 }; 571 571 struct ray_rx_msg { 572 572 struct mac_header mac; 573 - UCHAR var[0]; 573 + UCHAR var[]; 574 574 }; 575 575 576 576 struct tx_msg {
+1 -1
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu.h
··· 627 627 u32 reserved4; 628 628 u32 reserved5; 629 629 630 - u8 data[0]; 630 + u8 data[]; 631 631 }; 632 632 633 633 /*
+4 -4
drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
··· 4816 4816 rate = tx_rate->hw_value; 4817 4817 4818 4818 if (rtl8xxxu_debug & RTL8XXXU_DEBUG_TX) 4819 - dev_info(dev, "%s: TX rate: %d, pkt size %d\n", 4820 - __func__, rate, cpu_to_le16(tx_desc->pkt_size)); 4819 + dev_info(dev, "%s: TX rate: %d, pkt size %u\n", 4820 + __func__, rate, le16_to_cpu(tx_desc->pkt_size)); 4821 4821 4822 4822 seq_number = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl)); 4823 4823 ··· 4889 4889 rate = tx_rate->hw_value; 4890 4890 4891 4891 if (rtl8xxxu_debug & RTL8XXXU_DEBUG_TX) 4892 - dev_info(dev, "%s: TX rate: %d, pkt size %d\n", 4893 - __func__, rate, cpu_to_le16(tx_desc40->pkt_size)); 4892 + dev_info(dev, "%s: TX rate: %d, pkt size %u\n", 4893 + __func__, rate, le16_to_cpu(tx_desc40->pkt_size)); 4894 4894 4895 4895 seq_number = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl)); 4896 4896
+3 -3
drivers/net/wireless/realtek/rtlwifi/wifi.h
··· 1051 1051 u8 addr2[ETH_ALEN]; 1052 1052 u8 addr3[ETH_ALEN]; 1053 1053 __le16 seq_ctl; 1054 - u8 payload[0]; 1054 + u8 payload[]; 1055 1055 } __packed; 1056 1056 1057 1057 struct rtl_info_element { 1058 1058 u8 id; 1059 1059 u8 len; 1060 - u8 data[0]; 1060 + u8 data[]; 1061 1061 } __packed; 1062 1062 1063 1063 struct rtl_probe_rsp { ··· 1068 1068 /*SSID, supported rates, FH params, DS params, 1069 1069 * CF params, IBSS params, TIM (if beacon), RSN 1070 1070 */ 1071 - struct rtl_info_element info_element[0]; 1071 + struct rtl_info_element info_element[]; 1072 1072 } __packed; 1073 1073 1074 1074 /*LED related.*/
+211 -54
drivers/net/wireless/realtek/rtw88/fw.c
··· 583 583 struct rtw_rsvd_page *rsvd_pkt; 584 584 u8 location = 0; 585 585 586 - list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 586 + list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) { 587 587 if (type == rsvd_pkt->type) 588 588 location = rsvd_pkt->page; 589 589 } ··· 636 636 struct rtw_rsvd_page *rsvd_pkt; 637 637 u8 location = 0; 638 638 639 - list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 639 + list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) { 640 640 if (rsvd_pkt->type != RSVD_PROBE_REQ) 641 641 continue; 642 642 if ((!ssid && !rsvd_pkt->ssid) || ··· 653 653 struct rtw_rsvd_page *rsvd_pkt; 654 654 u16 size = 0; 655 655 656 - list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 656 + list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) { 657 657 if (rsvd_pkt->type != RSVD_PROBE_REQ) 658 658 continue; 659 659 if ((!ssid && !rsvd_pkt->ssid) || ··· 688 688 rtw_dbg(rtwdev, RTW_DBG_FW, "RSVD_QOS_NULL loc: %d\n", location); 689 689 690 690 rtw_fw_send_h2c_command(rtwdev, h2c_pkt); 691 - } 692 - 693 - static struct sk_buff * 694 - rtw_beacon_get(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 695 - { 696 - struct sk_buff *skb_new; 697 - 698 - if (vif->type != NL80211_IFTYPE_AP && 699 - vif->type != NL80211_IFTYPE_ADHOC && 700 - !ieee80211_vif_is_mesh(vif)) { 701 - skb_new = alloc_skb(1, GFP_KERNEL); 702 - if (!skb_new) 703 - return NULL; 704 - skb_put(skb_new, 1); 705 - } else { 706 - skb_new = ieee80211_beacon_get(hw, vif); 707 - } 708 - 709 - return skb_new; 710 691 } 711 692 712 693 static struct sk_buff *rtw_nlo_info_get(struct ieee80211_hw *hw) ··· 834 853 } 835 854 836 855 static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw, 837 - struct ieee80211_vif *vif, 838 856 struct rtw_rsvd_page *rsvd_pkt) 839 857 { 858 + struct ieee80211_vif *vif; 859 + struct rtw_vif *rtwvif; 840 860 struct sk_buff *skb_new; 841 861 struct cfg80211_ssid *ssid; 842 862 863 + if (rsvd_pkt->type == RSVD_DUMMY) { 864 + skb_new = alloc_skb(1, GFP_KERNEL); 865 + if (!skb_new) 866 + return NULL; 867 + 868 + skb_put(skb_new, 1); 869 + return skb_new; 870 + } 871 + 872 + rtwvif = rsvd_pkt->rtwvif; 873 + if (!rtwvif) 874 + return NULL; 875 + 876 + vif = rtwvif_to_vif(rtwvif); 877 + 843 878 switch (rsvd_pkt->type) { 844 879 case RSVD_BEACON: 845 - skb_new = rtw_beacon_get(hw, vif); 880 + skb_new = ieee80211_beacon_get(hw, vif); 846 881 break; 847 882 case RSVD_PS_POLL: 848 883 skb_new = ieee80211_pspoll_get(hw, vif); ··· 945 948 if (!rsvd_pkt) 946 949 return NULL; 947 950 951 + INIT_LIST_HEAD(&rsvd_pkt->vif_list); 952 + INIT_LIST_HEAD(&rsvd_pkt->build_list); 948 953 rsvd_pkt->type = type; 949 954 rsvd_pkt->add_txdesc = txdesc; 950 955 ··· 954 955 } 955 956 956 957 static void rtw_insert_rsvd_page(struct rtw_dev *rtwdev, 958 + struct rtw_vif *rtwvif, 957 959 struct rtw_rsvd_page *rsvd_pkt) 958 960 { 959 961 lockdep_assert_held(&rtwdev->mutex); 960 - list_add_tail(&rsvd_pkt->list, &rtwdev->rsvd_page_list); 962 + 963 + list_add_tail(&rsvd_pkt->vif_list, &rtwvif->rsvd_page_list); 961 964 } 962 965 963 - void rtw_add_rsvd_page(struct rtw_dev *rtwdev, enum rtw_rsvd_packet_type type, 964 - bool txdesc) 966 + static void rtw_add_rsvd_page(struct rtw_dev *rtwdev, 967 + struct rtw_vif *rtwvif, 968 + enum rtw_rsvd_packet_type type, 969 + bool txdesc) 965 970 { 966 971 struct rtw_rsvd_page *rsvd_pkt; 967 972 968 973 rsvd_pkt = rtw_alloc_rsvd_page(rtwdev, type, txdesc); 969 - if (!rsvd_pkt) 974 + if (!rsvd_pkt) { 975 + rtw_err(rtwdev, "failed to alloc rsvd page %d\n", type); 970 976 return; 977 + } 971 978 972 - rtw_insert_rsvd_page(rtwdev, rsvd_pkt); 979 + rsvd_pkt->rtwvif = rtwvif; 980 + rtw_insert_rsvd_page(rtwdev, rtwvif, rsvd_pkt); 973 981 } 974 982 975 - void rtw_add_rsvd_page_probe_req(struct rtw_dev *rtwdev, 976 - struct cfg80211_ssid *ssid) 983 + static void rtw_add_rsvd_page_probe_req(struct rtw_dev *rtwdev, 984 + struct rtw_vif *rtwvif, 985 + struct cfg80211_ssid *ssid) 977 986 { 978 987 struct rtw_rsvd_page *rsvd_pkt; 979 988 980 989 rsvd_pkt = rtw_alloc_rsvd_page(rtwdev, RSVD_PROBE_REQ, true); 981 - if (!rsvd_pkt) 990 + if (!rsvd_pkt) { 991 + rtw_err(rtwdev, "failed to alloc probe req rsvd page\n"); 982 992 return; 993 + } 983 994 995 + rsvd_pkt->rtwvif = rtwvif; 984 996 rsvd_pkt->ssid = ssid; 985 - rtw_insert_rsvd_page(rtwdev, rsvd_pkt); 997 + rtw_insert_rsvd_page(rtwdev, rtwvif, rsvd_pkt); 986 998 } 987 999 988 - void rtw_reset_rsvd_page(struct rtw_dev *rtwdev) 1000 + void rtw_remove_rsvd_page(struct rtw_dev *rtwdev, 1001 + struct rtw_vif *rtwvif) 989 1002 { 990 1003 struct rtw_rsvd_page *rsvd_pkt, *tmp; 991 1004 992 1005 lockdep_assert_held(&rtwdev->mutex); 993 1006 994 - list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) { 995 - if (rsvd_pkt->type == RSVD_BEACON) 996 - continue; 997 - list_del(&rsvd_pkt->list); 1007 + /* remove all of the rsvd pages for vif */ 1008 + list_for_each_entry_safe(rsvd_pkt, tmp, &rtwvif->rsvd_page_list, 1009 + vif_list) { 1010 + list_del(&rsvd_pkt->vif_list); 1011 + if (!list_empty(&rsvd_pkt->build_list)) 1012 + list_del(&rsvd_pkt->build_list); 998 1013 kfree(rsvd_pkt); 999 1014 } 1015 + } 1016 + 1017 + void rtw_add_rsvd_page_bcn(struct rtw_dev *rtwdev, 1018 + struct rtw_vif *rtwvif) 1019 + { 1020 + struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); 1021 + 1022 + if (vif->type != NL80211_IFTYPE_AP && 1023 + vif->type != NL80211_IFTYPE_ADHOC && 1024 + vif->type != NL80211_IFTYPE_MESH_POINT) { 1025 + rtw_warn(rtwdev, "Cannot add beacon rsvd page for %d\n", 1026 + vif->type); 1027 + return; 1028 + } 1029 + 1030 + rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_BEACON, false); 1031 + } 1032 + 1033 + void rtw_add_rsvd_page_pno(struct rtw_dev *rtwdev, 1034 + struct rtw_vif *rtwvif) 1035 + { 1036 + struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); 1037 + struct rtw_wow_param *rtw_wow = &rtwdev->wow; 1038 + struct rtw_pno_request *rtw_pno_req = &rtw_wow->pno_req; 1039 + struct cfg80211_ssid *ssid; 1040 + int i; 1041 + 1042 + if (vif->type != NL80211_IFTYPE_STATION) { 1043 + rtw_warn(rtwdev, "Cannot add PNO rsvd page for %d\n", 1044 + vif->type); 1045 + return; 1046 + } 1047 + 1048 + for (i = 0 ; i < rtw_pno_req->match_set_cnt; i++) { 1049 + ssid = &rtw_pno_req->match_sets[i].ssid; 1050 + rtw_add_rsvd_page_probe_req(rtwdev, rtwvif, ssid); 1051 + } 1052 + 1053 + rtw_add_rsvd_page_probe_req(rtwdev, rtwvif, NULL); 1054 + rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_NLO_INFO, false); 1055 + rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_CH_INFO, true); 1056 + } 1057 + 1058 + void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev, 1059 + struct rtw_vif *rtwvif) 1060 + { 1061 + struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); 1062 + 1063 + if (vif->type != NL80211_IFTYPE_STATION) { 1064 + rtw_warn(rtwdev, "Cannot add sta rsvd page for %d\n", 1065 + vif->type); 1066 + return; 1067 + } 1068 + 1069 + rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_PS_POLL, true); 1070 + rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_QOS_NULL, true); 1071 + rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_NULL, true); 1072 + rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_LPS_PG_DPK, true); 1073 + rtw_add_rsvd_page(rtwdev, rtwvif, RSVD_LPS_PG_INFO, true); 1000 1074 } 1001 1075 1002 1076 int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr, ··· 1135 1063 return rtw_fw_write_data_rsvd_page(rtwdev, pg_addr, buf, size); 1136 1064 } 1137 1065 1138 - static u8 *rtw_build_rsvd_page(struct rtw_dev *rtwdev, 1139 - struct ieee80211_vif *vif, u32 *size) 1066 + static void __rtw_build_rsvd_page_reset(struct rtw_dev *rtwdev) 1067 + { 1068 + struct rtw_rsvd_page *rsvd_pkt, *tmp; 1069 + 1070 + list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, 1071 + build_list) { 1072 + list_del_init(&rsvd_pkt->build_list); 1073 + 1074 + /* Don't free except for the dummy rsvd page, 1075 + * others will be freed when removing vif 1076 + */ 1077 + if (rsvd_pkt->type == RSVD_DUMMY) 1078 + kfree(rsvd_pkt); 1079 + } 1080 + } 1081 + 1082 + static void rtw_build_rsvd_page_iter(void *data, u8 *mac, 1083 + struct ieee80211_vif *vif) 1084 + { 1085 + struct rtw_dev *rtwdev = data; 1086 + struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; 1087 + struct rtw_rsvd_page *rsvd_pkt; 1088 + 1089 + list_for_each_entry(rsvd_pkt, &rtwvif->rsvd_page_list, vif_list) { 1090 + if (rsvd_pkt->type == RSVD_BEACON) 1091 + list_add(&rsvd_pkt->build_list, 1092 + &rtwdev->rsvd_page_list); 1093 + else 1094 + list_add_tail(&rsvd_pkt->build_list, 1095 + &rtwdev->rsvd_page_list); 1096 + } 1097 + } 1098 + 1099 + static int __rtw_build_rsvd_page_from_vifs(struct rtw_dev *rtwdev) 1100 + { 1101 + struct rtw_rsvd_page *rsvd_pkt; 1102 + 1103 + __rtw_build_rsvd_page_reset(rtwdev); 1104 + 1105 + /* gather rsvd page from vifs */ 1106 + rtw_iterate_vifs_atomic(rtwdev, rtw_build_rsvd_page_iter, rtwdev); 1107 + 1108 + rsvd_pkt = list_first_entry_or_null(&rtwdev->rsvd_page_list, 1109 + struct rtw_rsvd_page, build_list); 1110 + if (!rsvd_pkt) { 1111 + WARN(1, "Should not have an empty reserved page\n"); 1112 + return -EINVAL; 1113 + } 1114 + 1115 + /* the first rsvd should be beacon, otherwise add a dummy one */ 1116 + if (rsvd_pkt->type != RSVD_BEACON) { 1117 + struct rtw_rsvd_page *dummy_pkt; 1118 + 1119 + dummy_pkt = rtw_alloc_rsvd_page(rtwdev, RSVD_DUMMY, false); 1120 + if (!dummy_pkt) { 1121 + rtw_err(rtwdev, "failed to alloc dummy rsvd page\n"); 1122 + return -ENOMEM; 1123 + } 1124 + 1125 + list_add(&dummy_pkt->build_list, &rtwdev->rsvd_page_list); 1126 + } 1127 + 1128 + return 0; 1129 + } 1130 + 1131 + static u8 *rtw_build_rsvd_page(struct rtw_dev *rtwdev, u32 *size) 1140 1132 { 1141 1133 struct ieee80211_hw *hw = rtwdev->hw; 1142 1134 struct rtw_chip_info *chip = rtwdev->chip; ··· 1210 1074 u8 total_page = 0; 1211 1075 u8 page_size, page_margin, tx_desc_sz; 1212 1076 u8 *buf; 1077 + int ret; 1213 1078 1214 1079 page_size = chip->page_size; 1215 1080 tx_desc_sz = chip->tx_pkt_desc_sz; 1216 1081 page_margin = page_size - tx_desc_sz; 1217 1082 1218 - list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 1219 - iter = rtw_get_rsvd_page_skb(hw, vif, rsvd_pkt); 1083 + ret = __rtw_build_rsvd_page_from_vifs(rtwdev); 1084 + if (ret) { 1085 + rtw_err(rtwdev, 1086 + "failed to build rsvd page from vifs, ret %d\n", ret); 1087 + return NULL; 1088 + } 1089 + 1090 + list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) { 1091 + iter = rtw_get_rsvd_page_skb(hw, rsvd_pkt); 1220 1092 if (!iter) { 1221 1093 rtw_err(rtwdev, "failed to build rsvd packet\n"); 1222 1094 goto release_skb; ··· 1248 1104 * is smaller than the actual size of the whole rsvd_page 1249 1105 */ 1250 1106 if (total_page == 0) { 1251 - if (rsvd_pkt->type != RSVD_BEACON) { 1107 + if (rsvd_pkt->type != RSVD_BEACON && 1108 + rsvd_pkt->type != RSVD_DUMMY) { 1252 1109 rtw_err(rtwdev, "first page should be a beacon\n"); 1253 1110 goto release_skb; 1254 1111 } ··· 1277 1132 * And that rsvd_pkt does not require tx_desc because when it goes 1278 1133 * through TX path, the TX path will generate one for it. 1279 1134 */ 1280 - list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 1135 + list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) { 1281 1136 rtw_rsvd_page_list_to_buf(rtwdev, page_size, page_margin, 1282 1137 page, buf, rsvd_pkt); 1283 1138 if (page == 0) ··· 1293 1148 return buf; 1294 1149 1295 1150 release_skb: 1296 - list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, list) { 1151 + list_for_each_entry(rsvd_pkt, &rtwdev->rsvd_page_list, build_list) { 1297 1152 kfree_skb(rsvd_pkt->skb); 1298 1153 rsvd_pkt->skb = NULL; 1299 1154 } ··· 1301 1156 return NULL; 1302 1157 } 1303 1158 1304 - static int 1305 - rtw_download_beacon(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 1159 + static int rtw_download_beacon(struct rtw_dev *rtwdev) 1306 1160 { 1307 1161 struct ieee80211_hw *hw = rtwdev->hw; 1162 + struct rtw_rsvd_page *rsvd_pkt; 1308 1163 struct sk_buff *skb; 1309 1164 int ret = 0; 1310 1165 1311 - skb = rtw_beacon_get(hw, vif); 1166 + rsvd_pkt = list_first_entry_or_null(&rtwdev->rsvd_page_list, 1167 + struct rtw_rsvd_page, build_list); 1168 + if (!rsvd_pkt) { 1169 + rtw_err(rtwdev, "failed to get rsvd page from build list\n"); 1170 + return -ENOENT; 1171 + } 1172 + 1173 + if (rsvd_pkt->type != RSVD_BEACON && 1174 + rsvd_pkt->type != RSVD_DUMMY) { 1175 + rtw_err(rtwdev, "invalid rsvd page type %d, should be beacon or dummy\n", 1176 + rsvd_pkt->type); 1177 + return -EINVAL; 1178 + } 1179 + 1180 + skb = rtw_get_rsvd_page_skb(hw, rsvd_pkt); 1312 1181 if (!skb) { 1313 1182 rtw_err(rtwdev, "failed to get beacon skb\n"); 1314 - ret = -ENOMEM; 1315 - goto out; 1183 + return -ENOMEM; 1316 1184 } 1317 1185 1318 1186 ret = rtw_download_drv_rsvd_page(rtwdev, skb->data, skb->len); ··· 1334 1176 1335 1177 dev_kfree_skb(skb); 1336 1178 1337 - out: 1338 1179 return ret; 1339 1180 } 1340 1181 1341 - int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) 1182 + int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev) 1342 1183 { 1343 1184 u8 *buf; 1344 1185 u32 size; 1345 1186 int ret; 1346 1187 1347 - buf = rtw_build_rsvd_page(rtwdev, vif, &size); 1188 + buf = rtw_build_rsvd_page(rtwdev, &size); 1348 1189 if (!buf) { 1349 1190 rtw_err(rtwdev, "failed to build rsvd page pkt\n"); 1350 1191 return -ENOMEM; ··· 1360 1203 * the beacon again to replace the TX desc header, and we will get 1361 1204 * a correct tx_desc for the beacon in the rsvd page. 1362 1205 */ 1363 - ret = rtw_download_beacon(rtwdev, vif); 1206 + ret = rtw_download_beacon(rtwdev); 1364 1207 if (ret) { 1365 1208 rtw_err(rtwdev, "failed to download beacon\n"); 1366 1209 goto free;
+18 -9
drivers/net/wireless/realtek/rtw88/fw.h
··· 36 36 struct rtw_c2h_cmd { 37 37 u8 id; 38 38 u8 seq; 39 - u8 payload[0]; 39 + u8 payload[]; 40 40 } __packed; 41 41 42 42 enum rtw_rsvd_packet_type { 43 43 RSVD_BEACON, 44 + RSVD_DUMMY, 44 45 RSVD_PS_POLL, 45 46 RSVD_PROBE_RESP, 46 47 RSVD_NULL, ··· 99 98 } __packed; 100 99 101 100 struct rtw_rsvd_page { 102 - struct list_head list; 101 + /* associated with each vif */ 102 + struct list_head vif_list; 103 + struct rtw_vif *rtwvif; 104 + 105 + /* associated when build rsvd page */ 106 + struct list_head build_list; 107 + 103 108 struct sk_buff *skb; 104 109 enum rtw_rsvd_packet_type type; 105 110 u8 page; ··· 509 502 void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); 510 503 void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); 511 504 void rtw_fw_media_status_report(struct rtw_dev *rtwdev, u8 mac_id, bool conn); 512 - void rtw_add_rsvd_page(struct rtw_dev *rtwdev, enum rtw_rsvd_packet_type type, 513 - bool txdesc); 514 - void rtw_add_rsvd_page_probe_req(struct rtw_dev *rtwdev, 515 - struct cfg80211_ssid *ssid); 516 505 int rtw_fw_write_data_rsvd_page(struct rtw_dev *rtwdev, u16 pg_addr, 517 506 u8 *buf, u32 size); 518 - void rtw_reset_rsvd_page(struct rtw_dev *rtwdev); 519 - int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev, 520 - struct ieee80211_vif *vif); 507 + void rtw_remove_rsvd_page(struct rtw_dev *rtwdev, 508 + struct rtw_vif *rtwvif); 509 + void rtw_add_rsvd_page_bcn(struct rtw_dev *rtwdev, 510 + struct rtw_vif *rtwvif); 511 + void rtw_add_rsvd_page_pno(struct rtw_dev *rtwdev, 512 + struct rtw_vif *rtwvif); 513 + void rtw_add_rsvd_page_sta(struct rtw_dev *rtwdev, 514 + struct rtw_vif *rtwvif); 515 + int rtw_fw_download_rsvd_page(struct rtw_dev *rtwdev); 521 516 void rtw_send_rsvd_page_h2c(struct rtw_dev *rtwdev); 522 517 int rtw_dump_drv_rsvd_page(struct rtw_dev *rtwdev, 523 518 u32 offset, u32 size, u32 *buf);
+13 -7
drivers/net/wireless/realtek/rtw88/hci.h
··· 7 7 8 8 /* ops for PCI, USB and SDIO */ 9 9 struct rtw_hci_ops { 10 - int (*tx)(struct rtw_dev *rtwdev, 11 - struct rtw_tx_pkt_info *pkt_info, 12 - struct sk_buff *skb); 10 + int (*tx_write)(struct rtw_dev *rtwdev, 11 + struct rtw_tx_pkt_info *pkt_info, 12 + struct sk_buff *skb); 13 + void (*tx_kick_off)(struct rtw_dev *rtwdev); 13 14 int (*setup)(struct rtw_dev *rtwdev); 14 15 int (*start)(struct rtw_dev *rtwdev); 15 16 void (*stop)(struct rtw_dev *rtwdev); ··· 29 28 void (*write32)(struct rtw_dev *rtwdev, u32 addr, u32 val); 30 29 }; 31 30 32 - static inline int rtw_hci_tx(struct rtw_dev *rtwdev, 33 - struct rtw_tx_pkt_info *pkt_info, 34 - struct sk_buff *skb) 31 + static inline int rtw_hci_tx_write(struct rtw_dev *rtwdev, 32 + struct rtw_tx_pkt_info *pkt_info, 33 + struct sk_buff *skb) 35 34 { 36 - return rtwdev->hci.ops->tx(rtwdev, pkt_info, skb); 35 + return rtwdev->hci.ops->tx_write(rtwdev, pkt_info, skb); 36 + } 37 + 38 + static inline void rtw_hci_tx_kick_off(struct rtw_dev *rtwdev) 39 + { 40 + return rtwdev->hci.ops->tx_kick_off(rtwdev); 37 41 } 38 42 39 43 static inline int rtw_hci_setup(struct rtw_dev *rtwdev)
+12 -10
drivers/net/wireless/realtek/rtw88/mac80211.c
··· 161 161 memset(&rtwvif->bfee, 0, sizeof(struct rtw_bfee)); 162 162 rtwvif->conf = &rtw_vif_port[port]; 163 163 rtw_txq_init(rtwdev, vif->txq); 164 + INIT_LIST_HEAD(&rtwvif->rsvd_page_list); 164 165 165 166 mutex_lock(&rtwdev->mutex); 166 167 ··· 170 169 switch (vif->type) { 171 170 case NL80211_IFTYPE_AP: 172 171 case NL80211_IFTYPE_MESH_POINT: 172 + rtw_add_rsvd_page_bcn(rtwdev, rtwvif); 173 173 net_type = RTW_NET_AP_MODE; 174 174 bcn_ctrl = BIT_EN_BCN_FUNCTION | BIT_DIS_TSF_UDT; 175 175 break; 176 176 case NL80211_IFTYPE_ADHOC: 177 + rtw_add_rsvd_page_bcn(rtwdev, rtwvif); 177 178 net_type = RTW_NET_AD_HOC; 178 179 bcn_ctrl = BIT_EN_BCN_FUNCTION | BIT_DIS_TSF_UDT; 179 180 break; 180 181 case NL80211_IFTYPE_STATION: 181 - default: 182 + rtw_add_rsvd_page_sta(rtwdev, rtwvif); 182 183 net_type = RTW_NET_NO_LINK; 183 184 bcn_ctrl = BIT_EN_BCN_FUNCTION; 184 185 break; 186 + default: 187 + WARN_ON(1); 188 + mutex_unlock(&rtwdev->mutex); 189 + return -EINVAL; 185 190 } 186 191 187 192 ether_addr_copy(rtwvif->mac_addr, vif->addr); ··· 218 211 rtw_leave_lps_deep(rtwdev); 219 212 220 213 rtw_txq_cleanup(rtwdev, vif->txq); 214 + rtw_remove_rsvd_page(rtwdev, rtwvif); 221 215 222 216 eth_zero_addr(rtwvif->mac_addr); 223 217 config |= PORT_SET_MAC_ADDR; ··· 350 342 chip->ops->phy_calibration(rtwdev); 351 343 352 344 rtwvif->aid = conf->aid; 353 - rtw_add_rsvd_page(rtwdev, RSVD_PS_POLL, true); 354 - rtw_add_rsvd_page(rtwdev, RSVD_QOS_NULL, true); 355 - rtw_add_rsvd_page(rtwdev, RSVD_NULL, true); 356 - rtw_add_rsvd_page(rtwdev, RSVD_LPS_PG_DPK, true); 357 - rtw_add_rsvd_page(rtwdev, RSVD_LPS_PG_INFO, true); 358 - rtw_fw_download_rsvd_page(rtwdev, vif); 345 + rtw_fw_download_rsvd_page(rtwdev); 359 346 rtw_send_rsvd_page_h2c(rtwdev); 360 347 rtw_coex_media_status_notify(rtwdev, conf->assoc); 361 348 if (rtw_bf_support) ··· 359 356 rtw_leave_lps(rtwdev); 360 357 net_type = RTW_NET_NO_LINK; 361 358 rtwvif->aid = 0; 362 - rtw_reset_rsvd_page(rtwdev); 363 359 rtw_bf_disassoc(rtwdev, vif, conf); 364 360 } 365 361 ··· 373 371 } 374 372 375 373 if (changed & BSS_CHANGED_BEACON) 376 - rtw_fw_download_rsvd_page(rtwdev, vif); 374 + rtw_fw_download_rsvd_page(rtwdev); 377 375 378 376 if (changed & BSS_CHANGED_MU_GROUPS) { 379 377 struct rtw_chip_info *chip = rtwdev->chip; ··· 558 556 559 557 /* download new cam settings for PG to backup */ 560 558 if (rtw_fw_lps_deep_mode == LPS_DEEP_MODE_PG) 561 - rtw_fw_download_rsvd_page(rtwdev, vif); 559 + rtw_fw_download_rsvd_page(rtwdev); 562 560 563 561 out: 564 562 mutex_unlock(&rtwdev->mutex);
+3 -12
drivers/net/wireless/realtek/rtw88/main.c
··· 1118 1118 } 1119 1119 1120 1120 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1); 1121 - hal->fab_version = BIT_GET_VENDOR_ID(hal->chip_version) >> 2; 1122 1121 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version); 1123 1122 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1; 1124 1123 if (hal->chip_version & BIT_RF_TYPE_ID) { ··· 1131 1132 hal->antenna_tx = BB_PATH_A; 1132 1133 hal->antenna_rx = BB_PATH_A; 1133 1134 } 1134 - 1135 - if (hal->fab_version == 2) 1136 - hal->fab_version = 1; 1137 - else if (hal->fab_version == 1) 1138 - hal->fab_version = 2; 1139 1135 1140 1136 efuse->physical_size = chip->phy_efuse_size; 1141 1137 efuse->logical_size = chip->log_efuse_size; ··· 1394 1400 else 1395 1401 rtwdev->lps_conf.deep_mode = rtw_fw_lps_deep_mode; 1396 1402 1397 - mutex_lock(&rtwdev->mutex); 1398 - rtw_add_rsvd_page(rtwdev, RSVD_BEACON, false); 1399 - mutex_unlock(&rtwdev->mutex); 1400 - 1401 1403 rtw_stats_init(rtwdev); 1402 1404 1403 1405 /* default rx filter setting */ ··· 1436 1446 skb_queue_purge(&rtwdev->tx_report.queue); 1437 1447 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags); 1438 1448 1439 - list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) { 1440 - list_del(&rsvd_pkt->list); 1449 + list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, 1450 + build_list) { 1451 + list_del(&rsvd_pkt->build_list); 1441 1452 kfree(rsvd_pkt); 1442 1453 } 1443 1454
+2 -2
drivers/net/wireless/realtek/rtw88/main.h
··· 752 752 u8 bssid[ETH_ALEN]; 753 753 u8 port; 754 754 u8 bcn_ctrl; 755 + struct list_head rsvd_page_list; 755 756 struct ieee80211_tx_queue_params tx_params[IEEE80211_NUM_ACS]; 756 757 const struct rtw_vif_port *conf; 757 758 ··· 1528 1527 u32 rcr; 1529 1528 1530 1529 u32 chip_version; 1531 - u8 fab_version; 1532 1530 u8 cut_version; 1533 1531 u8 mp_chip; 1534 1532 u8 oem_id; ··· 1641 1641 struct rtw_wow_param wow; 1642 1642 1643 1643 /* hci related data, must be last */ 1644 - u8 priv[0] __aligned(sizeof(void *)); 1644 + u8 priv[] __aligned(sizeof(void *)); 1645 1645 }; 1646 1646 1647 1647 #include "hci.h"
+121 -76
drivers/net/wireless/realtek/rtw88/pci.c
··· 186 186 dma_addr_t dma; 187 187 u8 *head; 188 188 189 + if (len > TRX_BD_IDX_MASK) { 190 + rtw_err(rtwdev, "len %d exceeds maximum TX entries\n", len); 191 + return -EINVAL; 192 + } 193 + 189 194 head = pci_zalloc_consistent(pdev, ring_sz, &dma); 190 195 if (!head) { 191 196 rtw_err(rtwdev, "failed to allocate tx ring\n"); ··· 263 258 int buf_sz = RTK_PCI_RX_BUF_SIZE; 264 259 int i, allocated; 265 260 int ret = 0; 261 + 262 + if (len > TRX_BD_IDX_MASK) { 263 + rtw_err(rtwdev, "len %d exceeds maximum RX entries\n", len); 264 + return -EINVAL; 265 + } 266 266 267 267 head = pci_zalloc_consistent(pdev, ring_sz, &dma); 268 268 if (!head) { ··· 392 382 rtwpci->irq_mask[3] = IMR_H2CDOK | 393 383 0; 394 384 spin_lock_init(&rtwpci->irq_lock); 385 + spin_lock_init(&rtwpci->hwirq_lock); 395 386 ret = rtw_pci_init_trx_ring(rtwdev); 396 387 397 388 return ret; ··· 415 404 dma = rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.dma; 416 405 rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.rp = 0; 417 406 rtwpci->tx_rings[RTW_TX_QUEUE_H2C].r.wp = 0; 418 - rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_H2CQ, len); 407 + rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_H2CQ, len & TRX_BD_IDX_MASK); 419 408 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_H2CQ, dma); 420 409 421 410 len = rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.len; 422 411 dma = rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.dma; 423 412 rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.rp = 0; 424 413 rtwpci->tx_rings[RTW_TX_QUEUE_BK].r.wp = 0; 425 - rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_BKQ, len); 414 + rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_BKQ, len & TRX_BD_IDX_MASK); 426 415 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_BKQ, dma); 427 416 428 417 len = rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.len; 429 418 dma = rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.dma; 430 419 rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.rp = 0; 431 420 rtwpci->tx_rings[RTW_TX_QUEUE_BE].r.wp = 0; 432 - rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_BEQ, len); 421 + rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_BEQ, len & TRX_BD_IDX_MASK); 433 422 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_BEQ, dma); 434 423 435 424 len = rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.len; 436 425 dma = rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.dma; 437 426 rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.rp = 0; 438 427 rtwpci->tx_rings[RTW_TX_QUEUE_VO].r.wp = 0; 439 - rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_VOQ, len); 428 + rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_VOQ, len & TRX_BD_IDX_MASK); 440 429 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_VOQ, dma); 441 430 442 431 len = rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.len; 443 432 dma = rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.dma; 444 433 rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.rp = 0; 445 434 rtwpci->tx_rings[RTW_TX_QUEUE_VI].r.wp = 0; 446 - rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_VIQ, len); 435 + rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_VIQ, len & TRX_BD_IDX_MASK); 447 436 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_VIQ, dma); 448 437 449 438 len = rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.len; 450 439 dma = rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.dma; 451 440 rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.rp = 0; 452 441 rtwpci->tx_rings[RTW_TX_QUEUE_MGMT].r.wp = 0; 453 - rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_MGMTQ, len); 442 + rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_MGMTQ, len & TRX_BD_IDX_MASK); 454 443 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_MGMTQ, dma); 455 444 456 445 len = rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.len; 457 446 dma = rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.dma; 458 447 rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.rp = 0; 459 448 rtwpci->tx_rings[RTW_TX_QUEUE_HI0].r.wp = 0; 460 - rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_HI0Q, len); 449 + rtw_write16(rtwdev, RTK_PCI_TXBD_NUM_HI0Q, len & TRX_BD_IDX_MASK); 461 450 rtw_write32(rtwdev, RTK_PCI_TXBD_DESA_HI0Q, dma); 462 451 463 452 len = rtwpci->rx_rings[RTW_RX_QUEUE_MPDU].r.len; 464 453 dma = rtwpci->rx_rings[RTW_RX_QUEUE_MPDU].r.dma; 465 454 rtwpci->rx_rings[RTW_RX_QUEUE_MPDU].r.rp = 0; 466 455 rtwpci->rx_rings[RTW_RX_QUEUE_MPDU].r.wp = 0; 467 - rtw_write16(rtwdev, RTK_PCI_RXBD_NUM_MPDUQ, len & 0xfff); 456 + rtw_write16(rtwdev, RTK_PCI_RXBD_NUM_MPDUQ, len & TRX_BD_IDX_MASK); 468 457 rtw_write32(rtwdev, RTK_PCI_RXBD_DESA_MPDUQ, dma); 469 458 470 459 /* reset read/write point */ ··· 483 472 static void rtw_pci_enable_interrupt(struct rtw_dev *rtwdev, 484 473 struct rtw_pci *rtwpci) 485 474 { 475 + unsigned long flags; 476 + 477 + spin_lock_irqsave(&rtwpci->hwirq_lock, flags); 478 + 486 479 rtw_write32(rtwdev, RTK_PCI_HIMR0, rtwpci->irq_mask[0]); 487 480 rtw_write32(rtwdev, RTK_PCI_HIMR1, rtwpci->irq_mask[1]); 488 481 rtw_write32(rtwdev, RTK_PCI_HIMR3, rtwpci->irq_mask[3]); 489 482 rtwpci->irq_enabled = true; 483 + 484 + spin_unlock_irqrestore(&rtwpci->hwirq_lock, flags); 490 485 } 491 486 492 487 static void rtw_pci_disable_interrupt(struct rtw_dev *rtwdev, 493 488 struct rtw_pci *rtwpci) 494 489 { 490 + unsigned long flags; 491 + 492 + spin_lock_irqsave(&rtwpci->hwirq_lock, flags); 493 + 494 + if (!rtwpci->irq_enabled) 495 + goto out; 496 + 495 497 rtw_write32(rtwdev, RTK_PCI_HIMR0, 0); 496 498 rtw_write32(rtwdev, RTK_PCI_HIMR1, 0); 497 499 rtw_write32(rtwdev, RTK_PCI_HIMR3, 0); 498 500 rtwpci->irq_enabled = false; 501 + 502 + out: 503 + spin_unlock_irqrestore(&rtwpci->hwirq_lock, flags); 499 504 } 500 505 501 506 static void rtw_pci_dma_reset(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci) ··· 547 520 static int rtw_pci_start(struct rtw_dev *rtwdev) 548 521 { 549 522 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; 550 - unsigned long flags; 551 523 552 - spin_lock_irqsave(&rtwpci->irq_lock, flags); 524 + spin_lock_bh(&rtwpci->irq_lock); 553 525 rtw_pci_enable_interrupt(rtwdev, rtwpci); 554 - spin_unlock_irqrestore(&rtwpci->irq_lock, flags); 526 + spin_unlock_bh(&rtwpci->irq_lock); 555 527 556 528 return 0; 557 529 } ··· 558 532 static void rtw_pci_stop(struct rtw_dev *rtwdev) 559 533 { 560 534 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; 561 - unsigned long flags; 562 535 563 - spin_lock_irqsave(&rtwpci->irq_lock, flags); 536 + spin_lock_bh(&rtwpci->irq_lock); 564 537 rtw_pci_disable_interrupt(rtwdev, rtwpci); 565 538 rtw_pci_dma_release(rtwdev, rtwpci); 566 - spin_unlock_irqrestore(&rtwpci->irq_lock, flags); 539 + spin_unlock_bh(&rtwpci->irq_lock); 567 540 } 568 541 569 542 static void rtw_pci_deep_ps_enter(struct rtw_dev *rtwdev) ··· 615 590 static void rtw_pci_deep_ps(struct rtw_dev *rtwdev, bool enter) 616 591 { 617 592 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; 618 - unsigned long flags; 619 593 620 - spin_lock_irqsave(&rtwpci->irq_lock, flags); 594 + spin_lock_bh(&rtwpci->irq_lock); 621 595 622 596 if (enter && !test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) 623 597 rtw_pci_deep_ps_enter(rtwdev); ··· 624 600 if (!enter && test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) 625 601 rtw_pci_deep_ps_leave(rtwdev); 626 602 627 - spin_unlock_irqrestore(&rtwpci->irq_lock, flags); 603 + spin_unlock_bh(&rtwpci->irq_lock); 628 604 } 629 605 630 606 static u8 ac_to_hwq[] = { ··· 691 667 rtwpci->rx_tag = (rtwpci->rx_tag + 1) % RX_TAG_MAX; 692 668 } 693 669 694 - static int rtw_pci_xmit(struct rtw_dev *rtwdev, 695 - struct rtw_tx_pkt_info *pkt_info, 696 - struct sk_buff *skb, u8 queue) 670 + static void rtw_pci_tx_kick_off_queue(struct rtw_dev *rtwdev, u8 queue) 671 + { 672 + struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; 673 + struct rtw_pci_tx_ring *ring; 674 + u32 bd_idx; 675 + 676 + ring = &rtwpci->tx_rings[queue]; 677 + bd_idx = rtw_pci_tx_queue_idx_addr[queue]; 678 + 679 + spin_lock_bh(&rtwpci->irq_lock); 680 + rtw_pci_deep_ps_leave(rtwdev); 681 + rtw_write16(rtwdev, bd_idx, ring->r.wp & TRX_BD_IDX_MASK); 682 + spin_unlock_bh(&rtwpci->irq_lock); 683 + } 684 + 685 + static void rtw_pci_tx_kick_off(struct rtw_dev *rtwdev) 686 + { 687 + struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; 688 + u8 queue; 689 + 690 + for (queue = 0; queue < RTK_MAX_TX_QUEUE_NUM; queue++) 691 + if (test_and_clear_bit(queue, rtwpci->tx_queued)) 692 + rtw_pci_tx_kick_off_queue(rtwdev, queue); 693 + } 694 + 695 + static int rtw_pci_tx_write_data(struct rtw_dev *rtwdev, 696 + struct rtw_tx_pkt_info *pkt_info, 697 + struct sk_buff *skb, u8 queue) 697 698 { 698 699 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; 699 700 struct rtw_chip_info *chip = rtwdev->chip; ··· 731 682 u32 psb_len; 732 683 u8 *pkt_desc; 733 684 struct rtw_pci_tx_buffer_desc *buf_desc; 734 - u32 bd_idx; 735 - unsigned long flags; 736 685 737 686 ring = &rtwpci->tx_rings[queue]; 738 687 ··· 767 720 tx_data->dma = dma; 768 721 tx_data->sn = pkt_info->sn; 769 722 770 - spin_lock_irqsave(&rtwpci->irq_lock, flags); 723 + spin_lock_bh(&rtwpci->irq_lock); 771 724 772 - rtw_pci_deep_ps_leave(rtwdev); 773 725 skb_queue_tail(&ring->queue, skb); 774 726 775 - /* kick off tx queue */ 776 - if (queue != RTW_TX_QUEUE_BCN) { 777 - if (++ring->r.wp >= ring->r.len) 778 - ring->r.wp = 0; 779 - bd_idx = rtw_pci_tx_queue_idx_addr[queue]; 780 - rtw_write16(rtwdev, bd_idx, ring->r.wp & 0xfff); 781 - } else { 782 - u32 reg_bcn_work; 727 + if (queue == RTW_TX_QUEUE_BCN) 728 + goto out_unlock; 783 729 784 - reg_bcn_work = rtw_read8(rtwdev, RTK_PCI_TXBD_BCN_WORK); 785 - reg_bcn_work |= BIT_PCI_BCNQ_FLAG; 786 - rtw_write8(rtwdev, RTK_PCI_TXBD_BCN_WORK, reg_bcn_work); 787 - } 788 - spin_unlock_irqrestore(&rtwpci->irq_lock, flags); 730 + /* update write-index, and kick it off later */ 731 + set_bit(queue, rtwpci->tx_queued); 732 + if (++ring->r.wp >= ring->r.len) 733 + ring->r.wp = 0; 734 + 735 + out_unlock: 736 + spin_unlock_bh(&rtwpci->irq_lock); 789 737 790 738 return 0; 791 739 } ··· 789 747 u32 size) 790 748 { 791 749 struct sk_buff *skb; 792 - struct rtw_tx_pkt_info pkt_info; 793 - u32 tx_pkt_desc_sz; 794 - u32 length; 750 + struct rtw_tx_pkt_info pkt_info = {0}; 751 + u8 reg_bcn_work; 752 + int ret; 795 753 796 - tx_pkt_desc_sz = rtwdev->chip->tx_pkt_desc_sz; 797 - length = size + tx_pkt_desc_sz; 798 - skb = dev_alloc_skb(length); 754 + skb = rtw_tx_write_data_rsvd_page_get(rtwdev, &pkt_info, buf, size); 799 755 if (!skb) 800 756 return -ENOMEM; 801 757 802 - skb_reserve(skb, tx_pkt_desc_sz); 803 - memcpy((u8 *)skb_put(skb, size), buf, size); 804 - memset(&pkt_info, 0, sizeof(pkt_info)); 805 - pkt_info.tx_pkt_size = size; 806 - pkt_info.offset = tx_pkt_desc_sz; 758 + ret = rtw_pci_tx_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_BCN); 759 + if (ret) { 760 + rtw_err(rtwdev, "failed to write rsvd page data\n"); 761 + return ret; 762 + } 807 763 808 - return rtw_pci_xmit(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_BCN); 764 + /* reserved pages go through beacon queue */ 765 + reg_bcn_work = rtw_read8(rtwdev, RTK_PCI_TXBD_BCN_WORK); 766 + reg_bcn_work |= BIT_PCI_BCNQ_FLAG; 767 + rtw_write8(rtwdev, RTK_PCI_TXBD_BCN_WORK, reg_bcn_work); 768 + 769 + return 0; 809 770 } 810 771 811 772 static int rtw_pci_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size) 812 773 { 813 774 struct sk_buff *skb; 814 - struct rtw_tx_pkt_info pkt_info; 815 - u32 tx_pkt_desc_sz; 816 - u32 length; 775 + struct rtw_tx_pkt_info pkt_info = {0}; 776 + int ret; 817 777 818 - tx_pkt_desc_sz = rtwdev->chip->tx_pkt_desc_sz; 819 - length = size + tx_pkt_desc_sz; 820 - skb = dev_alloc_skb(length); 778 + skb = rtw_tx_write_data_h2c_get(rtwdev, &pkt_info, buf, size); 821 779 if (!skb) 822 780 return -ENOMEM; 823 781 824 - skb_reserve(skb, tx_pkt_desc_sz); 825 - memcpy((u8 *)skb_put(skb, size), buf, size); 826 - memset(&pkt_info, 0, sizeof(pkt_info)); 827 - pkt_info.tx_pkt_size = size; 782 + ret = rtw_pci_tx_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_H2C); 783 + if (ret) { 784 + rtw_err(rtwdev, "failed to write h2c data\n"); 785 + return ret; 786 + } 828 787 829 - return rtw_pci_xmit(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_H2C); 788 + rtw_pci_tx_kick_off_queue(rtwdev, RTW_TX_QUEUE_H2C); 789 + 790 + return 0; 830 791 } 831 792 832 - static int rtw_pci_tx(struct rtw_dev *rtwdev, 833 - struct rtw_tx_pkt_info *pkt_info, 834 - struct sk_buff *skb) 793 + static int rtw_pci_tx_write(struct rtw_dev *rtwdev, 794 + struct rtw_tx_pkt_info *pkt_info, 795 + struct sk_buff *skb) 835 796 { 836 797 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; 837 798 struct rtw_pci_tx_ring *ring; 838 799 u8 queue = rtw_hw_queue_mapping(skb); 839 800 int ret; 840 801 841 - ret = rtw_pci_xmit(rtwdev, pkt_info, skb, queue); 802 + ret = rtw_pci_tx_write_data(rtwdev, pkt_info, skb, queue); 842 803 if (ret) 843 804 return ret; 844 805 ··· 872 827 bd_idx_addr = rtw_pci_tx_queue_idx_addr[hw_queue]; 873 828 bd_idx = rtw_read32(rtwdev, bd_idx_addr); 874 829 cur_rp = bd_idx >> 16; 875 - cur_rp &= 0xfff; 830 + cur_rp &= TRX_BD_IDX_MASK; 876 831 if (cur_rp >= ring->r.rp) 877 832 count = cur_rp - ring->r.rp; 878 833 else ··· 946 901 947 902 tmp = rtw_read32(rtwdev, RTK_PCI_RXBD_IDX_MPDUQ); 948 903 cur_wp = tmp >> 16; 949 - cur_wp &= 0xfff; 904 + cur_wp &= TRX_BD_IDX_MASK; 950 905 if (cur_wp >= ring->r.wp) 951 906 count = cur_wp - ring->r.wp; 952 907 else ··· 1006 961 static void rtw_pci_irq_recognized(struct rtw_dev *rtwdev, 1007 962 struct rtw_pci *rtwpci, u32 *irq_status) 1008 963 { 964 + unsigned long flags; 965 + 966 + spin_lock_irqsave(&rtwpci->hwirq_lock, flags); 967 + 1009 968 irq_status[0] = rtw_read32(rtwdev, RTK_PCI_HISR0); 1010 969 irq_status[1] = rtw_read32(rtwdev, RTK_PCI_HISR1); 1011 970 irq_status[3] = rtw_read32(rtwdev, RTK_PCI_HISR3); ··· 1019 970 rtw_write32(rtwdev, RTK_PCI_HISR0, irq_status[0]); 1020 971 rtw_write32(rtwdev, RTK_PCI_HISR1, irq_status[1]); 1021 972 rtw_write32(rtwdev, RTK_PCI_HISR3, irq_status[3]); 973 + 974 + spin_unlock_irqrestore(&rtwpci->hwirq_lock, flags); 1022 975 } 1023 976 1024 977 static irqreturn_t rtw_pci_interrupt_handler(int irq, void *dev) 1025 978 { 1026 979 struct rtw_dev *rtwdev = dev; 1027 980 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; 1028 - 1029 - spin_lock(&rtwpci->irq_lock); 1030 - if (!rtwpci->irq_enabled) 1031 - goto out; 1032 981 1033 982 /* disable RTW PCI interrupt to avoid more interrupts before the end of 1034 983 * thread function ··· 1037 990 * a new HISR flag is set. 1038 991 */ 1039 992 rtw_pci_disable_interrupt(rtwdev, rtwpci); 1040 - out: 1041 - spin_unlock(&rtwpci->irq_lock); 1042 993 1043 994 return IRQ_WAKE_THREAD; 1044 995 } ··· 1045 1000 { 1046 1001 struct rtw_dev *rtwdev = dev; 1047 1002 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; 1048 - unsigned long flags; 1049 1003 u32 irq_status[4]; 1050 1004 1051 - spin_lock_irqsave(&rtwpci->irq_lock, flags); 1005 + spin_lock_bh(&rtwpci->irq_lock); 1052 1006 rtw_pci_irq_recognized(rtwdev, rtwpci, irq_status); 1053 1007 1054 1008 if (irq_status[0] & IMR_MGNTDOK) ··· 1069 1025 1070 1026 /* all of the jobs for this interrupt have been done */ 1071 1027 rtw_pci_enable_interrupt(rtwdev, rtwpci); 1072 - spin_unlock_irqrestore(&rtwpci->irq_lock, flags); 1028 + spin_unlock_bh(&rtwpci->irq_lock); 1073 1029 1074 1030 return IRQ_HANDLED; 1075 1031 } ··· 1415 1371 } 1416 1372 1417 1373 static struct rtw_hci_ops rtw_pci_ops = { 1418 - .tx = rtw_pci_tx, 1374 + .tx_write = rtw_pci_tx_write, 1375 + .tx_kick_off = rtw_pci_tx_kick_off, 1419 1376 .setup = rtw_pci_setup, 1420 1377 .start = rtw_pci_start, 1421 1378 .stop = rtw_pci_stop,
+6 -1
drivers/net/wireless/realtek/rtw88/pci.h
··· 52 52 #define RTK_PCI_TXBD_DESA_HI0Q 0x340 53 53 #define RTK_PCI_RXBD_DESA_MPDUQ 0x338 54 54 55 + #define TRX_BD_IDX_MASK GENMASK(11, 0) 56 + 55 57 /* BCNQ is specialized for rsvd page, does not need to specify a number */ 56 58 #define RTK_PCI_TXBD_NUM_H2CQ 0x1328 57 59 #define RTK_PCI_TXBD_NUM_MGMTQ 0x380 ··· 200 198 struct rtw_pci { 201 199 struct pci_dev *pdev; 202 200 203 - /* used for pci interrupt */ 201 + /* Used for PCI interrupt. */ 202 + spinlock_t hwirq_lock; 203 + /* Used for PCI TX queueing. */ 204 204 spinlock_t irq_lock; 205 205 u32 irq_mask[4]; 206 206 bool irq_enabled; 207 207 208 208 u16 rx_tag; 209 + DECLARE_BITMAP(tx_queued, RTK_MAX_TX_QUEUE_NUM); 209 210 struct rtw_pci_tx_ring tx_rings[RTK_MAX_TX_QUEUE_NUM]; 210 211 struct rtw_pci_rx_ring rx_rings[RTK_MAX_RX_QUEUE_NUM]; 211 212 u16 link_ctrl;
+1 -1
drivers/net/wireless/realtek/rtw88/rtw8822c.c
··· 4128 4128 .agc_tbl = &rtw8822c_agc_tbl, 4129 4129 .bb_tbl = &rtw8822c_bb_tbl, 4130 4130 .rfk_init_tbl = &rtw8822c_array_mp_cal_init_tbl, 4131 - .rf_tbl = {&rtw8822c_rf_a_tbl, &rtw8822c_rf_b_tbl}, 4131 + .rf_tbl = {&rtw8822c_rf_b_tbl, &rtw8822c_rf_a_tbl}, 4132 4132 .rfe_defs = rtw8822c_rfe_defs, 4133 4133 .rfe_defs_size = ARRAY_SIZE(rtw8822c_rfe_defs), 4134 4134 .en_dis_dpd = true,
+108 -23
drivers/net/wireless/realtek/rtw88/tx.c
··· 6 6 #include "tx.h" 7 7 #include "fw.h" 8 8 #include "ps.h" 9 + #include "debug.h" 9 10 10 11 static 11 12 void rtw_tx_stats(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, ··· 221 220 222 221 static void rtw_tx_mgmt_pkt_info_update(struct rtw_dev *rtwdev, 223 222 struct rtw_tx_pkt_info *pkt_info, 224 - struct ieee80211_tx_control *control, 223 + struct ieee80211_sta *sta, 225 224 struct sk_buff *skb) 226 225 { 227 226 pkt_info->use_rate = true; ··· 231 230 232 231 static void rtw_tx_data_pkt_info_update(struct rtw_dev *rtwdev, 233 232 struct rtw_tx_pkt_info *pkt_info, 234 - struct ieee80211_tx_control *control, 233 + struct ieee80211_sta *sta, 235 234 struct sk_buff *skb) 236 235 { 237 - struct ieee80211_sta *sta = control->sta; 238 236 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 239 237 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 240 238 struct rtw_sta_info *si; ··· 292 292 293 293 void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev, 294 294 struct rtw_tx_pkt_info *pkt_info, 295 - struct ieee80211_tx_control *control, 295 + struct ieee80211_sta *sta, 296 296 struct sk_buff *skb) 297 297 { 298 298 struct rtw_chip_info *chip = rtwdev->chip; ··· 304 304 u8 sec_type = 0; 305 305 bool bmc; 306 306 307 - if (control->sta) { 308 - si = (struct rtw_sta_info *)control->sta->drv_priv; 307 + if (sta) { 308 + si = (struct rtw_sta_info *)sta->drv_priv; 309 309 vif = si->vif; 310 310 } 311 311 312 312 if (ieee80211_is_mgmt(fc) || ieee80211_is_nullfunc(fc)) 313 - rtw_tx_mgmt_pkt_info_update(rtwdev, pkt_info, control, skb); 313 + rtw_tx_mgmt_pkt_info_update(rtwdev, pkt_info, sta, skb); 314 314 else if (ieee80211_is_data(fc)) 315 - rtw_tx_data_pkt_info_update(rtwdev, pkt_info, control, skb); 315 + rtw_tx_data_pkt_info_update(rtwdev, pkt_info, sta, skb); 316 316 317 317 if (info->control.hw_key) { 318 318 struct ieee80211_key_conf *key = info->control.hw_key; ··· 368 368 pkt_info->ls = true; 369 369 } 370 370 371 + struct sk_buff * 372 + rtw_tx_write_data_rsvd_page_get(struct rtw_dev *rtwdev, 373 + struct rtw_tx_pkt_info *pkt_info, 374 + u8 *buf, u32 size) 375 + { 376 + struct rtw_chip_info *chip = rtwdev->chip; 377 + struct sk_buff *skb; 378 + u32 tx_pkt_desc_sz; 379 + u32 length; 380 + 381 + tx_pkt_desc_sz = chip->tx_pkt_desc_sz; 382 + length = size + tx_pkt_desc_sz; 383 + skb = dev_alloc_skb(length); 384 + if (!skb) { 385 + rtw_err(rtwdev, "failed to alloc write data rsvd page skb\n"); 386 + return NULL; 387 + } 388 + 389 + skb_reserve(skb, tx_pkt_desc_sz); 390 + skb_put_data(skb, buf, size); 391 + pkt_info->tx_pkt_size = size; 392 + pkt_info->offset = tx_pkt_desc_sz; 393 + 394 + return skb; 395 + } 396 + EXPORT_SYMBOL(rtw_tx_write_data_rsvd_page_get); 397 + 398 + struct sk_buff * 399 + rtw_tx_write_data_h2c_get(struct rtw_dev *rtwdev, 400 + struct rtw_tx_pkt_info *pkt_info, 401 + u8 *buf, u32 size) 402 + { 403 + struct rtw_chip_info *chip = rtwdev->chip; 404 + struct sk_buff *skb; 405 + u32 tx_pkt_desc_sz; 406 + u32 length; 407 + 408 + tx_pkt_desc_sz = chip->tx_pkt_desc_sz; 409 + length = size + tx_pkt_desc_sz; 410 + skb = dev_alloc_skb(length); 411 + if (!skb) { 412 + rtw_err(rtwdev, "failed to alloc write data h2c skb\n"); 413 + return NULL; 414 + } 415 + 416 + skb_reserve(skb, tx_pkt_desc_sz); 417 + skb_put_data(skb, buf, size); 418 + pkt_info->tx_pkt_size = size; 419 + 420 + return skb; 421 + } 422 + EXPORT_SYMBOL(rtw_tx_write_data_h2c_get); 423 + 371 424 void rtw_tx(struct rtw_dev *rtwdev, 372 425 struct ieee80211_tx_control *control, 373 426 struct sk_buff *skb) 374 427 { 375 428 struct rtw_tx_pkt_info pkt_info = {0}; 429 + int ret; 376 430 377 - rtw_tx_pkt_info_update(rtwdev, &pkt_info, control, skb); 378 - if (rtw_hci_tx(rtwdev, &pkt_info, skb)) 431 + rtw_tx_pkt_info_update(rtwdev, &pkt_info, control->sta, skb); 432 + ret = rtw_hci_tx_write(rtwdev, &pkt_info, skb); 433 + if (ret) { 434 + rtw_err(rtwdev, "failed to write TX skb to HCI\n"); 379 435 goto out; 436 + } 437 + 438 + rtw_hci_tx_kick_off(rtwdev); 380 439 381 440 return; 382 441 ··· 475 416 ieee80211_queue_work(rtwdev->hw, &rtwdev->ba_work); 476 417 } 477 418 478 - static bool rtw_txq_dequeue(struct rtw_dev *rtwdev, 479 - struct rtw_txq *rtwtxq) 419 + static int rtw_txq_push_skb(struct rtw_dev *rtwdev, 420 + struct rtw_txq *rtwtxq, 421 + struct sk_buff *skb) 480 422 { 481 423 struct ieee80211_txq *txq = rtwtxq_to_txq(rtwtxq); 482 - struct ieee80211_tx_control control; 424 + struct rtw_tx_pkt_info pkt_info = {0}; 425 + int ret; 426 + 427 + rtw_txq_check_agg(rtwdev, rtwtxq, skb); 428 + 429 + rtw_tx_pkt_info_update(rtwdev, &pkt_info, txq->sta, skb); 430 + ret = rtw_hci_tx_write(rtwdev, &pkt_info, skb); 431 + if (ret) { 432 + rtw_err(rtwdev, "failed to write TX skb to HCI\n"); 433 + return ret; 434 + } 435 + rtwtxq->last_push = jiffies; 436 + 437 + return 0; 438 + } 439 + 440 + static struct sk_buff *rtw_txq_dequeue(struct rtw_dev *rtwdev, 441 + struct rtw_txq *rtwtxq) 442 + { 443 + struct ieee80211_txq *txq = rtwtxq_to_txq(rtwtxq); 483 444 struct sk_buff *skb; 484 445 485 446 skb = ieee80211_tx_dequeue(rtwdev->hw, txq); 486 447 if (!skb) 487 - return false; 448 + return NULL; 488 449 489 - rtw_txq_check_agg(rtwdev, rtwtxq, skb); 490 - 491 - control.sta = txq->sta; 492 - rtw_tx(rtwdev, &control, skb); 493 - rtwtxq->last_push = jiffies; 494 - 495 - return true; 450 + return skb; 496 451 } 497 452 498 453 static void rtw_txq_push(struct rtw_dev *rtwdev, 499 454 struct rtw_txq *rtwtxq, 500 455 unsigned long frames) 501 456 { 457 + struct sk_buff *skb; 458 + int ret; 502 459 int i; 503 460 504 461 rcu_read_lock(); 505 462 506 - for (i = 0; i < frames; i++) 507 - if (!rtw_txq_dequeue(rtwdev, rtwtxq)) 463 + for (i = 0; i < frames; i++) { 464 + skb = rtw_txq_dequeue(rtwdev, rtwtxq); 465 + if (!skb) 508 466 break; 467 + 468 + ret = rtw_txq_push_skb(rtwdev, rtwtxq, skb); 469 + if (ret) { 470 + rtw_err(rtwdev, "failed to pusk skb, ret %d\n", ret); 471 + break; 472 + } 473 + } 509 474 510 475 rcu_read_unlock(); 511 476 } ··· 551 468 552 469 list_del_init(&rtwtxq->list); 553 470 } 471 + 472 + rtw_hci_tx_kick_off(rtwdev); 554 473 555 474 spin_unlock_bh(&rtwdev->txq_lock); 556 475 }
+9 -1
drivers/net/wireless/realtek/rtw88/tx.h
··· 85 85 void rtw_tx_tasklet(unsigned long data); 86 86 void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev, 87 87 struct rtw_tx_pkt_info *pkt_info, 88 - struct ieee80211_tx_control *control, 88 + struct ieee80211_sta *sta, 89 89 struct sk_buff *skb); 90 90 void rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb); 91 91 void rtw_tx_report_enqueue(struct rtw_dev *rtwdev, struct sk_buff *skb, u8 sn); ··· 93 93 void rtw_rsvd_page_pkt_info_update(struct rtw_dev *rtwdev, 94 94 struct rtw_tx_pkt_info *pkt_info, 95 95 struct sk_buff *skb); 96 + struct sk_buff * 97 + rtw_tx_write_data_rsvd_page_get(struct rtw_dev *rtwdev, 98 + struct rtw_tx_pkt_info *pkt_info, 99 + u8 *buf, u32 size); 100 + struct sk_buff * 101 + rtw_tx_write_data_h2c_get(struct rtw_dev *rtwdev, 102 + struct rtw_tx_pkt_info *pkt_info, 103 + u8 *buf, u32 size); 96 104 97 105 #endif
+14 -25
drivers/net/wireless/realtek/rtw88/wow.c
··· 431 431 rtw_iterate_stas_atomic(rtwdev, rtw_wow_fw_media_status_iter, &data); 432 432 } 433 433 434 - static void rtw_wow_config_pno_rsvd_page(struct rtw_dev *rtwdev) 434 + static void rtw_wow_config_pno_rsvd_page(struct rtw_dev *rtwdev, 435 + struct rtw_vif *rtwvif) 435 436 { 436 - struct rtw_wow_param *rtw_wow = &rtwdev->wow; 437 - struct rtw_pno_request *rtw_pno_req = &rtw_wow->pno_req; 438 - struct cfg80211_ssid *ssid; 439 - int i; 440 - 441 - for (i = 0 ; i < rtw_pno_req->match_set_cnt; i++) { 442 - ssid = &rtw_pno_req->match_sets[i].ssid; 443 - rtw_add_rsvd_page_probe_req(rtwdev, ssid); 444 - } 445 - rtw_add_rsvd_page_probe_req(rtwdev, NULL); 446 - rtw_add_rsvd_page(rtwdev, RSVD_NLO_INFO, false); 447 - rtw_add_rsvd_page(rtwdev, RSVD_CH_INFO, true); 437 + rtw_add_rsvd_page_pno(rtwdev, rtwvif); 448 438 } 449 439 450 - static void rtw_wow_config_linked_rsvd_page(struct rtw_dev *rtwdev) 440 + static void rtw_wow_config_linked_rsvd_page(struct rtw_dev *rtwdev, 441 + struct rtw_vif *rtwvif) 451 442 { 452 - rtw_add_rsvd_page(rtwdev, RSVD_PS_POLL, true); 453 - rtw_add_rsvd_page(rtwdev, RSVD_QOS_NULL, true); 454 - rtw_add_rsvd_page(rtwdev, RSVD_NULL, true); 455 - rtw_add_rsvd_page(rtwdev, RSVD_LPS_PG_DPK, true); 456 - rtw_add_rsvd_page(rtwdev, RSVD_LPS_PG_INFO, true); 443 + rtw_add_rsvd_page_sta(rtwdev, rtwvif); 457 444 } 458 445 459 - static void rtw_wow_config_rsvd_page(struct rtw_dev *rtwdev) 446 + static void rtw_wow_config_rsvd_page(struct rtw_dev *rtwdev, 447 + struct rtw_vif *rtwvif) 460 448 { 461 - rtw_reset_rsvd_page(rtwdev); 449 + rtw_remove_rsvd_page(rtwdev, rtwvif); 462 450 463 451 if (rtw_wow_mgd_linked(rtwdev)) { 464 - rtw_wow_config_linked_rsvd_page(rtwdev); 452 + rtw_wow_config_linked_rsvd_page(rtwdev, rtwvif); 465 453 } else if (test_bit(RTW_FLAG_WOWLAN, rtwdev->flags) && 466 454 rtw_wow_no_link(rtwdev)) { 467 - rtw_wow_config_pno_rsvd_page(rtwdev); 455 + rtw_wow_config_pno_rsvd_page(rtwdev, rtwvif); 468 456 } 469 457 } 470 458 471 459 static int rtw_wow_dl_fw_rsvd_page(struct rtw_dev *rtwdev) 472 460 { 473 461 struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; 462 + struct rtw_vif *rtwvif = (struct rtw_vif *)wow_vif->drv_priv; 474 463 475 - rtw_wow_config_rsvd_page(rtwdev); 464 + rtw_wow_config_rsvd_page(rtwdev, rtwvif); 476 465 477 - return rtw_fw_download_rsvd_page(rtwdev, wow_vif); 466 + return rtw_fw_download_rsvd_page(rtwdev); 478 467 } 479 468 480 469 static int rtw_wow_swap_fw(struct rtw_dev *rtwdev, enum rtw_fw_type type)
+1 -1
drivers/net/wireless/st/cw1200/wsm.h
··· 1623 1623 u8 local_devname[D11_MAX_SSID_LEN]; 1624 1624 u8 reserved2[3]; 1625 1625 u8 num_secdev_supported; 1626 - struct wsm_p2p_device_type secdevs[0]; 1626 + struct wsm_p2p_device_type secdevs[]; 1627 1627 } __packed; 1628 1628 1629 1629 /* 4.36 SetWCDMABand - WO */
+2 -2
drivers/net/wireless/ti/wl1251/cmd.h
··· 90 90 u16 id; 91 91 u16 status; 92 92 /* payload */ 93 - u8 data[0]; 93 + u8 data[]; 94 94 } __packed; 95 95 96 96 struct wl1251_command { ··· 281 281 struct wl1251_cmd_header header; 282 282 283 283 __le16 size; 284 - u8 data[0]; 284 + u8 data[]; 285 285 } __packed; 286 286 287 287 #define TIM_ELE_ID 5
+1 -1
drivers/net/wireless/ti/wl1251/wl12xx_80211.h
··· 65 65 u8 sa[ETH_ALEN]; 66 66 u8 bssid[ETH_ALEN]; 67 67 __le16 seq_ctl; 68 - u8 payload[0]; 68 + u8 payload[]; 69 69 } __packed; 70 70 71 71 struct wl12xx_ie_header {
+1 -1
drivers/net/wireless/ti/wlcore/acx.h
··· 938 938 u8 action; 939 939 940 940 u8 num_fields; 941 - u8 fields[0]; 941 + u8 fields[]; 942 942 } __packed; 943 943 944 944 struct acx_roaming_stats {
+1 -1
drivers/net/wireless/ti/wlcore/boot.h
··· 26 26 u8 fw_version[WL1271_FW_VERSION_MAX_LEN]; 27 27 u32 hw_version; 28 28 u8 tx_power_table[WL1271_NO_SUBBANDS][WL1271_NO_POWER_LEVELS]; 29 - u8 priv[0]; 29 + u8 priv[]; 30 30 }; 31 31 32 32 /* number of times we try to read the INIT interrupt */
+1 -1
drivers/net/wireless/ti/wlcore/cmd.h
··· 209 209 __le16 id; 210 210 __le16 status; 211 211 /* payload */ 212 - u8 data[0]; 212 + u8 data[]; 213 213 } __packed; 214 214 215 215 #define WL1271_CMD_MAX_PARAMS 572
+1 -1
drivers/net/wireless/ti/wlcore/conf.h
··· 1150 1150 struct wlcore_conf_file { 1151 1151 struct wlcore_conf_header header; 1152 1152 struct wlcore_conf core; 1153 - u8 priv[0]; 1153 + u8 priv[]; 1154 1154 } __packed; 1155 1155 1156 1156 #endif
+1 -1
drivers/net/wireless/ti/wlcore/wl12xx_80211.h
··· 66 66 u8 sa[ETH_ALEN]; 67 67 u8 bssid[ETH_ALEN]; 68 68 __le16 seq_ctl; 69 - u8 payload[0]; 69 + u8 payload[]; 70 70 } __packed; 71 71 72 72 struct wl12xx_ie_header {
+1 -1
drivers/net/wireless/wl3501.h
··· 231 231 u8 id; /* one of enum iw_mgmt_info_element_ids, 232 232 but sizeof(enum) > sizeof(u8) :-( */ 233 233 u8 len; 234 - u8 data[0]; 234 + u8 data[]; 235 235 } __packed; 236 236 237 237 struct iw_mgmt_essid_pset {
+4 -4
drivers/net/wireless/zydas/zd1211rw/zd_usb.h
··· 69 69 70 70 struct usb_req_read_regs { 71 71 __le16 id; 72 - __le16 addr[0]; 72 + __le16 addr[]; 73 73 } __packed; 74 74 75 75 struct reg_data { ··· 79 79 80 80 struct usb_req_write_regs { 81 81 __le16 id; 82 - struct reg_data reg_writes[0]; 82 + struct reg_data reg_writes[]; 83 83 } __packed; 84 84 85 85 enum { ··· 95 95 /* 2: other (default) */ 96 96 __le16 bits; 97 97 /* RF2595: 24 */ 98 - __le16 bit_values[0]; 98 + __le16 bit_values[]; 99 99 /* (ZD_CR203 & ~(RF_IF_LE | RF_CLK | RF_DATA)) | (bit ? RF_DATA : 0) */ 100 100 } __packed; 101 101 ··· 118 118 119 119 struct usb_int_regs { 120 120 struct usb_int_header hdr; 121 - struct reg_data regs[0]; 121 + struct reg_data regs[]; 122 122 } __packed; 123 123 124 124 struct usb_int_retry_fail {
+2 -2
drivers/ssb/sprom.c
··· 26 26 int i, pos = 0; 27 27 28 28 for (i = 0; i < sprom_size_words; i++) 29 - pos += snprintf(buf + pos, buf_len - pos - 1, 29 + pos += scnprintf(buf + pos, buf_len - pos - 1, 30 30 "%04X", swab16(sprom[i]) & 0xFFFF); 31 - pos += snprintf(buf + pos, buf_len - pos - 1, "\n"); 31 + pos += scnprintf(buf + pos, buf_len - pos - 1, "\n"); 32 32 33 33 return pos + 1; 34 34 }