Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

phy: qcom: qmp: Add qmp configuration for QCS8300

Add qmp configuration for QCS8300. It is similar to SA8775P and
SC8280XP except for some Lane configuration settings specific to
QCS8300.

Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241009195348.2649368-5-quic_kriskura@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Krishna Kurapati and committed by
Vinod Koul
5ee213bd c2b17420

+65
+65
drivers/phy/qualcomm/phy-qcom-qmp-usb.c
··· 871 871 QMP_PHY_INIT_CFG(QPHY_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00), 872 872 }; 873 873 874 + static const struct qmp_phy_init_tbl qcs8300_usb3_uniphy_tx_tbl[] = { 875 + QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_1, 0xa5), 876 + QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_2, 0xf2), 877 + QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_3, 0x3f), 878 + QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_4, 0x3f), 879 + QMP_PHY_INIT_CFG(QSERDES_V5_TX_PI_QEC_CTRL, 0x21), 880 + QMP_PHY_INIT_CFG(QSERDES_V5_TX_RES_CODE_LANE_OFFSET_TX, 0x10), 881 + QMP_PHY_INIT_CFG(QSERDES_V5_TX_RES_CODE_LANE_OFFSET_RX, 0x0e), 882 + }; 883 + 874 884 static const struct qmp_phy_init_tbl sm8350_usb3_uniphy_tx_tbl[] = { 875 885 QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_1, 0xa5), 876 886 QMP_PHY_INIT_CFG(QSERDES_V5_TX_LANE_MODE_2, 0x82), ··· 997 987 QMP_PHY_INIT_CFG(QSERDES_V5_TX_PI_QEC_CTRL, 0x21), 998 988 QMP_PHY_INIT_CFG(QSERDES_V5_TX_RES_CODE_LANE_OFFSET_TX, 0x10), 999 989 QMP_PHY_INIT_CFG(QSERDES_V5_TX_RES_CODE_LANE_OFFSET_RX, 0x0e), 990 + }; 991 + 992 + static const struct qmp_phy_init_tbl qcs8300_usb3_uniphy_rx_tbl[] = { 993 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH4, 0xec), 994 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH3, 0xbd), 995 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH2, 0x7f), 996 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH, 0x3f), 997 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_LOW, 0x3f), 998 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH4, 0xa9), 999 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH3, 0x7b), 1000 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH2, 0xe4), 1001 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_HIGH, 0x24), 1002 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_01_LOW, 0x64), 1003 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_PI_CONTROLS, 0x99), 1004 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_SB2_THRESH1, 0x08), 1005 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_SB2_THRESH2, 0x08), 1006 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_SB2_GAIN1, 0x00), 1007 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_SB2_GAIN2, 0x04), 1008 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FASTLOCK_FO_GAIN, 0x2f), 1009 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FASTLOCK_COUNT_LOW, 0xff), 1010 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FASTLOCK_COUNT_HIGH, 0x0f), 1011 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_FO_GAIN, 0x09), 1012 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_VGA_CAL_CNTRL1, 0x54), 1013 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_VGA_CAL_CNTRL2, 0x0f), 1014 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0f), 1015 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQU_ADAPTOR_CNTRL4, 0x0a), 1016 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x47), 1017 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_OFFSET_ADAPTOR_CNTRL2, 0x80), 1018 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_SIGDET_CNTRL, 0x04), 1019 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_SIGDET_DEGLITCH_CNTRL, 0x0e), 1020 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_DFE_CTLE_POST_CAL_OFFSET, 0x38), 1021 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_SO_GAIN, 0x06), 1022 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_GM_CAL, 0x19), 1023 + QMP_PHY_INIT_CFG(QSERDES_V5_RX_SIGDET_ENABLES, 0x00), 1000 1024 }; 1001 1025 1002 1026 static const struct qmp_phy_init_tbl sc8280xp_usb3_uniphy_rx_tbl[] = { ··· 1497 1453 .tx_tbl_num = ARRAY_SIZE(sc8280xp_usb3_uniphy_tx_tbl), 1498 1454 .rx_tbl = sc8280xp_usb3_uniphy_rx_tbl, 1499 1455 .rx_tbl_num = ARRAY_SIZE(sc8280xp_usb3_uniphy_rx_tbl), 1456 + .pcs_tbl = sa8775p_usb3_uniphy_pcs_tbl, 1457 + .pcs_tbl_num = ARRAY_SIZE(sa8775p_usb3_uniphy_pcs_tbl), 1458 + .pcs_usb_tbl = sa8775p_usb3_uniphy_pcs_usb_tbl, 1459 + .pcs_usb_tbl_num = ARRAY_SIZE(sa8775p_usb3_uniphy_pcs_usb_tbl), 1460 + .vreg_list = qmp_phy_vreg_l, 1461 + .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l), 1462 + .regs = qmp_v5_usb3phy_regs_layout, 1463 + }; 1464 + 1465 + static const struct qmp_phy_cfg qcs8300_usb3_uniphy_cfg = { 1466 + .offsets = &qmp_usb_offsets_v5, 1467 + 1468 + .serdes_tbl = sc8280xp_usb3_uniphy_serdes_tbl, 1469 + .serdes_tbl_num = ARRAY_SIZE(sc8280xp_usb3_uniphy_serdes_tbl), 1470 + .tx_tbl = qcs8300_usb3_uniphy_tx_tbl, 1471 + .tx_tbl_num = ARRAY_SIZE(qcs8300_usb3_uniphy_tx_tbl), 1472 + .rx_tbl = qcs8300_usb3_uniphy_rx_tbl, 1473 + .rx_tbl_num = ARRAY_SIZE(qcs8300_usb3_uniphy_rx_tbl), 1500 1474 .pcs_tbl = sa8775p_usb3_uniphy_pcs_tbl, 1501 1475 .pcs_tbl_num = ARRAY_SIZE(sa8775p_usb3_uniphy_pcs_tbl), 1502 1476 .pcs_usb_tbl = sa8775p_usb3_uniphy_pcs_usb_tbl, ··· 2308 2246 }, { 2309 2247 .compatible = "qcom,msm8996-qmp-usb3-phy", 2310 2248 .data = &msm8996_usb3phy_cfg, 2249 + }, { 2250 + .compatible = "qcom,qcs8300-qmp-usb3-uni-phy", 2251 + .data = &qcs8300_usb3_uniphy_cfg, 2311 2252 }, { 2312 2253 .compatible = "qcom,qdu1000-qmp-usb3-uni-phy", 2313 2254 .data = &qdu1000_usb3_uniphy_cfg,