Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP

[Why]
It is confusing to sinks if we send VSC SDP only on some format. Today we
signal colorimetry format using MSA while in formats like sRGB.
But when we switch to BT2020 we set the bit to ignore MSA colorimetry and
instead use the colorimetry information in the VSC SDP.

But if sink supports signaling of colorimetry via VSC SDP we should always
set the MSA MISC1 bit 6, instead of doing so selectively.

[How]
If sink supports signaling of colorimetry via VSC SDP, and we are sending
the colorimetry info via VSC SDP with packet revision 05h, then always
set MSA MISC1 bit 6.

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Anthony Koo and committed by
Alex Deucher
5ed78cd6 a5132f97

+57 -17
+3 -1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
··· 4022 4022 struct dmcu *dmcu = core_dc->res_pool->dmcu; 4023 4023 4024 4024 stream->psr_version = dmcu->dmcu_version.psr_version; 4025 - mod_build_vsc_infopacket(stream, &stream->vsc_infopacket); 4025 + mod_build_vsc_infopacket(stream, 4026 + &stream->vsc_infopacket, 4027 + &stream->use_vsc_sdp_for_colorimetry); 4026 4028 } 4027 4029 } 4028 4030 finish:
+1
drivers/gpu/drm/amd/display/dc/core/dc_link.c
··· 2946 2946 pipe_ctx->stream_res.stream_enc, 2947 2947 &stream->timing, 2948 2948 stream->output_color_space, 2949 + stream->use_vsc_sdp_for_colorimetry, 2949 2950 stream->link->dpcd_caps.dprx_feature.bits.SST_SPLIT_SDP_CAP); 2950 2951 2951 2952 if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal))
+1
drivers/gpu/drm/amd/display/dc/dc_stream.h
··· 164 164 165 165 enum view_3d_format view_format; 166 166 167 + bool use_vsc_sdp_for_colorimetry; 167 168 bool ignore_msa_timing_param; 168 169 bool converter_disable_audio; 169 170 uint8_t qs_bit;
+1
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
··· 275 275 struct stream_encoder *enc, 276 276 struct dc_crtc_timing *crtc_timing, 277 277 enum dc_color_space output_color_space, 278 + bool use_vsc_sdp_for_colorimetry, 278 279 uint32_t enable_sdp_splitting) 279 280 { 280 281 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
+2 -4
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
··· 247 247 struct stream_encoder *enc, 248 248 struct dc_crtc_timing *crtc_timing, 249 249 enum dc_color_space output_color_space, 250 + bool use_vsc_sdp_for_colorimetry, 250 251 uint32_t enable_sdp_splitting) 251 252 { 252 253 uint32_t h_active_start; ··· 313 312 * Pixel Encoding/Colorimetry Format and that a Sink device shall ignore MISC1, bit 7, 314 313 * and MISC0, bits 7:1 (MISC1, bit 7, and MISC0, bits 7:1, become "don't care"). 315 314 */ 316 - if ((hw_crtc_timing.pixel_encoding == PIXEL_ENCODING_YCBCR420) || 317 - (output_color_space == COLOR_SPACE_2020_YCBCR) || 318 - (output_color_space == COLOR_SPACE_2020_RGB_FULLRANGE) || 319 - (output_color_space == COLOR_SPACE_2020_RGB_LIMITEDRANGE)) 315 + if (use_vsc_sdp_for_colorimetry) 320 316 misc1 = misc1 | 0x40; 321 317 else 322 318 misc1 = misc1 & ~0x40;
+1
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h
··· 526 526 struct stream_encoder *enc, 527 527 struct dc_crtc_timing *crtc_timing, 528 528 enum dc_color_space output_color_space, 529 + bool use_vsc_sdp_for_colorimetry, 529 530 uint32_t enable_sdp_splitting); 530 531 531 532 void enc1_stream_encoder_hdmi_set_stream_attribute(
+6 -1
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c
··· 533 533 struct stream_encoder *enc, 534 534 struct dc_crtc_timing *crtc_timing, 535 535 enum dc_color_space output_color_space, 536 + bool use_vsc_sdp_for_colorimetry, 536 537 uint32_t enable_sdp_splitting) 537 538 { 538 539 struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc); 539 540 540 - enc1_stream_encoder_dp_set_stream_attribute(enc, crtc_timing, output_color_space, enable_sdp_splitting); 541 + enc1_stream_encoder_dp_set_stream_attribute(enc, 542 + crtc_timing, 543 + output_color_space, 544 + use_vsc_sdp_for_colorimetry, 545 + enable_sdp_splitting); 541 546 542 547 REG_UPDATE(DP_SEC_FRAMING4, 543 548 DP_SST_SDP_SPLITTING, enable_sdp_splitting);
+1
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.h
··· 98 98 struct stream_encoder *enc, 99 99 struct dc_crtc_timing *crtc_timing, 100 100 enum dc_color_space output_color_space, 101 + bool use_vsc_sdp_for_colorimetry, 101 102 uint32_t enable_sdp_splitting); 102 103 103 104 void enc2_stream_encoder_dp_unblank(
+1
drivers/gpu/drm/amd/display/dc/inc/hw/stream_encoder.h
··· 126 126 struct stream_encoder *enc, 127 127 struct dc_crtc_timing *crtc_timing, 128 128 enum dc_color_space output_color_space, 129 + bool use_vsc_sdp_for_colorimetry, 129 130 uint32_t enable_sdp_splitting); 130 131 131 132 void (*hdmi_set_stream_attribute)(
+1
drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
··· 32 32 struct stream_encoder *enc, 33 33 struct dc_crtc_timing *crtc_timing, 34 34 enum dc_color_space output_color_space, 35 + bool use_vsc_sdp_for_colorimetry, 35 36 uint32_t enable_sdp_splitting) {} 36 37 37 38 static void virtual_stream_encoder_hdmi_set_stream_attribute(
+3 -1
drivers/gpu/drm/amd/display/modules/inc/mod_info_packet.h
··· 26 26 #ifndef MOD_INFO_PACKET_H_ 27 27 #define MOD_INFO_PACKET_H_ 28 28 29 + #include "dm_services.h" 29 30 #include "mod_shared.h" 30 31 //Forward Declarations 31 32 struct dc_stream_state; ··· 34 33 struct mod_vrr_params; 35 34 36 35 void mod_build_vsc_infopacket(const struct dc_stream_state *stream, 37 - struct dc_info_packet *info_packet); 36 + struct dc_info_packet *info_packet, 37 + bool *use_vsc_sdp_for_colorimetry); 38 38 39 39 void mod_build_hf_vsif_infopacket(const struct dc_stream_state *stream, 40 40 struct dc_info_packet *info_packet, int ALLMEnabled, int ALLMValue);
+36 -10
drivers/gpu/drm/amd/display/modules/info_packet/info_packet.c
··· 30 30 #include "mod_freesync.h" 31 31 #include "dc.h" 32 32 33 + enum vsc_packet_revision { 34 + vsc_packet_undefined = 0, 35 + //01h = VSC SDP supports only 3D stereo. 36 + vsc_packet_rev1 = 1, 37 + //02h = 3D stereo + PSR. 38 + vsc_packet_rev2 = 2, 39 + //03h = 3D stereo + PSR2. 40 + vsc_packet_rev3 = 3, 41 + //04h = 3D stereo + PSR/PSR2 + Y-coordinate. 42 + vsc_packet_rev4 = 4, 43 + //05h = 3D stereo + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry Format 44 + vsc_packet_rev5 = 5, 45 + }; 46 + 33 47 #define HDMI_INFOFRAME_TYPE_VENDOR 0x81 34 48 #define HF_VSIF_VERSION 1 35 49 ··· 130 116 }; 131 117 132 118 void mod_build_vsc_infopacket(const struct dc_stream_state *stream, 133 - struct dc_info_packet *info_packet) 119 + struct dc_info_packet *info_packet, 120 + bool *use_vsc_sdp_for_colorimetry) 134 121 { 135 - unsigned int vscPacketRevision = 0; 122 + unsigned int vsc_packet_revision = vsc_packet_undefined; 136 123 unsigned int i; 137 124 unsigned int pixelEncoding = 0; 138 125 unsigned int colorimetryFormat = 0; 139 126 bool stereo3dSupport = false; 140 127 128 + /* Initialize first, later if infopacket is valid determine if VSC SDP 129 + * should be used to signal colorimetry format and pixel encoding. 130 + */ 131 + *use_vsc_sdp_for_colorimetry = false; 132 + 141 133 if (stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE && stream->view_format != VIEW_3D_FORMAT_NONE) { 142 - vscPacketRevision = 1; 134 + vsc_packet_revision = vsc_packet_rev1; 143 135 stereo3dSupport = true; 144 136 } 145 137 146 138 /*VSC packet set to 2 when DP revision >= 1.2*/ 147 139 if (stream->psr_version != 0) 148 - vscPacketRevision = 2; 140 + vsc_packet_revision = vsc_packet_rev2; 149 141 150 142 /* Update to revision 5 for extended colorimetry support for DPCD 1.4+ */ 151 143 if (stream->link->dpcd_caps.dpcd_rev.raw >= 0x14 && 152 144 stream->link->dpcd_caps.dprx_feature.bits.VSC_SDP_COLORIMETRY_SUPPORTED) 153 - vscPacketRevision = 5; 145 + vsc_packet_revision = vsc_packet_rev5; 154 146 155 147 /* VSC packet not needed based on the features 156 148 * supported by this DP display 157 149 */ 158 - if (vscPacketRevision == 0) 150 + if (vsc_packet_revision == vsc_packet_undefined) 159 151 return; 160 152 161 - if (vscPacketRevision == 0x2) { 153 + if (vsc_packet_revision == vsc_packet_rev2) { 162 154 /* Secondary-data Packet ID = 0*/ 163 155 info_packet->hb0 = 0x00; 164 156 /* 07h - Packet Type Value indicating Video ··· 186 166 info_packet->valid = true; 187 167 } 188 168 189 - if (vscPacketRevision == 0x1) { 169 + if (vsc_packet_revision == vsc_packet_rev1) { 190 170 191 171 info_packet->hb0 = 0x00; // Secondary-data Packet ID = 0 192 172 info_packet->hb1 = 0x07; // 07h = Packet Type Value indicating Video Stream Configuration packet ··· 257 237 * the Pixel Encoding/Colorimetry Format and that a Sink device must ignore MISC1, bit 7, and 258 238 * MISC0, bits 7:1 (MISC1, bit 7. and MISC0, bits 7:1 become "don't care").) 259 239 */ 260 - if (vscPacketRevision == 0x5) { 240 + if (vsc_packet_revision == vsc_packet_rev5) { 261 241 /* Secondary-data Packet ID = 0 */ 262 242 info_packet->hb0 = 0x00; 263 243 /* 07h - Packet Type Value indicating Video Stream Configuration packet */ ··· 268 248 info_packet->hb3 = 0x13; 269 249 270 250 info_packet->valid = true; 251 + 252 + /* If we are using VSC SDP revision 05h, use this to signal for 253 + * colorimetry format and pixel encoding. HW should later be 254 + * programmed to set MSA MISC1 bit 6 to indicate ignore 255 + * colorimetry format and pixel encoding in the MSA. 256 + */ 257 + *use_vsc_sdp_for_colorimetry = true; 271 258 272 259 /* Set VSC SDP fields for pixel encoding and colorimetry format from DP 1.3 specs 273 260 * Data Bytes DB 18~16 ··· 420 393 */ 421 394 info_packet->sb[18] = 0; 422 395 } 423 - 424 396 } 425 397 426 398 /**