drm/amd/display: Disable mem low power for CM HW block on DCN3.1

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

[WHY]
Currently causes visible flicker in some scenarios on OLED eDPs

Reviewed-by: Haonan Wang <haonan.wang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Michael Strauss and committed by

Alex Deucher 4 years ago 5d694266 253a5591

+1 -1

1 changed file

expand all

drivers

gpu

drm

amd

display

dcn31

dcn31_resource.c

+1 -1

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c

··· 1013 1013 .i2c = true, 1014 1014 .dmcu = false, // This is previously known to cause hang on S3 cycles if enabled 1015 1015 .dscl = true, 1016 - .cm = true, 1016 + .cm = false, // visible flicker on OLED eDPs 1017 1017 .mpc = true, 1018 1018 .optc = true, 1019 1019 .vpg = true,