Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

pinctrl: Ingenic: Add pinctrl driver for X1500.

Add support for probing the pinctrl-ingenic driver on the
X1500 Soc from Ingenic.

Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
Link: https://lore.kernel.org/r/1563076436-5338-7-git-send-email-zhouyanjie@zoho.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Zhou Yanjie and committed by
Linus Walleij
5d21595b 9b6084d8

+117 -1
+117 -1
drivers/pinctrl/pinctrl-ingenic.c
··· 3 3 * Ingenic SoCs pinctrl driver 4 4 * 5 5 * Copyright (c) 2017 Paul Cercueil <paul@crapouillou.net> 6 + * Copyright (c) 2019 Zhou Yanjie <zhouyanjie@zoho.com> 6 7 */ 7 8 8 9 #include <linux/compiler.h> ··· 59 58 ID_JZ4780, 60 59 ID_X1000, 61 60 ID_X1000E, 61 + ID_X1500, 62 62 }; 63 63 64 64 struct ingenic_chip_info { ··· 1220 1218 .pull_downs = x1000_pull_downs, 1221 1219 }; 1222 1220 1221 + static int x1500_uart0_data_pins[] = { 0x4a, 0x4b, }; 1222 + static int x1500_uart0_hwflow_pins[] = { 0x4c, 0x4d, }; 1223 + static int x1500_uart1_data_a_pins[] = { 0x04, 0x05, }; 1224 + static int x1500_uart1_data_d_pins[] = { 0x62, 0x63, }; 1225 + static int x1500_uart1_hwflow_d_pins[] = { 0x64, 0x65, }; 1226 + static int x1500_uart2_data_a_pins[] = { 0x02, 0x03, }; 1227 + static int x1500_uart2_data_d_pins[] = { 0x65, 0x64, }; 1228 + static int x1500_mmc0_1bit_pins[] = { 0x18, 0x19, 0x17, }; 1229 + static int x1500_mmc0_4bit_pins[] = { 0x16, 0x15, 0x14, }; 1230 + static int x1500_i2c0_pins[] = { 0x38, 0x37, }; 1231 + static int x1500_i2c1_a_pins[] = { 0x01, 0x00, }; 1232 + static int x1500_i2c1_c_pins[] = { 0x5b, 0x5a, }; 1233 + static int x1500_i2c2_pins[] = { 0x61, 0x60, }; 1234 + static int x1500_cim_pins[] = { 1235 + 0x08, 0x09, 0x0a, 0x0b, 1236 + 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 0x0d, 0x0c, 1237 + }; 1238 + static int x1500_pwm_pwm0_pins[] = { 0x59, }; 1239 + static int x1500_pwm_pwm1_pins[] = { 0x5a, }; 1240 + static int x1500_pwm_pwm2_pins[] = { 0x5b, }; 1241 + static int x1500_pwm_pwm3_pins[] = { 0x26, }; 1242 + static int x1500_pwm_pwm4_pins[] = { 0x58, }; 1243 + 1244 + static int x1500_uart0_data_funcs[] = { 0, 0, }; 1245 + static int x1500_uart0_hwflow_funcs[] = { 0, 0, }; 1246 + static int x1500_uart1_data_a_funcs[] = { 2, 2, }; 1247 + static int x1500_uart1_data_d_funcs[] = { 1, 1, }; 1248 + static int x1500_uart1_hwflow_d_funcs[] = { 1, 1, }; 1249 + static int x1500_uart2_data_a_funcs[] = { 2, 2, }; 1250 + static int x1500_uart2_data_d_funcs[] = { 0, 0, }; 1251 + static int x1500_mmc0_1bit_funcs[] = { 1, 1, 1, }; 1252 + static int x1500_mmc0_4bit_funcs[] = { 1, 1, 1, }; 1253 + static int x1500_i2c0_funcs[] = { 0, 0, }; 1254 + static int x1500_i2c1_a_funcs[] = { 2, 2, }; 1255 + static int x1500_i2c1_c_funcs[] = { 0, 0, }; 1256 + static int x1500_i2c2_funcs[] = { 1, 1, }; 1257 + static int x1500_cim_funcs[] = { 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, }; 1258 + static int x1500_pwm_pwm0_funcs[] = { 0, }; 1259 + static int x1500_pwm_pwm1_funcs[] = { 1, }; 1260 + static int x1500_pwm_pwm2_funcs[] = { 1, }; 1261 + static int x1500_pwm_pwm3_funcs[] = { 2, }; 1262 + static int x1500_pwm_pwm4_funcs[] = { 0, }; 1263 + 1264 + static const struct group_desc x1500_groups[] = { 1265 + INGENIC_PIN_GROUP("uart0-data", x1500_uart0_data), 1266 + INGENIC_PIN_GROUP("uart0-hwflow", x1500_uart0_hwflow), 1267 + INGENIC_PIN_GROUP("uart1-data-a", x1500_uart1_data_a), 1268 + INGENIC_PIN_GROUP("uart1-data-d", x1500_uart1_data_d), 1269 + INGENIC_PIN_GROUP("uart1-hwflow-d", x1500_uart1_hwflow_d), 1270 + INGENIC_PIN_GROUP("uart2-data-a", x1500_uart2_data_a), 1271 + INGENIC_PIN_GROUP("uart2-data-d", x1500_uart2_data_d), 1272 + INGENIC_PIN_GROUP("mmc0-1bit", x1500_mmc0_1bit), 1273 + INGENIC_PIN_GROUP("mmc0-4bit", x1500_mmc0_4bit), 1274 + INGENIC_PIN_GROUP("i2c0-data", x1500_i2c0), 1275 + INGENIC_PIN_GROUP("i2c1-data-a", x1500_i2c1_a), 1276 + INGENIC_PIN_GROUP("i2c1-data-c", x1500_i2c1_c), 1277 + INGENIC_PIN_GROUP("i2c2-data", x1500_i2c2), 1278 + INGENIC_PIN_GROUP("cim-data", x1500_cim), 1279 + { "lcd-no-pins", }, 1280 + INGENIC_PIN_GROUP("pwm0", x1500_pwm_pwm0), 1281 + INGENIC_PIN_GROUP("pwm1", x1500_pwm_pwm1), 1282 + INGENIC_PIN_GROUP("pwm2", x1500_pwm_pwm2), 1283 + INGENIC_PIN_GROUP("pwm3", x1500_pwm_pwm3), 1284 + INGENIC_PIN_GROUP("pwm4", x1500_pwm_pwm4), 1285 + }; 1286 + 1287 + static const char *x1500_uart0_groups[] = { "uart0-data", "uart0-hwflow", }; 1288 + static const char *x1500_uart1_groups[] = { 1289 + "uart1-data-a", "uart1-data-d", "uart1-hwflow-d", 1290 + }; 1291 + static const char *x1500_uart2_groups[] = { "uart2-data-a", "uart2-data-d", }; 1292 + static const char *x1500_mmc0_groups[] = { "mmc0-1bit", "mmc0-4bit", }; 1293 + static const char *x1500_i2c0_groups[] = { "i2c0-data", }; 1294 + static const char *x1500_i2c1_groups[] = { "i2c1-data-a", "i2c1-data-c", }; 1295 + static const char *x1500_i2c2_groups[] = { "i2c2-data", }; 1296 + static const char *x1500_cim_groups[] = { "cim-data", }; 1297 + static const char *x1500_lcd_groups[] = { "lcd-no-pins", }; 1298 + static const char *x1500_pwm0_groups[] = { "pwm0", }; 1299 + static const char *x1500_pwm1_groups[] = { "pwm1", }; 1300 + static const char *x1500_pwm2_groups[] = { "pwm2", }; 1301 + static const char *x1500_pwm3_groups[] = { "pwm3", }; 1302 + static const char *x1500_pwm4_groups[] = { "pwm4", }; 1303 + 1304 + static const struct function_desc x1500_functions[] = { 1305 + { "uart0", x1500_uart0_groups, ARRAY_SIZE(x1500_uart0_groups), }, 1306 + { "uart1", x1500_uart1_groups, ARRAY_SIZE(x1500_uart1_groups), }, 1307 + { "uart2", x1500_uart2_groups, ARRAY_SIZE(x1500_uart2_groups), }, 1308 + { "mmc0", x1500_mmc0_groups, ARRAY_SIZE(x1500_mmc0_groups), }, 1309 + { "i2c0", x1500_i2c0_groups, ARRAY_SIZE(x1500_i2c0_groups), }, 1310 + { "i2c1", x1500_i2c1_groups, ARRAY_SIZE(x1500_i2c1_groups), }, 1311 + { "i2c2", x1500_i2c2_groups, ARRAY_SIZE(x1500_i2c2_groups), }, 1312 + { "cim", x1500_cim_groups, ARRAY_SIZE(x1500_cim_groups), }, 1313 + { "lcd", x1500_lcd_groups, ARRAY_SIZE(x1500_lcd_groups), }, 1314 + { "pwm0", x1500_pwm0_groups, ARRAY_SIZE(x1500_pwm0_groups), }, 1315 + { "pwm1", x1500_pwm1_groups, ARRAY_SIZE(x1500_pwm1_groups), }, 1316 + { "pwm2", x1500_pwm2_groups, ARRAY_SIZE(x1500_pwm2_groups), }, 1317 + { "pwm3", x1500_pwm3_groups, ARRAY_SIZE(x1500_pwm3_groups), }, 1318 + { "pwm4", x1500_pwm4_groups, ARRAY_SIZE(x1500_pwm4_groups), }, 1319 + }; 1320 + 1321 + static const struct ingenic_chip_info x1500_chip_info = { 1322 + .num_chips = 4, 1323 + .groups = x1500_groups, 1324 + .num_groups = ARRAY_SIZE(x1500_groups), 1325 + .functions = x1500_functions, 1326 + .num_functions = ARRAY_SIZE(x1500_functions), 1327 + .pull_ups = x1000_pull_ups, 1328 + .pull_downs = x1000_pull_downs, 1329 + }; 1330 + 1223 1331 static u32 ingenic_gpio_read_reg(struct ingenic_gpio_chip *jzgc, u8 reg) 1224 1332 { 1225 1333 unsigned int val; ··· 1922 1810 { .compatible = "ingenic,jz4780-pinctrl", .data = (void *) ID_JZ4780 }, 1923 1811 { .compatible = "ingenic,x1000-pinctrl", .data = (void *) ID_X1000 }, 1924 1812 { .compatible = "ingenic,x1000e-pinctrl", .data = (void *) ID_X1000E }, 1813 + { .compatible = "ingenic,x1500-pinctrl", .data = (void *) ID_X1500 }, 1925 1814 {}, 1926 1815 }; 1927 1816 ··· 2047 1934 else 2048 1935 jzpc->version = (enum jz_version)id->driver_data; 2049 1936 2050 - if (jzpc->version >= ID_X1000E) 1937 + if (jzpc->version >= ID_X1500) 1938 + chip_info = &x1500_chip_info; 1939 + else if (jzpc->version >= ID_X1000E) 2051 1940 chip_info = &x1000e_chip_info; 2052 1941 else if (jzpc->version >= ID_X1000) 2053 1942 chip_info = &x1000_chip_info; ··· 2143 2028 { "jz4780-pinctrl", ID_JZ4780 }, 2144 2029 { "x1000-pinctrl", ID_X1000 }, 2145 2030 { "x1000e-pinctrl", ID_X1000E }, 2031 + { "x1500-pinctrl", ID_X1500 }, 2146 2032 {}, 2147 2033 }; 2148 2034