Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'master'

+1085 -3033
+1 -1
Documentation/video4linux/CARDLIST.cx88
··· 42 42 41 -> Hauppauge WinTV-HVR1100 DVB-T/Hybrid (Low Profile) [0070:9800,0070:9802] 43 43 42 -> digitalnow DNTV Live! DVB-T Pro [1822:0025] 44 44 43 -> KWorld/VStream XPert DVB-T with cx22702 [17de:08a1] 45 - 44 -> DViCO FusionHDTV DVB-T Dual Digital [18ac:db50] 45 + 44 -> DViCO FusionHDTV DVB-T Dual Digital [18ac:db50,18ac:db54]
+3 -3
Documentation/video4linux/CARDLIST.saa7134
··· 1 1 0 -> UNKNOWN/GENERIC 2 2 1 -> Proteus Pro [philips reference design] [1131:2001,1131:2001] 3 3 2 -> LifeView FlyVIDEO3000 [5168:0138,4e42:0138] 4 - 3 -> LifeView FlyVIDEO2000 [5168:0138] 4 + 3 -> LifeView/Typhoon FlyVIDEO2000 [5168:0138,4e42:0138] 5 5 4 -> EMPRESS [1131:6752] 6 6 5 -> SKNet Monster TV [1131:4e85] 7 7 6 -> Tevion MD 9717 ··· 53 53 52 -> AverMedia AverTV/305 [1461:2108] 54 54 53 -> ASUS TV-FM 7135 [1043:4845] 55 55 54 -> LifeView FlyTV Platinum FM [5168:0214,1489:0214] 56 - 55 -> LifeView FlyDVB-T DUO [5168:0502,5168:0306] 56 + 55 -> LifeView FlyDVB-T DUO [5168:0306] 57 57 56 -> Avermedia AVerTV 307 [1461:a70a] 58 58 57 -> Avermedia AVerTV GO 007 FM [1461:f31f] 59 59 58 -> ADS Tech Instant TV (saa7135) [1421:0350,1421:0351,1421:0370,1421:1370] 60 60 59 -> Kworld/Tevion V-Stream Xpert TV PVR7134 61 - 60 -> Typhoon DVB-T Duo Digital/Analog Cardbus [4e42:0502] 61 + 60 -> LifeView/Typhoon FlyDVB-T Duo Cardbus [5168:0502,4e42:0502] 62 62 61 -> Philips TOUGH DVB-T reference design [1131:2004] 63 63 62 -> Compro VideoMate TV Gold+II 64 64 63 -> Kworld Xpert TV PVR7134
+7 -4
MAINTAINERS
··· 540 540 541 541 BTTV VIDEO4LINUX DRIVER 542 542 P: Mauro Carvalho Chehab 543 - M: mchehab@brturbo.com.br 543 + M: mchehab@infradead.org 544 + M: v4l-dvb-maintainer@linuxtv.org 544 545 L: video4linux-list@redhat.com 545 546 W: http://linuxtv.org 546 547 T: git kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb.git ··· 838 837 839 838 DVB SUBSYSTEM AND DRIVERS 840 839 P: LinuxTV.org Project 841 - M: linux-dvb-maintainer@linuxtv.org 840 + M: mchehab@infradead.org 841 + M: v4l-dvb-maintainer@linuxtv.org 842 842 L: linux-dvb@linuxtv.org (subscription required) 843 843 W: http://linuxtv.org/ 844 844 T: git kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb.git 845 - S: Supported 845 + S: Maintained 846 846 847 847 EATA-DMA SCSI DRIVER 848 848 P: Michael Neuffer ··· 2958 2956 2959 2957 VIDEO FOR LINUX 2960 2958 P: Mauro Carvalho Chehab 2961 - M: mchehab@brturbo.com.br 2959 + M: mchehab@infradead.org 2960 + M: v4l-dvb-maintainer@linuxtv.org 2962 2961 L: video4linux-list@redhat.com 2963 2962 W: http://linuxtv.org 2964 2963 T: git kernel.org:/pub/scm/linux/kernel/git/mchehab/v4l-dvb.git
+1 -1
Makefile
··· 442 442 config %config: scripts_basic outputmakefile FORCE 443 443 $(Q)mkdir -p include/linux 444 444 $(Q)$(MAKE) $(build)=scripts/kconfig $@ 445 - $(Q)$(MAKE) .kernelrelease 445 + $(Q)$(MAKE) -C $(srctree) KBUILD_SRC= .kernelrelease 446 446 447 447 else 448 448 # ===========================================================================
+1 -1
arch/cris/Makefile
··· 119 119 @ln -sfn $(SRC_ARCH)/$(SARCH)/lib $(SRC_ARCH)/lib 120 120 @ln -sfn $(SRC_ARCH)/$(SARCH) $(SRC_ARCH)/arch 121 121 @ln -sfn $(SRC_ARCH)/$(SARCH)/vmlinux.lds.S $(SRC_ARCH)/kernel/vmlinux.lds.S 122 - @ln -sfn $(SRC_ARCH)/$(SARCH)/asm-offsets.c $(SRC_ARCH)/kernel/asm-offsets.c 122 + @ln -sfn $(SRC_ARCH)/$(SARCH)/kernel/asm-offsets.c $(SRC_ARCH)/kernel/asm-offsets.c 123 123 @touch $@ 124 124 125 125 # Create link to sub arch includes
+1 -1
arch/i386/kernel/apic.c
··· 77 77 * completely. 78 78 * But only ack when the APIC is enabled -AK 79 79 */ 80 - if (!cpu_has_apic) 80 + if (cpu_has_apic) 81 81 ack_APIC_irq(); 82 82 } 83 83
+1
arch/mips/Kconfig
··· 595 595 select SYS_HAS_CPU_R5000 596 596 select SYS_HAS_CPU_R10000 if BROKEN 597 597 select SYS_HAS_CPU_RM7000 598 + select SYS_HAS_CPU_NEVADA 598 599 select SYS_SUPPORTS_64BIT_KERNEL 599 600 select SYS_SUPPORTS_BIG_ENDIAN 600 601 help
+23 -2
arch/mips/Makefile
··· 53 53 endif 54 54 55 55 CHECKFLAGS-y += -D__linux__ -D__mips__ \ 56 + -D_MIPS_SZINT=32 \ 56 57 -D_ABIO32=1 \ 57 58 -D_ABIN32=2 \ 58 59 -D_ABI64=3 59 60 CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \ 60 61 -D_MIPS_SZLONG=32 \ 62 + -D_MIPS_SZPTR=32 \ 61 63 -D__PTRDIFF_TYPE__=int 62 64 CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \ 63 65 -D_MIPS_SZLONG=64 \ 66 + -D_MIPS_SZPTR=64 \ 64 67 -D__PTRDIFF_TYPE__="long int" 65 68 CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__ 66 69 CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__ ··· 169 166 # 170 167 cflags-$(CONFIG_CPU_R3000) += \ 171 168 $(call set_gccflags,r3000,mips1,r3000,mips1,mips1) 169 + CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1 172 170 173 171 cflags-$(CONFIG_CPU_TX39XX) += \ 174 172 $(call set_gccflags,r3900,mips1,r3000,mips1,mips1) 173 + CHECKFLAGS-$(CONFIG_CPU_TX39XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS1 175 174 176 175 cflags-$(CONFIG_CPU_R6000) += \ 177 176 $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \ 178 177 -Wa,--trap 178 + CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2 179 179 180 180 cflags-$(CONFIG_CPU_R4300) += \ 181 181 $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \ 182 182 -Wa,--trap 183 + CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 183 184 184 185 cflags-$(CONFIG_CPU_VR41XX) += \ 185 186 $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \ 186 187 -Wa,--trap 188 + CHECKFLAGS-$(CONFIG_CPU_VR41XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 187 189 188 190 cflags-$(CONFIG_CPU_R4X00) += \ 189 191 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \ 190 192 -Wa,--trap 193 + CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 191 194 192 195 cflags-$(CONFIG_CPU_TX49XX) += \ 193 196 $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \ 194 197 -Wa,--trap 198 + CHECKFLAGS-$(CONFIG_CPU_TX49XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 195 199 196 200 cflags-$(CONFIG_CPU_MIPS32_R1) += \ 197 201 $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \ 198 202 -Wa,--trap 203 + CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS32 199 204 200 205 cflags-$(CONFIG_CPU_MIPS32_R2) += \ 201 206 $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \ 202 207 -Wa,--trap 208 + CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS32 203 209 204 210 cflags-$(CONFIG_CPU_MIPS64_R1) += \ 205 211 $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \ 206 212 -Wa,--trap 213 + CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64 207 214 208 215 cflags-$(CONFIG_CPU_MIPS64_R2) += \ 209 216 $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \ 210 217 -Wa,--trap 218 + CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS64 211 219 212 220 cflags-$(CONFIG_CPU_R5000) += \ 213 221 $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \ 214 222 -Wa,--trap 223 + CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 215 224 216 225 cflags-$(CONFIG_CPU_R5432) += \ 217 226 $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \ 218 227 -Wa,--trap 228 + CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 219 229 220 230 cflags-$(CONFIG_CPU_NEVADA) += \ 221 231 $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \ 222 232 -Wa,--trap 223 - # $(call cc-option,-mmad) 233 + CHECKFLAGS-$(CONFIG_CPU_NEVADA) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 224 234 225 235 cflags-$(CONFIG_CPU_RM7000) += \ 226 236 $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \ 227 237 -Wa,--trap 238 + CHECKFLAGS-$(CONFIG_CPU_RM7000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 228 239 229 240 cflags-$(CONFIG_CPU_RM9000) += \ 230 241 $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \ 231 242 -Wa,--trap 243 + CHECKFLAGS-$(CONFIG_CPU_RM9000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 232 244 233 245 234 246 cflags-$(CONFIG_CPU_SB1) += \ 235 247 $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \ 236 248 -Wa,--trap 249 + CHECKFLAGS-$(CONFIG_CPU_SB1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64 237 250 238 251 cflags-$(CONFIG_CPU_R8000) += \ 239 252 $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \ 240 253 -Wa,--trap 254 + CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 241 255 242 256 cflags-$(CONFIG_CPU_R10000) += \ 243 257 $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \ 244 258 -Wa,--trap 259 + CHECKFLAGS-$(CONFIG_CPU_R10000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 245 260 246 261 ifdef CONFIG_CPU_SB1 247 262 ifdef CONFIG_SB1_PASS_1_WORKAROUNDS ··· 390 369 # Cobalt Server 391 370 # 392 371 core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/ 393 - cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/cobalt 372 + cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt 394 373 load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000 395 374 396 375 #
+1 -1
arch/mips/au1000/common/reset.c
··· 151 151 } 152 152 153 153 set_c0_status(ST0_BEV | ST0_ERL); 154 - set_c0_config(CONF_CM_UNCACHED); 154 + change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED); 155 155 flush_cache_all(); 156 156 write_c0_wired(0); 157 157
+2 -1
arch/mips/au1000/common/setup.c
··· 33 33 #include <linux/delay.h> 34 34 #include <linux/interrupt.h> 35 35 #include <linux/module.h> 36 + #include <linux/pm.h> 36 37 37 38 #include <asm/cpu.h> 38 39 #include <asm/bootinfo.h> ··· 126 125 #endif 127 126 _machine_restart = au1000_restart; 128 127 _machine_halt = au1000_halt; 129 - _machine_power_off = au1000_power_off; 128 + pm_power_off = au1000_power_off; 130 129 board_time_init = au1xxx_time_init; 131 130 board_timer_setup = au1xxx_timer_setup; 132 131
+1 -1
arch/mips/cobalt/int-handler.S
··· 8 8 */ 9 9 #include <asm/asm.h> 10 10 #include <asm/mipsregs.h> 11 - #include <asm/cobalt/cobalt.h> 11 + #include <asm/mach-cobalt/cobalt.h> 12 12 #include <asm/regdef.h> 13 13 #include <asm/stackframe.h> 14 14
+1 -1
arch/mips/cobalt/irq.c
··· 18 18 #include <asm/gt64120.h> 19 19 #include <asm/ptrace.h> 20 20 21 - #include <asm/cobalt/cobalt.h> 21 + #include <asm/mach-cobalt/cobalt.h> 22 22 23 23 extern void cobalt_handle_int(void); 24 24
+1 -1
arch/mips/cobalt/reset.c
··· 16 16 #include <asm/reboot.h> 17 17 #include <asm/system.h> 18 18 #include <asm/mipsregs.h> 19 - #include <asm/cobalt/cobalt.h> 19 + #include <asm/mach-cobalt/cobalt.h> 20 20 21 21 void cobalt_machine_halt(void) 22 22 {
+4 -3
arch/mips/cobalt/setup.c
··· 5 5 * License. See the file "COPYING" in the main directory of this archive 6 6 * for more details. 7 7 * 8 - * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org) 8 + * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org) 9 9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv) 10 10 * 11 11 */ ··· 13 13 #include <linux/interrupt.h> 14 14 #include <linux/pci.h> 15 15 #include <linux/init.h> 16 + #include <linux/pm.h> 16 17 #include <linux/serial.h> 17 18 #include <linux/serial_core.h> 18 19 ··· 26 25 #include <asm/gt64120.h> 27 26 #include <asm/serial.h> 28 27 29 - #include <asm/cobalt/cobalt.h> 28 + #include <asm/mach-cobalt/cobalt.h> 30 29 31 30 extern void cobalt_machine_restart(char *command); 32 31 extern void cobalt_machine_halt(void); ··· 100 99 101 100 _machine_restart = cobalt_machine_restart; 102 101 _machine_halt = cobalt_machine_halt; 103 - _machine_power_off = cobalt_machine_power_off; 102 + pm_power_off = cobalt_machine_power_off; 104 103 105 104 board_timer_setup = cobalt_timer_setup; 106 105
+1
arch/mips/configs/ip32_defconfig
··· 102 102 # CONFIG_CPU_RM9000 is not set 103 103 # CONFIG_CPU_SB1 is not set 104 104 CONFIG_SYS_HAS_CPU_R5000=y 105 + CONFIG_SYS_HAS_CPU_NEVADA=y 105 106 CONFIG_SYS_HAS_CPU_RM7000=y 106 107 CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y 107 108 CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+26 -52
arch/mips/configs/qemu_defconfig
··· 1 1 # 2 2 # Automatically generated make config: don't edit 3 - # Linux kernel version: 2.6.15-rc2 4 - # Thu Nov 24 01:07:00 2005 3 + # Linux kernel version: 2.6.16-rc2 4 + # Fri Feb 3 17:14:27 2006 5 5 # 6 6 CONFIG_MIPS=y 7 7 ··· 147 147 # CONFIG_BSD_PROCESS_ACCT is not set 148 148 # CONFIG_SYSCTL is not set 149 149 # CONFIG_AUDIT is not set 150 - # CONFIG_HOTPLUG is not set 151 - CONFIG_KOBJECT_UEVENT=y 152 150 # CONFIG_IKCONFIG is not set 153 151 CONFIG_INITRAMFS_SOURCE="" 154 152 CONFIG_EMBEDDED=y 155 153 CONFIG_KALLSYMS=y 156 154 # CONFIG_KALLSYMS_EXTRA_PASS is not set 155 + # CONFIG_HOTPLUG is not set 157 156 CONFIG_PRINTK=y 158 157 # CONFIG_BUG is not set 158 + CONFIG_ELF_CORE=y 159 159 # CONFIG_BASE_FULL is not set 160 160 # CONFIG_FUTEX is not set 161 161 # CONFIG_EPOLL is not set 162 - # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 163 162 # CONFIG_SHMEM is not set 164 163 CONFIG_CC_ALIGN_FUNCTIONS=0 165 164 CONFIG_CC_ALIGN_LABELS=0 166 165 CONFIG_CC_ALIGN_LOOPS=0 167 166 CONFIG_CC_ALIGN_JUMPS=0 167 + CONFIG_SLAB=y 168 168 CONFIG_TINY_SHMEM=y 169 169 CONFIG_BASE_SMALL=1 170 + # CONFIG_SLOB is not set 170 171 171 172 # 172 173 # Loadable module support ··· 267 266 # CONFIG_HAMRADIO is not set 268 267 # CONFIG_IRDA is not set 269 268 # CONFIG_BT is not set 270 - CONFIG_IEEE80211=y 271 - # CONFIG_IEEE80211_DEBUG is not set 272 - CONFIG_IEEE80211_CRYPT_WEP=y 273 - CONFIG_IEEE80211_CRYPT_CCMP=y 274 - CONFIG_IEEE80211_CRYPT_TKIP=y 269 + # CONFIG_IEEE80211 is not set 275 270 276 271 # 277 272 # Device Drivers ··· 320 323 # 321 324 # SCSI device support 322 325 # 323 - CONFIG_RAID_ATTRS=y 326 + # CONFIG_RAID_ATTRS is not set 324 327 # CONFIG_SCSI is not set 325 328 326 329 # ··· 363 366 # 364 367 # PHY device support 365 368 # 366 - CONFIG_PHYLIB=y 367 - 368 - # 369 - # MII PHY device drivers 370 - # 371 - CONFIG_MARVELL_PHY=y 372 - CONFIG_DAVICOM_PHY=y 373 - CONFIG_QSEMI_PHY=y 374 - CONFIG_LXT_PHY=y 375 - CONFIG_CICADA_PHY=y 369 + # CONFIG_PHYLIB is not set 376 370 377 371 # 378 372 # Ethernet (10 or 100Mbit) 379 373 # 380 374 CONFIG_NET_ETHERNET=y 381 - CONFIG_MII=y 375 + # CONFIG_MII is not set 382 376 # CONFIG_NET_VENDOR_3COM is not set 383 377 # CONFIG_NET_VENDOR_SMC is not set 378 + # CONFIG_DM9000 is not set 384 379 # CONFIG_NET_VENDOR_RACAL is not set 385 380 # CONFIG_DEPCA is not set 386 381 # CONFIG_HP100 is not set ··· 468 479 CONFIG_SERIAL_8250=y 469 480 CONFIG_SERIAL_8250_CONSOLE=y 470 481 CONFIG_SERIAL_8250_NR_UARTS=4 482 + CONFIG_SERIAL_8250_RUNTIME_UARTS=4 471 483 # CONFIG_SERIAL_8250_EXTENDED is not set 472 484 473 485 # ··· 506 516 # I2C support 507 517 # 508 518 # CONFIG_I2C is not set 519 + 520 + # 521 + # SPI support 522 + # 523 + # CONFIG_SPI is not set 524 + # CONFIG_SPI_MASTER is not set 509 525 510 526 # 511 527 # Dallas's 1-wire bus ··· 588 592 # 589 593 590 594 # 595 + # EDAC - error detection and reporting (RAS) 596 + # 597 + 598 + # 591 599 # File systems 592 600 # 593 601 # CONFIG_EXT2_FS is not set 594 602 # CONFIG_EXT3_FS is not set 595 - # CONFIG_JBD is not set 596 603 # CONFIG_REISERFS_FS is not set 597 604 # CONFIG_JFS_FS is not set 598 605 # CONFIG_FS_POSIX_ACL is not set ··· 676 677 # Kernel hacking 677 678 # 678 679 # CONFIG_PRINTK_TIME is not set 680 + # CONFIG_MAGIC_SYSRQ is not set 679 681 # CONFIG_DEBUG_KERNEL is not set 680 682 CONFIG_LOG_BUF_SHIFT=14 681 683 CONFIG_CROSSCOMPILE=y ··· 690 690 # 691 691 # Cryptographic options 692 692 # 693 - CONFIG_CRYPTO=y 694 - CONFIG_CRYPTO_HMAC=y 695 - CONFIG_CRYPTO_NULL=y 696 - CONFIG_CRYPTO_MD4=y 697 - CONFIG_CRYPTO_MD5=y 698 - CONFIG_CRYPTO_SHA1=y 699 - CONFIG_CRYPTO_SHA256=y 700 - CONFIG_CRYPTO_SHA512=y 701 - CONFIG_CRYPTO_WP512=y 702 - CONFIG_CRYPTO_TGR192=y 703 - CONFIG_CRYPTO_DES=y 704 - CONFIG_CRYPTO_BLOWFISH=y 705 - CONFIG_CRYPTO_TWOFISH=y 706 - CONFIG_CRYPTO_SERPENT=y 707 - CONFIG_CRYPTO_AES=y 708 - CONFIG_CRYPTO_CAST5=y 709 - CONFIG_CRYPTO_CAST6=y 710 - CONFIG_CRYPTO_TEA=y 711 - CONFIG_CRYPTO_ARC4=y 712 - CONFIG_CRYPTO_KHAZAD=y 713 - CONFIG_CRYPTO_ANUBIS=y 714 - CONFIG_CRYPTO_DEFLATE=y 715 - CONFIG_CRYPTO_MICHAEL_MIC=y 716 - CONFIG_CRYPTO_CRC32C=y 717 - # CONFIG_CRYPTO_TEST is not set 693 + # CONFIG_CRYPTO is not set 718 694 719 695 # 720 696 # Hardware crypto devices ··· 700 724 # Library routines 701 725 # 702 726 # CONFIG_CRC_CCITT is not set 703 - CONFIG_CRC16=y 727 + # CONFIG_CRC16 is not set 704 728 CONFIG_CRC32=y 705 - CONFIG_LIBCRC32C=y 706 - CONFIG_ZLIB_INFLATE=y 707 - CONFIG_ZLIB_DEFLATE=y 729 + # CONFIG_LIBCRC32C is not set
+2 -1
arch/mips/ddb5xxx/ddb5074/setup.c
··· 14 14 #include <linux/ide.h> 15 15 #include <linux/ioport.h> 16 16 #include <linux/irq.h> 17 + #include <linux/pm.h> 17 18 18 19 #include <asm/addrspace.h> 19 20 #include <asm/bcache.h> ··· 96 95 97 96 _machine_restart = ddb_machine_restart; 98 97 _machine_halt = ddb_machine_halt; 99 - _machine_power_off = ddb_machine_power_off; 98 + pm_power_off = ddb_machine_power_off; 100 99 101 100 ddb_out32(DDB_BAR0, 0); 102 101
+2 -1
arch/mips/ddb5xxx/ddb5476/setup.c
··· 11 11 #include <linux/types.h> 12 12 #include <linux/sched.h> 13 13 #include <linux/pci.h> 14 + #include <linux/pm.h> 14 15 15 16 #include <asm/addrspace.h> 16 17 #include <asm/bcache.h> ··· 134 133 135 134 _machine_restart = ddb_machine_restart; 136 135 _machine_halt = ddb_machine_halt; 137 - _machine_power_off = ddb_machine_power_off; 136 + pm_power_off = ddb_machine_power_off; 138 137 139 138 /* request io port/mem resources */ 140 139 if (request_resource(&ioport_resource, &ddb5476_ioport.dma1) ||
+2 -1
arch/mips/ddb5xxx/ddb5477/setup.c
··· 26 26 #include <linux/major.h> 27 27 #include <linux/kdev_t.h> 28 28 #include <linux/root_dev.h> 29 + #include <linux/pm.h> 29 30 30 31 #include <asm/cpu.h> 31 32 #include <asm/bootinfo.h> ··· 183 182 184 183 _machine_restart = ddb_machine_restart; 185 184 _machine_halt = ddb_machine_halt; 186 - _machine_power_off = ddb_machine_power_off; 185 + pm_power_off = ddb_machine_power_off; 187 186 188 187 /* setup resource limits */ 189 188 ioport_resource.end = DDB_PCI0_IO_SIZE + DDB_PCI1_IO_SIZE - 1;
+2 -1
arch/mips/dec/setup.c
··· 17 17 #include <linux/sched.h> 18 18 #include <linux/spinlock.h> 19 19 #include <linux/types.h> 20 + #include <linux/pm.h> 20 21 21 22 #include <asm/bootinfo.h> 22 23 #include <asm/cpu.h> ··· 159 158 160 159 _machine_restart = dec_machine_restart; 161 160 _machine_halt = dec_machine_halt; 162 - _machine_power_off = dec_machine_power_off; 161 + pm_power_off = dec_machine_power_off; 163 162 164 163 ioport_resource.start = ~0UL; 165 164 ioport_resource.end = 0UL;
+3 -1
arch/mips/gt64120/ev64120/setup.c
··· 34 34 #include <linux/interrupt.h> 35 35 #include <linux/pci.h> 36 36 #include <linux/timex.h> 37 + #include <linux/pm.h> 38 + 37 39 #include <asm/bootinfo.h> 38 40 #include <asm/page.h> 39 41 #include <asm/io.h> ··· 75 73 { 76 74 _machine_restart = galileo_machine_restart; 77 75 _machine_halt = galileo_machine_halt; 78 - _machine_power_off = galileo_machine_power_off; 76 + pm_power_off = galileo_machine_power_off; 79 77 80 78 board_time_init = gt64120_time_init; 81 79 set_io_port_base(KSEG1);
+4 -2
arch/mips/gt64120/momenco_ocelot/setup.c
··· 4 4 * BRIEF MODULE DESCRIPTION 5 5 * Momentum Computer Ocelot (CP7000) - board dependent boot routines 6 6 * 7 - * Copyright (C) 1996, 1997, 2001 Ralf Baechle 7 + * Copyright (C) 1996, 1997, 2001, 06 Ralf Baechle (ralf@linux-mips.org) 8 8 * Copyright (C) 2000 RidgeRun, Inc. 9 9 * Copyright (C) 2001 Red Hat, Inc. 10 10 * Copyright (C) 2002 Momentum Computer ··· 47 47 #include <linux/pci.h> 48 48 #include <linux/timex.h> 49 49 #include <linux/vmalloc.h> 50 + #include <linux/pm.h> 51 + 50 52 #include <asm/time.h> 51 53 #include <asm/bootinfo.h> 52 54 #include <asm/page.h> ··· 161 159 162 160 _machine_restart = momenco_ocelot_restart; 163 161 _machine_halt = momenco_ocelot_halt; 164 - _machine_power_off = momenco_ocelot_power_off; 162 + pm_power_off = momenco_ocelot_power_off; 165 163 166 164 /* 167 165 * initrd_start = (ulong)ocelot_initrd_start;
+2 -1
arch/mips/ite-boards/generic/it8172_setup.c
··· 34 34 #include <linux/major.h> 35 35 #include <linux/kdev_t.h> 36 36 #include <linux/root_dev.h> 37 + #include <linux/pm.h> 37 38 38 39 #include <asm/cpu.h> 39 40 #include <asm/time.h> ··· 126 125 127 126 _machine_restart = it8172_restart; 128 127 _machine_halt = it8172_halt; 129 - _machine_power_off = it8172_power_off; 128 + pm_power_off = it8172_power_off; 130 129 131 130 /* 132 131 * IO/MEM resources.
+3 -1
arch/mips/jazz/setup.c
··· 19 19 #include <linux/console.h> 20 20 #include <linux/fb.h> 21 21 #include <linux/ide.h> 22 + #include <linux/pm.h> 23 + 22 24 #include <asm/bootinfo.h> 23 25 #include <asm/irq.h> 24 26 #include <asm/jazz.h> ··· 81 79 82 80 _machine_restart = jazz_machine_restart; 83 81 _machine_halt = jazz_machine_halt; 84 - _machine_power_off = jazz_machine_power_off; 82 + pm_power_off = jazz_machine_power_off; 85 83 86 84 #warning "Somebody should check if screen_info is ok for Jazz." 87 85
+2 -1
arch/mips/jmr3927/rbhma3100/setup.c
··· 44 44 #include <linux/ioport.h> 45 45 #include <linux/param.h> /* for HZ */ 46 46 #include <linux/delay.h> 47 + #include <linux/pm.h> 47 48 #ifdef CONFIG_SERIAL_TXX9 48 49 #include <linux/tty.h> 49 50 #include <linux/serial.h> ··· 212 211 213 212 _machine_restart = jmr3927_machine_restart; 214 213 _machine_halt = jmr3927_machine_halt; 215 - _machine_power_off = jmr3927_machine_power_off; 214 + pm_power_off = jmr3927_machine_power_off; 216 215 217 216 /* 218 217 * IO/MEM resources.
+3 -4
arch/mips/kernel/cpu-probe.c
··· 2 2 * Processor capabilities determination functions. 3 3 * 4 4 * Copyright (C) xxxx the Anonymous 5 + * Copyright (C) 1994 - 2006 Ralf Baechle 5 6 * Copyright (C) 2003, 2004 Maciej W. Rozycki 6 - * Copyright (C) 1994 - 2003 Ralf Baechle 7 7 * Copyright (C) 2001, 2004 MIPS Inc. 8 8 * 9 9 * This program is free software; you can redistribute it and/or ··· 641 641 switch (c->processor_id & 0xff00) { 642 642 case PRID_IMP_SB1: 643 643 c->cputype = CPU_SB1; 644 - #ifdef CONFIG_SB1_PASS_1_WORKAROUNDS 645 644 /* FPU in pass1 is known to have issues. */ 646 - c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); 647 - #endif 645 + if ((c->processor_id & 0xff) < 0x20) 646 + c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); 648 647 break; 649 648 case PRID_IMP_SB1A: 650 649 c->cputype = CPU_SB1A;
+1 -1
arch/mips/kernel/genex.S
··· 233 233 NESTED(nmi_handler, PT_SIZE, sp) 234 234 .set push 235 235 .set noat 236 - .set mips3 237 236 SAVE_ALL 238 237 move a0, sp 239 238 jal nmi_exception_handler 240 239 RESTORE_ALL 240 + .set mips3 241 241 eret 242 242 .set pop 243 243 END(nmi_handler)
+15 -7
arch/mips/kernel/ptrace32.c
··· 88 88 ret = -EIO; 89 89 if (copied != sizeof(tmp)) 90 90 break; 91 - ret = put_user(tmp, (unsigned int *) (unsigned long) data); 91 + ret = put_user(tmp, (unsigned int __user *) (unsigned long) data); 92 92 break; 93 93 } 94 94 ··· 174 174 case FPC_EIR: { /* implementation / version register */ 175 175 unsigned int flags; 176 176 177 - if (!cpu_has_fpu) 177 + if (!cpu_has_fpu) { 178 + tmp = 0; 178 179 break; 180 + } 179 181 180 182 preempt_disable(); 181 183 if (cpu_has_mipsmt) { ··· 196 194 preempt_enable(); 197 195 break; 198 196 } 199 - case DSP_BASE ... DSP_BASE + 5: 197 + case DSP_BASE ... DSP_BASE + 5: { 198 + dspreg_t *dregs; 199 + 200 200 if (!cpu_has_dsp) { 201 201 tmp = 0; 202 202 ret = -EIO; 203 203 goto out_tsk; 204 204 } 205 - dspreg_t *dregs = __get_dsp_regs(child); 205 + dregs = __get_dsp_regs(child); 206 206 tmp = (unsigned long) (dregs[addr - DSP_BASE]); 207 207 break; 208 + } 208 209 case DSP_CONTROL: 209 210 if (!cpu_has_dsp) { 210 211 tmp = 0; ··· 221 216 ret = -EIO; 222 217 goto out_tsk; 223 218 } 224 - ret = put_user(tmp, (unsigned *) (unsigned long) data); 219 + ret = put_user(tmp, (unsigned __user *) (unsigned long) data); 225 220 break; 226 221 } 227 222 ··· 309 304 else 310 305 child->thread.fpu.soft.fcr31 = data; 311 306 break; 312 - case DSP_BASE ... DSP_BASE + 5: 307 + case DSP_BASE ... DSP_BASE + 5: { 308 + dspreg_t *dregs; 309 + 313 310 if (!cpu_has_dsp) { 314 311 ret = -EIO; 315 312 break; 316 313 } 317 314 318 - dspreg_t *dregs = __get_dsp_regs(child); 315 + dregs = __get_dsp_regs(child); 319 316 dregs[addr - DSP_BASE] = data; 320 317 break; 318 + } 321 319 case DSP_CONTROL: 322 320 if (!cpu_has_dsp) { 323 321 ret = -EIO;
+8 -10
arch/mips/kernel/reset.c
··· 3 3 * License. See the file "COPYING" in the main directory of this archive 4 4 * for more details. 5 5 * 6 - * Copyright (C) 2001 by Ralf Baechle 6 + * Copyright (C) 2001, 06 by Ralf Baechle (ralf@linux-mips.org) 7 7 * Copyright (C) 2001 MIPS Technologies, Inc. 8 8 */ 9 9 #include <linux/kernel.h> 10 10 #include <linux/module.h> 11 + #include <linux/pm.h> 11 12 #include <linux/types.h> 12 13 #include <linux/reboot.h> 13 - #include <asm/reboot.h> 14 14 15 - void (*pm_power_off)(void); 16 - EXPORT_SYMBOL(pm_power_off); 15 + #include <asm/reboot.h> 17 16 18 17 /* 19 18 * Urgs ... Too many MIPS machines to handle this in a generic way. ··· 21 22 */ 22 23 void (*_machine_restart)(char *command); 23 24 void (*_machine_halt)(void); 24 - void (*_machine_power_off)(void); 25 + void (*pm_power_off)(void); 25 26 26 27 void machine_restart(char *command) 27 28 { 28 - _machine_restart(command); 29 + if (_machine_restart) 30 + _machine_restart(command); 29 31 } 30 32 31 33 void machine_halt(void) 32 34 { 33 - _machine_halt(); 35 + if (_machine_halt) 36 + _machine_halt(); 34 37 } 35 38 36 39 void machine_power_off(void) 37 40 { 38 41 if (pm_power_off) 39 42 pm_power_off(); 40 - 41 - _machine_power_off(); 42 43 } 43 -
+4
arch/mips/kernel/rtlx.c
··· 1 1 /* 2 2 * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved. 3 + * Copyright (C) 2005, 06 Ralf Baechle (ralf@linux-mips.org) 3 4 * 4 5 * This program is free software; you can distribute it and/or modify it 5 6 * under the terms of the GNU General Public License (Version 2) as ··· 21 20 #include <linux/module.h> 22 21 #include <linux/fs.h> 23 22 #include <linux/init.h> 23 + #include <linux/interrupt.h> 24 + #include <linux/irq.h> 24 25 #include <linux/poll.h> 25 26 #include <linux/sched.h> 26 27 #include <linux/wait.h> 28 + 27 29 #include <asm/mipsmtregs.h> 28 30 #include <asm/bitops.h> 29 31 #include <asm/cpu.h>
+4 -4
arch/mips/kernel/signal-common.h
··· 11 11 #include <linux/config.h> 12 12 13 13 static inline int 14 - setup_sigcontext(struct pt_regs *regs, struct sigcontext *sc) 14 + setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) 15 15 { 16 16 int err = 0; 17 17 ··· 82 82 } 83 83 84 84 static inline int 85 - restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc) 85 + restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) 86 86 { 87 87 unsigned int used_math; 88 88 unsigned long treg; ··· 157 157 /* 158 158 * Determine which stack to use.. 159 159 */ 160 - static inline void * 160 + static inline void __user * 161 161 get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) 162 162 { 163 163 unsigned long sp; ··· 176 176 if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) 177 177 sp = current->sas_ss_sp + current->sas_ss_size; 178 178 179 - return (void *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? 32 : ALMASK)); 179 + return (void __user *)((sp - frame_size) & (ICACHE_REFILLS_WORKAROUND_WAR ? 32 : ALMASK)); 180 180 } 181 181 182 182 static inline int install_sigtramp(unsigned int __user *tramp,
+8 -8
arch/mips/kernel/signal.c
··· 199 199 __attribute_used__ noinline static void 200 200 _sys_sigreturn(nabi_no_regargs struct pt_regs regs) 201 201 { 202 - struct sigframe *frame; 202 + struct sigframe __user *frame; 203 203 sigset_t blocked; 204 204 205 - frame = (struct sigframe *) regs.regs[29]; 205 + frame = (struct sigframe __user *) regs.regs[29]; 206 206 if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) 207 207 goto badframe; 208 208 if (__copy_from_user(&blocked, &frame->sf_mask, sizeof(blocked))) ··· 236 236 __attribute_used__ noinline static void 237 237 _sys_rt_sigreturn(nabi_no_regargs struct pt_regs regs) 238 238 { 239 - struct rt_sigframe *frame; 239 + struct rt_sigframe __user *frame; 240 240 sigset_t set; 241 241 stack_t st; 242 242 243 - frame = (struct rt_sigframe *) regs.regs[29]; 243 + frame = (struct rt_sigframe __user *) regs.regs[29]; 244 244 if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) 245 245 goto badframe; 246 246 if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set))) ··· 259 259 goto badframe; 260 260 /* It is more difficult to avoid calling this function than to 261 261 call it and ignore errors. */ 262 - do_sigaltstack(&st, NULL, regs.regs[29]); 262 + do_sigaltstack((stack_t __user *)&st, NULL, regs.regs[29]); 263 263 264 264 /* 265 265 * Don't let your children do this ... ··· 279 279 int setup_frame(struct k_sigaction * ka, struct pt_regs *regs, 280 280 int signr, sigset_t *set) 281 281 { 282 - struct sigframe *frame; 282 + struct sigframe __user *frame; 283 283 int err = 0; 284 284 285 285 frame = get_sigframe(ka, regs, sizeof(*frame)); ··· 326 326 int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs, 327 327 int signr, sigset_t *set, siginfo_t *info) 328 328 { 329 - struct rt_sigframe *frame; 329 + struct rt_sigframe __user *frame; 330 330 int err = 0; 331 331 332 332 frame = get_sigframe(ka, regs, sizeof(*frame)); ··· 340 340 341 341 /* Create the ucontext. */ 342 342 err |= __put_user(0, &frame->rs_uc.uc_flags); 343 - err |= __put_user(0, &frame->rs_uc.uc_link); 343 + err |= __put_user(NULL, &frame->rs_uc.uc_link); 344 344 err |= __put_user((void *)current->sas_ss_sp, 345 345 &frame->rs_uc.uc_stack.ss_sp); 346 346 err |= __put_user(sas_ss_flags(regs->regs[29]),
+31 -28
arch/mips/kernel/signal32.c
··· 144 144 extern void __put_sigset_unknown_nsig(void); 145 145 extern void __get_sigset_unknown_nsig(void); 146 146 147 - static inline int put_sigset(const sigset_t *kbuf, compat_sigset_t *ubuf) 147 + static inline int put_sigset(const sigset_t *kbuf, compat_sigset_t __user *ubuf) 148 148 { 149 149 int err = 0; 150 150 ··· 269 269 if (!access_ok(VERIFY_READ, act, sizeof(*act))) 270 270 return -EFAULT; 271 271 err |= __get_user(handler, &act->sa_handler); 272 - new_ka.sa.sa_handler = (void*)(s64)handler; 272 + new_ka.sa.sa_handler = (void __user *)(s64)handler; 273 273 err |= __get_user(new_ka.sa.sa_flags, &act->sa_flags); 274 274 err |= __get_user(mask, &act->sa_mask.sig[0]); 275 275 if (err) ··· 299 299 300 300 asmlinkage int sys32_sigaltstack(nabi_no_regargs struct pt_regs regs) 301 301 { 302 - const stack32_t *uss = (const stack32_t *) regs.regs[4]; 303 - stack32_t *uoss = (stack32_t *) regs.regs[5]; 302 + const stack32_t __user *uss = (const stack32_t __user *) regs.regs[4]; 303 + stack32_t __user *uoss = (stack32_t __user *) regs.regs[5]; 304 304 unsigned long usp = regs.regs[29]; 305 305 stack_t kss, koss; 306 306 int ret, err = 0; ··· 319 319 } 320 320 321 321 set_fs (KERNEL_DS); 322 - ret = do_sigaltstack(uss ? &kss : NULL , uoss ? &koss : NULL, usp); 322 + ret = do_sigaltstack(uss ? (stack_t __user *)&kss : NULL, 323 + uoss ? (stack_t __user *)&koss : NULL, usp); 323 324 set_fs (old_fs); 324 325 325 326 if (!ret && uoss) { ··· 336 335 return ret; 337 336 } 338 337 339 - static int restore_sigcontext32(struct pt_regs *regs, struct sigcontext32 *sc) 338 + static int restore_sigcontext32(struct pt_regs *regs, struct sigcontext32 __user *sc) 340 339 { 341 340 u32 used_math; 342 341 int err = 0; ··· 421 420 #endif 422 421 }; 423 422 424 - int copy_siginfo_to_user32(compat_siginfo_t *to, siginfo_t *from) 423 + int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from) 425 424 { 426 425 int err; 427 426 ··· 456 455 err |= __put_user(from->si_uid, &to->si_uid); 457 456 break; 458 457 case __SI_FAULT >> 16: 459 - err |= __put_user((long)from->si_addr, &to->si_addr); 458 + err |= __put_user((unsigned long)from->si_addr, &to->si_addr); 460 459 break; 461 460 case __SI_POLL >> 16: 462 461 err |= __put_user(from->si_band, &to->si_band); ··· 477 476 __attribute_used__ noinline static void 478 477 _sys32_sigreturn(nabi_no_regargs struct pt_regs regs) 479 478 { 480 - struct sigframe *frame; 479 + struct sigframe __user *frame; 481 480 sigset_t blocked; 482 481 483 - frame = (struct sigframe *) regs.regs[29]; 482 + frame = (struct sigframe __user *) regs.regs[29]; 484 483 if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) 485 484 goto badframe; 486 485 if (__copy_from_user(&blocked, &frame->sf_mask, sizeof(blocked))) ··· 513 512 __attribute_used__ noinline static void 514 513 _sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs) 515 514 { 516 - struct rt_sigframe32 *frame; 515 + struct rt_sigframe32 __user *frame; 517 516 mm_segment_t old_fs; 518 517 sigset_t set; 519 518 stack_t st; 520 519 s32 sp; 521 520 522 - frame = (struct rt_sigframe32 *) regs.regs[29]; 521 + frame = (struct rt_sigframe32 __user *) regs.regs[29]; 523 522 if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) 524 523 goto badframe; 525 524 if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set))) ··· 547 546 call it and ignore errors. */ 548 547 old_fs = get_fs(); 549 548 set_fs (KERNEL_DS); 550 - do_sigaltstack(&st, NULL, regs.regs[29]); 549 + do_sigaltstack((stack_t __user *)&st, NULL, regs.regs[29]); 551 550 set_fs (old_fs); 552 551 553 552 /* ··· 565 564 } 566 565 567 566 static inline int setup_sigcontext32(struct pt_regs *regs, 568 - struct sigcontext32 *sc) 567 + struct sigcontext32 __user *sc) 569 568 { 570 569 int err = 0; 571 570 ··· 624 623 /* 625 624 * Determine which stack to use.. 626 625 */ 627 - static inline void *get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, 628 - size_t frame_size) 626 + static inline void __user *get_sigframe(struct k_sigaction *ka, 627 + struct pt_regs *regs, 628 + size_t frame_size) 629 629 { 630 630 unsigned long sp; 631 631 ··· 644 642 if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) 645 643 sp = current->sas_ss_sp + current->sas_ss_size; 646 644 647 - return (void *)((sp - frame_size) & ALMASK); 645 + return (void __user *)((sp - frame_size) & ALMASK); 648 646 } 649 647 650 648 int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs, 651 649 int signr, sigset_t *set) 652 650 { 653 - struct sigframe *frame; 651 + struct sigframe __user *frame; 654 652 int err = 0; 655 653 656 654 frame = get_sigframe(ka, regs, sizeof(*frame)); ··· 704 702 int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs, 705 703 int signr, sigset_t *set, siginfo_t *info) 706 704 { 707 - struct rt_sigframe32 *frame; 705 + struct rt_sigframe32 __user *frame; 708 706 int err = 0; 709 707 s32 sp; 710 708 ··· 857 855 } 858 856 859 857 asmlinkage int sys32_rt_sigaction(int sig, const struct sigaction32 *act, 860 - struct sigaction32 *oact, 858 + struct sigaction32 __user *oact, 861 859 unsigned int sigsetsize) 862 860 { 863 861 struct k_sigaction new_sa, old_sa; ··· 874 872 if (!access_ok(VERIFY_READ, act, sizeof(*act))) 875 873 return -EFAULT; 876 874 err |= __get_user(handler, &act->sa_handler); 877 - new_sa.sa.sa_handler = (void*)(s64)handler; 875 + new_sa.sa.sa_handler = (void __user *)(s64)handler; 878 876 err |= __get_user(new_sa.sa.sa_flags, &act->sa_flags); 879 877 err |= get_sigset(&new_sa.sa.sa_mask, &act->sa_mask); 880 878 if (err) ··· 901 899 } 902 900 903 901 asmlinkage int sys32_rt_sigprocmask(int how, compat_sigset_t *set, 904 - compat_sigset_t *oset, unsigned int sigsetsize) 902 + compat_sigset_t __user *oset, unsigned int sigsetsize) 905 903 { 906 904 sigset_t old_set, new_set; 907 905 int ret; ··· 911 909 return -EFAULT; 912 910 913 911 set_fs (KERNEL_DS); 914 - ret = sys_rt_sigprocmask(how, set ? &new_set : NULL, 915 - oset ? &old_set : NULL, sigsetsize); 912 + ret = sys_rt_sigprocmask(how, set ? (sigset_t __user *)&new_set : NULL, 913 + oset ? (sigset_t __user *)&old_set : NULL, 914 + sigsetsize); 916 915 set_fs (old_fs); 917 916 918 917 if (!ret && oset && put_sigset(&old_set, oset)) ··· 922 919 return ret; 923 920 } 924 921 925 - asmlinkage int sys32_rt_sigpending(compat_sigset_t *uset, 922 + asmlinkage int sys32_rt_sigpending(compat_sigset_t __user *uset, 926 923 unsigned int sigsetsize) 927 924 { 928 925 int ret; ··· 930 927 mm_segment_t old_fs = get_fs(); 931 928 932 929 set_fs (KERNEL_DS); 933 - ret = sys_rt_sigpending(&set, sigsetsize); 930 + ret = sys_rt_sigpending((sigset_t __user *)&set, sigsetsize); 934 931 set_fs (old_fs); 935 932 936 933 if (!ret && put_sigset(&set, uset)) ··· 939 936 return ret; 940 937 } 941 938 942 - asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t *uinfo) 939 + asmlinkage int sys32_rt_sigqueueinfo(int pid, int sig, compat_siginfo_t __user *uinfo) 943 940 { 944 941 siginfo_t info; 945 942 int ret; ··· 949 946 copy_from_user (info._sifields._pad, uinfo->_sifields._pad, SI_PAD_SIZE)) 950 947 return -EFAULT; 951 948 set_fs (KERNEL_DS); 952 - ret = sys_rt_sigqueueinfo(pid, sig, &info); 949 + ret = sys_rt_sigqueueinfo(pid, sig, (siginfo_t __user *)&info); 953 950 set_fs (old_fs); 954 951 return ret; 955 952 }
+6 -4
arch/mips/kernel/signal_n32.c
··· 48 48 #define __NR_N32_rt_sigreturn 6211 49 49 #define __NR_N32_restart_syscall 6214 50 50 51 + #define DEBUG_SIG 0 52 + 51 53 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 52 54 53 55 /* IRIX compatible stack_t */ ··· 85 83 __attribute_used__ noinline static void 86 84 _sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs) 87 85 { 88 - struct rt_sigframe_n32 *frame; 86 + struct rt_sigframe_n32 __user *frame; 89 87 sigset_t set; 90 88 stack_t st; 91 89 s32 sp; 92 90 93 - frame = (struct rt_sigframe_n32 *) regs.regs[29]; 91 + frame = (struct rt_sigframe_n32 __user *) regs.regs[29]; 94 92 if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) 95 93 goto badframe; 96 94 if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set))) ··· 116 114 117 115 /* It is more difficult to avoid calling this function than to 118 116 call it and ignore errors. */ 119 - do_sigaltstack(&st, NULL, regs.regs[29]); 117 + do_sigaltstack((stack_t __user *)&st, NULL, regs.regs[29]); 120 118 121 119 /* 122 120 * Don't let your children do this ... ··· 135 133 int setup_rt_frame_n32(struct k_sigaction * ka, 136 134 struct pt_regs *regs, int signr, sigset_t *set, siginfo_t *info) 137 135 { 138 - struct rt_sigframe_n32 *frame; 136 + struct rt_sigframe_n32 __user *frame; 139 137 int err = 0; 140 138 s32 sp; 141 139
+1 -1
arch/mips/kernel/traps.c
··· 1168 1168 #endif 1169 1169 if (current_cpu_data.isa_level == MIPS_CPU_ISA_IV) 1170 1170 status_set |= ST0_XX; 1171 - change_c0_status(ST0_CU|ST0_MX|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX, 1171 + change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX, 1172 1172 status_set); 1173 1173 1174 1174 if (cpu_has_dsp)
+6 -5
arch/mips/kernel/vmlinux.lds.S
··· 1 1 #include <linux/config.h> 2 + #include <asm/asm-offsets.h> 2 3 #include <asm-generic/vmlinux.lds.h> 3 4 4 5 #undef mips /* CPP really sucks for this job */ ··· 65 64 we can shorten the on-disk segment size. */ 66 65 .sdata : { *(.sdata) } 67 66 68 - . = ALIGN(4096); 67 + . = ALIGN(_PAGE_SIZE); 69 68 __nosave_begin = .; 70 69 .data_nosave : { *(.data.nosave) } 71 - . = ALIGN(4096); 70 + . = ALIGN(_PAGE_SIZE); 72 71 __nosave_end = .; 73 72 74 73 . = ALIGN(32); ··· 77 76 _edata = .; /* End of data section */ 78 77 79 78 /* will be freed after init */ 80 - . = ALIGN(4096); /* Init code and data */ 79 + . = ALIGN(_PAGE_SIZE); /* Init code and data */ 81 80 __init_begin = .; 82 81 .init.text : { 83 82 _sinittext = .; ··· 106 105 .con_initcall.init : { *(.con_initcall.init) } 107 106 __con_initcall_end = .; 108 107 SECURITY_INIT 109 - . = ALIGN(4096); 108 + . = ALIGN(_PAGE_SIZE); 110 109 __initramfs_start = .; 111 110 .init.ramfs : { *(.init.ramfs) } 112 111 __initramfs_end = .; ··· 114 113 __per_cpu_start = .; 115 114 .data.percpu : { *(.data.percpu) } 116 115 __per_cpu_end = .; 117 - . = ALIGN(4096); 116 + . = ALIGN(_PAGE_SIZE); 118 117 __init_end = .; 119 118 /* freed after init ends here */ 120 119
+4 -1
arch/mips/lasat/reset.c
··· 19 19 */ 20 20 #include <linux/config.h> 21 21 #include <linux/kernel.h> 22 + #include <linux/pm.h> 23 + 22 24 #include <asm/reboot.h> 23 25 #include <asm/system.h> 24 26 #include <asm/lasat/lasat.h> 27 + 25 28 #include "picvue.h" 26 29 #include "prom.h" 27 30 ··· 66 63 { 67 64 _machine_restart = lasat_machine_restart; 68 65 _machine_halt = lasat_machine_halt; 69 - _machine_power_off = lasat_machine_halt; 66 + pm_power_off = lasat_machine_halt; 70 67 }
+16 -19
arch/mips/lib-32/dump_tlb.c
··· 158 158 printk("task->mm == %8p\n", t->mm); 159 159 //printk("tasks->mm.pgd == %08x\n", (unsigned int) t->mm->pgd); 160 160 161 - if (addr > KSEG0) 161 + if (addr > KSEG0) { 162 162 page_dir = pgd_offset_k(0); 163 - else if (t->mm) { 164 - page_dir = pgd_offset(t->mm, 0); 165 - printk("page_dir == %08x\n", (unsigned int) page_dir); 166 - } else 167 - printk("Current thread has no mm\n"); 168 - 169 - if (addr > KSEG0) 170 163 pgd = pgd_offset_k(addr); 171 - else if (t->mm) { 164 + } else if (t->mm) { 165 + page_dir = pgd_offset(t->mm, 0); 172 166 pgd = pgd_offset(t->mm, addr); 173 - printk("pgd == %08x, ", (unsigned int) pgd); 174 - pud = pud_offset(pgd, addr); 175 - printk("pud == %08x, ", (unsigned int) pud); 176 - 177 - pmd = pmd_offset(pud, addr); 178 - printk("pmd == %08x, ", (unsigned int) pmd); 179 - 180 - pte = pte_offset(pmd, addr); 181 - printk("pte == %08x, ", (unsigned int) pte); 182 - } else 167 + } else { 183 168 printk("Current thread has no mm\n"); 169 + return; 170 + } 171 + printk("page_dir == %08x\n", (unsigned int) page_dir); 172 + printk("pgd == %08x, ", (unsigned int) pgd); 173 + pud = pud_offset(pgd, addr); 174 + printk("pud == %08x, ", (unsigned int) pud); 175 + 176 + pmd = pmd_offset(pud, addr); 177 + printk("pmd == %08x, ", (unsigned int) pmd); 178 + 179 + pte = pte_offset(pmd, addr); 180 + printk("pte == %08x, ", (unsigned int) pte); 184 181 185 182 page = *pte; 186 183 #ifdef CONFIG_64BIT_PHYS_ADDR
+10 -4
arch/mips/math-emu/dp_simple.c
··· 48 48 CLEARCX; 49 49 FLUSHXDP; 50 50 51 + /* 52 + * Invert the sign ALWAYS to prevent an endless recursion on 53 + * pow() in libc. 54 + */ 55 + /* quick fix up */ 56 + DPSIGN(x) ^= 1; 57 + 51 58 if (xc == IEEE754_CLASS_SNAN) { 59 + ieee754dp y = ieee754dp_indef(); 52 60 SETCX(IEEE754_INVALID_OPERATION); 53 - return ieee754dp_nanxcpt(ieee754dp_indef(), "neg"); 61 + DPSIGN(y) = DPSIGN(x); 62 + return ieee754dp_nanxcpt(y, "neg"); 54 63 } 55 64 56 65 if (ieee754dp_isnan(x)) /* but not infinity */ 57 66 return ieee754dp_nanxcpt(x, "neg", x); 58 - 59 - /* quick fix up */ 60 - DPSIGN(x) ^= 1; 61 67 return x; 62 68 } 63 69
+10 -4
arch/mips/math-emu/sp_simple.c
··· 48 48 CLEARCX; 49 49 FLUSHXSP; 50 50 51 + /* 52 + * Invert the sign ALWAYS to prevent an endless recursion on 53 + * pow() in libc. 54 + */ 55 + /* quick fix up */ 56 + SPSIGN(x) ^= 1; 57 + 51 58 if (xc == IEEE754_CLASS_SNAN) { 59 + ieee754sp y = ieee754sp_indef(); 52 60 SETCX(IEEE754_INVALID_OPERATION); 53 - return ieee754sp_nanxcpt(ieee754sp_indef(), "neg"); 61 + SPSIGN(y) = SPSIGN(x); 62 + return ieee754sp_nanxcpt(y, "neg"); 54 63 } 55 64 56 65 if (ieee754sp_isnan(x)) /* but not infinity */ 57 66 return ieee754sp_nanxcpt(x, "neg", x); 58 - 59 - /* quick fix up */ 60 - SPSIGN(x) ^= 1; 61 67 return x; 62 68 } 63 69
+3 -2
arch/mips/mips-boards/generic/reset.c
··· 23 23 * 24 24 */ 25 25 #include <linux/config.h> 26 + #include <linux/pm.h> 26 27 27 28 #include <asm/io.h> 28 29 #include <asm/reboot.h> ··· 66 65 _machine_restart = mips_machine_restart; 67 66 _machine_halt = mips_machine_halt; 68 67 #if defined(CONFIG_MIPS_ATLAS) 69 - _machine_power_off = atlas_machine_power_off; 68 + pm_power_off = atlas_machine_power_off; 70 69 #endif 71 70 #if defined(CONFIG_MIPS_MALTA) || defined(CONFIG_MIPS_SEAD) 72 - _machine_power_off = mips_machine_halt; 71 + pm_power_off = mips_machine_halt; 73 72 #endif 74 73 }
+3 -4
arch/mips/mm/c-r4k.c
··· 464 464 } 465 465 466 466 struct flush_icache_range_args { 467 - unsigned long __user start; 468 - unsigned long __user end; 467 + unsigned long start; 468 + unsigned long end; 469 469 }; 470 470 471 471 static inline void local_r4k_flush_icache_range(void *args) ··· 528 528 } 529 529 } 530 530 531 - static void r4k_flush_icache_range(unsigned long __user start, 532 - unsigned long __user end) 531 + static void r4k_flush_icache_range(unsigned long start, unsigned long end) 533 532 { 534 533 struct flush_icache_range_args args; 535 534
+2 -3
arch/mips/mm/cache.c
··· 25 25 unsigned long end); 26 26 void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, 27 27 unsigned long pfn); 28 - void (*flush_icache_range)(unsigned long __user start, 29 - unsigned long __user end); 28 + void (*flush_icache_range)(unsigned long start, unsigned long end); 30 29 void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page); 31 30 32 31 /* MIPS specific cache operations */ ··· 52 53 * We could optimize the case where the cache argument is not BCACHE but 53 54 * that seems very atypical use ... 54 55 */ 55 - asmlinkage int sys_cacheflush(unsigned long __user addr, 56 + asmlinkage int sys_cacheflush(unsigned long addr, 56 57 unsigned long bytes, unsigned int cache) 57 58 { 58 59 if (bytes == 0)
+16
arch/mips/mm/init.c
··· 24 24 #include <linux/bootmem.h> 25 25 #include <linux/highmem.h> 26 26 #include <linux/swap.h> 27 + #include <linux/proc_fs.h> 27 28 28 29 #include <asm/bootinfo.h> 29 30 #include <asm/cachectl.h> ··· 201 200 return 0; 202 201 } 203 202 203 + static struct kcore_list kcore_mem, kcore_vmalloc; 204 + #ifdef CONFIG_64BIT 205 + static struct kcore_list kcore_kseg0; 206 + #endif 207 + 204 208 void __init mem_init(void) 205 209 { 206 210 unsigned long codesize, reservedpages, datasize, initsize; ··· 254 248 codesize = (unsigned long) &_etext - (unsigned long) &_text; 255 249 datasize = (unsigned long) &_edata - (unsigned long) &_etext; 256 250 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; 251 + 252 + #ifdef CONFIG_64BIT 253 + if ((unsigned long) &_text > (unsigned long) CKSEG0) 254 + /* The -4 is a hack so that user tools don't have to handle 255 + the overflow. */ 256 + kclist_add(&kcore_kseg0, (void *) CKSEG0, 0x80000000 - 4); 257 + #endif 258 + kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT); 259 + kclist_add(&kcore_vmalloc, (void *)VMALLOC_START, 260 + VMALLOC_END-VMALLOC_START); 257 261 258 262 printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, " 259 263 "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n",
+2 -1
arch/mips/momentum/jaguar_atx/setup.c
··· 50 50 #include <linux/pci.h> 51 51 #include <linux/swap.h> 52 52 #include <linux/ioport.h> 53 + #include <linux/pm.h> 53 54 #include <linux/sched.h> 54 55 #include <linux/interrupt.h> 55 56 #include <linux/timex.h> ··· 366 365 367 366 _machine_restart = momenco_jaguar_restart; 368 367 _machine_halt = momenco_jaguar_halt; 369 - _machine_power_off = momenco_jaguar_power_off; 368 + pm_power_off = momenco_jaguar_power_off; 370 369 371 370 /* 372 371 * initrd_start = (ulong)jaguar_initrd_start;
+3 -1
arch/mips/momentum/ocelot_3/setup.c
··· 57 57 #include <linux/timex.h> 58 58 #include <linux/bootmem.h> 59 59 #include <linux/mv643xx.h> 60 + #include <linux/pm.h> 61 + 60 62 #include <asm/time.h> 61 63 #include <asm/page.h> 62 64 #include <asm/bootinfo.h> ··· 323 321 324 322 _machine_restart = momenco_ocelot_restart; 325 323 _machine_halt = momenco_ocelot_halt; 326 - _machine_power_off = momenco_ocelot_power_off; 324 + pm_power_off = momenco_ocelot_power_off; 327 325 328 326 /* Wired TLB entries */ 329 327 setup_wired_tlb_entries();
+3 -1
arch/mips/momentum/ocelot_c/setup.c
··· 51 51 #include <linux/sched.h> 52 52 #include <linux/interrupt.h> 53 53 #include <linux/pci.h> 54 + #include <linux/pm.h> 54 55 #include <linux/timex.h> 55 56 #include <linux/vmalloc.h> 57 + 56 58 #include <asm/time.h> 57 59 #include <asm/bootinfo.h> 58 60 #include <asm/page.h> ··· 238 236 239 237 _machine_restart = momenco_ocelot_restart; 240 238 _machine_halt = momenco_ocelot_halt; 241 - _machine_power_off = momenco_ocelot_power_off; 239 + pm_power_off = momenco_ocelot_power_off; 242 240 243 241 /* 244 242 * initrd_start = (ulong)ocelot_initrd_start;
+3 -1
arch/mips/momentum/ocelot_g/setup.c
··· 47 47 #include <linux/sched.h> 48 48 #include <linux/interrupt.h> 49 49 #include <linux/pci.h> 50 + #include <linux/pm.h> 50 51 #include <linux/timex.h> 51 52 #include <linux/vmalloc.h> 53 + 52 54 #include <asm/time.h> 53 55 #include <asm/bootinfo.h> 54 56 #include <asm/page.h> ··· 171 169 172 170 _machine_restart = momenco_ocelot_restart; 173 171 _machine_halt = momenco_ocelot_halt; 174 - _machine_power_off = momenco_ocelot_power_off; 172 + pm_power_off = momenco_ocelot_power_off; 175 173 176 174 /* 177 175 * initrd_start = (ulong)ocelot_initrd_start;
+1
arch/mips/oprofile/Makefile
··· 12 12 13 13 oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o 14 14 oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o 15 + oprofile-$(CONFIG_CPU_SB1) += op_model_mipsxx.o 15 16 oprofile-$(CONFIG_CPU_RM9000) += op_model_rm9000.o
+3
arch/mips/oprofile/common.c
··· 79 79 case CPU_20KC: 80 80 case CPU_24K: 81 81 case CPU_25KF: 82 + case CPU_34K: 83 + case CPU_SB1: 84 + case CPU_SB1A: 82 85 lmodel = &op_model_mipsxx; 83 86 break; 84 87
+11
arch/mips/oprofile/op_model_mipsxx.c
··· 201 201 op_model_mipsxx.cpu_type = "mips/25K"; 202 202 break; 203 203 204 + #ifndef CONFIG_SMP 205 + case CPU_34K: 206 + op_model_mipsxx.cpu_type = "mips/34K"; 207 + break; 208 + #endif 209 + 204 210 case CPU_5KC: 205 211 op_model_mipsxx.cpu_type = "mips/5K"; 212 + break; 213 + 214 + case CPU_SB1: 215 + case CPU_SB1A: 216 + op_model_mipsxx.cpu_type = "mips/sb1"; 206 217 break; 207 218 208 219 default:
+1
arch/mips/pci/Makefile
··· 46 46 obj-$(CONFIG_SGI_IP27) += pci-ip27.o 47 47 obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o 48 48 obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o 49 + obj-$(CONFIG_SIBYTE_BCM112X) += fixup-sb1250.o pci-sb1250.o 49 50 obj-$(CONFIG_SIBYTE_BCM1x80) += pci-bcm1480.o pci-bcm1480ht.o 50 51 obj-$(CONFIG_SNI_RM200_PCI) += fixup-sni.o ops-sni.o 51 52 obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
+3 -3
arch/mips/pci/fixup-cobalt.c
··· 17 17 #include <asm/io.h> 18 18 #include <asm/gt64120.h> 19 19 20 - #include <asm/cobalt/cobalt.h> 20 + #include <asm/mach-cobalt/cobalt.h> 21 21 22 22 extern int cobalt_board_id; 23 23 ··· 52 52 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lt); 53 53 if (lt < 64) 54 54 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); 55 - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7); 55 + pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8); 56 56 } 57 57 58 58 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, ··· 69 69 * host bridge. 70 70 */ 71 71 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64); 72 - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 7); 72 + pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 8); 73 73 74 74 /* 75 75 * The code described by the comment below has been removed
+1 -1
arch/mips/pci/ops-gt64111.c
··· 15 15 #include <asm/io.h> 16 16 #include <asm/gt64120.h> 17 17 18 - #include <asm/cobalt/cobalt.h> 18 + #include <asm/mach-cobalt/cobalt.h> 19 19 20 20 /* 21 21 * Device 31 on the GT64111 is used to generate PCI special
-2
arch/mips/pci/pci-bcm1480.c
··· 234 234 235 235 /* turn on ExpMemEn */ 236 236 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40)); 237 - printk("PCIFeatureCtrl = %x\n", cmdreg); 238 237 WRITECFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40), 239 238 cmdreg | 0x10); 240 239 cmdreg = READCFG32(CFGOFFSET(0, PCI_DEVFN(PCI_BRIDGE_DEVICE, 0), 0x40)); 241 - printk("PCIFeatureCtrl = %x\n", cmdreg); 242 240 243 241 /* 244 242 * Establish mappings in KSEG2 (kernel virtual) to PCI I/O
+2 -1
arch/mips/philips/pnx8550/common/setup.c
··· 25 25 #include <linux/delay.h> 26 26 #include <linux/interrupt.h> 27 27 #include <linux/serial_ip3106.h> 28 + #include <linux/pm.h> 28 29 29 30 #include <asm/cpu.h> 30 31 #include <asm/bootinfo.h> ··· 91 90 92 91 _machine_restart = pnx8550_machine_restart; 93 92 _machine_halt = pnx8550_machine_halt; 94 - _machine_power_off = pnx8550_machine_power_off; 93 + pm_power_off = pnx8550_machine_power_off; 95 94 96 95 board_time_init = pnx8550_time_init; 97 96 board_timer_setup = pnx8550_timer_setup;
+2 -1
arch/mips/pmc-sierra/yosemite/prom.c
··· 13 13 #include <linux/sched.h> 14 14 #include <linux/mm.h> 15 15 #include <linux/delay.h> 16 + #include <linux/pm.h> 16 17 #include <linux/smp.h> 17 18 18 19 #include <asm/io.h> ··· 93 92 /* Callbacks for halt, restart */ 94 93 _machine_restart = (void (*)(char *)) prom_exit; 95 94 _machine_halt = prom_halt; 96 - _machine_power_off = prom_halt; 95 + pm_power_off = prom_halt; 97 96 98 97 debug_vectors = cv; 99 98 arcs_cmdline[0] = '\0';
+27 -28
arch/mips/sgi-ip22/ip22-reset.c
··· 3 3 * License. See the file "COPYING" in the main directory of this archive 4 4 * for more details. 5 5 * 6 - * Copyright (C) 1997, 1998, 2001, 2003 by Ralf Baechle 6 + * Copyright (C) 1997, 1998, 2001, 03, 05, 06 by Ralf Baechle 7 7 */ 8 + #include <linux/linkage.h> 8 9 #include <linux/init.h> 9 10 #include <linux/ds1286.h> 10 11 #include <linux/module.h> ··· 13 12 #include <linux/kernel.h> 14 13 #include <linux/sched.h> 15 14 #include <linux/notifier.h> 15 + #include <linux/pm.h> 16 16 #include <linux/timer.h> 17 17 18 18 #include <asm/io.h> ··· 43 41 44 42 #define MACHINE_PANICED 1 45 43 #define MACHINE_SHUTTING_DOWN 2 46 - static int machine_state = 0; 47 44 48 - static void sgi_machine_restart(char *command) __attribute__((noreturn)); 49 - static void sgi_machine_halt(void) __attribute__((noreturn)); 50 - static void sgi_machine_power_off(void) __attribute__((noreturn)); 45 + static int machine_state; 51 46 52 - static void sgi_machine_restart(char *command) 53 - { 54 - if (machine_state & MACHINE_SHUTTING_DOWN) 55 - sgi_machine_power_off(); 56 - sgimc->cpuctrl0 |= SGIMC_CCTRL0_SYSINIT; 57 - while (1); 58 - } 59 - 60 - static void sgi_machine_halt(void) 61 - { 62 - if (machine_state & MACHINE_SHUTTING_DOWN) 63 - sgi_machine_power_off(); 64 - ArcEnterInteractiveMode(); 65 - } 66 - 67 - static void sgi_machine_power_off(void) 47 + static void ATTRIB_NORET sgi_machine_power_off(void) 68 48 { 69 49 unsigned int tmp; 70 50 ··· 68 84 } 69 85 } 70 86 87 + static void ATTRIB_NORET sgi_machine_restart(char *command) 88 + { 89 + if (machine_state & MACHINE_SHUTTING_DOWN) 90 + sgi_machine_power_off(); 91 + sgimc->cpuctrl0 |= SGIMC_CCTRL0_SYSINIT; 92 + while (1); 93 + } 94 + 95 + static void ATTRIB_NORET sgi_machine_halt(void) 96 + { 97 + if (machine_state & MACHINE_SHUTTING_DOWN) 98 + sgi_machine_power_off(); 99 + ArcEnterInteractiveMode(); 100 + } 101 + 71 102 static void power_timeout(unsigned long data) 72 103 { 73 104 sgi_machine_power_off(); ··· 94 95 sgi_ioc_reset ^= (SGIOC_RESET_LC0OFF|SGIOC_RESET_LC1OFF); 95 96 sgioc->reset = sgi_ioc_reset; 96 97 97 - mod_timer(&blink_timer, jiffies+data); 98 + mod_timer(&blink_timer, jiffies + data); 98 99 } 99 100 100 101 static void debounce(unsigned long data) ··· 102 103 del_timer(&debounce_timer); 103 104 if (sgint->istat1 & SGINT_ISTAT1_PWR) { 104 105 /* Interrupt still being sent. */ 105 - debounce_timer.expires = jiffies + 5; /* 0.05s */ 106 + debounce_timer.expires = jiffies + (HZ / 20); /* 0.05s */ 106 107 add_timer(&debounce_timer); 107 108 108 109 sgioc->panel = SGIOC_PANEL_POWERON | SGIOC_PANEL_POWERINTR | ··· 150 151 indy_volume_button(1); 151 152 152 153 if (sgint->istat1 & SGINT_ISTAT1_PWR) { 153 - volume_timer.expires = jiffies + 1; 154 + volume_timer.expires = jiffies + (HZ / 100); 154 155 add_timer(&volume_timer); 155 156 } 156 157 } ··· 163 164 indy_volume_button(-1); 164 165 165 166 if (sgint->istat1 & SGINT_ISTAT1_PWR) { 166 - volume_timer.expires = jiffies + 1; 167 + volume_timer.expires = jiffies + (HZ / 100); 167 168 add_timer(&volume_timer); 168 169 } 169 170 } ··· 198 199 if (!(buttons & SGIOC_PANEL_VOLUPINTR)) { 199 200 init_timer(&volume_timer); 200 201 volume_timer.function = volume_up_button; 201 - volume_timer.expires = jiffies + 1; 202 + volume_timer.expires = jiffies + (HZ / 100); 202 203 add_timer(&volume_timer); 203 204 } 204 205 /* Volume down button was pressed */ 205 206 if (!(buttons & SGIOC_PANEL_VOLDNINTR)) { 206 207 init_timer(&volume_timer); 207 208 volume_timer.function = volume_down_button; 208 - volume_timer.expires = jiffies + 1; 209 + volume_timer.expires = jiffies + (HZ / 100); 209 210 add_timer(&volume_timer); 210 211 } 211 212 ··· 233 234 { 234 235 _machine_restart = sgi_machine_restart; 235 236 _machine_halt = sgi_machine_halt; 236 - _machine_power_off = sgi_machine_power_off; 237 + pm_power_off = sgi_machine_power_off; 237 238 238 239 request_irq(SGI_PANEL_IRQ, panel_int, 0, "Front Panel", NULL); 239 240 init_timer(&blink_timer);
+8 -2
arch/mips/sgi-ip22/ip22-setup.c
··· 56 56 void __init plat_setup(void) 57 57 { 58 58 char *ctype; 59 + char *cserial; 59 60 60 61 board_be_init = ip22_be_init; 61 62 ip22_time_init(); ··· 82 81 /* ARCS console environment variable is set to "g?" for 83 82 * graphics console, it is set to "d" for the first serial 84 83 * line and "d2" for the second serial line. 84 + * 85 + * Need to check if the case is 'g' but no keyboard: 86 + * (ConsoleIn/Out = serial) 85 87 */ 86 88 ctype = ArcGetEnvironmentVariable("console"); 87 - if (ctype && *ctype == 'd') { 89 + cserial = ArcGetEnvironmentVariable("ConsoleOut"); 90 + 91 + if ((ctype && *ctype == 'd') || (cserial && *cserial == 's')) { 88 92 static char options[8]; 89 93 char *baud = ArcGetEnvironmentVariable("dbaud"); 90 94 if (baud) ··· 97 91 add_preferred_console("ttyS", *(ctype + 1) == '2' ? 1 : 0, 98 92 baud ? options : NULL); 99 93 } else if (!ctype || *ctype != 'g') { 100 - /* Use ARC if we don't want serial ('d') or Newport ('g'). */ 94 + /* Use ARC if we don't want serial ('d') or graphics ('g'). */ 101 95 prom_flags |= PROM_FLAG_USE_AS_CONSOLE; 102 96 add_preferred_console("arc", 0, NULL); 103 97 }
+3 -2
arch/mips/sgi-ip27/ip27-reset.c
··· 5 5 * 6 6 * Reset an IP27. 7 7 * 8 - * Copyright (C) 1997, 1998, 1999, 2000 by Ralf Baechle 8 + * Copyright (C) 1997, 1998, 1999, 2000, 06 by Ralf Baechle 9 9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 10 10 */ 11 11 #include <linux/config.h> ··· 15 15 #include <linux/smp.h> 16 16 #include <linux/mmzone.h> 17 17 #include <linux/nodemask.h> 18 + #include <linux/pm.h> 18 19 19 20 #include <asm/io.h> 20 21 #include <asm/irq.h> ··· 78 77 { 79 78 _machine_restart = ip27_machine_restart; 80 79 _machine_halt = ip27_machine_halt; 81 - _machine_power_off = ip27_machine_power_off; 80 + pm_power_off = ip27_machine_power_off; 82 81 }
+2 -1
arch/mips/sgi-ip32/ip32-reset.c
··· 15 15 #include <linux/delay.h> 16 16 #include <linux/ds17287rtc.h> 17 17 #include <linux/interrupt.h> 18 + #include <linux/pm.h> 18 19 19 20 #include <asm/addrspace.h> 20 21 #include <asm/irq.h> ··· 189 188 190 189 _machine_restart = ip32_machine_restart; 191 190 _machine_halt = ip32_machine_halt; 192 - _machine_power_off = ip32_machine_power_off; 191 + pm_power_off = ip32_machine_power_off; 193 192 194 193 init_timer(&blink_timer); 195 194 blink_timer.function = blink_timeout;
+2 -1
arch/mips/sibyte/cfe/setup.c
··· 23 23 #include <linux/mm.h> 24 24 #include <linux/blkdev.h> 25 25 #include <linux/bootmem.h> 26 + #include <linux/pm.h> 26 27 #include <linux/smp.h> 27 28 28 29 #include <asm/bootinfo.h> ··· 249 248 250 249 _machine_restart = cfe_linux_restart; 251 250 _machine_halt = cfe_linux_halt; 252 - _machine_power_off = cfe_linux_halt; 251 + pm_power_off = cfe_linux_halt; 253 252 254 253 /* 255 254 * Check if a loader was used; if NOT, the 4 arguments are
+2 -1
arch/mips/sibyte/sb1250/prom.c
··· 24 24 #include <linux/bootmem.h> 25 25 #include <linux/smp.h> 26 26 #include <linux/initrd.h> 27 + #include <linux/pm.h> 27 28 28 29 #include <asm/bootinfo.h> 29 30 #include <asm/reboot.h> ··· 80 79 { 81 80 _machine_restart = (void (*)(char *))prom_linux_exit; 82 81 _machine_halt = prom_linux_exit; 83 - _machine_power_off = prom_linux_exit; 82 + pm_power_off = prom_linux_exit; 84 83 85 84 strcpy(arcs_cmdline, "root=/dev/ram0 "); 86 85
+24 -12
arch/mips/sibyte/sb1250/setup.c
··· 16 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 17 17 */ 18 18 #include <linux/config.h> 19 + #include <linux/init.h> 19 20 #include <linux/kernel.h> 20 21 #include <linux/reboot.h> 21 22 #include <linux/string.h> ··· 43 42 44 43 /* Setup code likely to be common to all SiByte platforms */ 45 44 46 - static inline int sys_rev_decode(void) 45 + static int __init sys_rev_decode(void) 47 46 { 48 47 int ret = 0; 49 48 ··· 75 74 return ret; 76 75 } 77 76 78 - static inline int setup_bcm1250(void) 77 + static int __init setup_bcm1250(void) 79 78 { 80 79 int ret = 0; 81 80 ··· 121 120 return ret; 122 121 } 123 122 124 - static inline int setup_bcm112x(void) 123 + static int __init setup_bcm112x(void) 125 124 { 126 125 int ret = 0; 127 126 ··· 147 146 return ret; 148 147 } 149 148 150 - void sb1250_setup(void) 149 + void __init sb1250_setup(void) 151 150 { 152 151 uint64_t sys_rev; 153 152 int plldiv; ··· 170 169 soc_str, pass_str, zbbus_mhz * 2, sb1_pass); 171 170 prom_printf("Board type: %s\n", get_system_type()); 172 171 173 - switch(war_pass) { 172 + switch (war_pass) { 174 173 case K_SYS_REVISION_BCM1250_PASS1: 175 174 #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS 176 - prom_printf("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, and the kernel doesn't have the proper workarounds compiled in. @@@@\n"); 175 + prom_printf("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, " 176 + "and the kernel doesn't have the proper " 177 + "workarounds compiled in. @@@@\n"); 177 178 bad_config = 1; 178 179 #endif 179 180 break; 180 181 case K_SYS_REVISION_BCM1250_PASS2: 181 182 /* Pass 2 - easiest as default for now - so many numbers */ 182 - #if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) 183 - prom_printf("@@@@ This is a BCM1250 A3-A10 board, and the kernel doesn't have the proper workarounds compiled in. @@@@\n"); 183 + #if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \ 184 + !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) 185 + prom_printf("@@@@ This is a BCM1250 A3-A10 board, and the " 186 + "kernel doesn't have the proper workarounds " 187 + "compiled in. @@@@\n"); 184 188 bad_config = 1; 185 189 #endif 186 190 #ifdef CONFIG_CPU_HAS_PREFETCH 187 - prom_printf("@@@@ Prefetches may be enabled in this kernel, but are buggy on this board. @@@@\n"); 191 + prom_printf("@@@@ Prefetches may be enabled in this kernel, " 192 + "but are buggy on this board. @@@@\n"); 188 193 bad_config = 1; 189 194 #endif 190 195 break; 191 196 case K_SYS_REVISION_BCM1250_PASS2_2: 192 197 #ifndef CONFIG_SB1_PASS_2_WORKAROUNDS 193 - prom_printf("@@@@ This is a BCM1250 B1/B2. board, and the kernel doesn't have the proper workarounds compiled in. @@@@\n"); 198 + prom_printf("@@@@ This is a BCM1250 B1/B2. board, and the " 199 + "kernel doesn't have the proper workarounds " 200 + "compiled in. @@@@\n"); 194 201 bad_config = 1; 195 202 #endif 196 - #if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || !defined(CONFIG_CPU_HAS_PREFETCH) 197 - prom_printf("@@@@ This is a BCM1250 B1/B2, but the kernel is conservatively configured for an 'A' stepping. @@@@\n"); 203 + #if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \ 204 + !defined(CONFIG_CPU_HAS_PREFETCH) 205 + prom_printf("@@@@ This is a BCM1250 B1/B2, but the kernel is " 206 + "conservatively configured for an 'A' stepping. " 207 + "@@@@\n"); 198 208 #endif 199 209 break; 200 210 default:
+3 -2
arch/mips/sni/setup.c
··· 5 5 * License. See the file "COPYING" in the main directory of this archive 6 6 * for more details. 7 7 * 8 - * Copyright (C) 1996, 97, 98, 2000, 03, 04 Ralf Baechle (ralf@linux-mips.org) 8 + * Copyright (C) 1996, 97, 98, 2000, 03, 04, 06 Ralf Baechle (ralf@linux-mips.org) 9 9 */ 10 10 #include <linux/config.h> 11 11 #include <linux/eisa.h> ··· 15 15 #include <linux/init.h> 16 16 #include <linux/interrupt.h> 17 17 #include <linux/mc146818rtc.h> 18 + #include <linux/pm.h> 18 19 #include <linux/pci.h> 19 20 #include <linux/console.h> 20 21 #include <linux/fb.h> ··· 190 189 191 190 _machine_restart = sni_machine_restart; 192 191 _machine_halt = sni_machine_halt; 193 - _machine_power_off = sni_machine_power_off; 192 + pm_power_off = sni_machine_power_off; 194 193 195 194 sni_display_setup(); 196 195
+5 -5
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
··· 60 60 61 61 void __init prom_init(void) 62 62 { 63 - const char* toshiba_name_list[] = GROUP_TOSHIBA_NAMES; 64 63 extern int tx4927_get_mem_size(void); 65 64 extern char* toshiba_name; 66 65 int msize; ··· 68 69 69 70 mips_machgroup = MACH_GROUP_TOSHIBA; 70 71 71 - if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) 72 + if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) { 72 73 mips_machtype = MACH_TOSHIBA_RBTX4927; 73 - else 74 + toshiba_name = "TX4927"; 75 + } else { 74 76 mips_machtype = MACH_TOSHIBA_RBTX4937; 75 - 76 - toshiba_name = toshiba_name_list[mips_machtype]; 77 + toshiba_name = "TX4937"; 78 + } 77 79 78 80 msize = tx4927_get_mem_size(); 79 81 add_memory_region(0, msize << 20, BOOT_MEM_RAM);
+95 -45
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
··· 53 53 #include <linux/interrupt.h> 54 54 #include <linux/pci.h> 55 55 #include <linux/timex.h> 56 + #include <linux/pm.h> 57 + 56 58 #include <asm/bootinfo.h> 57 59 #include <asm/page.h> 58 60 #include <asm/io.h> ··· 539 537 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, 540 538 "0x%08lx=mips_io_port_base", 541 539 mips_io_port_base); 542 - 543 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, 544 - "setup pci_io_resource to 0x%08lx 0x%08lx\n", 545 - pci_io_resource.start, 546 - pci_io_resource.end); 547 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, 548 - "setup pci_mem_resource to 0x%08lx 0x%08lx\n", 549 - pci_mem_resource.start, 550 - pci_mem_resource.end); 551 - 552 540 if (!called) { 553 541 printk 554 - ("TX4927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n", 542 + ("%s PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n", 543 + toshiba_name, 555 544 (unsigned short) (tx4927_pcicptr->pciid >> 16), 556 545 (unsigned short) (tx4927_pcicptr->pciid & 0xffff), 557 546 (unsigned short) (tx4927_pcicptr->pciccrev & 0xff), ··· 555 562 (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : ""); 556 563 if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) { 557 564 int pciclk = 0; 558 - switch ((unsigned long) tx4927_ccfgptr-> 559 - ccfg & TX4927_CCFG_PCIDIVMODE_MASK) { 560 - case TX4927_CCFG_PCIDIVMODE_2_5: 561 - pciclk = tx4927_cpu_clock * 2 / 5; 562 - break; 563 - case TX4927_CCFG_PCIDIVMODE_3: 564 - pciclk = tx4927_cpu_clock / 3; 565 - break; 566 - case TX4927_CCFG_PCIDIVMODE_5: 567 - pciclk = tx4927_cpu_clock / 5; 568 - break; 569 - case TX4927_CCFG_PCIDIVMODE_6: 570 - pciclk = tx4927_cpu_clock / 6; 571 - break; 572 - } 565 + if (mips_machtype == MACH_TOSHIBA_RBTX4937) 566 + switch ((unsigned long) tx4927_ccfgptr-> 567 + ccfg & TX4937_CCFG_PCIDIVMODE_MASK) { 568 + case TX4937_CCFG_PCIDIVMODE_4: 569 + pciclk = tx4927_cpu_clock / 4; 570 + break; 571 + case TX4937_CCFG_PCIDIVMODE_4_5: 572 + pciclk = tx4927_cpu_clock * 2 / 9; 573 + break; 574 + case TX4937_CCFG_PCIDIVMODE_5: 575 + pciclk = tx4927_cpu_clock / 5; 576 + break; 577 + case TX4937_CCFG_PCIDIVMODE_5_5: 578 + pciclk = tx4927_cpu_clock * 2 / 11; 579 + break; 580 + case TX4937_CCFG_PCIDIVMODE_8: 581 + pciclk = tx4927_cpu_clock / 8; 582 + break; 583 + case TX4937_CCFG_PCIDIVMODE_9: 584 + pciclk = tx4927_cpu_clock / 9; 585 + break; 586 + case TX4937_CCFG_PCIDIVMODE_10: 587 + pciclk = tx4927_cpu_clock / 10; 588 + break; 589 + case TX4937_CCFG_PCIDIVMODE_11: 590 + pciclk = tx4927_cpu_clock / 11; 591 + break; 592 + } 593 + 594 + else 595 + switch ((unsigned long) tx4927_ccfgptr-> 596 + ccfg & TX4927_CCFG_PCIDIVMODE_MASK) { 597 + case TX4927_CCFG_PCIDIVMODE_2_5: 598 + pciclk = tx4927_cpu_clock * 2 / 5; 599 + break; 600 + case TX4927_CCFG_PCIDIVMODE_3: 601 + pciclk = tx4927_cpu_clock / 3; 602 + break; 603 + case TX4927_CCFG_PCIDIVMODE_5: 604 + pciclk = tx4927_cpu_clock / 5; 605 + break; 606 + case TX4927_CCFG_PCIDIVMODE_6: 607 + pciclk = tx4927_cpu_clock / 6; 608 + break; 609 + } 610 + 573 611 printk("Internal(%dMHz)", pciclk / 1000000); 574 612 } else { 575 613 int pciclk = 0; ··· 838 814 ":ResetRoutines\n"); 839 815 _machine_restart = toshiba_rbtx4927_restart; 840 816 _machine_halt = toshiba_rbtx4927_halt; 841 - _machine_power_off = toshiba_rbtx4927_power_off; 817 + pm_power_off = toshiba_rbtx4927_power_off; 842 818 843 819 #ifdef CONFIG_PCI 844 820 845 821 /* PCIC */ 846 822 /* 847 823 * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz. 848 - * PCIDIVMODE[12:11]'s initial value are given by S9[4:3] (ON:0, OFF:1). 824 + * 825 + * For TX4927: 826 + * PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1). 849 827 * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5) 850 828 * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3) 851 829 * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5) 852 830 * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6) 853 831 * i.e. S9[3]: ON (83MHz), OFF (100MHz) 832 + * 833 + * For TX4937: 834 + * PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1) 835 + * PCIDIVMODE[10] is 0. 836 + * CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8) 837 + * CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4) 838 + * CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9) 839 + * CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5) 840 + * CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10) 841 + * CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5) 842 + * 854 843 */ 855 844 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1, 856 - "ccfg is %lx, DIV is %x\n", 857 - (unsigned long) tx4927_ccfgptr-> 858 - ccfg, TX4927_CCFG_PCIDIVMODE_MASK); 845 + "ccfg is %lx, PCIDIVMODE is %x\n", 846 + (unsigned long) tx4927_ccfgptr->ccfg, 847 + (unsigned long) tx4927_ccfgptr->ccfg & 848 + (mips_machtype == MACH_TOSHIBA_RBTX4937 ? 849 + TX4937_CCFG_PCIDIVMODE_MASK : 850 + TX4927_CCFG_PCIDIVMODE_MASK)); 859 851 860 852 TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1, 861 853 "PCI66 mode is %lx, PCI mode is %lx, pci arb is %lx\n", ··· 882 842 (unsigned long) tx4927_ccfgptr-> 883 843 ccfg & TX4927_CCFG_PCIXARB); 884 844 885 - TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1, 886 - "PCIDIVMODE is %lx\n", 887 - (unsigned long) tx4927_ccfgptr-> 888 - ccfg & TX4927_CCFG_PCIDIVMODE_MASK); 889 - 890 - switch ((unsigned long) tx4927_ccfgptr-> 891 - ccfg & TX4927_CCFG_PCIDIVMODE_MASK) { 892 - case TX4927_CCFG_PCIDIVMODE_2_5: 893 - case TX4927_CCFG_PCIDIVMODE_5: 894 - tx4927_cpu_clock = 166000000; /* 166MHz */ 895 - break; 896 - default: 897 - tx4927_cpu_clock = 200000000; /* 200MHz */ 898 - } 845 + if (mips_machtype == MACH_TOSHIBA_RBTX4937) 846 + switch ((unsigned long)tx4927_ccfgptr-> 847 + ccfg & TX4937_CCFG_PCIDIVMODE_MASK) { 848 + case TX4937_CCFG_PCIDIVMODE_8: 849 + case TX4937_CCFG_PCIDIVMODE_4: 850 + tx4927_cpu_clock = 266666666; /* 266MHz */ 851 + break; 852 + case TX4937_CCFG_PCIDIVMODE_9: 853 + case TX4937_CCFG_PCIDIVMODE_4_5: 854 + tx4927_cpu_clock = 300000000; /* 300MHz */ 855 + break; 856 + default: 857 + tx4927_cpu_clock = 333333333; /* 333MHz */ 858 + } 859 + else 860 + switch ((unsigned long)tx4927_ccfgptr-> 861 + ccfg & TX4927_CCFG_PCIDIVMODE_MASK) { 862 + case TX4927_CCFG_PCIDIVMODE_2_5: 863 + case TX4927_CCFG_PCIDIVMODE_5: 864 + tx4927_cpu_clock = 166666666; /* 166MHz */ 865 + break; 866 + default: 867 + tx4927_cpu_clock = 200000000; /* 200MHz */ 868 + } 899 869 900 870 /* CCFG */ 901 871 /* enable Timeout BusError */
+3 -1
arch/mips/tx4938/toshiba_rbtx4938/setup.c
··· 20 20 #include <linux/interrupt.h> 21 21 #include <linux/console.h> 22 22 #include <linux/pci.h> 23 + #include <linux/pm.h> 24 + 23 25 #include <asm/wbflush.h> 24 26 #include <asm/reboot.h> 25 27 #include <asm/irq.h> ··· 1005 1003 1006 1004 _machine_restart = rbtx4938_machine_restart; 1007 1005 _machine_halt = rbtx4938_machine_halt; 1008 - _machine_power_off = rbtx4938_machine_power_off; 1006 + pm_power_off = rbtx4938_machine_power_off; 1009 1007 1010 1008 *rbtx4938_led_ptr = 0xff; 1011 1009 printk("RBTX4938 --- FPGA(Rev %02x)", *rbtx4938_fpga_rev_ptr);
+2 -1
arch/mips/vr41xx/common/pmu.c
··· 21 21 #include <linux/init.h> 22 22 #include <linux/ioport.h> 23 23 #include <linux/kernel.h> 24 + #include <linux/pm.h> 24 25 #include <linux/smp.h> 25 26 #include <linux/types.h> 26 27 ··· 115 114 116 115 _machine_restart = vr41xx_restart; 117 116 _machine_halt = vr41xx_halt; 118 - _machine_power_off = vr41xx_power_off; 117 + pm_power_off = vr41xx_power_off; 119 118 120 119 return 0; 121 120 }
+3 -2
drivers/block/cciss.c
··· 2183 2183 { 2184 2184 CommandList_struct *cmd = rq->completion_data; 2185 2185 ctlr_info_t *h = hba[cmd->ctlr]; 2186 + unsigned long flags; 2186 2187 u64bit temp64; 2187 2188 int i, ddir; 2188 2189 ··· 2206 2205 printk("Done with %p\n", rq); 2207 2206 #endif /* CCISS_DEBUG */ 2208 2207 2209 - spin_lock_irq(&h->lock); 2208 + spin_lock_irqsave(&h->lock, flags); 2210 2209 end_that_request_last(rq, rq->errors); 2211 2210 cmd_free(h, cmd,1); 2212 - spin_unlock_irq(&h->lock); 2211 + spin_unlock_irqrestore(&h->lock, flags); 2213 2212 } 2214 2213 2215 2214 /* checks the status of the job and calls complete buffers to mark all
+1 -1
drivers/media/dvb/b2c2/Kconfig
··· 4 4 select DVB_STV0299 5 5 select DVB_MT352 6 6 select DVB_MT312 7 - select DVB_NXT2002 7 + select DVB_NXT200X 8 8 select DVB_STV0297 9 9 select DVB_BCM3510 10 10 select DVB_LGDT330X
-2
drivers/media/dvb/b2c2/flexcop-common.h
··· 116 116 117 117 int flexcop_dma_control_timer_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff); 118 118 int flexcop_dma_control_size_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff); 119 - int flexcop_dma_control_packet_irq(struct flexcop_device *fc, flexcop_dma_index_t no, int onoff); 120 119 int flexcop_dma_config(struct flexcop_device *fc, struct flexcop_dma *dma, flexcop_dma_index_t dma_idx); 121 120 int flexcop_dma_xfer_control(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, flexcop_dma_addr_index_t index, int onoff); 122 121 int flexcop_dma_config_timer(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, u8 cycles); 123 - int flexcop_dma_config_packet_count(struct flexcop_device *fc, flexcop_dma_index_t dma_idx, u8 packets); 124 122 125 123 /* from flexcop-eeprom.c */ 126 124 /* the PCI part uses this call to get the MAC address, the USB part has its own */
-35
drivers/media/dvb/b2c2/flexcop-dma.c
··· 169 169 } 170 170 EXPORT_SYMBOL(flexcop_dma_config_timer); 171 171 172 - /* packet IRQ does not exist in FCII or FCIIb - according to data book and tests */ 173 - int flexcop_dma_control_packet_irq(struct flexcop_device *fc, 174 - flexcop_dma_index_t no, 175 - int onoff) 176 - { 177 - flexcop_ibi_value v = fc->read_ibi_reg(fc,ctrl_208); 178 - 179 - deb_rdump("reg: %03x: %x\n",ctrl_208,v.raw); 180 - if (no & FC_DMA_1) 181 - v.ctrl_208.DMA1_Size_IRQ_Enable_sig = onoff; 182 - 183 - if (no & FC_DMA_2) 184 - v.ctrl_208.DMA2_Size_IRQ_Enable_sig = onoff; 185 - 186 - fc->write_ibi_reg(fc,ctrl_208,v); 187 - deb_rdump("reg: %03x: %x\n",ctrl_208,v.raw); 188 - 189 - return 0; 190 - } 191 - EXPORT_SYMBOL(flexcop_dma_control_packet_irq); 192 - 193 - int flexcop_dma_config_packet_count(struct flexcop_device *fc, 194 - flexcop_dma_index_t dma_idx, 195 - u8 packets) 196 - { 197 - flexcop_ibi_register r = (dma_idx & FC_DMA_1) ? dma1_004 : dma2_014; 198 - flexcop_ibi_value v = fc->read_ibi_reg(fc,r); 199 - 200 - flexcop_dma_remap(fc,dma_idx,1); 201 - 202 - v.dma_0x4_remap.DMA_maxpackets = packets; 203 - fc->write_ibi_reg(fc,r,v); 204 - return 0; 205 - } 206 - EXPORT_SYMBOL(flexcop_dma_config_packet_count);
+5 -4
drivers/media/dvb/b2c2/flexcop-fe-tuner.c
··· 9 9 10 10 #include "stv0299.h" 11 11 #include "mt352.h" 12 - #include "nxt2002.h" 12 + #include "nxt200x.h" 13 13 #include "bcm3510.h" 14 14 #include "stv0297.h" 15 15 #include "mt312.h" ··· 343 343 .clock_polarity_flip = 1, 344 344 }; 345 345 346 - static struct nxt2002_config samsung_tbmv_config = { 346 + static struct nxt200x_config samsung_tbmv_config = { 347 347 .demod_address = 0x0a, 348 - .request_firmware = flexcop_fe_request_firmware, 348 + .pll_address = 0xc2, 349 + .pll_desc = &dvb_pll_samsung_tbmv, 349 350 }; 350 351 351 352 static struct bcm3510_config air2pc_atsc_first_gen_config = { ··· 506 505 info("found the mt352 at i2c address: 0x%02x",samsung_tdtc9251dh0_config.demod_address); 507 506 } else 508 507 /* try the air atsc 2nd generation (nxt2002) */ 509 - if ((fc->fe = nxt2002_attach(&samsung_tbmv_config, &fc->i2c_adap)) != NULL) { 508 + if ((fc->fe = nxt200x_attach(&samsung_tbmv_config, &fc->i2c_adap)) != NULL) { 510 509 fc->dev_type = FC_AIR_ATSC2; 511 510 info("found the nxt2002 at i2c address: 0x%02x",samsung_tbmv_config.demod_address); 512 511 } else
+3 -3
drivers/media/dvb/b2c2/flexcop-misc.c
··· 36 36 /* bus parts have to decide if hw pid filtering is used or not. */ 37 37 } 38 38 39 - const char *flexcop_revision_names[] = { 39 + static const char *flexcop_revision_names[] = { 40 40 "Unkown chip", 41 41 "FlexCopII", 42 42 "FlexCopIIb", 43 43 "FlexCopIII", 44 44 }; 45 45 46 - const char *flexcop_device_names[] = { 46 + static const char *flexcop_device_names[] = { 47 47 "Unkown device", 48 48 "Air2PC/AirStar 2 DVB-T", 49 49 "Air2PC/AirStar 2 ATSC 1st generation", ··· 54 54 "Air2PC/AirStar 2 ATSC 3rd generation (HD5000)", 55 55 }; 56 56 57 - const char *flexcop_bus_names[] = { 57 + static const char *flexcop_bus_names[] = { 58 58 "USB", 59 59 "PCI", 60 60 };
+4 -2
drivers/media/dvb/b2c2/flexcop-pci.c
··· 161 161 fc->read_ibi_reg(fc,dma1_008).dma_0x8.dma_cur_addr << 2; 162 162 u32 cur_pos = cur_addr - fc_pci->dma[0].dma_addr0; 163 163 164 - deb_irq("%u irq: %08x cur_addr: %08x: cur_pos: %08x, last_cur_pos: %08x ", 165 - jiffies_to_usecs(jiffies - fc_pci->last_irq),v.raw,cur_addr,cur_pos,fc_pci->last_dma1_cur_pos); 164 + deb_irq("%u irq: %08x cur_addr: %llx: cur_pos: %08x, last_cur_pos: %08x ", 165 + jiffies_to_usecs(jiffies - fc_pci->last_irq), 166 + v.raw, (unsigned long long)cur_addr, cur_pos, 167 + fc_pci->last_dma1_cur_pos); 166 168 fc_pci->last_irq = jiffies; 167 169 168 170 /* buffer end was reached, restarted from the beginning
-4
drivers/media/dvb/b2c2/flexcop-reg.h
··· 16 16 FLEXCOP_III, 17 17 } flexcop_revision_t; 18 18 19 - extern const char *flexcop_revision_names[]; 20 - 21 19 typedef enum { 22 20 FC_UNK = 0, 23 21 FC_AIR_DVB, ··· 31 33 FC_USB = 0, 32 34 FC_PCI, 33 35 } flexcop_bus_t; 34 - 35 - extern const char *flexcop_device_names[]; 36 36 37 37 /* FlexCop IBI Registers */ 38 38 #if defined(__LITTLE_ENDIAN)
+43 -1
drivers/media/dvb/bt8xx/bt878.c
··· 381 381 382 382 EXPORT_SYMBOL(bt878_device_control); 383 383 384 + 385 + struct cards card_list[] __devinitdata = { 386 + 387 + { 0x01010071, BTTV_BOARD_NEBULA_DIGITV, "Nebula Electronics DigiTV" }, 388 + { 0x07611461, BTTV_BOARD_AVDVBT_761, "AverMedia AverTV DVB-T 761" }, 389 + { 0x001c11bd, BTTV_BOARD_PINNACLESAT, "Pinnacle PCTV Sat" }, 390 + { 0x002611bd, BTTV_BOARD_TWINHAN_DST, "Pinnacle PCTV SAT CI" }, 391 + { 0x00011822, BTTV_BOARD_TWINHAN_DST, "Twinhan VisionPlus DVB" }, 392 + { 0xfc00270f, BTTV_BOARD_TWINHAN_DST, "ChainTech digitop DST-1000 DVB-S" }, 393 + { 0x07711461, BTTV_BOARD_AVDVBT_771, "AVermedia AverTV DVB-T 771" }, 394 + { 0xdb1018ac, BTTV_BOARD_DVICO_DVBT_LITE, "DViCO FusionHDTV DVB-T Lite" }, 395 + { 0xd50018ac, BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE, "DViCO FusionHDTV 5 Lite" }, 396 + { 0x20007063, BTTV_BOARD_PC_HDTV, "pcHDTV HD-2000 TV"}, 397 + { 0, -1, NULL } 398 + }; 399 + 400 + 384 401 /***********************/ 385 402 /* PCI device handling */ 386 403 /***********************/ ··· 405 388 static int __devinit bt878_probe(struct pci_dev *dev, 406 389 const struct pci_device_id *pci_id) 407 390 { 408 - int result; 391 + int result = 0, has_dvb = 0, i; 409 392 unsigned char lat; 410 393 struct bt878 *bt; 411 394 #if defined(__powerpc__) 412 395 unsigned int cmd; 413 396 #endif 397 + unsigned int cardid; 398 + unsigned short id; 399 + struct cards *dvb_cards; 414 400 415 401 printk(KERN_INFO "bt878: Bt878 AUDIO function found (%d).\n", 416 402 bt878_num); 417 403 if (pci_enable_device(dev)) 418 404 return -EIO; 405 + 406 + pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &id); 407 + cardid = id << 16; 408 + pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &id); 409 + cardid |= id; 410 + 411 + for (i = 0, dvb_cards = card_list; i < ARRAY_SIZE(card_list); i++, dvb_cards++) { 412 + if (cardid == dvb_cards->pci_id) { 413 + printk("%s: card id=[0x%x],[ %s ] has DVB functions.\n", 414 + __func__, cardid, dvb_cards->name); 415 + has_dvb = 1; 416 + } 417 + } 418 + 419 + if (!has_dvb) { 420 + printk("%s: card id=[0x%x], Unknown card.\nExiting..\n", __func__, cardid); 421 + result = -EINVAL; 422 + 423 + goto fail0; 424 + } 419 425 420 426 bt = &bt878[bt878_num]; 421 427 bt->dev = dev; ··· 456 416 457 417 pci_read_config_byte(dev, PCI_CLASS_REVISION, &bt->revision); 458 418 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat); 419 + 420 + 459 421 printk(KERN_INFO "bt878(%d): Bt%x (rev %d) at %02x:%02x.%x, ", 460 422 bt878_num, bt->id, bt->revision, dev->bus->number, 461 423 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
+17
drivers/media/dvb/bt8xx/bt878.h
··· 88 88 89 89 #define BT878_RISC_SYNC_MASK (1 << 15) 90 90 91 + 92 + #define BTTV_BOARD_UNKNOWN 0x00 93 + #define BTTV_BOARD_PINNACLESAT 0x5e 94 + #define BTTV_BOARD_NEBULA_DIGITV 0x68 95 + #define BTTV_BOARD_PC_HDTV 0x70 96 + #define BTTV_BOARD_TWINHAN_DST 0x71 97 + #define BTTV_BOARD_AVDVBT_771 0x7b 98 + #define BTTV_BOARD_AVDVBT_761 0x7c 99 + #define BTTV_BOARD_DVICO_DVBT_LITE 0x80 100 + #define BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE 0x87 101 + 102 + struct cards { 103 + __u32 pci_id; 104 + __u16 card_id; 105 + char *name; 106 + }; 107 + 91 108 extern int bt878_num; 92 109 93 110 struct bt878 {
+9 -3
drivers/media/dvb/dvb-usb/Kconfig
··· 83 83 Say Y here to support the HanfTek UMT-010 USB2.0 stick-sized DVB-T receiver. 84 84 85 85 config DVB_USB_CXUSB 86 - tristate "Medion MD95700 hybrid USB2.0 (Conexant) support" 86 + tristate "Conexant USB2.0 hybrid reference design support" 87 87 depends on DVB_USB 88 88 select DVB_CX22702 89 + select DVB_LGDT330X 90 + select DVB_MT352 89 91 help 90 - Say Y here to support the Medion MD95700 hybrid USB2.0 device. Currently 91 - only the DVB-T part is supported. 92 + Say Y here to support the Conexant USB2.0 hybrid reference design. 93 + Currently, only DVB and ATSC modes are supported, analog mode 94 + shall be added in the future. Devices that require this module: 95 + 96 + Medion MD95700 hybrid USB2.0 device. 97 + DViCO FusionHDTV (Bluebird) USB2.0 devices 92 98 93 99 config DVB_USB_DIGITV 94 100 tristate "Nebula Electronics uDigiTV DVB-T USB2.0 support"
+6 -6
drivers/media/dvb/dvb-usb/cxusb.c
··· 184 184 return 0; 185 185 } 186 186 187 - struct dvb_usb_rc_key dvico_mce_rc_keys[] = { 187 + static struct dvb_usb_rc_key dvico_mce_rc_keys[] = { 188 188 { 0xfe, 0x02, KEY_TV }, 189 189 { 0xfe, 0x0e, KEY_MP3 }, 190 190 { 0xfe, 0x1a, KEY_DVD }, ··· 234 234 235 235 static int cxusb_dee1601_demod_init(struct dvb_frontend* fe) 236 236 { 237 - static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 }; 237 + static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x28 }; 238 238 static u8 reset [] = { RESET, 0x80 }; 239 239 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; 240 240 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 }; ··· 255 255 256 256 static int cxusb_mt352_demod_init(struct dvb_frontend* fe) 257 257 { /* used in both lgz201 and th7579 */ 258 - static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 }; 258 + static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x29 }; 259 259 static u8 reset [] = { RESET, 0x80 }; 260 260 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; 261 261 static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 }; ··· 273 273 return 0; 274 274 } 275 275 276 - struct cx22702_config cxusb_cx22702_config = { 276 + static struct cx22702_config cxusb_cx22702_config = { 277 277 .demod_address = 0x63, 278 278 279 279 .output_mode = CX22702_PARALLEL_OUTPUT, ··· 282 282 .pll_set = dvb_usb_pll_set_i2c, 283 283 }; 284 284 285 - struct lgdt330x_config cxusb_lgdt330x_config = { 285 + static struct lgdt330x_config cxusb_lgdt330x_config = { 286 286 .demod_address = 0x0e, 287 287 .demod_chip = LGDT3303, 288 288 .pll_set = dvb_usb_pll_set_i2c, 289 289 }; 290 290 291 - struct mt352_config cxusb_dee1601_config = { 291 + static struct mt352_config cxusb_dee1601_config = { 292 292 .demod_address = 0x0f, 293 293 .demod_init = cxusb_dee1601_demod_init, 294 294 .pll_set = dvb_usb_pll_set,
+8 -5
drivers/media/dvb/dvb-usb/digitv.c
··· 175 175 if ((ret = dvb_usb_device_init(intf,&digitv_properties,THIS_MODULE,&d)) == 0) { 176 176 u8 b[4] = { 0 }; 177 177 178 - b[0] = 1; 179 - digitv_ctrl_msg(d,USB_WRITE_REMOTE_TYPE,0,b,4,NULL,0); 178 + if (d != NULL) { /* do that only when the firmware is loaded */ 179 + b[0] = 1; 180 + digitv_ctrl_msg(d,USB_WRITE_REMOTE_TYPE,0,b,4,NULL,0); 180 181 181 - b[0] = 0; 182 - digitv_ctrl_msg(d,USB_WRITE_REMOTE,0,b,4,NULL,0); 182 + b[0] = 0; 183 + digitv_ctrl_msg(d,USB_WRITE_REMOTE,0,b,4,NULL,0); 184 + } 183 185 } 184 186 return ret; 185 187 } ··· 196 194 .caps = DVB_USB_IS_AN_I2C_ADAPTER, 197 195 198 196 .usb_ctrl = CYPRESS_FX2, 199 - .firmware = "dvb-usb-digitv-01.fw", 197 + .firmware = "dvb-usb-digitv-02.fw", 200 198 201 199 .size_of_priv = 0, 202 200 ··· 231 229 { &digitv_table[0], NULL }, 232 230 { NULL }, 233 231 }, 232 + { NULL }, 234 233 } 235 234 }; 236 235
+5 -3
drivers/media/dvb/dvb-usb/dvb-usb-firmware.c
··· 24 24 { .id = CYPRESS_FX2, .name = "Cypress FX2", .cpu_cs_register = 0xe600 }, 25 25 }; 26 26 27 + static int dvb_usb_get_hexline(const struct firmware *fw, struct hexline *hx, 28 + int *pos); 29 + 27 30 /* 28 31 * load a firmware packet to the device 29 32 */ ··· 115 112 return ret; 116 113 } 117 114 118 - int dvb_usb_get_hexline(const struct firmware *fw, struct hexline *hx, int *pos) 115 + static int dvb_usb_get_hexline(const struct firmware *fw, struct hexline *hx, 116 + int *pos) 119 117 { 120 118 u8 *b = (u8 *) &fw->data[*pos]; 121 119 int data_offs = 4; ··· 146 142 147 143 return *pos; 148 144 } 149 - EXPORT_SYMBOL(dvb_usb_get_hexline); 150 -
-1
drivers/media/dvb/dvb-usb/dvb-usb.h
··· 341 341 u8 data[255]; 342 342 u8 chk; 343 343 }; 344 - extern int dvb_usb_get_hexline(const struct firmware *, struct hexline *, int *); 345 344 extern int usb_cypress_load_firmware(struct usb_device *udev, const struct firmware *fw, int type); 346 345 347 346 #endif
+4 -2
drivers/media/dvb/dvb-usb/vp702x.c
··· 53 53 return ret; 54 54 } 55 55 56 - int vp702x_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8 *b, int blen) 56 + static int vp702x_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value, 57 + u16 index, u8 *b, int blen) 57 58 { 58 59 deb_xfer("out: req. %x, val: %x, ind: %x, buffer: ",req,value,index); 59 60 debug_dump(b,blen,deb_xfer); ··· 89 88 return ret; 90 89 } 91 90 92 - int vp702x_usb_inout_cmd(struct dvb_usb_device *d, u8 cmd, u8 *o, int olen, u8 *i, int ilen, int msec) 91 + static int vp702x_usb_inout_cmd(struct dvb_usb_device *d, u8 cmd, u8 *o, 92 + int olen, u8 *i, int ilen, int msec) 93 93 { 94 94 u8 bout[olen+2]; 95 95 u8 bin[ilen+1];
-2
drivers/media/dvb/dvb-usb/vp702x.h
··· 101 101 extern struct dvb_frontend * vp702x_fe_attach(struct dvb_usb_device *d); 102 102 103 103 extern int vp702x_usb_inout_op(struct dvb_usb_device *d, u8 *o, int olen, u8 *i, int ilen, int msec); 104 - extern int vp702x_usb_inout_cmd(struct dvb_usb_device *d, u8 cmd, u8 *o, int olen, u8 *i, int ilen, int msec); 105 104 extern int vp702x_usb_in_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8 *b, int blen); 106 - extern int vp702x_usb_out_op(struct dvb_usb_device *d, u8 req, u16 value, u16 index, u8 *b, int blen); 107 105 108 106 #endif
+4 -2
drivers/media/dvb/dvb-usb/vp7045-fe.c
··· 23 23 24 24 struct vp7045_fe_state { 25 25 struct dvb_frontend fe; 26 + struct dvb_frontend_ops ops; 27 + 26 28 struct dvb_usb_device *d; 27 29 }; 28 - 29 30 30 31 static int vp7045_fe_read_status(struct dvb_frontend* fe, fe_status_t *status) 31 32 { ··· 151 150 goto error; 152 151 153 152 s->d = d; 154 - s->fe.ops = &vp7045_fe_ops; 153 + memcpy(&s->ops, &vp7045_fe_ops, sizeof(struct dvb_frontend_ops)); 154 + s->fe.ops = &s->ops; 155 155 s->fe.demodulator_priv = s; 156 156 157 157 goto success;
-24
drivers/media/dvb/frontends/Kconfig
··· 28 28 help 29 29 A DVB-S tuner module. Say Y when you want to support this frontend. 30 30 31 - config DVB_TDA80XX 32 - tristate "Philips TDA8044 or TDA8083 based" 33 - depends on DVB_CORE 34 - help 35 - A DVB-S tuner module. Say Y when you want to support this frontend. 36 - 37 31 config DVB_MT312 38 32 tristate "Zarlink MT312 based" 39 33 depends on DVB_CORE ··· 133 139 comment "DVB-C (cable) frontends" 134 140 depends on DVB_CORE 135 141 136 - config DVB_ATMEL_AT76C651 137 - tristate "Atmel AT76C651 based" 138 - depends on DVB_CORE 139 - help 140 - A DVB-C tuner module. Say Y when you want to support this frontend. 141 - 142 142 config DVB_VES1820 143 143 tristate "VLSI VES1820 based" 144 144 depends on DVB_CORE ··· 153 165 154 166 comment "ATSC (North American/Korean Terresterial DTV) frontends" 155 167 depends on DVB_CORE 156 - 157 - config DVB_NXT2002 158 - tristate "Nxt2002 based" 159 - depends on DVB_CORE 160 - select FW_LOADER 161 - help 162 - An ATSC 8VSB tuner module. Say Y when you want to support this frontend. 163 - 164 - This driver needs external firmware. Please use the command 165 - "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to 166 - download/extract it, and then copy it to /usr/lib/hotplug/firmware 167 - or /lib/firmware (depending on configuration of firmware hotplug). 168 168 169 169 config DVB_NXT200X 170 170 tristate "Nextwave NXT2002/NXT2004 based"
-3
drivers/media/dvb/frontends/Makefile
··· 8 8 obj-$(CONFIG_DVB_STV0299) += stv0299.o 9 9 obj-$(CONFIG_DVB_SP8870) += sp8870.o 10 10 obj-$(CONFIG_DVB_CX22700) += cx22700.o 11 - obj-$(CONFIG_DVB_ATMEL_AT76C651) += at76c651.o 12 11 obj-$(CONFIG_DVB_CX24110) += cx24110.o 13 12 obj-$(CONFIG_DVB_TDA8083) += tda8083.o 14 13 obj-$(CONFIG_DVB_L64781) += l64781.o ··· 21 22 obj-$(CONFIG_DVB_NXT6000) += nxt6000.o 22 23 obj-$(CONFIG_DVB_MT352) += mt352.o 23 24 obj-$(CONFIG_DVB_CX22702) += cx22702.o 24 - obj-$(CONFIG_DVB_TDA80XX) += tda80xx.o 25 25 obj-$(CONFIG_DVB_TDA10021) += tda10021.o 26 26 obj-$(CONFIG_DVB_STV0297) += stv0297.o 27 - obj-$(CONFIG_DVB_NXT2002) += nxt2002.o 28 27 obj-$(CONFIG_DVB_NXT200X) += nxt200x.o 29 28 obj-$(CONFIG_DVB_OR51211) += or51211.o 30 29 obj-$(CONFIG_DVB_OR51132) += or51132.o
-450
drivers/media/dvb/frontends/at76c651.c
··· 1 - /* 2 - * at76c651.c 3 - * 4 - * Atmel DVB-C Frontend Driver (at76c651/tua6010xs) 5 - * 6 - * Copyright (C) 2001 fnbrd <fnbrd@gmx.de> 7 - * & 2002-2004 Andreas Oberritter <obi@linuxtv.org> 8 - * & 2003 Wolfram Joost <dbox2@frokaschwei.de> 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * You should have received a copy of the GNU General Public License 21 - * along with this program; if not, write to the Free Software 22 - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 - * 24 - * AT76C651 25 - * http://www.nalanda.nitc.ac.in/industry/datasheets/atmel/acrobat/doc1293.pdf 26 - * http://www.atmel.com/atmel/acrobat/doc1320.pdf 27 - */ 28 - 29 - #include <linux/init.h> 30 - #include <linux/module.h> 31 - #include <linux/moduleparam.h> 32 - #include <linux/kernel.h> 33 - #include <linux/string.h> 34 - #include <linux/slab.h> 35 - #include <linux/bitops.h> 36 - #include "dvb_frontend.h" 37 - #include "at76c651.h" 38 - 39 - 40 - struct at76c651_state { 41 - 42 - struct i2c_adapter* i2c; 43 - 44 - struct dvb_frontend_ops ops; 45 - 46 - const struct at76c651_config* config; 47 - 48 - struct dvb_frontend frontend; 49 - 50 - /* revision of the chip */ 51 - u8 revision; 52 - 53 - /* last QAM value set */ 54 - u8 qam; 55 - }; 56 - 57 - static int debug; 58 - #define dprintk(args...) \ 59 - do { \ 60 - if (debug) printk(KERN_DEBUG "at76c651: " args); \ 61 - } while (0) 62 - 63 - 64 - #if ! defined(__powerpc__) 65 - static __inline__ int __ilog2(unsigned long x) 66 - { 67 - int i; 68 - 69 - if (x == 0) 70 - return -1; 71 - 72 - for (i = 0; x != 0; i++) 73 - x >>= 1; 74 - 75 - return i - 1; 76 - } 77 - #endif 78 - 79 - static int at76c651_writereg(struct at76c651_state* state, u8 reg, u8 data) 80 - { 81 - int ret; 82 - u8 buf[] = { reg, data }; 83 - struct i2c_msg msg = 84 - { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; 85 - 86 - ret = i2c_transfer(state->i2c, &msg, 1); 87 - 88 - if (ret != 1) 89 - dprintk("%s: writereg error " 90 - "(reg == 0x%02x, val == 0x%02x, ret == %i)\n", 91 - __FUNCTION__, reg, data, ret); 92 - 93 - msleep(10); 94 - 95 - return (ret != 1) ? -EREMOTEIO : 0; 96 - } 97 - 98 - static u8 at76c651_readreg(struct at76c651_state* state, u8 reg) 99 - { 100 - int ret; 101 - u8 val; 102 - struct i2c_msg msg[] = { 103 - { .addr = state->config->demod_address, .flags = 0, .buf = &reg, .len = 1 }, 104 - { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = &val, .len = 1 } 105 - }; 106 - 107 - ret = i2c_transfer(state->i2c, msg, 2); 108 - 109 - if (ret != 2) 110 - dprintk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret); 111 - 112 - return val; 113 - } 114 - 115 - static int at76c651_reset(struct at76c651_state* state) 116 - { 117 - return at76c651_writereg(state, 0x07, 0x01); 118 - } 119 - 120 - static void at76c651_disable_interrupts(struct at76c651_state* state) 121 - { 122 - at76c651_writereg(state, 0x0b, 0x00); 123 - } 124 - 125 - static int at76c651_set_auto_config(struct at76c651_state *state) 126 - { 127 - /* 128 - * Autoconfig 129 - */ 130 - 131 - at76c651_writereg(state, 0x06, 0x01); 132 - 133 - /* 134 - * Performance optimizations, should be done after autoconfig 135 - */ 136 - 137 - at76c651_writereg(state, 0x10, 0x06); 138 - at76c651_writereg(state, 0x11, ((state->qam == 5) || (state->qam == 7)) ? 0x12 : 0x10); 139 - at76c651_writereg(state, 0x15, 0x28); 140 - at76c651_writereg(state, 0x20, 0x09); 141 - at76c651_writereg(state, 0x24, ((state->qam == 5) || (state->qam == 7)) ? 0xC0 : 0x90); 142 - at76c651_writereg(state, 0x30, 0x90); 143 - if (state->qam == 5) 144 - at76c651_writereg(state, 0x35, 0x2A); 145 - 146 - /* 147 - * Initialize A/D-converter 148 - */ 149 - 150 - if (state->revision == 0x11) { 151 - at76c651_writereg(state, 0x2E, 0x38); 152 - at76c651_writereg(state, 0x2F, 0x13); 153 - } 154 - 155 - at76c651_disable_interrupts(state); 156 - 157 - /* 158 - * Restart operation 159 - */ 160 - 161 - at76c651_reset(state); 162 - 163 - return 0; 164 - } 165 - 166 - static void at76c651_set_bbfreq(struct at76c651_state* state) 167 - { 168 - at76c651_writereg(state, 0x04, 0x3f); 169 - at76c651_writereg(state, 0x05, 0xee); 170 - } 171 - 172 - static int at76c651_set_symbol_rate(struct at76c651_state* state, u32 symbol_rate) 173 - { 174 - u8 exponent; 175 - u32 mantissa; 176 - 177 - if (symbol_rate > 9360000) 178 - return -EINVAL; 179 - 180 - /* 181 - * FREF = 57800 kHz 182 - * exponent = 10 + floor (log2(symbol_rate / FREF)) 183 - * mantissa = (symbol_rate / FREF) * (1 << (30 - exponent)) 184 - */ 185 - 186 - exponent = __ilog2((symbol_rate << 4) / 903125); 187 - mantissa = ((symbol_rate / 3125) * (1 << (24 - exponent))) / 289; 188 - 189 - at76c651_writereg(state, 0x00, mantissa >> 13); 190 - at76c651_writereg(state, 0x01, mantissa >> 5); 191 - at76c651_writereg(state, 0x02, (mantissa << 3) | exponent); 192 - 193 - return 0; 194 - } 195 - 196 - static int at76c651_set_qam(struct at76c651_state *state, fe_modulation_t qam) 197 - { 198 - switch (qam) { 199 - case QPSK: 200 - state->qam = 0x02; 201 - break; 202 - case QAM_16: 203 - state->qam = 0x04; 204 - break; 205 - case QAM_32: 206 - state->qam = 0x05; 207 - break; 208 - case QAM_64: 209 - state->qam = 0x06; 210 - break; 211 - case QAM_128: 212 - state->qam = 0x07; 213 - break; 214 - case QAM_256: 215 - state->qam = 0x08; 216 - break; 217 - #if 0 218 - case QAM_512: 219 - state->qam = 0x09; 220 - break; 221 - case QAM_1024: 222 - state->qam = 0x0A; 223 - break; 224 - #endif 225 - default: 226 - return -EINVAL; 227 - 228 - } 229 - 230 - return at76c651_writereg(state, 0x03, state->qam); 231 - } 232 - 233 - static int at76c651_set_inversion(struct at76c651_state* state, fe_spectral_inversion_t inversion) 234 - { 235 - u8 feciqinv = at76c651_readreg(state, 0x60); 236 - 237 - switch (inversion) { 238 - case INVERSION_OFF: 239 - feciqinv |= 0x02; 240 - feciqinv &= 0xFE; 241 - break; 242 - 243 - case INVERSION_ON: 244 - feciqinv |= 0x03; 245 - break; 246 - 247 - case INVERSION_AUTO: 248 - feciqinv &= 0xFC; 249 - break; 250 - 251 - default: 252 - return -EINVAL; 253 - } 254 - 255 - return at76c651_writereg(state, 0x60, feciqinv); 256 - } 257 - 258 - static int at76c651_set_parameters(struct dvb_frontend* fe, 259 - struct dvb_frontend_parameters *p) 260 - { 261 - int ret; 262 - struct at76c651_state* state = fe->demodulator_priv; 263 - 264 - at76c651_writereg(state, 0x0c, 0xc3); 265 - state->config->pll_set(fe, p); 266 - at76c651_writereg(state, 0x0c, 0xc2); 267 - 268 - if ((ret = at76c651_set_symbol_rate(state, p->u.qam.symbol_rate))) 269 - return ret; 270 - 271 - if ((ret = at76c651_set_inversion(state, p->inversion))) 272 - return ret; 273 - 274 - return at76c651_set_auto_config(state); 275 - } 276 - 277 - static int at76c651_set_defaults(struct dvb_frontend* fe) 278 - { 279 - struct at76c651_state* state = fe->demodulator_priv; 280 - 281 - at76c651_set_symbol_rate(state, 6900000); 282 - at76c651_set_qam(state, QAM_64); 283 - at76c651_set_bbfreq(state); 284 - at76c651_set_auto_config(state); 285 - 286 - if (state->config->pll_init) { 287 - at76c651_writereg(state, 0x0c, 0xc3); 288 - state->config->pll_init(fe); 289 - at76c651_writereg(state, 0x0c, 0xc2); 290 - } 291 - 292 - return 0; 293 - } 294 - 295 - static int at76c651_read_status(struct dvb_frontend* fe, fe_status_t* status) 296 - { 297 - struct at76c651_state* state = fe->demodulator_priv; 298 - u8 sync; 299 - 300 - /* 301 - * Bits: FEC, CAR, EQU, TIM, AGC2, AGC1, ADC, PLL (PLL=0) 302 - */ 303 - sync = at76c651_readreg(state, 0x80); 304 - *status = 0; 305 - 306 - if (sync & (0x04 | 0x10)) /* AGC1 || TIM */ 307 - *status |= FE_HAS_SIGNAL; 308 - if (sync & 0x10) /* TIM */ 309 - *status |= FE_HAS_CARRIER; 310 - if (sync & 0x80) /* FEC */ 311 - *status |= FE_HAS_VITERBI; 312 - if (sync & 0x40) /* CAR */ 313 - *status |= FE_HAS_SYNC; 314 - if ((sync & 0xF0) == 0xF0) /* TIM && EQU && CAR && FEC */ 315 - *status |= FE_HAS_LOCK; 316 - 317 - return 0; 318 - } 319 - 320 - static int at76c651_read_ber(struct dvb_frontend* fe, u32* ber) 321 - { 322 - struct at76c651_state* state = fe->demodulator_priv; 323 - 324 - *ber = (at76c651_readreg(state, 0x81) & 0x0F) << 16; 325 - *ber |= at76c651_readreg(state, 0x82) << 8; 326 - *ber |= at76c651_readreg(state, 0x83); 327 - *ber *= 10; 328 - 329 - return 0; 330 - } 331 - 332 - static int at76c651_read_signal_strength(struct dvb_frontend* fe, u16* strength) 333 - { 334 - struct at76c651_state* state = fe->demodulator_priv; 335 - 336 - u8 gain = ~at76c651_readreg(state, 0x91); 337 - *strength = (gain << 8) | gain; 338 - 339 - return 0; 340 - } 341 - 342 - static int at76c651_read_snr(struct dvb_frontend* fe, u16* snr) 343 - { 344 - struct at76c651_state* state = fe->demodulator_priv; 345 - 346 - *snr = 0xFFFF - 347 - ((at76c651_readreg(state, 0x8F) << 8) | 348 - at76c651_readreg(state, 0x90)); 349 - 350 - return 0; 351 - } 352 - 353 - static int at76c651_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) 354 - { 355 - struct at76c651_state* state = fe->demodulator_priv; 356 - 357 - *ucblocks = at76c651_readreg(state, 0x82); 358 - 359 - return 0; 360 - } 361 - 362 - static int at76c651_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *fesettings) 363 - { 364 - fesettings->min_delay_ms = 50; 365 - fesettings->step_size = 0; 366 - fesettings->max_drift = 0; 367 - return 0; 368 - } 369 - 370 - static void at76c651_release(struct dvb_frontend* fe) 371 - { 372 - struct at76c651_state* state = fe->demodulator_priv; 373 - kfree(state); 374 - } 375 - 376 - static struct dvb_frontend_ops at76c651_ops; 377 - 378 - struct dvb_frontend* at76c651_attach(const struct at76c651_config* config, 379 - struct i2c_adapter* i2c) 380 - { 381 - struct at76c651_state* state = NULL; 382 - 383 - /* allocate memory for the internal state */ 384 - state = kmalloc(sizeof(struct at76c651_state), GFP_KERNEL); 385 - if (state == NULL) goto error; 386 - 387 - /* setup the state */ 388 - state->config = config; 389 - state->qam = 0; 390 - 391 - /* check if the demod is there */ 392 - if (at76c651_readreg(state, 0x0e) != 0x65) goto error; 393 - 394 - /* finalise state setup */ 395 - state->i2c = i2c; 396 - state->revision = at76c651_readreg(state, 0x0f) & 0xfe; 397 - memcpy(&state->ops, &at76c651_ops, sizeof(struct dvb_frontend_ops)); 398 - 399 - /* create dvb_frontend */ 400 - state->frontend.ops = &state->ops; 401 - state->frontend.demodulator_priv = state; 402 - return &state->frontend; 403 - 404 - error: 405 - kfree(state); 406 - return NULL; 407 - } 408 - 409 - static struct dvb_frontend_ops at76c651_ops = { 410 - 411 - .info = { 412 - .name = "Atmel AT76C651B DVB-C", 413 - .type = FE_QAM, 414 - .frequency_min = 48250000, 415 - .frequency_max = 863250000, 416 - .frequency_stepsize = 62500, 417 - /*.frequency_tolerance = */ /* FIXME: 12% of SR */ 418 - .symbol_rate_min = 0, /* FIXME */ 419 - .symbol_rate_max = 9360000, /* FIXME */ 420 - .symbol_rate_tolerance = 4000, 421 - .caps = FE_CAN_INVERSION_AUTO | 422 - FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 423 - FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | 424 - FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | 425 - FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | 426 - FE_CAN_MUTE_TS | FE_CAN_QAM_256 | FE_CAN_RECOVER 427 - }, 428 - 429 - .release = at76c651_release, 430 - 431 - .init = at76c651_set_defaults, 432 - 433 - .set_frontend = at76c651_set_parameters, 434 - .get_tune_settings = at76c651_get_tune_settings, 435 - 436 - .read_status = at76c651_read_status, 437 - .read_ber = at76c651_read_ber, 438 - .read_signal_strength = at76c651_read_signal_strength, 439 - .read_snr = at76c651_read_snr, 440 - .read_ucblocks = at76c651_read_ucblocks, 441 - }; 442 - 443 - module_param(debug, int, 0644); 444 - MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 445 - 446 - MODULE_DESCRIPTION("Atmel AT76C651 DVB-C Demodulator Driver"); 447 - MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>"); 448 - MODULE_LICENSE("GPL"); 449 - 450 - EXPORT_SYMBOL(at76c651_attach);
-47
drivers/media/dvb/frontends/at76c651.h
··· 1 - /* 2 - * at76c651.c 3 - * 4 - * Atmel DVB-C Frontend Driver (at76c651) 5 - * 6 - * Copyright (C) 2001 fnbrd <fnbrd@gmx.de> 7 - * & 2002-2004 Andreas Oberritter <obi@linuxtv.org> 8 - * & 2003 Wolfram Joost <dbox2@frokaschwei.de> 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - * 15 - * This program is distributed in the hope that it will be useful, 16 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 - * GNU General Public License for more details. 19 - * 20 - * You should have received a copy of the GNU General Public License 21 - * along with this program; if not, write to the Free Software 22 - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 23 - * 24 - * AT76C651 25 - * http://www.nalanda.nitc.ac.in/industry/datasheets/atmel/acrobat/doc1293.pdf 26 - * http://www.atmel.com/atmel/acrobat/doc1320.pdf 27 - */ 28 - 29 - #ifndef AT76C651_H 30 - #define AT76C651_H 31 - 32 - #include <linux/dvb/frontend.h> 33 - 34 - struct at76c651_config 35 - { 36 - /* the demodulator's i2c address */ 37 - u8 demod_address; 38 - 39 - /* PLL maintenance */ 40 - int (*pll_init)(struct dvb_frontend* fe); 41 - int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params); 42 - }; 43 - 44 - extern struct dvb_frontend* at76c651_attach(const struct at76c651_config* config, 45 - struct i2c_adapter* i2c); 46 - 47 - #endif // AT76C651_H
+4 -4
drivers/media/dvb/frontends/dvb-pll.c
··· 326 326 }; 327 327 EXPORT_SYMBOL(dvb_pll_tuv1236d); 328 328 329 - /* Samsung TBMV30111IN 329 + /* Samsung TBMV30111IN / TBMV30712IN1 330 330 * used in Air2PC ATSC - 2nd generation (nxt2002) 331 331 */ 332 - struct dvb_pll_desc dvb_pll_tbmv30111in = { 333 - .name = "Samsung TBMV30111IN", 332 + struct dvb_pll_desc dvb_pll_samsung_tbmv = { 333 + .name = "Samsung TBMV30111IN / TBMV30712IN1", 334 334 .min = 54000000, 335 335 .max = 860000000, 336 336 .count = 6, ··· 343 343 { 999999999, 44000000, 166666, 0xfc, 0x02 }, 344 344 } 345 345 }; 346 - EXPORT_SYMBOL(dvb_pll_tbmv30111in); 346 + EXPORT_SYMBOL(dvb_pll_samsung_tbmv); 347 347 348 348 /* 349 349 * Philips SD1878 Tuner.
+1 -1
drivers/media/dvb/frontends/dvb-pll.h
··· 38 38 39 39 extern struct dvb_pll_desc dvb_pll_tuv1236d; 40 40 extern struct dvb_pll_desc dvb_pll_tdhu2; 41 - extern struct dvb_pll_desc dvb_pll_tbmv30111in; 41 + extern struct dvb_pll_desc dvb_pll_samsung_tbmv; 42 42 extern struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261; 43 43 44 44 int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf,
-706
drivers/media/dvb/frontends/nxt2002.c
··· 1 - /* 2 - Support for B2C2/BBTI Technisat Air2PC - ATSC 3 - 4 - Copyright (C) 2004 Taylor Jacob <rtjacob@earthlink.net> 5 - 6 - This program is free software; you can redistribute it and/or modify 7 - it under the terms of the GNU General Public License as published by 8 - the Free Software Foundation; either version 2 of the License, or 9 - (at your option) any later version. 10 - 11 - This program is distributed in the hope that it will be useful, 12 - but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - GNU General Public License for more details. 15 - 16 - You should have received a copy of the GNU General Public License 17 - along with this program; if not, write to the Free Software 18 - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 - 20 - */ 21 - 22 - /* 23 - * This driver needs external firmware. Please use the command 24 - * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" to 25 - * download/extract it, and then copy it to /usr/lib/hotplug/firmware 26 - * or /lib/firmware (depending on configuration of firmware hotplug). 27 - */ 28 - #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw" 29 - #define CRC_CCIT_MASK 0x1021 30 - 31 - #include <linux/init.h> 32 - #include <linux/module.h> 33 - #include <linux/moduleparam.h> 34 - #include <linux/device.h> 35 - #include <linux/firmware.h> 36 - #include <linux/string.h> 37 - #include <linux/slab.h> 38 - 39 - #include "dvb_frontend.h" 40 - #include "nxt2002.h" 41 - 42 - struct nxt2002_state { 43 - 44 - struct i2c_adapter* i2c; 45 - struct dvb_frontend_ops ops; 46 - const struct nxt2002_config* config; 47 - struct dvb_frontend frontend; 48 - 49 - /* demodulator private data */ 50 - u8 initialised:1; 51 - }; 52 - 53 - static int debug; 54 - #define dprintk(args...) \ 55 - do { \ 56 - if (debug) printk(KERN_DEBUG "nxt2002: " args); \ 57 - } while (0) 58 - 59 - static int i2c_writebytes (struct nxt2002_state* state, u8 reg, u8 *buf, u8 len) 60 - { 61 - /* probbably a much better way or doing this */ 62 - u8 buf2 [256],x; 63 - int err; 64 - struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 }; 65 - 66 - buf2[0] = reg; 67 - for (x = 0 ; x < len ; x++) 68 - buf2[x+1] = buf[x]; 69 - 70 - if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { 71 - printk ("%s: i2c write error (addr %02x, err == %i)\n", 72 - __FUNCTION__, state->config->demod_address, err); 73 - return -EREMOTEIO; 74 - } 75 - 76 - return 0; 77 - } 78 - 79 - static u8 i2c_readbytes (struct nxt2002_state* state, u8 reg, u8* buf, u8 len) 80 - { 81 - u8 reg2 [] = { reg }; 82 - 83 - struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 }, 84 - { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } }; 85 - 86 - int err; 87 - 88 - if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) { 89 - printk ("%s: i2c read error (addr %02x, err == %i)\n", 90 - __FUNCTION__, state->config->demod_address, err); 91 - return -EREMOTEIO; 92 - } 93 - 94 - return 0; 95 - } 96 - 97 - static u16 nxt2002_crc(u16 crc, u8 c) 98 - { 99 - 100 - u8 i; 101 - u16 input = (u16) c & 0xFF; 102 - 103 - input<<=8; 104 - for(i=0 ;i<8 ;i++) { 105 - if((crc ^ input) & 0x8000) 106 - crc=(crc<<1)^CRC_CCIT_MASK; 107 - else 108 - crc<<=1; 109 - input<<=1; 110 - } 111 - return crc; 112 - } 113 - 114 - static int nxt2002_writereg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len) 115 - { 116 - u8 buf; 117 - dprintk("%s\n", __FUNCTION__); 118 - 119 - /* set multi register length */ 120 - i2c_writebytes(state,0x34,&len,1); 121 - 122 - /* set mutli register register */ 123 - i2c_writebytes(state,0x35,&reg,1); 124 - 125 - /* send the actual data */ 126 - i2c_writebytes(state,0x36,data,len); 127 - 128 - /* toggle the multireg write bit*/ 129 - buf = 0x02; 130 - i2c_writebytes(state,0x21,&buf,1); 131 - 132 - i2c_readbytes(state,0x21,&buf,1); 133 - 134 - if ((buf & 0x02) == 0) 135 - return 0; 136 - 137 - dprintk("Error writing multireg register %02X\n",reg); 138 - 139 - return 0; 140 - } 141 - 142 - static int nxt2002_readreg_multibyte (struct nxt2002_state* state, u8 reg, u8* data, u8 len) 143 - { 144 - u8 len2; 145 - dprintk("%s\n", __FUNCTION__); 146 - 147 - /* set multi register length */ 148 - len2 = len & 0x80; 149 - i2c_writebytes(state,0x34,&len2,1); 150 - 151 - /* set mutli register register */ 152 - i2c_writebytes(state,0x35,&reg,1); 153 - 154 - /* send the actual data */ 155 - i2c_readbytes(state,reg,data,len); 156 - 157 - return 0; 158 - } 159 - 160 - static void nxt2002_microcontroller_stop (struct nxt2002_state* state) 161 - { 162 - u8 buf[2],counter = 0; 163 - dprintk("%s\n", __FUNCTION__); 164 - 165 - buf[0] = 0x80; 166 - i2c_writebytes(state,0x22,buf,1); 167 - 168 - while (counter < 20) { 169 - i2c_readbytes(state,0x31,buf,1); 170 - if (buf[0] & 0x40) 171 - return; 172 - msleep(10); 173 - counter++; 174 - } 175 - 176 - dprintk("Timeout waiting for micro to stop.. This is ok after firmware upload\n"); 177 - return; 178 - } 179 - 180 - static void nxt2002_microcontroller_start (struct nxt2002_state* state) 181 - { 182 - u8 buf; 183 - dprintk("%s\n", __FUNCTION__); 184 - 185 - buf = 0x00; 186 - i2c_writebytes(state,0x22,&buf,1); 187 - } 188 - 189 - static int nxt2002_writetuner (struct nxt2002_state* state, u8* data) 190 - { 191 - u8 buf,count = 0; 192 - 193 - dprintk("Tuner Bytes: %02X %02X %02X %02X\n",data[0],data[1],data[2],data[3]); 194 - 195 - dprintk("%s\n", __FUNCTION__); 196 - /* stop the micro first */ 197 - nxt2002_microcontroller_stop(state); 198 - 199 - /* set the i2c transfer speed to the tuner */ 200 - buf = 0x03; 201 - i2c_writebytes(state,0x20,&buf,1); 202 - 203 - /* setup to transfer 4 bytes via i2c */ 204 - buf = 0x04; 205 - i2c_writebytes(state,0x34,&buf,1); 206 - 207 - /* write actual tuner bytes */ 208 - i2c_writebytes(state,0x36,data,4); 209 - 210 - /* set tuner i2c address */ 211 - buf = 0xC2; 212 - i2c_writebytes(state,0x35,&buf,1); 213 - 214 - /* write UC Opmode to begin transfer */ 215 - buf = 0x80; 216 - i2c_writebytes(state,0x21,&buf,1); 217 - 218 - while (count < 20) { 219 - i2c_readbytes(state,0x21,&buf,1); 220 - if ((buf & 0x80)== 0x00) 221 - return 0; 222 - msleep(100); 223 - count++; 224 - } 225 - 226 - printk("nxt2002: timeout error writing tuner\n"); 227 - return 0; 228 - } 229 - 230 - static void nxt2002_agc_reset(struct nxt2002_state* state) 231 - { 232 - u8 buf; 233 - dprintk("%s\n", __FUNCTION__); 234 - 235 - buf = 0x08; 236 - i2c_writebytes(state,0x08,&buf,1); 237 - 238 - buf = 0x00; 239 - i2c_writebytes(state,0x08,&buf,1); 240 - 241 - return; 242 - } 243 - 244 - static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw) 245 - { 246 - 247 - struct nxt2002_state* state = fe->demodulator_priv; 248 - u8 buf[256],written = 0,chunkpos = 0; 249 - u16 rambase,position,crc = 0; 250 - 251 - dprintk("%s\n", __FUNCTION__); 252 - dprintk("Firmware is %zu bytes\n",fw->size); 253 - 254 - /* Get the RAM base for this nxt2002 */ 255 - i2c_readbytes(state,0x10,buf,1); 256 - 257 - if (buf[0] & 0x10) 258 - rambase = 0x1000; 259 - else 260 - rambase = 0x0000; 261 - 262 - dprintk("rambase on this nxt2002 is %04X\n",rambase); 263 - 264 - /* Hold the micro in reset while loading firmware */ 265 - buf[0] = 0x80; 266 - i2c_writebytes(state,0x2B,buf,1); 267 - 268 - for (position = 0; position < fw->size ; position++) { 269 - if (written == 0) { 270 - crc = 0; 271 - chunkpos = 0x28; 272 - buf[0] = ((rambase + position) >> 8); 273 - buf[1] = (rambase + position) & 0xFF; 274 - buf[2] = 0x81; 275 - /* write starting address */ 276 - i2c_writebytes(state,0x29,buf,3); 277 - } 278 - written++; 279 - chunkpos++; 280 - 281 - if ((written % 4) == 0) 282 - i2c_writebytes(state,chunkpos,&fw->data[position-3],4); 283 - 284 - crc = nxt2002_crc(crc,fw->data[position]); 285 - 286 - if ((written == 255) || (position+1 == fw->size)) { 287 - /* write remaining bytes of firmware */ 288 - i2c_writebytes(state, chunkpos+4-(written %4), 289 - &fw->data[position-(written %4) + 1], 290 - written %4); 291 - buf[0] = crc << 8; 292 - buf[1] = crc & 0xFF; 293 - 294 - /* write crc */ 295 - i2c_writebytes(state,0x2C,buf,2); 296 - 297 - /* do a read to stop things */ 298 - i2c_readbytes(state,0x2A,buf,1); 299 - 300 - /* set transfer mode to complete */ 301 - buf[0] = 0x80; 302 - i2c_writebytes(state,0x2B,buf,1); 303 - 304 - written = 0; 305 - } 306 - } 307 - 308 - printk ("done.\n"); 309 - return 0; 310 - }; 311 - 312 - static int nxt2002_setup_frontend_parameters (struct dvb_frontend* fe, 313 - struct dvb_frontend_parameters *p) 314 - { 315 - struct nxt2002_state* state = fe->demodulator_priv; 316 - u32 freq = 0; 317 - u16 tunerfreq = 0; 318 - u8 buf[4]; 319 - 320 - freq = 44000 + ( p->frequency / 1000 ); 321 - 322 - dprintk("freq = %d p->frequency = %d\n",freq,p->frequency); 323 - 324 - tunerfreq = freq * 24/4000; 325 - 326 - buf[0] = (tunerfreq >> 8) & 0x7F; 327 - buf[1] = (tunerfreq & 0xFF); 328 - 329 - if (p->frequency <= 214000000) { 330 - buf[2] = 0x84 + (0x06 << 3); 331 - buf[3] = (p->frequency <= 172000000) ? 0x01 : 0x02; 332 - } else if (p->frequency <= 721000000) { 333 - buf[2] = 0x84 + (0x07 << 3); 334 - buf[3] = (p->frequency <= 467000000) ? 0x02 : 0x08; 335 - } else if (p->frequency <= 841000000) { 336 - buf[2] = 0x84 + (0x0E << 3); 337 - buf[3] = 0x08; 338 - } else { 339 - buf[2] = 0x84 + (0x0F << 3); 340 - buf[3] = 0x02; 341 - } 342 - 343 - /* write frequency information */ 344 - nxt2002_writetuner(state,buf); 345 - 346 - /* reset the agc now that tuning has been completed */ 347 - nxt2002_agc_reset(state); 348 - 349 - /* set target power level */ 350 - switch (p->u.vsb.modulation) { 351 - case QAM_64: 352 - case QAM_256: 353 - buf[0] = 0x74; 354 - break; 355 - case VSB_8: 356 - buf[0] = 0x70; 357 - break; 358 - default: 359 - return -EINVAL; 360 - break; 361 - } 362 - i2c_writebytes(state,0x42,buf,1); 363 - 364 - /* configure sdm */ 365 - buf[0] = 0x87; 366 - i2c_writebytes(state,0x57,buf,1); 367 - 368 - /* write sdm1 input */ 369 - buf[0] = 0x10; 370 - buf[1] = 0x00; 371 - nxt2002_writereg_multibyte(state,0x58,buf,2); 372 - 373 - /* write sdmx input */ 374 - switch (p->u.vsb.modulation) { 375 - case QAM_64: 376 - buf[0] = 0x68; 377 - break; 378 - case QAM_256: 379 - buf[0] = 0x64; 380 - break; 381 - case VSB_8: 382 - buf[0] = 0x60; 383 - break; 384 - default: 385 - return -EINVAL; 386 - break; 387 - } 388 - buf[1] = 0x00; 389 - nxt2002_writereg_multibyte(state,0x5C,buf,2); 390 - 391 - /* write adc power lpf fc */ 392 - buf[0] = 0x05; 393 - i2c_writebytes(state,0x43,buf,1); 394 - 395 - /* write adc power lpf fc */ 396 - buf[0] = 0x05; 397 - i2c_writebytes(state,0x43,buf,1); 398 - 399 - /* write accumulator2 input */ 400 - buf[0] = 0x80; 401 - buf[1] = 0x00; 402 - nxt2002_writereg_multibyte(state,0x4B,buf,2); 403 - 404 - /* write kg1 */ 405 - buf[0] = 0x00; 406 - i2c_writebytes(state,0x4D,buf,1); 407 - 408 - /* write sdm12 lpf fc */ 409 - buf[0] = 0x44; 410 - i2c_writebytes(state,0x55,buf,1); 411 - 412 - /* write agc control reg */ 413 - buf[0] = 0x04; 414 - i2c_writebytes(state,0x41,buf,1); 415 - 416 - /* write agc ucgp0 */ 417 - switch (p->u.vsb.modulation) { 418 - case QAM_64: 419 - buf[0] = 0x02; 420 - break; 421 - case QAM_256: 422 - buf[0] = 0x03; 423 - break; 424 - case VSB_8: 425 - buf[0] = 0x00; 426 - break; 427 - default: 428 - return -EINVAL; 429 - break; 430 - } 431 - i2c_writebytes(state,0x30,buf,1); 432 - 433 - /* write agc control reg */ 434 - buf[0] = 0x00; 435 - i2c_writebytes(state,0x41,buf,1); 436 - 437 - /* write accumulator2 input */ 438 - buf[0] = 0x80; 439 - buf[1] = 0x00; 440 - nxt2002_writereg_multibyte(state,0x49,buf,2); 441 - nxt2002_writereg_multibyte(state,0x4B,buf,2); 442 - 443 - /* write agc control reg */ 444 - buf[0] = 0x04; 445 - i2c_writebytes(state,0x41,buf,1); 446 - 447 - nxt2002_microcontroller_start(state); 448 - 449 - /* adjacent channel detection should be done here, but I don't 450 - have any stations with this need so I cannot test it */ 451 - 452 - return 0; 453 - } 454 - 455 - static int nxt2002_read_status(struct dvb_frontend* fe, fe_status_t* status) 456 - { 457 - struct nxt2002_state* state = fe->demodulator_priv; 458 - u8 lock; 459 - i2c_readbytes(state,0x31,&lock,1); 460 - 461 - *status = 0; 462 - if (lock & 0x20) { 463 - *status |= FE_HAS_SIGNAL; 464 - *status |= FE_HAS_CARRIER; 465 - *status |= FE_HAS_VITERBI; 466 - *status |= FE_HAS_SYNC; 467 - *status |= FE_HAS_LOCK; 468 - } 469 - return 0; 470 - } 471 - 472 - static int nxt2002_read_ber(struct dvb_frontend* fe, u32* ber) 473 - { 474 - struct nxt2002_state* state = fe->demodulator_priv; 475 - u8 b[3]; 476 - 477 - nxt2002_readreg_multibyte(state,0xE6,b,3); 478 - 479 - *ber = ((b[0] << 8) + b[1]) * 8; 480 - 481 - return 0; 482 - } 483 - 484 - static int nxt2002_read_signal_strength(struct dvb_frontend* fe, u16* strength) 485 - { 486 - struct nxt2002_state* state = fe->demodulator_priv; 487 - u8 b[2]; 488 - u16 temp = 0; 489 - 490 - /* setup to read cluster variance */ 491 - b[0] = 0x00; 492 - i2c_writebytes(state,0xA1,b,1); 493 - 494 - /* get multreg val */ 495 - nxt2002_readreg_multibyte(state,0xA6,b,2); 496 - 497 - temp = (b[0] << 8) | b[1]; 498 - *strength = ((0x7FFF - temp) & 0x0FFF) * 16; 499 - 500 - return 0; 501 - } 502 - 503 - static int nxt2002_read_snr(struct dvb_frontend* fe, u16* snr) 504 - { 505 - 506 - struct nxt2002_state* state = fe->demodulator_priv; 507 - u8 b[2]; 508 - u16 temp = 0, temp2; 509 - u32 snrdb = 0; 510 - 511 - /* setup to read cluster variance */ 512 - b[0] = 0x00; 513 - i2c_writebytes(state,0xA1,b,1); 514 - 515 - /* get multreg val from 0xA6 */ 516 - nxt2002_readreg_multibyte(state,0xA6,b,2); 517 - 518 - temp = (b[0] << 8) | b[1]; 519 - temp2 = 0x7FFF - temp; 520 - 521 - /* snr will be in db */ 522 - if (temp2 > 0x7F00) 523 - snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) ); 524 - else if (temp2 > 0x7EC0) 525 - snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) ); 526 - else if (temp2 > 0x7C00) 527 - snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) ); 528 - else 529 - snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) ); 530 - 531 - /* the value reported back from the frontend will be FFFF=32db 0000=0db */ 532 - 533 - *snr = snrdb * (0xFFFF/32000); 534 - 535 - return 0; 536 - } 537 - 538 - static int nxt2002_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) 539 - { 540 - struct nxt2002_state* state = fe->demodulator_priv; 541 - u8 b[3]; 542 - 543 - nxt2002_readreg_multibyte(state,0xE6,b,3); 544 - *ucblocks = b[2]; 545 - 546 - return 0; 547 - } 548 - 549 - static int nxt2002_sleep(struct dvb_frontend* fe) 550 - { 551 - return 0; 552 - } 553 - 554 - static int nxt2002_init(struct dvb_frontend* fe) 555 - { 556 - struct nxt2002_state* state = fe->demodulator_priv; 557 - const struct firmware *fw; 558 - int ret; 559 - u8 buf[2]; 560 - 561 - if (!state->initialised) { 562 - /* request the firmware, this will block until someone uploads it */ 563 - printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE); 564 - ret = state->config->request_firmware(fe, &fw, NXT2002_DEFAULT_FIRMWARE); 565 - printk("nxt2002: Waiting for firmware upload(2)...\n"); 566 - if (ret) { 567 - printk("nxt2002: no firmware upload (timeout or file not found?)\n"); 568 - return ret; 569 - } 570 - 571 - ret = nxt2002_load_firmware(fe, fw); 572 - if (ret) { 573 - printk("nxt2002: writing firmware to device failed\n"); 574 - release_firmware(fw); 575 - return ret; 576 - } 577 - printk("nxt2002: firmware upload complete\n"); 578 - 579 - /* Put the micro into reset */ 580 - nxt2002_microcontroller_stop(state); 581 - 582 - /* ensure transfer is complete */ 583 - buf[0]=0; 584 - i2c_writebytes(state,0x2B,buf,1); 585 - 586 - /* Put the micro into reset for real this time */ 587 - nxt2002_microcontroller_stop(state); 588 - 589 - /* soft reset everything (agc,frontend,eq,fec)*/ 590 - buf[0] = 0x0F; 591 - i2c_writebytes(state,0x08,buf,1); 592 - buf[0] = 0x00; 593 - i2c_writebytes(state,0x08,buf,1); 594 - 595 - /* write agc sdm configure */ 596 - buf[0] = 0xF1; 597 - i2c_writebytes(state,0x57,buf,1); 598 - 599 - /* write mod output format */ 600 - buf[0] = 0x20; 601 - i2c_writebytes(state,0x09,buf,1); 602 - 603 - /* write fec mpeg mode */ 604 - buf[0] = 0x7E; 605 - buf[1] = 0x00; 606 - i2c_writebytes(state,0xE9,buf,2); 607 - 608 - /* write mux selection */ 609 - buf[0] = 0x00; 610 - i2c_writebytes(state,0xCC,buf,1); 611 - 612 - state->initialised = 1; 613 - } 614 - 615 - return 0; 616 - } 617 - 618 - static int nxt2002_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings) 619 - { 620 - fesettings->min_delay_ms = 500; 621 - fesettings->step_size = 0; 622 - fesettings->max_drift = 0; 623 - return 0; 624 - } 625 - 626 - static void nxt2002_release(struct dvb_frontend* fe) 627 - { 628 - struct nxt2002_state* state = fe->demodulator_priv; 629 - kfree(state); 630 - } 631 - 632 - static struct dvb_frontend_ops nxt2002_ops; 633 - 634 - struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config, 635 - struct i2c_adapter* i2c) 636 - { 637 - struct nxt2002_state* state = NULL; 638 - u8 buf [] = {0,0,0,0,0}; 639 - 640 - /* allocate memory for the internal state */ 641 - state = kmalloc(sizeof(struct nxt2002_state), GFP_KERNEL); 642 - if (state == NULL) goto error; 643 - 644 - /* setup the state */ 645 - state->config = config; 646 - state->i2c = i2c; 647 - memcpy(&state->ops, &nxt2002_ops, sizeof(struct dvb_frontend_ops)); 648 - state->initialised = 0; 649 - 650 - /* Check the first 5 registers to ensure this a revision we can handle */ 651 - 652 - i2c_readbytes(state, 0x00, buf, 5); 653 - if (buf[0] != 0x04) goto error; /* device id */ 654 - if (buf[1] != 0x02) goto error; /* fab id */ 655 - if (buf[2] != 0x11) goto error; /* month */ 656 - if (buf[3] != 0x20) goto error; /* year msb */ 657 - if (buf[4] != 0x00) goto error; /* year lsb */ 658 - 659 - /* create dvb_frontend */ 660 - state->frontend.ops = &state->ops; 661 - state->frontend.demodulator_priv = state; 662 - return &state->frontend; 663 - 664 - error: 665 - kfree(state); 666 - return NULL; 667 - } 668 - 669 - static struct dvb_frontend_ops nxt2002_ops = { 670 - 671 - .info = { 672 - .name = "Nextwave nxt2002 VSB/QAM frontend", 673 - .type = FE_ATSC, 674 - .frequency_min = 54000000, 675 - .frequency_max = 860000000, 676 - /* stepsize is just a guess */ 677 - .frequency_stepsize = 166666, 678 - .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 679 - FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 680 - FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256 681 - }, 682 - 683 - .release = nxt2002_release, 684 - 685 - .init = nxt2002_init, 686 - .sleep = nxt2002_sleep, 687 - 688 - .set_frontend = nxt2002_setup_frontend_parameters, 689 - .get_tune_settings = nxt2002_get_tune_settings, 690 - 691 - .read_status = nxt2002_read_status, 692 - .read_ber = nxt2002_read_ber, 693 - .read_signal_strength = nxt2002_read_signal_strength, 694 - .read_snr = nxt2002_read_snr, 695 - .read_ucblocks = nxt2002_read_ucblocks, 696 - 697 - }; 698 - 699 - module_param(debug, int, 0644); 700 - MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 701 - 702 - MODULE_DESCRIPTION("NXT2002 ATSC (8VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver"); 703 - MODULE_AUTHOR("Taylor Jacob"); 704 - MODULE_LICENSE("GPL"); 705 - 706 - EXPORT_SYMBOL(nxt2002_attach);
-23
drivers/media/dvb/frontends/nxt2002.h
··· 1 - /* 2 - Driver for the Nxt2002 demodulator 3 - */ 4 - 5 - #ifndef NXT2002_H 6 - #define NXT2002_H 7 - 8 - #include <linux/dvb/frontend.h> 9 - #include <linux/firmware.h> 10 - 11 - struct nxt2002_config 12 - { 13 - /* the demodulator's i2c address */ 14 - u8 demod_address; 15 - 16 - /* request firmware for device */ 17 - int (*request_firmware)(struct dvb_frontend* fe, const struct firmware **fw, char* name); 18 - }; 19 - 20 - extern struct dvb_frontend* nxt2002_attach(const struct nxt2002_config* config, 21 - struct i2c_adapter* i2c); 22 - 23 - #endif // NXT2002_H
+50 -8
drivers/media/dvb/frontends/nxt200x.c
··· 1 1 /* 2 2 * Support for NXT2002 and NXT2004 - VSB/QAM 3 3 * 4 - * Copyright (C) 2005 Kirk Lapray (kirk.lapray@gmail.com) 4 + * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com> 5 + * Copyright (C) 2006 Michael Krufky <mkrufky@m1k.net> 5 6 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net> 6 - * and nxt2004 by Jean-Francois Thibert (jeanfrancois@sagetv.com) 7 + * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com> 7 8 * 8 9 * This program is free software; you can redistribute it and/or modify 9 10 * it under the terms of the GNU General Public License as published by ··· 615 614 /* write sdm1 input */ 616 615 buf[0] = 0x10; 617 616 buf[1] = 0x00; 618 - nxt200x_writebytes(state, 0x58, buf, 2); 617 + switch (state->demod_chip) { 618 + case NXT2002: 619 + nxt200x_writereg_multibyte(state, 0x58, buf, 2); 620 + break; 621 + case NXT2004: 622 + nxt200x_writebytes(state, 0x58, buf, 2); 623 + break; 624 + default: 625 + return -EINVAL; 626 + break; 627 + } 619 628 620 629 /* write sdmx input */ 621 630 switch (p->u.vsb.modulation) { ··· 643 632 break; 644 633 } 645 634 buf[1] = 0x00; 646 - nxt200x_writebytes(state, 0x5C, buf, 2); 635 + switch (state->demod_chip) { 636 + case NXT2002: 637 + nxt200x_writereg_multibyte(state, 0x5C, buf, 2); 638 + break; 639 + case NXT2004: 640 + nxt200x_writebytes(state, 0x5C, buf, 2); 641 + break; 642 + default: 643 + return -EINVAL; 644 + break; 645 + } 647 646 648 647 /* write adc power lpf fc */ 649 648 buf[0] = 0x05; ··· 669 648 /* write accumulator2 input */ 670 649 buf[0] = 0x80; 671 650 buf[1] = 0x00; 672 - nxt200x_writebytes(state, 0x4B, buf, 2); 651 + switch (state->demod_chip) { 652 + case NXT2002: 653 + nxt200x_writereg_multibyte(state, 0x4B, buf, 2); 654 + break; 655 + case NXT2004: 656 + nxt200x_writebytes(state, 0x4B, buf, 2); 657 + break; 658 + default: 659 + return -EINVAL; 660 + break; 661 + } 673 662 674 663 /* write kg1 */ 675 664 buf[0] = 0x00; ··· 745 714 /* write accumulator2 input */ 746 715 buf[0] = 0x80; 747 716 buf[1] = 0x00; 748 - nxt200x_writebytes(state, 0x49, buf,2); 749 - nxt200x_writebytes(state, 0x4B, buf,2); 717 + switch (state->demod_chip) { 718 + case NXT2002: 719 + nxt200x_writereg_multibyte(state, 0x49, buf, 2); 720 + nxt200x_writereg_multibyte(state, 0x4B, buf, 2); 721 + break; 722 + case NXT2004: 723 + nxt200x_writebytes(state, 0x49, buf, 2); 724 + nxt200x_writebytes(state, 0x4B, buf, 2); 725 + break; 726 + default: 727 + return -EINVAL; 728 + break; 729 + } 750 730 751 731 /* write agc control reg */ 752 732 buf[0] = 0x04; ··· 1241 1199 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 1242 1200 1243 1201 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver"); 1244 - MODULE_AUTHOR("Kirk Lapray, Jean-Francois Thibert, and Taylor Jacob"); 1202 + MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob"); 1245 1203 MODULE_LICENSE("GPL"); 1246 1204 1247 1205 EXPORT_SYMBOL(nxt200x_attach);
-734
drivers/media/dvb/frontends/tda80xx.c
··· 1 - /* 2 - * tda80xx.c 3 - * 4 - * Philips TDA8044 / TDA8083 QPSK demodulator driver 5 - * 6 - * Copyright (C) 2001 Felix Domke <tmbinc@elitedvb.net> 7 - * Copyright (C) 2002-2004 Andreas Oberritter <obi@linuxtv.org> 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of the GNU General Public License as published by 11 - * the Free Software Foundation; either version 2 of the License, or 12 - * (at your option) any later version. 13 - * 14 - * This program is distributed in the hope that it will be useful, 15 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 - * GNU General Public License for more details. 18 - * 19 - * You should have received a copy of the GNU General Public License 20 - * along with this program; if not, write to the Free Software 21 - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 - */ 23 - 24 - #include <linux/config.h> 25 - #include <linux/delay.h> 26 - #include <linux/init.h> 27 - #include <linux/spinlock.h> 28 - #include <linux/threads.h> 29 - #include <linux/interrupt.h> 30 - #include <linux/kernel.h> 31 - #include <linux/module.h> 32 - #include <linux/slab.h> 33 - #include <asm/irq.h> 34 - #include <asm/div64.h> 35 - 36 - #include "dvb_frontend.h" 37 - #include "tda80xx.h" 38 - 39 - enum { 40 - ID_TDA8044 = 0x04, 41 - ID_TDA8083 = 0x05, 42 - }; 43 - 44 - 45 - struct tda80xx_state { 46 - 47 - struct i2c_adapter* i2c; 48 - 49 - struct dvb_frontend_ops ops; 50 - 51 - /* configuration settings */ 52 - const struct tda80xx_config* config; 53 - 54 - struct dvb_frontend frontend; 55 - 56 - u32 clk; 57 - int afc_loop; 58 - struct work_struct worklet; 59 - fe_code_rate_t code_rate; 60 - fe_spectral_inversion_t spectral_inversion; 61 - fe_status_t status; 62 - u8 id; 63 - }; 64 - 65 - static int debug = 1; 66 - #define dprintk if (debug) printk 67 - 68 - static u8 tda8044_inittab_pre[] = { 69 - 0x02, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea, 70 - 0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x58, 71 - 0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68, 72 - 0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x00, 73 - 0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 74 - 0x00, 0x00 75 - }; 76 - 77 - static u8 tda8044_inittab_post[] = { 78 - 0x04, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea, 79 - 0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x50, 80 - 0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68, 81 - 0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x6c, 82 - 0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 83 - 0x00, 0x00 84 - }; 85 - 86 - static u8 tda8083_inittab[] = { 87 - 0x04, 0x00, 0x4a, 0x79, 0x04, 0x00, 0xff, 0xea, 88 - 0x48, 0x42, 0x79, 0x60, 0x70, 0x52, 0x9a, 0x10, 89 - 0x0e, 0x10, 0xf2, 0xa7, 0x93, 0x0b, 0x05, 0xc8, 90 - 0x9d, 0x00, 0x42, 0x80, 0x00, 0x60, 0x40, 0x00, 91 - 0x00, 0x75, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 92 - 0x00, 0x00, 0x00, 0x00 93 - }; 94 - 95 - static __inline__ u32 tda80xx_div(u32 a, u32 b) 96 - { 97 - return (a + (b / 2)) / b; 98 - } 99 - 100 - static __inline__ u32 tda80xx_gcd(u32 a, u32 b) 101 - { 102 - u32 r; 103 - 104 - while ((r = a % b)) { 105 - a = b; 106 - b = r; 107 - } 108 - 109 - return b; 110 - } 111 - 112 - static int tda80xx_read(struct tda80xx_state* state, u8 reg, u8 *buf, u8 len) 113 - { 114 - int ret; 115 - struct i2c_msg msg[] = { { .addr = state->config->demod_address, .flags = 0, .buf = &reg, .len = 1 }, 116 - { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } }; 117 - 118 - ret = i2c_transfer(state->i2c, msg, 2); 119 - 120 - if (ret != 2) 121 - dprintk("%s: readreg error (reg %02x, ret == %i)\n", 122 - __FUNCTION__, reg, ret); 123 - 124 - mdelay(10); 125 - 126 - return (ret == 2) ? 0 : -EREMOTEIO; 127 - } 128 - 129 - static int tda80xx_write(struct tda80xx_state* state, u8 reg, const u8 *buf, u8 len) 130 - { 131 - int ret; 132 - u8 wbuf[len + 1]; 133 - struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = wbuf, .len = len + 1 }; 134 - 135 - wbuf[0] = reg; 136 - memcpy(&wbuf[1], buf, len); 137 - 138 - ret = i2c_transfer(state->i2c, &msg, 1); 139 - 140 - if (ret != 1) 141 - dprintk("%s: i2c xfer error (ret == %i)\n", __FUNCTION__, ret); 142 - 143 - mdelay(10); 144 - 145 - return (ret == 1) ? 0 : -EREMOTEIO; 146 - } 147 - 148 - static __inline__ u8 tda80xx_readreg(struct tda80xx_state* state, u8 reg) 149 - { 150 - u8 val; 151 - 152 - tda80xx_read(state, reg, &val, 1); 153 - 154 - return val; 155 - } 156 - 157 - static __inline__ int tda80xx_writereg(struct tda80xx_state* state, u8 reg, u8 data) 158 - { 159 - return tda80xx_write(state, reg, &data, 1); 160 - } 161 - 162 - static int tda80xx_set_parameters(struct tda80xx_state* state, 163 - fe_spectral_inversion_t inversion, 164 - u32 symbol_rate, 165 - fe_code_rate_t fec_inner) 166 - { 167 - u8 buf[15]; 168 - u64 ratio; 169 - u32 clk; 170 - u32 k; 171 - u32 sr = symbol_rate; 172 - u32 gcd; 173 - u8 scd; 174 - 175 - if (symbol_rate > (state->clk * 3) / 16) 176 - scd = 0; 177 - else if (symbol_rate > (state->clk * 3) / 32) 178 - scd = 1; 179 - else if (symbol_rate > (state->clk * 3) / 64) 180 - scd = 2; 181 - else 182 - scd = 3; 183 - 184 - clk = scd ? (state->clk / (scd * 2)) : state->clk; 185 - 186 - /* 187 - * Viterbi decoder: 188 - * Differential decoding off 189 - * Spectral inversion unknown 190 - * QPSK modulation 191 - */ 192 - if (inversion == INVERSION_ON) 193 - buf[0] = 0x60; 194 - else if (inversion == INVERSION_OFF) 195 - buf[0] = 0x20; 196 - else 197 - buf[0] = 0x00; 198 - 199 - /* 200 - * CLK ratio: 201 - * system clock frequency is up to 64 or 96 MHz 202 - * 203 - * formula: 204 - * r = k * clk / symbol_rate 205 - * 206 - * k: 2^21 for caa 0..3, 207 - * 2^20 for caa 4..5, 208 - * 2^19 for caa 6..7 209 - */ 210 - if (symbol_rate <= (clk * 3) / 32) 211 - k = (1 << 19); 212 - else if (symbol_rate <= (clk * 3) / 16) 213 - k = (1 << 20); 214 - else 215 - k = (1 << 21); 216 - 217 - gcd = tda80xx_gcd(clk, sr); 218 - clk /= gcd; 219 - sr /= gcd; 220 - 221 - gcd = tda80xx_gcd(k, sr); 222 - k /= gcd; 223 - sr /= gcd; 224 - 225 - ratio = (u64)k * (u64)clk; 226 - do_div(ratio, sr); 227 - 228 - buf[1] = ratio >> 16; 229 - buf[2] = ratio >> 8; 230 - buf[3] = ratio; 231 - 232 - /* nyquist filter roll-off factor 35% */ 233 - buf[4] = 0x20; 234 - 235 - clk = scd ? (state->clk / (scd * 2)) : state->clk; 236 - 237 - /* Anti Alias Filter */ 238 - if (symbol_rate < (clk * 3) / 64) 239 - printk("tda80xx: unsupported symbol rate: %u\n", symbol_rate); 240 - else if (symbol_rate <= clk / 16) 241 - buf[4] |= 0x07; 242 - else if (symbol_rate <= (clk * 3) / 32) 243 - buf[4] |= 0x06; 244 - else if (symbol_rate <= clk / 8) 245 - buf[4] |= 0x05; 246 - else if (symbol_rate <= (clk * 3) / 16) 247 - buf[4] |= 0x04; 248 - else if (symbol_rate <= clk / 4) 249 - buf[4] |= 0x03; 250 - else if (symbol_rate <= (clk * 3) / 8) 251 - buf[4] |= 0x02; 252 - else if (symbol_rate <= clk / 2) 253 - buf[4] |= 0x01; 254 - else 255 - buf[4] |= 0x00; 256 - 257 - /* Sigma Delta converter */ 258 - buf[5] = 0x00; 259 - 260 - /* FEC: Possible puncturing rates */ 261 - if (fec_inner == FEC_NONE) 262 - buf[6] = 0x00; 263 - else if ((fec_inner >= FEC_1_2) && (fec_inner <= FEC_8_9)) 264 - buf[6] = (1 << (8 - fec_inner)); 265 - else if (fec_inner == FEC_AUTO) 266 - buf[6] = 0xff; 267 - else 268 - return -EINVAL; 269 - 270 - /* carrier lock detector threshold value */ 271 - buf[7] = 0x30; 272 - /* AFC1: proportional part settings */ 273 - buf[8] = 0x42; 274 - /* AFC1: integral part settings */ 275 - buf[9] = 0x98; 276 - /* PD: Leaky integrator SCPC mode */ 277 - buf[10] = 0x28; 278 - /* AFC2, AFC1 controls */ 279 - buf[11] = 0x30; 280 - /* PD: proportional part settings */ 281 - buf[12] = 0x42; 282 - /* PD: integral part settings */ 283 - buf[13] = 0x99; 284 - /* AGC */ 285 - buf[14] = 0x50 | scd; 286 - 287 - printk("symbol_rate=%u clk=%u\n", symbol_rate, clk); 288 - 289 - return tda80xx_write(state, 0x01, buf, sizeof(buf)); 290 - } 291 - 292 - static int tda80xx_set_clk(struct tda80xx_state* state) 293 - { 294 - u8 buf[2]; 295 - 296 - /* CLK proportional part */ 297 - buf[0] = (0x06 << 5) | 0x08; /* CMP[2:0], CSP[4:0] */ 298 - /* CLK integral part */ 299 - buf[1] = (0x04 << 5) | 0x1a; /* CMI[2:0], CSI[4:0] */ 300 - 301 - return tda80xx_write(state, 0x17, buf, sizeof(buf)); 302 - } 303 - 304 - #if 0 305 - static int tda80xx_set_scpc_freq_offset(struct tda80xx_state* state) 306 - { 307 - /* a constant value is nonsense here imho */ 308 - return tda80xx_writereg(state, 0x22, 0xf9); 309 - } 310 - #endif 311 - 312 - static int tda80xx_close_loop(struct tda80xx_state* state) 313 - { 314 - u8 buf[2]; 315 - 316 - /* PD: Loop closed, LD: lock detect enable, SCPC: Sweep mode - AFC1 loop closed */ 317 - buf[0] = 0x68; 318 - /* AFC1: Loop closed, CAR Feedback: 8192 */ 319 - buf[1] = 0x70; 320 - 321 - return tda80xx_write(state, 0x0b, buf, sizeof(buf)); 322 - } 323 - 324 - static irqreturn_t tda80xx_irq(int irq, void *priv, struct pt_regs *pt) 325 - { 326 - schedule_work(priv); 327 - 328 - return IRQ_HANDLED; 329 - } 330 - 331 - static void tda80xx_read_status_int(struct tda80xx_state* state) 332 - { 333 - u8 val; 334 - 335 - static const fe_spectral_inversion_t inv_tab[] = { 336 - INVERSION_OFF, INVERSION_ON 337 - }; 338 - 339 - static const fe_code_rate_t fec_tab[] = { 340 - FEC_8_9, FEC_1_2, FEC_2_3, FEC_3_4, 341 - FEC_4_5, FEC_5_6, FEC_6_7, FEC_7_8, 342 - }; 343 - 344 - val = tda80xx_readreg(state, 0x02); 345 - 346 - state->status = 0; 347 - 348 - if (val & 0x01) /* demodulator lock */ 349 - state->status |= FE_HAS_SIGNAL; 350 - if (val & 0x02) /* clock recovery lock */ 351 - state->status |= FE_HAS_CARRIER; 352 - if (val & 0x04) /* viterbi lock */ 353 - state->status |= FE_HAS_VITERBI; 354 - if (val & 0x08) /* deinterleaver lock (packet sync) */ 355 - state->status |= FE_HAS_SYNC; 356 - if (val & 0x10) /* derandomizer lock (frame sync) */ 357 - state->status |= FE_HAS_LOCK; 358 - if (val & 0x20) /* frontend can not lock */ 359 - state->status |= FE_TIMEDOUT; 360 - 361 - if ((state->status & (FE_HAS_CARRIER)) && (state->afc_loop)) { 362 - printk("tda80xx: closing loop\n"); 363 - tda80xx_close_loop(state); 364 - state->afc_loop = 0; 365 - } 366 - 367 - if (state->status & (FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK)) { 368 - val = tda80xx_readreg(state, 0x0e); 369 - state->code_rate = fec_tab[val & 0x07]; 370 - if (state->status & (FE_HAS_SYNC | FE_HAS_LOCK)) 371 - state->spectral_inversion = inv_tab[(val >> 7) & 0x01]; 372 - else 373 - state->spectral_inversion = INVERSION_AUTO; 374 - } 375 - else { 376 - state->code_rate = FEC_AUTO; 377 - } 378 - } 379 - 380 - static void tda80xx_worklet(void *priv) 381 - { 382 - struct tda80xx_state *state = priv; 383 - 384 - tda80xx_writereg(state, 0x00, 0x04); 385 - enable_irq(state->config->irq); 386 - 387 - tda80xx_read_status_int(state); 388 - } 389 - 390 - static void tda80xx_wait_diseqc_fifo(struct tda80xx_state* state) 391 - { 392 - size_t i; 393 - 394 - for (i = 0; i < 100; i++) { 395 - if (tda80xx_readreg(state, 0x02) & 0x80) 396 - break; 397 - msleep(10); 398 - } 399 - } 400 - 401 - static int tda8044_init(struct dvb_frontend* fe) 402 - { 403 - struct tda80xx_state* state = fe->demodulator_priv; 404 - int ret; 405 - 406 - /* 407 - * this function is a mess... 408 - */ 409 - 410 - if ((ret = tda80xx_write(state, 0x00, tda8044_inittab_pre, sizeof(tda8044_inittab_pre)))) 411 - return ret; 412 - 413 - tda80xx_writereg(state, 0x0f, 0x50); 414 - #if 1 415 - tda80xx_writereg(state, 0x20, 0x8F); /* FIXME */ 416 - tda80xx_writereg(state, 0x20, state->config->volt18setting); /* FIXME */ 417 - //tda80xx_writereg(state, 0x00, 0x04); 418 - tda80xx_writereg(state, 0x00, 0x0C); 419 - #endif 420 - //tda80xx_writereg(state, 0x00, 0x08); /* Reset AFC1 loop filter */ 421 - 422 - tda80xx_write(state, 0x00, tda8044_inittab_post, sizeof(tda8044_inittab_post)); 423 - 424 - if (state->config->pll_init) { 425 - tda80xx_writereg(state, 0x1c, 0x80); 426 - state->config->pll_init(fe); 427 - tda80xx_writereg(state, 0x1c, 0x00); 428 - } 429 - 430 - return 0; 431 - } 432 - 433 - static int tda8083_init(struct dvb_frontend* fe) 434 - { 435 - struct tda80xx_state* state = fe->demodulator_priv; 436 - 437 - tda80xx_write(state, 0x00, tda8083_inittab, sizeof(tda8083_inittab)); 438 - 439 - if (state->config->pll_init) { 440 - tda80xx_writereg(state, 0x1c, 0x80); 441 - state->config->pll_init(fe); 442 - tda80xx_writereg(state, 0x1c, 0x00); 443 - } 444 - 445 - return 0; 446 - } 447 - 448 - static int tda80xx_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) 449 - { 450 - struct tda80xx_state* state = fe->demodulator_priv; 451 - 452 - switch (voltage) { 453 - case SEC_VOLTAGE_13: 454 - return tda80xx_writereg(state, 0x20, state->config->volt13setting); 455 - case SEC_VOLTAGE_18: 456 - return tda80xx_writereg(state, 0x20, state->config->volt18setting); 457 - case SEC_VOLTAGE_OFF: 458 - return tda80xx_writereg(state, 0x20, 0); 459 - default: 460 - return -EINVAL; 461 - } 462 - } 463 - 464 - static int tda80xx_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) 465 - { 466 - struct tda80xx_state* state = fe->demodulator_priv; 467 - 468 - switch (tone) { 469 - case SEC_TONE_OFF: 470 - return tda80xx_writereg(state, 0x29, 0x00); 471 - case SEC_TONE_ON: 472 - return tda80xx_writereg(state, 0x29, 0x80); 473 - default: 474 - return -EINVAL; 475 - } 476 - } 477 - 478 - static int tda80xx_send_diseqc_msg(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd *cmd) 479 - { 480 - struct tda80xx_state* state = fe->demodulator_priv; 481 - 482 - if (cmd->msg_len > 6) 483 - return -EINVAL; 484 - 485 - tda80xx_writereg(state, 0x29, 0x08 | (cmd->msg_len - 3)); 486 - tda80xx_write(state, 0x23, cmd->msg, cmd->msg_len); 487 - tda80xx_writereg(state, 0x29, 0x0c | (cmd->msg_len - 3)); 488 - tda80xx_wait_diseqc_fifo(state); 489 - 490 - return 0; 491 - } 492 - 493 - static int tda80xx_send_diseqc_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t cmd) 494 - { 495 - struct tda80xx_state* state = fe->demodulator_priv; 496 - 497 - switch (cmd) { 498 - case SEC_MINI_A: 499 - tda80xx_writereg(state, 0x29, 0x14); 500 - break; 501 - case SEC_MINI_B: 502 - tda80xx_writereg(state, 0x29, 0x1c); 503 - break; 504 - default: 505 - return -EINVAL; 506 - } 507 - 508 - tda80xx_wait_diseqc_fifo(state); 509 - 510 - return 0; 511 - } 512 - 513 - static int tda80xx_sleep(struct dvb_frontend* fe) 514 - { 515 - struct tda80xx_state* state = fe->demodulator_priv; 516 - 517 - tda80xx_writereg(state, 0x00, 0x02); /* enter standby */ 518 - 519 - return 0; 520 - } 521 - 522 - static int tda80xx_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 523 - { 524 - struct tda80xx_state* state = fe->demodulator_priv; 525 - 526 - tda80xx_writereg(state, 0x1c, 0x80); 527 - state->config->pll_set(fe, p); 528 - tda80xx_writereg(state, 0x1c, 0x00); 529 - 530 - tda80xx_set_parameters(state, p->inversion, p->u.qpsk.symbol_rate, p->u.qpsk.fec_inner); 531 - tda80xx_set_clk(state); 532 - //tda80xx_set_scpc_freq_offset(state); 533 - state->afc_loop = 1; 534 - 535 - return 0; 536 - } 537 - 538 - static int tda80xx_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) 539 - { 540 - struct tda80xx_state* state = fe->demodulator_priv; 541 - 542 - if (!state->config->irq) 543 - tda80xx_read_status_int(state); 544 - 545 - p->inversion = state->spectral_inversion; 546 - p->u.qpsk.fec_inner = state->code_rate; 547 - 548 - return 0; 549 - } 550 - 551 - static int tda80xx_read_status(struct dvb_frontend* fe, fe_status_t* status) 552 - { 553 - struct tda80xx_state* state = fe->demodulator_priv; 554 - 555 - if (!state->config->irq) 556 - tda80xx_read_status_int(state); 557 - *status = state->status; 558 - 559 - return 0; 560 - } 561 - 562 - static int tda80xx_read_ber(struct dvb_frontend* fe, u32* ber) 563 - { 564 - struct tda80xx_state* state = fe->demodulator_priv; 565 - int ret; 566 - u8 buf[3]; 567 - 568 - if ((ret = tda80xx_read(state, 0x0b, buf, sizeof(buf)))) 569 - return ret; 570 - 571 - *ber = ((buf[0] & 0x1f) << 16) | (buf[1] << 8) | buf[2]; 572 - 573 - return 0; 574 - } 575 - 576 - static int tda80xx_read_signal_strength(struct dvb_frontend* fe, u16* strength) 577 - { 578 - struct tda80xx_state* state = fe->demodulator_priv; 579 - 580 - u8 gain = ~tda80xx_readreg(state, 0x01); 581 - *strength = (gain << 8) | gain; 582 - 583 - return 0; 584 - } 585 - 586 - static int tda80xx_read_snr(struct dvb_frontend* fe, u16* snr) 587 - { 588 - struct tda80xx_state* state = fe->demodulator_priv; 589 - 590 - u8 quality = tda80xx_readreg(state, 0x08); 591 - *snr = (quality << 8) | quality; 592 - 593 - return 0; 594 - } 595 - 596 - static int tda80xx_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) 597 - { 598 - struct tda80xx_state* state = fe->demodulator_priv; 599 - 600 - *ucblocks = tda80xx_readreg(state, 0x0f); 601 - if (*ucblocks == 0xff) 602 - *ucblocks = 0xffffffff; 603 - 604 - return 0; 605 - } 606 - 607 - static int tda80xx_init(struct dvb_frontend* fe) 608 - { 609 - struct tda80xx_state* state = fe->demodulator_priv; 610 - 611 - switch(state->id) { 612 - case ID_TDA8044: 613 - return tda8044_init(fe); 614 - 615 - case ID_TDA8083: 616 - return tda8083_init(fe); 617 - } 618 - return 0; 619 - } 620 - 621 - static void tda80xx_release(struct dvb_frontend* fe) 622 - { 623 - struct tda80xx_state* state = fe->demodulator_priv; 624 - 625 - if (state->config->irq) 626 - free_irq(state->config->irq, &state->worklet); 627 - 628 - kfree(state); 629 - } 630 - 631 - static struct dvb_frontend_ops tda80xx_ops; 632 - 633 - struct dvb_frontend* tda80xx_attach(const struct tda80xx_config* config, 634 - struct i2c_adapter* i2c) 635 - { 636 - struct tda80xx_state* state = NULL; 637 - int ret; 638 - 639 - /* allocate memory for the internal state */ 640 - state = kmalloc(sizeof(struct tda80xx_state), GFP_KERNEL); 641 - if (state == NULL) goto error; 642 - 643 - /* setup the state */ 644 - state->config = config; 645 - state->i2c = i2c; 646 - memcpy(&state->ops, &tda80xx_ops, sizeof(struct dvb_frontend_ops)); 647 - state->spectral_inversion = INVERSION_AUTO; 648 - state->code_rate = FEC_AUTO; 649 - state->status = 0; 650 - state->afc_loop = 0; 651 - 652 - /* check if the demod is there */ 653 - if (tda80xx_writereg(state, 0x89, 0x00) < 0) goto error; 654 - state->id = tda80xx_readreg(state, 0x00); 655 - 656 - switch (state->id) { 657 - case ID_TDA8044: 658 - state->clk = 96000000; 659 - printk("tda80xx: Detected tda8044\n"); 660 - break; 661 - 662 - case ID_TDA8083: 663 - state->clk = 64000000; 664 - printk("tda80xx: Detected tda8083\n"); 665 - break; 666 - 667 - default: 668 - goto error; 669 - } 670 - 671 - /* setup IRQ */ 672 - if (state->config->irq) { 673 - INIT_WORK(&state->worklet, tda80xx_worklet, state); 674 - if ((ret = request_irq(state->config->irq, tda80xx_irq, SA_ONESHOT, "tda80xx", &state->worklet)) < 0) { 675 - printk(KERN_ERR "tda80xx: request_irq failed (%d)\n", ret); 676 - goto error; 677 - } 678 - } 679 - 680 - /* create dvb_frontend */ 681 - state->frontend.ops = &state->ops; 682 - state->frontend.demodulator_priv = state; 683 - return &state->frontend; 684 - 685 - error: 686 - kfree(state); 687 - return NULL; 688 - } 689 - 690 - static struct dvb_frontend_ops tda80xx_ops = { 691 - 692 - .info = { 693 - .name = "Philips TDA80xx DVB-S", 694 - .type = FE_QPSK, 695 - .frequency_min = 500000, 696 - .frequency_max = 2700000, 697 - .frequency_stepsize = 125, 698 - .symbol_rate_min = 4500000, 699 - .symbol_rate_max = 45000000, 700 - .caps = FE_CAN_INVERSION_AUTO | 701 - FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 702 - FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | 703 - FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | 704 - FE_CAN_QPSK | 705 - FE_CAN_MUTE_TS 706 - }, 707 - 708 - .release = tda80xx_release, 709 - 710 - .init = tda80xx_init, 711 - .sleep = tda80xx_sleep, 712 - 713 - .set_frontend = tda80xx_set_frontend, 714 - .get_frontend = tda80xx_get_frontend, 715 - 716 - .read_status = tda80xx_read_status, 717 - .read_ber = tda80xx_read_ber, 718 - .read_signal_strength = tda80xx_read_signal_strength, 719 - .read_snr = tda80xx_read_snr, 720 - .read_ucblocks = tda80xx_read_ucblocks, 721 - 722 - .diseqc_send_master_cmd = tda80xx_send_diseqc_msg, 723 - .diseqc_send_burst = tda80xx_send_diseqc_burst, 724 - .set_tone = tda80xx_set_tone, 725 - .set_voltage = tda80xx_set_voltage, 726 - }; 727 - 728 - module_param(debug, int, 0644); 729 - 730 - MODULE_DESCRIPTION("Philips TDA8044 / TDA8083 DVB-S Demodulator driver"); 731 - MODULE_AUTHOR("Felix Domke, Andreas Oberritter"); 732 - MODULE_LICENSE("GPL"); 733 - 734 - EXPORT_SYMBOL(tda80xx_attach);
-51
drivers/media/dvb/frontends/tda80xx.h
··· 1 - /* 2 - * tda80xx.c 3 - * 4 - * Philips TDA8044 / TDA8083 QPSK demodulator driver 5 - * 6 - * Copyright (C) 2001 Felix Domke <tmbinc@elitedvb.net> 7 - * Copyright (C) 2002-2004 Andreas Oberritter <obi@linuxtv.org> 8 - * 9 - * This program is free software; you can redistribute it and/or modify 10 - * it under the terms of the GNU General Public License as published by 11 - * the Free Software Foundation; either version 2 of the License, or 12 - * (at your option) any later version. 13 - * 14 - * This program is distributed in the hope that it will be useful, 15 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 - * GNU General Public License for more details. 18 - * 19 - * You should have received a copy of the GNU General Public License 20 - * along with this program; if not, write to the Free Software 21 - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 - */ 23 - 24 - #ifndef TDA80XX_H 25 - #define TDA80XX_H 26 - 27 - #include <linux/dvb/frontend.h> 28 - 29 - struct tda80xx_config 30 - { 31 - /* the demodulator's i2c address */ 32 - u8 demod_address; 33 - 34 - /* IRQ to use (0=>no IRQ used) */ 35 - u32 irq; 36 - 37 - /* Register setting to use for 13v */ 38 - u8 volt13setting; 39 - 40 - /* Register setting to use for 18v */ 41 - u8 volt18setting; 42 - 43 - /* PLL maintenance */ 44 - int (*pll_init)(struct dvb_frontend* fe); 45 - int (*pll_set)(struct dvb_frontend* fe, struct dvb_frontend_parameters* params); 46 - }; 47 - 48 - extern struct dvb_frontend* tda80xx_attach(const struct tda80xx_config* config, 49 - struct i2c_adapter* i2c); 50 - 51 - #endif // TDA80XX_H
+13 -1
drivers/media/dvb/ttpci/av7110.c
··· 2329 2329 av7110->fe = ves1820_attach(&alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110)); 2330 2330 break; 2331 2331 2332 + case 0x0004: // Galaxis DVB-S rev1.3 2333 + /* ALPS BSRV2 */ 2334 + av7110->fe = ves1x93_attach(&alps_bsrv2_config, &av7110->i2c_adap); 2335 + if (av7110->fe) { 2336 + av7110->fe->ops->diseqc_send_master_cmd = av7110_diseqc_send_master_cmd; 2337 + av7110->fe->ops->diseqc_send_burst = av7110_diseqc_send_burst; 2338 + av7110->fe->ops->set_tone = av7110_set_tone; 2339 + av7110->recover = dvb_s_recover; 2340 + } 2341 + break; 2342 + 2332 2343 case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */ 2333 2344 /* Grundig 29504-451 */ 2334 2345 av7110->fe = tda8083_attach(&grundig_29504_451_config, &av7110->i2c_adap); ··· 2941 2930 MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T"); 2942 2931 MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C"); 2943 2932 MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6"); 2933 + MAKE_AV7110_INFO(gxs_1_3, "Galaxis DVB-S rev1.3"); 2944 2934 2945 2935 static struct pci_device_id pci_tbl[] = { 2946 2936 MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000), ··· 2949 2937 MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001), 2950 2938 MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002), 2951 2939 MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003), 2940 + MAKE_EXTENSION_PCI(gxs_1_3, 0x13c2, 0x0004), 2952 2941 MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006), 2953 2942 MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008), 2954 2943 MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a), 2955 2944 MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e), 2956 2945 MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002), 2957 2946 2958 - /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0004), UNDEFINED CARD */ // Galaxis DVB PC-Sat-Carte 2959 2947 /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1 2960 2948 /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v???? 2961 2949
-2
drivers/media/dvb/ttpci/av7110.h
··· 273 273 extern int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid, 274 274 u16 subpid, u16 pcrpid); 275 275 276 - extern int av7110_setup_irc_config (struct av7110 *av7110, u32 ir_config); 277 - 278 276 extern int av7110_ir_init(struct av7110 *av7110); 279 277 extern void av7110_ir_exit(struct av7110 *av7110); 280 278
+13 -13
drivers/media/dvb/ttpci/av7110_ir.c
··· 155 155 } 156 156 157 157 158 + static int av7110_setup_irc_config(struct av7110 *av7110, u32 ir_config) 159 + { 160 + int ret = 0; 161 + 162 + dprintk(4, "%p\n", av7110); 163 + if (av7110) { 164 + ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, SetIR, 1, ir_config); 165 + av7110->ir_config = ir_config; 166 + } 167 + return ret; 168 + } 169 + 170 + 158 171 static int av7110_ir_write_proc(struct file *file, const char __user *buffer, 159 172 unsigned long count, void *data) 160 173 { ··· 197 184 av7110_setup_irc_config(av_list[i], ir_config); 198 185 input_register_keys(); 199 186 return count; 200 - } 201 - 202 - 203 - int av7110_setup_irc_config(struct av7110 *av7110, u32 ir_config) 204 - { 205 - int ret = 0; 206 - 207 - dprintk(4, "%p\n", av7110); 208 - if (av7110) { 209 - ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, SetIR, 1, ir_config); 210 - av7110->ir_config = ir_config; 211 - } 212 - return ret; 213 187 } 214 188 215 189
+1 -1
drivers/media/video/bttv-driver.c
··· 214 214 we can capture, of the first and second field. */ 215 215 .vbistart = { 7,320 }, 216 216 },{ 217 - .v4l2_id = V4L2_STD_NTSC_M, 217 + .v4l2_id = V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_KR, 218 218 .name = "NTSC", 219 219 .Fsc = 28636363, 220 220 .swidth = 768,
+20 -30
drivers/media/video/cx25840/cx25840-core.c
··· 220 220 cx25840_write(client, 0x808, 0xff); 221 221 cx25840_write(client, 0x80b, 0x10); 222 222 } else if (std & V4L2_STD_NTSC) { 223 - /* NTSC */ 224 - if (state->pvr150_workaround) { 225 - /* Certain Hauppauge PVR150 models have a hardware bug 226 - that causes audio to drop out. For these models the 227 - audio standard must be set explicitly. 228 - To be precise: it affects cards with tuner models 229 - 85, 99 and 112 (model numbers from tveeprom). */ 230 - if (std == V4L2_STD_NTSC_M_JP) { 231 - /* Japan uses EIAJ audio standard */ 232 - cx25840_write(client, 0x808, 0x2f); 233 - } else { 234 - /* Others use the BTSC audio standard */ 235 - cx25840_write(client, 0x808, 0x1f); 236 - } 237 - /* South Korea uses the A2-M (aka Zweiton M) audio 238 - standard, and should set 0x808 to 0x3f, but I don't 239 - know how to detect this. */ 240 - } else if (std == V4L2_STD_NTSC_M_JP) { 223 + /* Certain Hauppauge PVR150 models have a hardware bug 224 + that causes audio to drop out. For these models the 225 + audio standard must be set explicitly. 226 + To be precise: it affects cards with tuner models 227 + 85, 99 and 112 (model numbers from tveeprom). */ 228 + int hw_fix = state->pvr150_workaround; 229 + 230 + if (std == V4L2_STD_NTSC_M_JP) { 241 231 /* Japan uses EIAJ audio standard */ 242 - cx25840_write(client, 0x808, 0xf7); 232 + cx25840_write(client, 0x808, hw_fix ? 0x2f : 0xf7); 233 + } else if (std == V4L2_STD_NTSC_M_KR) { 234 + /* South Korea uses A2 audio standard */ 235 + cx25840_write(client, 0x808, hw_fix ? 0x3f : 0xf8); 243 236 } else { 244 237 /* Others use the BTSC audio standard */ 245 - cx25840_write(client, 0x808, 0xf6); 238 + cx25840_write(client, 0x808, hw_fix ? 0x1f : 0xf6); 246 239 } 247 - /* South Korea uses the A2-M (aka Zweiton M) audio standard, 248 - and should set 0x808 to 0xf8, but I don't know how to 249 - detect this. */ 250 240 cx25840_write(client, 0x80b, 0x00); 251 241 } 252 242 ··· 320 330 u8 fmt=0; /* zero is autodetect */ 321 331 322 332 /* First tests should be against specific std */ 323 - if (std & V4L2_STD_NTSC_M_JP) { 333 + if (std == V4L2_STD_NTSC_M_JP) { 324 334 fmt=0x2; 325 - } else if (std & V4L2_STD_NTSC_443) { 335 + } else if (std == V4L2_STD_NTSC_443) { 326 336 fmt=0x3; 327 - } else if (std & V4L2_STD_PAL_M) { 337 + } else if (std == V4L2_STD_PAL_M) { 328 338 fmt=0x5; 329 - } else if (std & V4L2_STD_PAL_N) { 339 + } else if (std == V4L2_STD_PAL_N) { 330 340 fmt=0x6; 331 - } else if (std & V4L2_STD_PAL_Nc) { 341 + } else if (std == V4L2_STD_PAL_Nc) { 332 342 fmt=0x7; 333 - } else if (std & V4L2_STD_PAL_60) { 343 + } else if (std == V4L2_STD_PAL_60) { 334 344 fmt=0x8; 335 345 } else { 336 346 /* Then, test against generic ones */ ··· 359 369 } 360 370 361 371 switch (fmt) { 362 - case 0x1: return V4L2_STD_NTSC_M; 372 + case 0x1: return V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_KR; 363 373 case 0x2: return V4L2_STD_NTSC_M_JP; 364 374 case 0x3: return V4L2_STD_NTSC_443; 365 375 case 0x4: return V4L2_STD_PAL;
+12
drivers/media/video/cx88/Kconfig
··· 32 32 config VIDEO_CX88_ALSA 33 33 tristate "ALSA DMA audio support" 34 34 depends on VIDEO_CX88 && SND && EXPERIMENTAL 35 + select SND_PCM 35 36 ---help--- 36 37 This is a video4linux driver for direct (DMA) audio on 37 38 Conexant 2388x based TV cards. ··· 49 48 default y 50 49 depends on VIDEO_CX88_DVB 51 50 select DVB_MT352 51 + select VIDEO_CX88_VP3054 52 52 select DVB_OR51132 53 53 select DVB_CX22702 54 54 select DVB_LGDT330X ··· 70 68 ---help--- 71 69 This adds DVB-T support for cards based on the 72 70 Connexant 2388x chip and the MT352 demodulator. 71 + 72 + config VIDEO_CX88_VP3054 73 + tristate "VP-3054 Secondary I2C Bus Support" 74 + default m 75 + depends on DVB_MT352 76 + ---help--- 77 + This adds DVB-T support for cards based on the 78 + Connexant 2388x chip and the MT352 demodulator, 79 + which also require support for the VP-3054 80 + Secondary I2C bus, such at DNTV Live! DVB-T Pro. 73 81 74 82 config VIDEO_CX88_DVB_OR51132 75 83 bool "OR51132 ATSC Support"
+3 -2
drivers/media/video/cx88/Makefile
··· 4 4 cx8802-objs := cx88-mpeg.o 5 5 6 6 obj-$(CONFIG_VIDEO_CX88) += cx88xx.o cx8800.o cx8802.o cx88-blackbird.o 7 - obj-$(CONFIG_VIDEO_CX88_DVB) += cx88-dvb.o cx88-vp3054-i2c.o 7 + obj-$(CONFIG_VIDEO_CX88_DVB) += cx88-dvb.o 8 8 obj-$(CONFIG_VIDEO_CX88_ALSA) += cx88-alsa.o 9 + obj-$(CONFIG_VIDEO_CX88_VP3054) += cx88-vp3054-i2c.o 9 10 10 11 EXTRA_CFLAGS += -I$(src)/.. 11 12 EXTRA_CFLAGS += -I$(srctree)/drivers/media/dvb/dvb-core ··· 19 18 extra-cflags-$(CONFIG_DVB_MT352) += -DHAVE_MT352=1 20 19 extra-cflags-$(CONFIG_DVB_NXT200X) += -DHAVE_NXT200X=1 21 20 extra-cflags-$(CONFIG_DVB_CX24123) += -DHAVE_CX24123=1 22 - extra-cflags-$(CONFIG_VIDEO_CX88_DVB)+= -DHAVE_VP3054_I2C=1 21 + extra-cflags-$(CONFIG_VIDEO_CX88_VP3054)+= -DHAVE_VP3054_I2C=1 23 22 24 23 EXTRA_CFLAGS += $(extra-cflags-y) $(extra-cflags-m)
+3 -3
drivers/media/video/cx88/cx88-alsa.c
··· 128 128 * BOARD Specific: Sets audio DMA 129 129 */ 130 130 131 - int _cx88_start_audio_dma(snd_cx88_card_t *chip) 131 + static int _cx88_start_audio_dma(snd_cx88_card_t *chip) 132 132 { 133 133 struct cx88_buffer *buf = chip->buf; 134 134 struct cx88_core *core=chip->core; ··· 173 173 /* 174 174 * BOARD Specific: Resets audio DMA 175 175 */ 176 - int _cx88_stop_audio_dma(snd_cx88_card_t *chip) 176 + static int _cx88_stop_audio_dma(snd_cx88_card_t *chip) 177 177 { 178 178 struct cx88_core *core=chip->core; 179 179 dprintk(1, "Stopping audio DMA\n"); ··· 613 613 * Only boards with eeprom and byte 1 at eeprom=1 have it 614 614 */ 615 615 616 - struct pci_device_id cx88_audio_pci_tbl[] = { 616 + static struct pci_device_id cx88_audio_pci_tbl[] = { 617 617 {0x14f1,0x8801,PCI_ANY_ID,PCI_ANY_ID,0,0,0}, 618 618 {0x14f1,0x8811,PCI_ANY_ID,PCI_ANY_ID,0,0,0}, 619 619 {0, }
+6
drivers/media/video/cx88/cx88-cards.c
··· 1246 1246 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL, 1247 1247 },{ 1248 1248 .subvendor = 0x18ac, 1249 + .subdevice = 0xdb54, 1250 + .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL, 1251 + /* Re-branded DViCO: DigitalNow DVB-T Dual */ 1252 + },{ 1253 + .subvendor = 0x18ac, 1249 1254 .subdevice = 0xdb11, 1250 1255 .card = CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS, 1251 1256 /* Re-branded DViCO: UltraView DVB-T Plus */ ··· 1298 1293 switch (tv.model) 1299 1294 { 1300 1295 case 28552: /* WinTV-PVR 'Roslyn' (No IR) */ 1296 + case 34519: /* WinTV-PCI-FM */ 1301 1297 case 90002: /* Nova-T-PCI (9002) */ 1302 1298 case 92001: /* Nova-S-Plus (Video and IR) */ 1303 1299 case 92002: /* Nova-S-Plus (Video and IR) */
+6 -4
drivers/media/video/cx88/cx88-core.c
··· 787 787 788 788 int cx88_start_audio_dma(struct cx88_core *core) 789 789 { 790 + /* constant 128 made buzz in analog Nicam-stereo for bigger fifo_size */ 791 + int bpl = cx88_sram_channels[SRAM_CH25].fifo_size/4; 790 792 /* setup fifo + format */ 791 - cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH25], 128, 0); 792 - cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH26], 128, 0); 793 + cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH25], bpl, 0); 794 + cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH26], bpl, 0); 793 795 794 - cx_write(MO_AUDD_LNGTH, 128); /* fifo bpl size */ 795 - cx_write(MO_AUDR_LNGTH, 128); /* fifo bpl size */ 796 + cx_write(MO_AUDD_LNGTH, bpl); /* fifo bpl size */ 797 + cx_write(MO_AUDR_LNGTH, bpl); /* fifo bpl size */ 796 798 797 799 /* start dma */ 798 800 cx_write(MO_AUD_DMACNTRL, 0x0003); /* Up and Down fifo enable */
+1
drivers/media/video/cx88/cx88-input.c
··· 482 482 switch (core->board) { 483 483 case CX88_BOARD_DNTV_LIVE_DVB_T: 484 484 case CX88_BOARD_KWORLD_DVB_T: 485 + case CX88_BOARD_KWORLD_DVB_T_CX22702: 485 486 ir_codes = ir_codes_dntv_live_dvb_t; 486 487 ir->gpio_addr = MO_GP1_IO; 487 488 ir->mask_keycode = 0x1f;
+14 -3
drivers/media/video/em28xx/em28xx-core.c
··· 139 139 { 140 140 int ret, byte; 141 141 142 + if (dev->state & DEV_DISCONNECTED) 143 + return(-ENODEV); 144 + 142 145 em28xx_regdbg("req=%02x, reg=%02x ", req, reg); 143 146 144 147 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req, ··· 167 164 { 168 165 u8 val; 169 166 int ret; 167 + 168 + if (dev->state & DEV_DISCONNECTED) 169 + return(-ENODEV); 170 170 171 171 em28xx_regdbg("req=%02x, reg=%02x:", req, reg); 172 172 ··· 201 195 int ret; 202 196 203 197 /*usb_control_msg seems to expect a kmalloced buffer */ 204 - unsigned char *bufs = kmalloc(len, GFP_KERNEL); 198 + unsigned char *bufs; 199 + 200 + if (dev->state & DEV_DISCONNECTED) 201 + return(-ENODEV); 202 + 203 + bufs = kmalloc(len, GFP_KERNEL); 205 204 206 205 em28xx_regdbg("req=%02x reg=%02x:", req, reg); 207 206 ··· 223 212 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req, 224 213 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 225 214 0x0000, reg, bufs, len, HZ); 226 - mdelay(5); /* FIXME: magic number */ 215 + msleep(5); /* FIXME: magic number */ 227 216 kfree(bufs); 228 217 return ret; 229 218 } ··· 264 253 if ((ret = em28xx_read_reg(dev, AC97BUSY_REG)) < 0) 265 254 return ret; 266 255 else if (((u8) ret) & 0x01) { 267 - em28xx_warn ("AC97 command still being exectuted: not handled properly!\n"); 256 + em28xx_warn ("AC97 command still being executed: not handled properly!\n"); 268 257 } 269 258 return 0; 270 259 }
+4 -4
drivers/media/video/em28xx/em28xx-i2c.c
··· 78 78 ret = dev->em28xx_read_reg(dev, 0x05); 79 79 if (ret == 0x80 + len - 1) 80 80 return len; 81 - mdelay(5); 81 + msleep(5); 82 82 } 83 83 em28xx_warn("i2c write timed out\n"); 84 84 return -EIO; ··· 138 138 return -ENODEV; 139 139 else if (msg == 0x84) 140 140 return 0; 141 - mdelay(5); 141 + msleep(5); 142 142 } 143 143 return -ENODEV; 144 144 } ··· 278 278 msgs[i].buf, 279 279 msgs[i].len, 280 280 i == num - 1); 281 - if (rc < 0) 282 - goto err; 283 281 } 282 + if (rc < 0) 283 + goto err; 284 284 if (i2c_debug>=2) 285 285 printk("\n"); 286 286 }
+3
drivers/media/video/em28xx/em28xx-video.c
··· 6 6 Mauro Carvalho Chehab <mchehab@brturbo.com.br> 7 7 Sascha Sommer <saschasommer@freenet.de> 8 8 9 + Some parts based on SN9C10x PC Camera Controllers GPL driver made 10 + by Luca Risolia <luca.risolia@studio.unibo.it> 11 + 9 12 This program is free software; you can redistribute it and/or modify 10 13 it under the terms of the GNU General Public License as published by 11 14 the Free Software Foundation; either version 2 of the License, or
+27 -28
drivers/media/video/saa7134/saa7134-cards.c
··· 136 136 }, 137 137 [SAA7134_BOARD_FLYVIDEO2000] = { 138 138 /* "TC Wan" <tcwan@cs.usm.my> */ 139 - .name = "LifeView FlyVIDEO2000", 139 + .name = "LifeView/Typhoon FlyVIDEO2000", 140 140 .audio_clock = 0x00200000, 141 141 .tuner_type = TUNER_LG_PAL_NEW_TAPC, 142 142 .radio_type = UNSET, ··· 1884 1884 .gpio = 0x000, 1885 1885 }, 1886 1886 }, 1887 - [SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS] = { 1888 - .name = "Typhoon DVB-T Duo Digital/Analog Cardbus", 1887 + [SAA7134_BOARD_FLYDVBT_DUO_CARDBUS] = { 1888 + .name = "LifeView/Typhoon FlyDVB-T Duo Cardbus", 1889 1889 .audio_clock = 0x00200000, 1890 1890 .tuner_type = TUNER_PHILIPS_TDA8290, 1891 1891 .radio_type = UNSET, 1892 1892 .tuner_addr = ADDR_UNSET, 1893 1893 .radio_addr = ADDR_UNSET, 1894 1894 .mpeg = SAA7134_MPEG_DVB, 1895 - /* .gpiomask = 0xe000, */ 1895 + .gpiomask = 0x00200000, 1896 1896 .inputs = {{ 1897 1897 .name = name_tv, 1898 1898 .vmux = 1, 1899 1899 .amux = TV, 1900 - /* .gpio = 0x0000, */ 1900 + .gpio = 0x200000, /* GPIO21=High for TV input */ 1901 1901 .tv = 1, 1902 - },{ 1903 - .name = name_comp1, /* Composite signal on S-Video input */ 1904 - .vmux = 0, 1905 - .amux = LINE2, 1906 - /* .gpio = 0x4000, */ 1907 - },{ 1908 - .name = name_comp2, /* Composite input */ 1909 - .vmux = 3, 1910 - .amux = LINE2, 1911 - /* .gpio = 0x4000, */ 1912 1902 },{ 1913 1903 .name = name_svideo, /* S-Video signal on S-Video input */ 1914 1904 .vmux = 8, 1915 1905 .amux = LINE2, 1916 - /* .gpio = 0x4000, */ 1906 + },{ 1907 + .name = name_comp1, /* Composite signal on S-Video input */ 1908 + .vmux = 0, 1909 + .amux = LINE2, 1910 + },{ 1911 + .name = name_comp2, /* Composite input */ 1912 + .vmux = 3, 1913 + .amux = LINE2, 1917 1914 }}, 1918 1915 .radio = { 1919 1916 .name = name_radio, 1920 - .amux = LINE2, 1921 - }, 1922 - .mute = { 1923 - .name = name_mute, 1924 - .amux = LINE1, 1917 + .amux = TV, 1918 + .gpio = 0x000000, /* GPIO21=Low for FM radio antenna */ 1925 1919 }, 1926 1920 }, 1927 1921 [SAA7134_BOARD_VIDEOMATE_TV_GOLD_PLUSII] = { ··· 2695 2701 .driver_data = SAA7134_BOARD_FLYVIDEO2000, 2696 2702 },{ 2697 2703 .vendor = PCI_VENDOR_ID_PHILIPS, 2704 + .device = PCI_DEVICE_ID_PHILIPS_SAA7130, 2705 + .subvendor = 0x4e42, /* Typhoon */ 2706 + .subdevice = 0x0138, /* LifeView FlyTV Prime30 OEM */ 2707 + .driver_data = SAA7134_BOARD_FLYVIDEO2000, 2708 + },{ 2709 + .vendor = PCI_VENDOR_ID_PHILIPS, 2698 2710 .device = PCI_DEVICE_ID_PHILIPS_SAA7133, 2699 2711 .subvendor = 0x5168, 2700 2712 .subdevice = 0x0212, /* minipci, LR212 */ ··· 2935 2935 .device = PCI_DEVICE_ID_PHILIPS_SAA7133, 2936 2936 .subvendor = 0x5168, 2937 2937 .subdevice = 0x0502, /* Cardbus version */ 2938 - .driver_data = SAA7134_BOARD_FLYDVBTDUO, 2938 + .driver_data = SAA7134_BOARD_FLYDVBT_DUO_CARDBUS, 2939 2939 },{ 2940 2940 .vendor = PCI_VENDOR_ID_PHILIPS, 2941 2941 .device = PCI_DEVICE_ID_PHILIPS_SAA7133, ··· 2980 2980 .subdevice = 0x1370, /* cardbus version */ 2981 2981 .driver_data = SAA7134_BOARD_ADS_INSTANT_TV, 2982 2982 2983 - },{ /* Typhoon DVB-T Duo Digital/Analog Cardbus */ 2983 + },{ 2984 2984 .vendor = PCI_VENDOR_ID_PHILIPS, 2985 2985 .device = PCI_DEVICE_ID_PHILIPS_SAA7133, 2986 - .subvendor = 0x4e42, 2987 - .subdevice = 0x0502, 2988 - .driver_data = SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS, 2986 + .subvendor = 0x4e42, /* Typhoon */ 2987 + .subdevice = 0x0502, /* LifeView LR502 OEM */ 2988 + .driver_data = SAA7134_BOARD_FLYDVBT_DUO_CARDBUS, 2989 2989 },{ 2990 2990 .vendor = PCI_VENDOR_ID_PHILIPS, 2991 2991 .device = PCI_DEVICE_ID_PHILIPS_SAA7133, ··· 3206 3206 saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x00040000, 0x00040000); 3207 3207 saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x00040000, 0x00000004); 3208 3208 break; 3209 - case SAA7134_BOARD_FLYDVBTDUO: 3210 - case SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS: 3209 + case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: 3211 3210 /* turn the fan on */ 3212 3211 saa_writeb(SAA7134_GPIO_GPMODE3, 0x08); 3213 3212 saa_writeb(SAA7134_GPIO_GPSTATUS3, 0x06);
+1 -1
drivers/media/video/saa7134/saa7134-dvb.c
··· 861 861 dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, 862 862 &dev->i2c_adap); 863 863 break; 864 - case SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS: 864 + case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS: 865 865 dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config, 866 866 &dev->i2c_adap); 867 867 break;
+1 -1
drivers/media/video/saa7134/saa7134.h
··· 185 185 #define SAA7134_BOARD_AVERMEDIA_GO_007_FM 57 186 186 #define SAA7134_BOARD_ADS_INSTANT_TV 58 187 187 #define SAA7134_BOARD_KWORLD_VSTREAM_XPERT 59 188 - #define SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS 60 188 + #define SAA7134_BOARD_FLYDVBT_DUO_CARDBUS 60 189 189 #define SAA7134_BOARD_PHILIPS_TOUGH 61 190 190 #define SAA7134_BOARD_VIDEOMATE_TV_GOLD_PLUSII 62 191 191 #define SAA7134_BOARD_KWORLD_XPERT 63
+5 -10
drivers/media/video/stradis.c
··· 2012 2012 { 2013 2013 struct saa7146 *saa = pci_get_drvdata(pdev); 2014 2014 2015 - memset(saa, 0, sizeof(*saa)); 2016 2015 saa->user = 0; 2017 2016 /* reset the saa7146 */ 2018 2017 saawrite(0xffff0000, SAA7146_MC1); ··· 2061 2062 } 2062 2063 if (saa->audbuf == NULL && (saa->audbuf = vmalloc(65536)) == NULL) { 2063 2064 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr); 2064 - goto errvid; 2065 + goto errfree; 2065 2066 } 2066 2067 if (saa->osdbuf == NULL && (saa->osdbuf = vmalloc(131072)) == NULL) { 2067 2068 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr); 2068 - goto erraud; 2069 + goto errfree; 2069 2070 } 2070 2071 /* allocate 81920 byte buffer for clipping */ 2071 2072 if ((saa->dmavid2 = kzalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) { 2072 2073 dev_err(&pdev->dev, "%d: clip kmalloc failed\n", saa->nr); 2073 - goto errosd; 2074 + goto errfree; 2074 2075 } 2075 2076 /* setup clipping registers */ 2076 2077 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2); ··· 2084 2085 I2CBusScan(saa); 2085 2086 2086 2087 return 0; 2087 - errosd: 2088 + errfree: 2088 2089 vfree(saa->osdbuf); 2089 - saa->osdbuf = NULL; 2090 - erraud: 2091 2090 vfree(saa->audbuf); 2092 - saa->audbuf = NULL; 2093 - errvid: 2094 2091 vfree(saa->vidbuf); 2095 - saa->vidbuf = NULL; 2092 + saa->audbuf = saa->osdbuf = saa->vidbuf = NULL; 2096 2093 err: 2097 2094 return -ENOMEM; 2098 2095 }
+7 -2
drivers/media/video/tda9887.c
··· 231 231 cAudioIF_6_5 | 232 232 cVideoIF_38_90 ), 233 233 },{ 234 - .std = V4L2_STD_NTSC_M, 234 + .std = V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_KR, 235 235 .name = "NTSC-M", 236 236 .b = ( cNegativeFmTV | 237 237 cQSS ), ··· 619 619 tda9887_dbg("insmod fixup: NTSC => NTSC_M_JP\n"); 620 620 t->std = V4L2_STD_NTSC_M_JP; 621 621 break; 622 + case 'k': 623 + case 'K': 624 + tda9887_dbg("insmod fixup: NTSC => NTSC_M_KR\n"); 625 + t->std = V4L2_STD_NTSC_M_KR; 626 + break; 622 627 case '-': 623 628 /* default parameter, do nothing */ 624 629 break; ··· 881 876 /* ----------------------------------------------------------------------- */ 882 877 883 878 static struct i2c_driver driver = { 884 - .id = -1, /* FIXME */ 879 + .id = I2C_DRIVERID_TDA9887, 885 880 .attach_adapter = tda9887_probe, 886 881 .detach_client = tda9887_detach, 887 882 .command = tda9887_command,
+7 -1
drivers/media/video/tuner-core.c
··· 216 216 buffer[3] = 0xa4; 217 217 i2c_master_send(c,buffer,4); 218 218 default_tuner_init(c); 219 + break; 219 220 default: 220 221 default_tuner_init(c); 221 222 break; ··· 366 365 tuner_dbg("insmod fixup: NTSC => NTSC_M_JP\n"); 367 366 t->std = V4L2_STD_NTSC_M_JP; 368 367 break; 368 + case 'k': 369 + case 'K': 370 + tuner_dbg("insmod fixup: NTSC => NTSC_M_KR\n"); 371 + t->std = V4L2_STD_NTSC_M_KR; 372 + break; 369 373 case '-': 370 374 /* default parameter, do nothing */ 371 375 break; ··· 454 448 printk("%02x ",buffer[i]); 455 449 printk("\n"); 456 450 } 457 - /* TEA5767 autodetection code - only for addr = 0xc0 */ 451 + /* autodetection code based on the i2c addr */ 458 452 if (!no_autodetect) { 459 453 switch (addr) { 460 454 case 0x42:
+9
drivers/media/video/tvaudio.c
··· 390 390 chip_write(chip, TDA9840_SW, t); 391 391 } 392 392 393 + static int tda9840_checkit(struct CHIPSTATE *chip) 394 + { 395 + int rc; 396 + rc = chip_read(chip); 397 + /* lower 5 bits should be 0 */ 398 + return ((rc & 0x1f) == 0) ? 1 : 0; 399 + } 400 + 393 401 /* ---------------------------------------------------------------------- */ 394 402 /* audio chip descriptions - defines+functions for tda985x */ 395 403 ··· 1272 1264 .addr_hi = I2C_TDA9840 >> 1, 1273 1265 .registers = 5, 1274 1266 1267 + .checkit = tda9840_checkit, 1275 1268 .getmode = tda9840_getmode, 1276 1269 .setmode = tda9840_setmode, 1277 1270 .checkmode = generic_checkmode,
+23 -9
drivers/media/video/tvp5150.c
··· 746 746 747 747 static inline void tvp5150_reset(struct i2c_client *c) 748 748 { 749 - u8 type, ver_656, msb_id, lsb_id, msb_rom, lsb_rom; 749 + u8 msb_id, lsb_id, msb_rom, lsb_rom; 750 750 struct tvp5150 *decoder = i2c_get_clientdata(c); 751 751 752 - type=tvp5150_read(c,TVP5150_AUTOSW_MSK); 753 752 msb_id=tvp5150_read(c,TVP5150_MSB_DEV_ID); 754 753 lsb_id=tvp5150_read(c,TVP5150_LSB_DEV_ID); 755 754 msb_rom=tvp5150_read(c,TVP5150_ROM_MAJOR_VER); 756 755 lsb_rom=tvp5150_read(c,TVP5150_ROM_MINOR_VER); 757 756 758 - if (type==0xdc) { 759 - ver_656=tvp5150_read(c,TVP5150_REV_SELECT); 760 - tvp5150_info("tvp%02x%02xam1 detected 656 version is %d.\n",msb_id, lsb_id,ver_656); 761 - } else if (type==0xfc) { 762 - tvp5150_info("tvp%02x%02xa detected.\n",msb_id, lsb_id); 757 + if ((msb_rom==4)&&(lsb_rom==0)) { /* Is TVP5150AM1 */ 758 + tvp5150_info("tvp%02x%02xam1 detected.\n",msb_id, lsb_id); 759 + 760 + /* ITU-T BT.656.4 timing */ 761 + tvp5150_write(c,TVP5150_REV_SELECT,0); 763 762 } else { 764 - tvp5150_info("unknown tvp%02x%02x chip detected(%d).\n",msb_id,lsb_id,type); 763 + if ((msb_rom==3)||(lsb_rom==0x21)) { /* Is TVP5150A */ 764 + tvp5150_info("tvp%02x%02xa detected.\n",msb_id, lsb_id); 765 + } else { 766 + tvp5150_info("*** unknown tvp%02x%02x chip detected.\n",msb_id,lsb_id); 767 + tvp5150_info("*** Rom ver is %d.%d\n",msb_rom,lsb_rom); 768 + } 765 769 } 766 - tvp5150_info("Rom ver is %d.%d\n",msb_rom,lsb_rom); 767 770 768 771 /* Initializes TVP5150 to its default values */ 769 772 tvp5150_write_inittab(c, tvp5150_init_default); ··· 896 893 } 897 894 case DECODER_GET_STATUS: 898 895 { 896 + int *iarg = arg; 897 + int status; 898 + int res=0; 899 + status = tvp5150_read(c, 0x88); 900 + if(status&0x08){ 901 + res |= DECODER_STATUS_COLOR; 902 + } 903 + if(status&0x04 && status&0x02){ 904 + res |= DECODER_STATUS_GOOD; 905 + } 906 + *iarg=res; 899 907 break; 900 908 } 901 909
+1 -6
drivers/net/Kconfig
··· 4 4 # 5 5 6 6 menu "Network device support" 7 + depends on NET 7 8 8 9 config NETDEVICES 9 - depends on NET 10 10 default y if UML 11 11 bool "Network device support" 12 12 ---help--- ··· 24 24 25 25 If unsure, say Y. 26 26 27 - # All the following symbols are dependent on NETDEVICES - do not repeat 28 - # that for each of the symbols. 29 - if NETDEVICES 30 27 31 28 config IFB 32 29 tristate "Intermediate Functional Block support" ··· 2714 2717 ---help--- 2715 2718 If you want to log kernel messages over the network, enable this. 2716 2719 See <file:Documentation/networking/netconsole.txt> for details. 2717 - 2718 - endif #NETDEVICES 2719 2720 2720 2721 config NETPOLL 2721 2722 def_bool NETCONSOLE
+1 -1
drivers/net/tulip/uli526x.c
··· 214 214 /* For module input parameter */ 215 215 static int debug; 216 216 static u32 cr6set; 217 - static unsigned char mode = 8; 217 + static int mode = 8; 218 218 219 219 /* function declaration ------------------------------------- */ 220 220 static int uli526x_open(struct net_device *);
+45 -39
include/asm-mips/bitops.h
··· 644 644 } 645 645 646 646 /* 647 - * flz - find last zero in word. 648 - * @word: The word to search 649 - * 650 - * Returns 0..SZLONG-1 651 - * Undefined if no zero exists, so code should check against ~0UL first. 652 - */ 653 - static inline unsigned long flz(unsigned long word) 654 - { 655 - #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) 656 - return __ilog2(~word); 657 - #else 658 - #ifdef CONFIG_32BIT 659 - int r = 31, s; 660 - word = ~word; 661 - s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s; 662 - s = 8; if ((word & 0xff000000)) s = 0; r -= s; word <<= s; 663 - s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s; 664 - s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s; 665 - s = 1; if ((word & 0x80000000)) s = 0; r -= s; 666 - 667 - return r; 668 - #endif 669 - #ifdef CONFIG_64BIT 670 - int r = 63, s; 671 - word = ~word; 672 - s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s; 673 - s = 16; if ((word & 0xffff000000000000UL)) s = 0; r -= s; word <<= s; 674 - s = 8; if ((word & 0xff00000000000000UL)) s = 0; r -= s; word <<= s; 675 - s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s; 676 - s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s; 677 - s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s; 678 - 679 - return r; 680 - #endif 681 - #endif 682 - } 683 - 684 - /* 685 647 * fls - find last bit set. 686 648 * @word: The word to search 687 649 * ··· 652 690 */ 653 691 static inline unsigned long fls(unsigned long word) 654 692 { 693 + #ifdef CONFIG_32BIT 694 + #ifdef CONFIG_CPU_MIPS32 695 + __asm__ ("clz %0, %1" : "=r" (word) : "r" (word)); 696 + 697 + return 32 - word; 698 + #else 699 + { 700 + int r = 32, s; 701 + 655 702 if (word == 0) 656 703 return 0; 657 704 658 - return flz(~word) + 1; 705 + s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s; 706 + s = 8; if ((word & 0xff000000)) s = 0; r -= s; word <<= s; 707 + s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s; 708 + s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s; 709 + s = 1; if ((word & 0x80000000)) s = 0; r -= s; 710 + 711 + return r; 712 + } 713 + #endif 714 + #endif /* CONFIG_32BIT */ 715 + 716 + #ifdef CONFIG_64BIT 717 + #ifdef CONFIG_CPU_MIPS64 718 + 719 + __asm__ ("dclz %0, %1" : "=r" (word) : "r" (word)); 720 + 721 + return 64 - word; 722 + #else 723 + { 724 + int r = 64, s; 725 + 726 + if (word == 0) 727 + return 0; 728 + 729 + s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s; 730 + s = 16; if ((word & 0xffff000000000000UL)) s = 0; r -= s; word <<= s; 731 + s = 8; if ((word & 0xff00000000000000UL)) s = 0; r -= s; word <<= s; 732 + s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s; 733 + s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s; 734 + s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s; 735 + 736 + return r; 737 + } 738 + #endif 739 + #endif /* CONFIG_64BIT */ 659 740 } 741 + 660 742 #define fls64(x) generic_fls64(x) 661 743 662 744 /*
+29
include/asm-mips/byteorder.h
··· 8 8 #ifndef _ASM_BYTEORDER_H 9 9 #define _ASM_BYTEORDER_H 10 10 11 + #include <linux/config.h> 12 + #include <linux/compiler.h> 11 13 #include <asm/types.h> 12 14 13 15 #ifdef __GNUC__ 16 + 17 + #ifdef CONFIG_CPU_MIPSR2 18 + 19 + static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) 20 + { 21 + __asm__( 22 + " wsbh %0, %1 \n" 23 + : "=r" (x) 24 + : "r" (x)); 25 + 26 + return x; 27 + } 28 + #define __arch__swab16(x) ___arch__swab16(x) 29 + 30 + static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) 31 + { 32 + __asm__( 33 + " wsbh %0, %1 \n" 34 + " rotr %0, %0, 16 \n" 35 + : "=r" (x) 36 + : "r" (x)); 37 + 38 + return x; 39 + } 40 + #define __arch__swab32(x) ___arch__swab32(x) 41 + 42 + #endif /* CONFIG_CPU_MIPSR2 */ 14 43 15 44 #if !defined(__STRICT_ANSI__) || defined(__KERNEL__) 16 45 # define __BYTEORDER_HAS_U64__
+1 -2
include/asm-mips/cacheflush.h
··· 49 49 50 50 extern void (*flush_icache_page)(struct vm_area_struct *vma, 51 51 struct page *page); 52 - extern void (*flush_icache_range)(unsigned long __user start, 53 - unsigned long __user end); 52 + extern void (*flush_icache_range)(unsigned long start, unsigned long end); 54 53 #define flush_cache_vmap(start, end) flush_cache_all() 55 54 #define flush_cache_vunmap(start, end) flush_cache_all() 56 55
include/asm-mips/cobalt/cobalt.h include/asm-mips/mach-cobalt/cobalt.h
include/asm-mips/cobalt/mach-gt64120.h include/asm-mips/mach-cobalt/mach-gt64120.h
+1 -1
include/asm-mips/hazards.h
··· 100 100 101 101 __asm__( 102 102 " .macro _ssnop \n\t" 103 - " sll $0, $2, 1 \n\t" 103 + " sll $0, $0, 1 \n\t" 104 104 " .endm \n\t" 105 105 " \n\t" 106 106 " .macro _ehb \n\t"
+19 -8
include/asm-mips/interrupt.h
··· 47 47 * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs 48 48 * no nops at all. 49 49 */ 50 + /* 51 + * For TX49, operating only IE bit is not enough. 52 + * 53 + * If mfc0 $12 follows store and the mfc0 is last instruction of a 54 + * page and fetching the next instruction causes TLB miss, the result 55 + * of the mfc0 might wrongly contain EXL bit. 56 + * 57 + * ERT-TX49H2-027, ERT-TX49H3-012, ERT-TX49HL3-006, ERT-TX49H4-008 58 + * 59 + * Workaround: mask EXL bit of the result or place a nop before mfc0. 60 + */ 50 61 __asm__ ( 51 62 " .macro local_irq_disable\n" 52 63 " .set push \n" ··· 66 55 " di \n" 67 56 #else 68 57 " mfc0 $1,$12 \n" 69 - " ori $1,1 \n" 70 - " xori $1,1 \n" 58 + " ori $1,0x1f \n" 59 + " xori $1,0x1f \n" 71 60 " .set noreorder \n" 72 61 " mtc0 $1,$12 \n" 73 62 #endif ··· 107 96 " andi \\result, 1 \n" 108 97 #else 109 98 " mfc0 \\result, $12 \n" 110 - " ori $1, \\result, 1 \n" 111 - " xori $1, 1 \n" 99 + " ori $1, \\result, 0x1f \n" 100 + " xori $1, 0x1f \n" 112 101 " .set noreorder \n" 113 102 " mtc0 $1, $12 \n" 114 103 #endif ··· 125 114 126 115 __asm__ ( 127 116 " .macro local_irq_restore flags \n" 117 + " .set push \n" 128 118 " .set noreorder \n" 129 119 " .set noat \n" 130 120 #if defined(CONFIG_CPU_MIPSR2) && defined(CONFIG_IRQ_CPU) ··· 147 135 #else 148 136 " mfc0 $1, $12 \n" 149 137 " andi \\flags, 1 \n" 150 - " ori $1, 1 \n" 151 - " xori $1, 1 \n" 138 + " ori $1, 0x1f \n" 139 + " xori $1, 0x1f \n" 152 140 " or \\flags, $1 \n" 153 141 " mtc0 \\flags, $12 \n" 154 142 #endif 155 143 " irq_disable_hazard \n" 156 - " .set at \n" 157 - " .set reorder \n" 144 + " .set pop \n" 158 145 " .endm \n"); 159 146 160 147 #define local_irq_restore(flags) \
+4
include/asm-mips/mach-au1x00/au1000.h
··· 1198 1198 1199 1199 /* UARTS 0-3 */ 1200 1200 #define UART_BASE UART0_ADDR 1201 + #ifdef CONFIG_SOC_AU1200 1202 + #define UART_DEBUG_BASE UART1_ADDR 1203 + #else 1201 1204 #define UART_DEBUG_BASE UART3_ADDR 1205 + #endif 1202 1206 1203 1207 #define UART_RX 0 /* Receive buffer */ 1204 1208 #define UART_TX 4 /* Transmit buffer */
+56
include/asm-mips/mach-cobalt/cpu-feature-overrides.h
··· 1 + /* 2 + * This file is subject to the terms and conditions of the GNU General Public 3 + * License. See the file "COPYING" in the main directory of this archive 4 + * for more details. 5 + * 6 + * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) 7 + */ 8 + #ifndef __ASM_COBALT_CPU_FEATURE_OVERRIDES_H 9 + #define __ASM_COBALT_CPU_FEATURE_OVERRIDES_H 10 + 11 + #include <linux/config.h> 12 + 13 + #define cpu_has_tlb 1 14 + #define cpu_has_4kex 1 15 + #define cpu_has_3k_cache 0 16 + #define cpu_has_4k_cache 1 17 + #define cpu_has_tx39_cache 0 18 + #define cpu_has_sb1_cache 0 19 + #define cpu_has_fpu 1 20 + #define cpu_has_32fpr 1 21 + #define cpu_has_counter 1 22 + #define cpu_has_watch 0 23 + #define cpu_has_divec 1 24 + #define cpu_has_vce 0 25 + #define cpu_has_cache_cdex_p 0 26 + #define cpu_has_cache_cdex_s 0 27 + #define cpu_has_prefetch 0 28 + #define cpu_has_mcheck 0 29 + #define cpu_has_ejtag 0 30 + 31 + #define cpu_has_subset_pcaches 0 32 + #define cpu_dcache_line_size() 32 33 + #define cpu_icache_line_size() 32 34 + #define cpu_scache_line_size() 0 35 + 36 + #ifdef CONFIG_64BIT 37 + #define cpu_has_llsc 0 38 + #else 39 + #define cpu_has_llsc 1 40 + #endif 41 + 42 + #define cpu_has_mips16 0 43 + #define cpu_has_mdmx 0 44 + #define cpu_has_mips3d 0 45 + #define cpu_has_smartmips 0 46 + #define cpu_has_vtag_icache 0 47 + #define cpu_has_ic_fills_f_dc 0 48 + #define cpu_icache_snoops_remote_store 0 49 + #define cpu_has_dsp 0 50 + 51 + #define cpu_has_mips32r1 0 52 + #define cpu_has_mips32r2 0 53 + #define cpu_has_mips64r1 0 54 + #define cpu_has_mips64r2 0 55 + 56 + #endif /* __ASM_COBALT_CPU_FEATURE_OVERRIDES_H */
+1 -1
include/asm-mips/mach-ip32/cpu-feature-overrides.h
··· 18 18 * so, for 64bit IP32 kernel we just don't use ll/sc. 19 19 * This does not affect luserland. 20 20 */ 21 - #if defined(CONFIG_CPU_R5000) && defined(CONFIG_64BIT) 21 + #if (defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_NEVADA)) && defined(CONFIG_64BIT) 22 22 #define cpu_has_llsc 0 23 23 #else 24 24 #define cpu_has_llsc 1
+48 -348
include/asm-mips/r4kcache.h
··· 166 166 : "r" (base), \ 167 167 "i" (op)); 168 168 169 - static inline void blast_dcache16(void) 170 - { 171 - unsigned long start = INDEX_BASE; 172 - unsigned long end = start + current_cpu_data.dcache.waysize; 173 - unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; 174 - unsigned long ws_end = current_cpu_data.dcache.ways << 175 - current_cpu_data.dcache.waybit; 176 - unsigned long ws, addr; 177 - 178 - for (ws = 0; ws < ws_end; ws += ws_inc) 179 - for (addr = start; addr < end; addr += 0x200) 180 - cache16_unroll32(addr|ws,Index_Writeback_Inv_D); 181 - } 182 - 183 - static inline void blast_dcache16_page(unsigned long page) 184 - { 185 - unsigned long start = page; 186 - unsigned long end = start + PAGE_SIZE; 187 - 188 - do { 189 - cache16_unroll32(start,Hit_Writeback_Inv_D); 190 - start += 0x200; 191 - } while (start < end); 192 - } 193 - 194 - static inline void blast_dcache16_page_indexed(unsigned long page) 195 - { 196 - unsigned long start = page; 197 - unsigned long end = start + PAGE_SIZE; 198 - unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; 199 - unsigned long ws_end = current_cpu_data.dcache.ways << 200 - current_cpu_data.dcache.waybit; 201 - unsigned long ws, addr; 202 - 203 - for (ws = 0; ws < ws_end; ws += ws_inc) 204 - for (addr = start; addr < end; addr += 0x200) 205 - cache16_unroll32(addr|ws,Index_Writeback_Inv_D); 206 - } 207 - 208 - static inline void blast_icache16(void) 209 - { 210 - unsigned long start = INDEX_BASE; 211 - unsigned long end = start + current_cpu_data.icache.waysize; 212 - unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; 213 - unsigned long ws_end = current_cpu_data.icache.ways << 214 - current_cpu_data.icache.waybit; 215 - unsigned long ws, addr; 216 - 217 - for (ws = 0; ws < ws_end; ws += ws_inc) 218 - for (addr = start; addr < end; addr += 0x200) 219 - cache16_unroll32(addr|ws,Index_Invalidate_I); 220 - } 221 - 222 - static inline void blast_icache16_page(unsigned long page) 223 - { 224 - unsigned long start = page; 225 - unsigned long end = start + PAGE_SIZE; 226 - 227 - do { 228 - cache16_unroll32(start,Hit_Invalidate_I); 229 - start += 0x200; 230 - } while (start < end); 231 - } 232 - 233 - static inline void blast_icache16_page_indexed(unsigned long page) 234 - { 235 - unsigned long start = page; 236 - unsigned long end = start + PAGE_SIZE; 237 - unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; 238 - unsigned long ws_end = current_cpu_data.icache.ways << 239 - current_cpu_data.icache.waybit; 240 - unsigned long ws, addr; 241 - 242 - for (ws = 0; ws < ws_end; ws += ws_inc) 243 - for (addr = start; addr < end; addr += 0x200) 244 - cache16_unroll32(addr|ws,Index_Invalidate_I); 245 - } 246 - 247 - static inline void blast_scache16(void) 248 - { 249 - unsigned long start = INDEX_BASE; 250 - unsigned long end = start + current_cpu_data.scache.waysize; 251 - unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 252 - unsigned long ws_end = current_cpu_data.scache.ways << 253 - current_cpu_data.scache.waybit; 254 - unsigned long ws, addr; 255 - 256 - for (ws = 0; ws < ws_end; ws += ws_inc) 257 - for (addr = start; addr < end; addr += 0x200) 258 - cache16_unroll32(addr|ws,Index_Writeback_Inv_SD); 259 - } 260 - 261 - static inline void blast_scache16_page(unsigned long page) 262 - { 263 - unsigned long start = page; 264 - unsigned long end = page + PAGE_SIZE; 265 - 266 - do { 267 - cache16_unroll32(start,Hit_Writeback_Inv_SD); 268 - start += 0x200; 269 - } while (start < end); 270 - } 271 - 272 - static inline void blast_scache16_page_indexed(unsigned long page) 273 - { 274 - unsigned long start = page; 275 - unsigned long end = start + PAGE_SIZE; 276 - unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 277 - unsigned long ws_end = current_cpu_data.scache.ways << 278 - current_cpu_data.scache.waybit; 279 - unsigned long ws, addr; 280 - 281 - for (ws = 0; ws < ws_end; ws += ws_inc) 282 - for (addr = start; addr < end; addr += 0x200) 283 - cache16_unroll32(addr|ws,Index_Writeback_Inv_SD); 284 - } 285 - 286 169 #define cache32_unroll32(base,op) \ 287 170 __asm__ __volatile__( \ 288 171 " .set push \n" \ ··· 191 308 : \ 192 309 : "r" (base), \ 193 310 "i" (op)); 194 - 195 - static inline void blast_dcache32(void) 196 - { 197 - unsigned long start = INDEX_BASE; 198 - unsigned long end = start + current_cpu_data.dcache.waysize; 199 - unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; 200 - unsigned long ws_end = current_cpu_data.dcache.ways << 201 - current_cpu_data.dcache.waybit; 202 - unsigned long ws, addr; 203 - 204 - for (ws = 0; ws < ws_end; ws += ws_inc) 205 - for (addr = start; addr < end; addr += 0x400) 206 - cache32_unroll32(addr|ws,Index_Writeback_Inv_D); 207 - } 208 - 209 - static inline void blast_dcache32_page(unsigned long page) 210 - { 211 - unsigned long start = page; 212 - unsigned long end = start + PAGE_SIZE; 213 - 214 - do { 215 - cache32_unroll32(start,Hit_Writeback_Inv_D); 216 - start += 0x400; 217 - } while (start < end); 218 - } 219 - 220 - static inline void blast_dcache32_page_indexed(unsigned long page) 221 - { 222 - unsigned long start = page; 223 - unsigned long end = start + PAGE_SIZE; 224 - unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; 225 - unsigned long ws_end = current_cpu_data.dcache.ways << 226 - current_cpu_data.dcache.waybit; 227 - unsigned long ws, addr; 228 - 229 - for (ws = 0; ws < ws_end; ws += ws_inc) 230 - for (addr = start; addr < end; addr += 0x400) 231 - cache32_unroll32(addr|ws,Index_Writeback_Inv_D); 232 - } 233 - 234 - static inline void blast_icache32(void) 235 - { 236 - unsigned long start = INDEX_BASE; 237 - unsigned long end = start + current_cpu_data.icache.waysize; 238 - unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; 239 - unsigned long ws_end = current_cpu_data.icache.ways << 240 - current_cpu_data.icache.waybit; 241 - unsigned long ws, addr; 242 - 243 - for (ws = 0; ws < ws_end; ws += ws_inc) 244 - for (addr = start; addr < end; addr += 0x400) 245 - cache32_unroll32(addr|ws,Index_Invalidate_I); 246 - } 247 - 248 - static inline void blast_icache32_page(unsigned long page) 249 - { 250 - unsigned long start = page; 251 - unsigned long end = start + PAGE_SIZE; 252 - 253 - do { 254 - cache32_unroll32(start,Hit_Invalidate_I); 255 - start += 0x400; 256 - } while (start < end); 257 - } 258 - 259 - static inline void blast_icache32_page_indexed(unsigned long page) 260 - { 261 - unsigned long start = page; 262 - unsigned long end = start + PAGE_SIZE; 263 - unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; 264 - unsigned long ws_end = current_cpu_data.icache.ways << 265 - current_cpu_data.icache.waybit; 266 - unsigned long ws, addr; 267 - 268 - for (ws = 0; ws < ws_end; ws += ws_inc) 269 - for (addr = start; addr < end; addr += 0x400) 270 - cache32_unroll32(addr|ws,Index_Invalidate_I); 271 - } 272 - 273 - static inline void blast_scache32(void) 274 - { 275 - unsigned long start = INDEX_BASE; 276 - unsigned long end = start + current_cpu_data.scache.waysize; 277 - unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 278 - unsigned long ws_end = current_cpu_data.scache.ways << 279 - current_cpu_data.scache.waybit; 280 - unsigned long ws, addr; 281 - 282 - for (ws = 0; ws < ws_end; ws += ws_inc) 283 - for (addr = start; addr < end; addr += 0x400) 284 - cache32_unroll32(addr|ws,Index_Writeback_Inv_SD); 285 - } 286 - 287 - static inline void blast_scache32_page(unsigned long page) 288 - { 289 - unsigned long start = page; 290 - unsigned long end = page + PAGE_SIZE; 291 - 292 - do { 293 - cache32_unroll32(start,Hit_Writeback_Inv_SD); 294 - start += 0x400; 295 - } while (start < end); 296 - } 297 - 298 - static inline void blast_scache32_page_indexed(unsigned long page) 299 - { 300 - unsigned long start = page; 301 - unsigned long end = start + PAGE_SIZE; 302 - unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 303 - unsigned long ws_end = current_cpu_data.scache.ways << 304 - current_cpu_data.scache.waybit; 305 - unsigned long ws, addr; 306 - 307 - for (ws = 0; ws < ws_end; ws += ws_inc) 308 - for (addr = start; addr < end; addr += 0x400) 309 - cache32_unroll32(addr|ws,Index_Writeback_Inv_SD); 310 - } 311 311 312 312 #define cache64_unroll32(base,op) \ 313 313 __asm__ __volatile__( \ ··· 218 452 : "r" (base), \ 219 453 "i" (op)); 220 454 221 - static inline void blast_icache64(void) 222 - { 223 - unsigned long start = INDEX_BASE; 224 - unsigned long end = start + current_cpu_data.icache.waysize; 225 - unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; 226 - unsigned long ws_end = current_cpu_data.icache.ways << 227 - current_cpu_data.icache.waybit; 228 - unsigned long ws, addr; 229 - 230 - for (ws = 0; ws < ws_end; ws += ws_inc) 231 - for (addr = start; addr < end; addr += 0x800) 232 - cache64_unroll32(addr|ws,Index_Invalidate_I); 233 - } 234 - 235 - static inline void blast_icache64_page(unsigned long page) 236 - { 237 - unsigned long start = page; 238 - unsigned long end = start + PAGE_SIZE; 239 - 240 - do { 241 - cache64_unroll32(start,Hit_Invalidate_I); 242 - start += 0x800; 243 - } while (start < end); 244 - } 245 - 246 - static inline void blast_icache64_page_indexed(unsigned long page) 247 - { 248 - unsigned long start = page; 249 - unsigned long end = start + PAGE_SIZE; 250 - unsigned long ws_inc = 1UL << current_cpu_data.icache.waybit; 251 - unsigned long ws_end = current_cpu_data.icache.ways << 252 - current_cpu_data.icache.waybit; 253 - unsigned long ws, addr; 254 - 255 - for (ws = 0; ws < ws_end; ws += ws_inc) 256 - for (addr = start; addr < end; addr += 0x800) 257 - cache64_unroll32(addr|ws,Index_Invalidate_I); 258 - } 259 - 260 - static inline void blast_scache64(void) 261 - { 262 - unsigned long start = INDEX_BASE; 263 - unsigned long end = start + current_cpu_data.scache.waysize; 264 - unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 265 - unsigned long ws_end = current_cpu_data.scache.ways << 266 - current_cpu_data.scache.waybit; 267 - unsigned long ws, addr; 268 - 269 - for (ws = 0; ws < ws_end; ws += ws_inc) 270 - for (addr = start; addr < end; addr += 0x800) 271 - cache64_unroll32(addr|ws,Index_Writeback_Inv_SD); 272 - } 273 - 274 - static inline void blast_scache64_page(unsigned long page) 275 - { 276 - unsigned long start = page; 277 - unsigned long end = page + PAGE_SIZE; 278 - 279 - do { 280 - cache64_unroll32(start,Hit_Writeback_Inv_SD); 281 - start += 0x800; 282 - } while (start < end); 283 - } 284 - 285 - static inline void blast_scache64_page_indexed(unsigned long page) 286 - { 287 - unsigned long start = page; 288 - unsigned long end = start + PAGE_SIZE; 289 - unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 290 - unsigned long ws_end = current_cpu_data.scache.ways << 291 - current_cpu_data.scache.waybit; 292 - unsigned long ws, addr; 293 - 294 - for (ws = 0; ws < ws_end; ws += ws_inc) 295 - for (addr = start; addr < end; addr += 0x800) 296 - cache64_unroll32(addr|ws,Index_Writeback_Inv_SD); 297 - } 298 - 299 455 #define cache128_unroll32(base,op) \ 300 456 __asm__ __volatile__( \ 301 457 " .set push \n" \ ··· 244 556 : "r" (base), \ 245 557 "i" (op)); 246 558 247 - static inline void blast_scache128(void) 248 - { 249 - unsigned long start = INDEX_BASE; 250 - unsigned long end = start + current_cpu_data.scache.waysize; 251 - unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 252 - unsigned long ws_end = current_cpu_data.scache.ways << 253 - current_cpu_data.scache.waybit; 254 - unsigned long ws, addr; 255 - 256 - for (ws = 0; ws < ws_end; ws += ws_inc) 257 - for (addr = start; addr < end; addr += 0x1000) 258 - cache128_unroll32(addr|ws,Index_Writeback_Inv_SD); 559 + /* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */ 560 + #define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize) \ 561 + static inline void blast_##pfx##cache##lsize(void) \ 562 + { \ 563 + unsigned long start = INDEX_BASE; \ 564 + unsigned long end = start + current_cpu_data.desc.waysize; \ 565 + unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \ 566 + unsigned long ws_end = current_cpu_data.desc.ways << \ 567 + current_cpu_data.desc.waybit; \ 568 + unsigned long ws, addr; \ 569 + \ 570 + for (ws = 0; ws < ws_end; ws += ws_inc) \ 571 + for (addr = start; addr < end; addr += lsize * 32) \ 572 + cache##lsize##_unroll32(addr|ws,indexop); \ 573 + } \ 574 + \ 575 + static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \ 576 + { \ 577 + unsigned long start = page; \ 578 + unsigned long end = page + PAGE_SIZE; \ 579 + \ 580 + do { \ 581 + cache##lsize##_unroll32(start,hitop); \ 582 + start += lsize * 32; \ 583 + } while (start < end); \ 584 + } \ 585 + \ 586 + static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page) \ 587 + { \ 588 + unsigned long start = page; \ 589 + unsigned long end = start + PAGE_SIZE; \ 590 + unsigned long ws_inc = 1UL << current_cpu_data.desc.waybit; \ 591 + unsigned long ws_end = current_cpu_data.desc.ways << \ 592 + current_cpu_data.desc.waybit; \ 593 + unsigned long ws, addr; \ 594 + \ 595 + for (ws = 0; ws < ws_end; ws += ws_inc) \ 596 + for (addr = start; addr < end; addr += lsize * 32) \ 597 + cache##lsize##_unroll32(addr|ws,indexop); \ 259 598 } 260 599 261 - static inline void blast_scache128_page(unsigned long page) 262 - { 263 - unsigned long start = page; 264 - unsigned long end = page + PAGE_SIZE; 265 - 266 - do { 267 - cache128_unroll32(start,Hit_Writeback_Inv_SD); 268 - start += 0x1000; 269 - } while (start < end); 270 - } 271 - 272 - static inline void blast_scache128_page_indexed(unsigned long page) 273 - { 274 - unsigned long start = page; 275 - unsigned long end = start + PAGE_SIZE; 276 - unsigned long ws_inc = 1UL << current_cpu_data.scache.waybit; 277 - unsigned long ws_end = current_cpu_data.scache.ways << 278 - current_cpu_data.scache.waybit; 279 - unsigned long ws, addr; 280 - 281 - for (ws = 0; ws < ws_end; ws += ws_inc) 282 - for (addr = start; addr < end; addr += 0x1000) 283 - cache128_unroll32(addr|ws,Index_Writeback_Inv_SD); 284 - } 600 + __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16) 601 + __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16) 602 + __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16) 603 + __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32) 604 + __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32) 605 + __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32) 606 + __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64) 607 + __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64) 608 + __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128) 285 609 286 610 #endif /* _ASM_R4KCACHE_H */
+1 -2
include/asm-mips/reboot.h
··· 3 3 * License. See the file "COPYING" in the main directory of this archive 4 4 * for more details. 5 5 * 6 - * Copyright (C) 1997, 1999, 2001 by Ralf Baechle 6 + * Copyright (C) 1997, 1999, 2001, 06 by Ralf Baechle 7 7 * Copyright (C) 2001 MIPS Technologies, Inc. 8 8 */ 9 9 #ifndef _ASM_REBOOT_H ··· 11 11 12 12 extern void (*_machine_restart)(char *command); 13 13 extern void (*_machine_halt)(void); 14 - extern void (*_machine_power_off)(void); 15 14 16 15 #endif /* _ASM_REBOOT_H */
-22
include/asm-mips/string.h
··· 141 141 #define __HAVE_ARCH_MEMMOVE 142 142 extern void *memmove(void *__dest, __const__ void *__src, size_t __n); 143 143 144 - #ifdef CONFIG_32BIT 145 - #define __HAVE_ARCH_MEMSCAN 146 - static __inline__ void *memscan(void *__addr, int __c, size_t __size) 147 - { 148 - char *__end = (char *)__addr + __size; 149 - unsigned char __uc = (unsigned char) __c; 150 - 151 - __asm__(".set\tpush\n\t" 152 - ".set\tnoat\n\t" 153 - ".set\treorder\n\t" 154 - "1:\tbeq\t%0,%1,2f\n\t" 155 - "addiu\t%0,1\n\t" 156 - "lbu\t$1,-1(%0)\n\t" 157 - "bne\t$1,%z4,1b\n" 158 - "2:\t.set\tpop" 159 - : "=r" (__addr), "=r" (__end) 160 - : "0" (__addr), "1" (__end), "Jr" (__uc)); 161 - 162 - return __addr; 163 - } 164 - #endif /* CONFIG_32BIT */ 165 - 166 144 #endif /* _ASM_STRING_H */
+10 -11
include/asm-mips/tx4927/tx4927.h
··· 2 2 * Author: MontaVista Software, Inc. 3 3 * source@mvista.com 4 4 * 5 - * Copyright 2001-2002 MontaVista Software Inc. 5 + * Copyright 2001-2006 MontaVista Software Inc. 6 6 * 7 7 * This program is free software; you can redistribute it and/or modify it 8 8 * under the terms of the GNU General Public License as published by the ··· 30 30 #include <asm/tx4927/tx4927_mips.h> 31 31 32 32 /* 33 - This register naming came from the intergrate cpu/controoler name TX4927 33 + This register naming came from the integrated CPU/controller name TX4927 34 34 followed by the device name from table 4.2.2 on page 4-3 and then followed 35 35 by the register name from table 4.2.3 on pages 4-4 to 4-8. The manaul 36 - used is "TMPR4927BT Preliminary Rev 0.1 20.Jul.2001". 36 + used was "TMPR4927BT Preliminary Rev 0.1 20.Jul.2001". 37 37 */ 38 38 39 39 #define TX4927_SIO_0_BASE ··· 251 251 252 252 /* TX4927 Timer 0 (32-bit registers) */ 253 253 #define TX4927_TMR0_BASE 0xf000 254 - #define TX4927_TMR0_TMTCR0 0xf004 255 - #define TX4927_TMR0_TMTISR0 0xf008 254 + #define TX4927_TMR0_TMTCR0 0xf000 255 + #define TX4927_TMR0_TMTISR0 0xf004 256 256 #define TX4927_TMR0_TMCPRA0 0xf008 257 257 #define TX4927_TMR0_TMCPRB0 0xf00c 258 258 #define TX4927_TMR0_TMITMR0 0xf010 ··· 264 264 265 265 /* TX4927 Timer 1 (32-bit registers) */ 266 266 #define TX4927_TMR1_BASE 0xf100 267 - #define TX4927_TMR1_TMTCR1 0xf104 268 - #define TX4927_TMR1_TMTISR1 0xf108 267 + #define TX4927_TMR1_TMTCR1 0xf100 268 + #define TX4927_TMR1_TMTISR1 0xf104 269 269 #define TX4927_TMR1_TMCPRA1 0xf108 270 270 #define TX4927_TMR1_TMCPRB1 0xf10c 271 271 #define TX4927_TMR1_TMITMR1 0xf110 ··· 277 277 278 278 /* TX4927 Timer 2 (32-bit registers) */ 279 279 #define TX4927_TMR2_BASE 0xf200 280 - #define TX4927_TMR2_TMTCR2 0xf104 281 - #define TX4927_TMR2_TMTISR2 0xf208 280 + #define TX4927_TMR2_TMTCR2 0xf200 281 + #define TX4927_TMR2_TMTISR2 0xf204 282 282 #define TX4927_TMR2_TMCPRA2 0xf208 283 - #define TX4927_TMR2_TMCPRB2 0xf20c 284 283 #define TX4927_TMR2_TMITMR2 0xf210 285 284 #define TX4927_TMR2_TMCCDR2 0xf220 286 - #define TX4927_TMR2_TMPGMR2 0xf230 285 + #define TX4927_TMR2_TMWTMR2 0xf240 287 286 #define TX4927_TMR2_TMTRR2 0xf2f0 288 287 #define TX4927_TMR2_LIMIT 0xf2ff 289 288
+10
include/asm-mips/tx4927/tx4927_pci.h
··· 253 253 #define TX4927_CCFG_PCIDIVMODE_5 0x00001000 254 254 #define TX4927_CCFG_PCIDIVMODE_6 0x00001800 255 255 256 + #define TX4937_CCFG_PCIDIVMODE_MASK 0x00001c00 257 + #define TX4937_CCFG_PCIDIVMODE_8 0x00000000 258 + #define TX4937_CCFG_PCIDIVMODE_4 0x00000400 259 + #define TX4937_CCFG_PCIDIVMODE_9 0x00000800 260 + #define TX4937_CCFG_PCIDIVMODE_4_5 0x00000c00 261 + #define TX4937_CCFG_PCIDIVMODE_10 0x00001000 262 + #define TX4937_CCFG_PCIDIVMODE_5 0x00001400 263 + #define TX4937_CCFG_PCIDIVMODE_11 0x00001800 264 + #define TX4937_CCFG_PCIDIVMODE_5_5 0x00001c00 265 + 256 266 /* PCFG : Pin Configuration */ 257 267 #define TX4927_PCFG_PCICLKEN_ALL 0x003f0000 258 268 #define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
+36 -35
include/asm-mips/uaccess.h
··· 202 202 * Yuck. We need two variants, one for 64bit operation and one 203 203 * for 32 bit mode and old iron. 204 204 */ 205 - #ifdef __mips64 206 - #define __GET_USER_DW(ptr) __get_user_asm("ld", ptr) 207 - #else 208 - #define __GET_USER_DW(ptr) __get_user_asm_ll32(ptr) 205 + #ifdef CONFIG_32BIT 206 + #define __GET_USER_DW(val, ptr) __get_user_asm_ll32(val, ptr) 209 207 #endif 208 + #ifdef CONFIG_64BIT 209 + #define __GET_USER_DW(val, ptr) __get_user_asm(val, "ld", ptr) 210 + #endif 211 + 212 + extern void __get_user_unknown(void); 213 + 214 + #define __get_user_common(val, size, ptr) \ 215 + do { \ 216 + switch (size) { \ 217 + case 1: __get_user_asm(val, "lb", ptr); break; \ 218 + case 2: __get_user_asm(val, "lh", ptr); break; \ 219 + case 4: __get_user_asm(val, "lw", ptr); break; \ 220 + case 8: __GET_USER_DW(val, ptr); break; \ 221 + default: __get_user_unknown(); break; \ 222 + } \ 223 + } while (0) 210 224 211 225 #define __get_user_nocheck(x,ptr,size) \ 212 226 ({ \ 213 - __typeof(*(ptr)) __gu_val = (__typeof(*(ptr))) 0; \ 214 - long __gu_err = 0; \ 227 + long __gu_err; \ 215 228 \ 216 - switch (size) { \ 217 - case 1: __get_user_asm("lb", ptr); break; \ 218 - case 2: __get_user_asm("lh", ptr); break; \ 219 - case 4: __get_user_asm("lw", ptr); break; \ 220 - case 8: __GET_USER_DW(ptr); break; \ 221 - default: __get_user_unknown(); break; \ 222 - } \ 223 - (x) = (__typeof__(*(ptr))) __gu_val; \ 229 + __get_user_common((x), size, ptr); \ 224 230 __gu_err; \ 225 231 }) 226 232 227 233 #define __get_user_check(x,ptr,size) \ 228 234 ({ \ 229 - const __typeof__(*(ptr)) __user * __gu_addr = (ptr); \ 230 - __typeof__(*(ptr)) __gu_val = 0; \ 231 235 long __gu_err = -EFAULT; \ 236 + const void __user * __gu_ptr = (ptr); \ 232 237 \ 233 - if (likely(access_ok(VERIFY_READ, __gu_addr, size))) { \ 234 - switch (size) { \ 235 - case 1: __get_user_asm("lb", __gu_addr); break; \ 236 - case 2: __get_user_asm("lh", __gu_addr); break; \ 237 - case 4: __get_user_asm("lw", __gu_addr); break; \ 238 - case 8: __GET_USER_DW(__gu_addr); break; \ 239 - default: __get_user_unknown(); break; \ 240 - } \ 241 - } \ 242 - (x) = (__typeof__(*(ptr))) __gu_val; \ 238 + if (likely(access_ok(VERIFY_READ, __gu_ptr, size))) \ 239 + __get_user_common((x), size, __gu_ptr); \ 240 + \ 243 241 __gu_err; \ 244 242 }) 245 243 246 - #define __get_user_asm(insn, addr) \ 244 + #define __get_user_asm(val, insn, addr) \ 247 245 { \ 246 + long __gu_tmp; \ 247 + \ 248 248 __asm__ __volatile__( \ 249 249 "1: " insn " %1, %3 \n" \ 250 250 "2: \n" \ ··· 255 255 " .section __ex_table,\"a\" \n" \ 256 256 " "__UA_ADDR "\t1b, 3b \n" \ 257 257 " .previous \n" \ 258 - : "=r" (__gu_err), "=r" (__gu_val) \ 258 + : "=r" (__gu_err), "=r" (__gu_tmp) \ 259 259 : "0" (0), "o" (__m(addr)), "i" (-EFAULT)); \ 260 + \ 261 + (val) = (__typeof__(val)) __gu_tmp; \ 260 262 } 261 263 262 264 /* 263 265 * Get a long long 64 using 32 bit registers. 264 266 */ 265 - #define __get_user_asm_ll32(addr) \ 267 + #define __get_user_asm_ll32(val, addr) \ 266 268 { \ 267 269 __asm__ __volatile__( \ 268 270 "1: lw %1, (%3) \n" \ ··· 280 278 " " __UA_ADDR " 1b, 4b \n" \ 281 279 " " __UA_ADDR " 2b, 4b \n" \ 282 280 " .previous \n" \ 283 - : "=r" (__gu_err), "=&r" (__gu_val) \ 281 + : "=r" (__gu_err), "=&r" (val) \ 284 282 : "0" (0), "r" (addr), "i" (-EFAULT)); \ 285 283 } 286 - 287 - extern void __get_user_unknown(void); 288 284 289 285 /* 290 286 * Yuck. We need two variants, one for 64bit operation and one 291 287 * for 32 bit mode and old iron. 292 288 */ 293 - #ifdef __mips64 294 - #define __PUT_USER_DW(ptr) __put_user_asm("sd", ptr) 295 - #else 289 + #ifdef CONFIG_32BIT 296 290 #define __PUT_USER_DW(ptr) __put_user_asm_ll32(ptr) 291 + #endif 292 + #ifdef CONFIG_64BIT 293 + #define __PUT_USER_DW(ptr) __put_user_asm("sd", ptr) 297 294 #endif 298 295 299 296 #define __put_user_nocheck(x,ptr,size) \
+3 -1
include/linux/videodev2.h
··· 629 629 #define V4L2_STD_NTSC_M ((v4l2_std_id)0x00001000) 630 630 #define V4L2_STD_NTSC_M_JP ((v4l2_std_id)0x00002000) 631 631 #define V4L2_STD_NTSC_443 ((v4l2_std_id)0x00004000) 632 + #define V4L2_STD_NTSC_M_KR ((v4l2_std_id)0x00008000) 632 633 633 634 #define V4L2_STD_SECAM_B ((v4l2_std_id)0x00010000) 634 635 #define V4L2_STD_SECAM_D ((v4l2_std_id)0x00020000) ··· 662 661 V4L2_STD_PAL_H |\ 663 662 V4L2_STD_PAL_I) 664 663 #define V4L2_STD_NTSC (V4L2_STD_NTSC_M |\ 665 - V4L2_STD_NTSC_M_JP) 664 + V4L2_STD_NTSC_M_JP |\ 665 + V4L2_STD_NTSC_M_KR) 666 666 #define V4L2_STD_SECAM_DK (V4L2_STD_SECAM_D |\ 667 667 V4L2_STD_SECAM_K |\ 668 668 V4L2_STD_SECAM_K1)
+5 -2
scripts/kconfig/lxdialog/Makefile
··· 2 2 # 3 3 4 4 check-lxdialog := $(srctree)/$(src)/check-lxdialog.sh 5 - HOST_EXTRACFLAGS:= $(shell $(CONFIG_SHELL) $(check-lxdialog) -ccflags) 6 - HOST_LOADLIBES := $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC)) 5 + 6 + # Use reursively expanded variables so we do not call gcc unless 7 + # we really need to do so. (Do not call gcc as part of make mrproper) 8 + HOST_EXTRACFLAGS = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ccflags) 9 + HOST_LOADLIBES = $(shell $(CONFIG_SHELL) $(check-lxdialog) -ldflags $(HOSTCC)) 7 10 8 11 HOST_EXTRACFLAGS += -DLOCALE 9 12
+9 -5
scripts/kconfig/lxdialog/check-lxdialog.sh
··· 4 4 # What library to link 5 5 ldflags() 6 6 { 7 - echo "main() {}" | $cc -lncursesw -xc - -o /dev/null 2> /dev/null 7 + $cc -print-file-name=libncursesw.so | grep -q / 8 8 if [ $? -eq 0 ]; then 9 9 echo '-lncursesw' 10 10 exit 11 11 fi 12 - echo "main() {}" | $cc -lncurses -xc - -o /dev/null 2> /dev/null 12 + $cc -print-file-name=libncurses.so | grep -q / 13 13 if [ $? -eq 0 ]; then 14 14 echo '-lncurses' 15 15 exit 16 16 fi 17 - echo "main() {}" | $cc -lcurses -xc - -o /dev/null 2> /dev/null 17 + $cc -print-file-name=libcurses.so | grep -q / 18 18 if [ $? -eq 0 ]; then 19 19 echo '-lcurses' 20 20 exit ··· 36 36 fi 37 37 } 38 38 39 - compiler="" 39 + # Temp file, try to clean up after us 40 + tmp=.lxdialog.tmp 41 + trap "rm -f $tmp" 0 1 2 3 15 42 + 40 43 # Check if we can link to ncurses 41 44 check() { 42 - echo "main() {}" | $cc -xc - -o /dev/null 2> /dev/null 45 + echo "main() {}" | $cc -xc - -o $tmp 2> /dev/null 43 46 if [ $? != 0 ]; then 44 47 echo " *** Unable to find the ncurses libraries." 1>&2 45 48 echo " *** make menuconfig require the ncurses libraries" 1>&2 ··· 62 59 exit 1 63 60 fi 64 61 62 + cc="" 65 63 case "$1" in 66 64 "-check") 67 65 shift