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docs: kvm: convert devices/xics.txt to ReST
- Use title markups;
- adjust indentation and add blank lines as needed;
- adjust tables to match ReST accepted formats;
- use :field: markups.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
authored by
Mauro Carvalho Chehab
and committed by
Paolo Bonzini
5cccf379
6c972ba6
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Documentation/virt/kvm/devices/xics.txt
Documentation/virt/kvm/devices/xics.rst
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Documentation/virt/kvm/devices/xics.txt
Documentation/virt/kvm/devices/xics.rst
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.. SPDX-License-Identifier: GPL-2.0
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=========================
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XICS interrupt controller
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=========================
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Device type supported: KVM_DEV_TYPE_XICS
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Groups:
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1. KVM_DEV_XICS_GRP_SOURCES
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Attributes: One per interrupt source, indexed by the source number.
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Attributes:
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One per interrupt source, indexed by the source number.
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2. KVM_DEV_XICS_GRP_CTRL
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Attributes:
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2.1 KVM_DEV_XICS_NR_SERVERS (write only)
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Attributes:
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2.1 KVM_DEV_XICS_NR_SERVERS (write only)
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The kvm_device_attr.addr points to a __u32 value which is the number of
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interrupt server numbers (ie, highest possible vcpu id plus one).
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Errors:
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-EINVAL: Value greater than KVM_MAX_VCPU_ID.
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-EFAULT: Invalid user pointer for attr->addr.
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-EBUSY: A vcpu is already connected to the device.
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======= ==========================================
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-EINVAL Value greater than KVM_MAX_VCPU_ID.
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-EFAULT Invalid user pointer for attr->addr.
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-EBUSY A vcpu is already connected to the device.
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======= ==========================================
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This device emulates the XICS (eXternal Interrupt Controller
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Specification) defined in PAPR. The XICS has a set of interrupt
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bitfields, starting from the least-significant end of the word:
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* Destination (server number), 32 bits
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This specifies where the interrupt should be sent, and is the
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interrupt server number specified for the destination vcpu.
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* Priority, 8 bits
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This is the priority specified for this interrupt source, where 0 is
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the highest priority and 255 is the lowest. An interrupt with a
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priority of 255 will never be delivered.
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* Level sensitive flag, 1 bit
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This bit is 1 for a level-sensitive interrupt source, or 0 for
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edge-sensitive (or MSI).
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* Masked flag, 1 bit
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This bit is set to 1 if the interrupt is masked (cannot be delivered
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regardless of its priority), for example by the ibm,int-off RTAS
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call, or 0 if it is not masked.
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* Pending flag, 1 bit
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This bit is 1 if the source has a pending interrupt, otherwise 0.
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Only one XICS instance may be created per VM.