ASoC: Manage mode and rate bits correctly for CS4271 CODEC.

Manage mode and rate bits correctly, according to datasheet in CS4271 CODEC.
This is done to make capture work properly.

Signed-off-by: Alexander Sverdlin <subaparts@yandex.ru>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

authored by

Alexander Sverdlin and committed by
Mark Brown
5c3a12e9 15086ded

+53 -30
+53 -30
sound/soc/codecs/cs4271.c
··· 168 168 int gpio_disable; 169 169 }; 170 170 171 - struct cs4271_clk_cfg { 172 - unsigned int ratio; /* MCLK / sample rate */ 173 - u8 speed_mode; /* codec speed mode: 1x, 2x, 4x */ 174 - u8 mclk_master; /* ratio bit mask for Master mode */ 175 - u8 mclk_slave; /* ratio bit mask for Slave mode */ 176 - }; 177 - 178 - static struct cs4271_clk_cfg cs4271_clk_tab[] = { 179 - {64, CS4271_MODE1_MODE_4X, CS4271_MODE1_DIV_1, CS4271_MODE1_DIV_1}, 180 - {96, CS4271_MODE1_MODE_4X, CS4271_MODE1_DIV_15, CS4271_MODE1_DIV_1}, 181 - {128, CS4271_MODE1_MODE_2X, CS4271_MODE1_DIV_1, CS4271_MODE1_DIV_1}, 182 - {192, CS4271_MODE1_MODE_2X, CS4271_MODE1_DIV_15, CS4271_MODE1_DIV_1}, 183 - {256, CS4271_MODE1_MODE_1X, CS4271_MODE1_DIV_1, CS4271_MODE1_DIV_1}, 184 - {384, CS4271_MODE1_MODE_1X, CS4271_MODE1_DIV_15, CS4271_MODE1_DIV_1}, 185 - {512, CS4271_MODE1_MODE_1X, CS4271_MODE1_DIV_2, CS4271_MODE1_DIV_1}, 186 - {768, CS4271_MODE1_MODE_1X, CS4271_MODE1_DIV_3, CS4271_MODE1_DIV_3}, 187 - {1024, CS4271_MODE1_MODE_1X, CS4271_MODE1_DIV_3, CS4271_MODE1_DIV_3} 188 - }; 189 - 190 - #define CS4171_NR_RATIOS ARRAY_SIZE(cs4271_clk_tab) 191 - 192 171 /* 193 172 * @freq is the desired MCLK rate 194 173 * MCLK rate should (c) be the sample rate, multiplied by one of the ··· 276 297 return cs4271_set_deemph(codec); 277 298 } 278 299 300 + struct cs4271_clk_cfg { 301 + bool master; /* codec mode */ 302 + u8 speed_mode; /* codec speed mode: 1x, 2x, 4x */ 303 + unsigned short ratio; /* MCLK / sample rate */ 304 + u8 ratio_mask; /* ratio bit mask for Master mode */ 305 + }; 306 + 307 + static struct cs4271_clk_cfg cs4271_clk_tab[] = { 308 + {1, CS4271_MODE1_MODE_1X, 256, CS4271_MODE1_DIV_1}, 309 + {1, CS4271_MODE1_MODE_1X, 384, CS4271_MODE1_DIV_15}, 310 + {1, CS4271_MODE1_MODE_1X, 512, CS4271_MODE1_DIV_2}, 311 + {1, CS4271_MODE1_MODE_1X, 768, CS4271_MODE1_DIV_3}, 312 + {1, CS4271_MODE1_MODE_2X, 128, CS4271_MODE1_DIV_1}, 313 + {1, CS4271_MODE1_MODE_2X, 192, CS4271_MODE1_DIV_15}, 314 + {1, CS4271_MODE1_MODE_2X, 256, CS4271_MODE1_DIV_2}, 315 + {1, CS4271_MODE1_MODE_2X, 384, CS4271_MODE1_DIV_3}, 316 + {1, CS4271_MODE1_MODE_4X, 64, CS4271_MODE1_DIV_1}, 317 + {1, CS4271_MODE1_MODE_4X, 96, CS4271_MODE1_DIV_15}, 318 + {1, CS4271_MODE1_MODE_4X, 128, CS4271_MODE1_DIV_2}, 319 + {1, CS4271_MODE1_MODE_4X, 192, CS4271_MODE1_DIV_3}, 320 + {0, CS4271_MODE1_MODE_1X, 256, CS4271_MODE1_DIV_1}, 321 + {0, CS4271_MODE1_MODE_1X, 384, CS4271_MODE1_DIV_1}, 322 + {0, CS4271_MODE1_MODE_1X, 512, CS4271_MODE1_DIV_1}, 323 + {0, CS4271_MODE1_MODE_1X, 768, CS4271_MODE1_DIV_2}, 324 + {0, CS4271_MODE1_MODE_1X, 1024, CS4271_MODE1_DIV_2}, 325 + {0, CS4271_MODE1_MODE_2X, 128, CS4271_MODE1_DIV_1}, 326 + {0, CS4271_MODE1_MODE_2X, 192, CS4271_MODE1_DIV_1}, 327 + {0, CS4271_MODE1_MODE_2X, 256, CS4271_MODE1_DIV_1}, 328 + {0, CS4271_MODE1_MODE_2X, 384, CS4271_MODE1_DIV_2}, 329 + {0, CS4271_MODE1_MODE_2X, 512, CS4271_MODE1_DIV_2}, 330 + {0, CS4271_MODE1_MODE_4X, 64, CS4271_MODE1_DIV_1}, 331 + {0, CS4271_MODE1_MODE_4X, 96, CS4271_MODE1_DIV_1}, 332 + {0, CS4271_MODE1_MODE_4X, 128, CS4271_MODE1_DIV_1}, 333 + {0, CS4271_MODE1_MODE_4X, 192, CS4271_MODE1_DIV_2}, 334 + {0, CS4271_MODE1_MODE_4X, 256, CS4271_MODE1_DIV_2}, 335 + }; 336 + 337 + #define CS4171_NR_RATIOS ARRAY_SIZE(cs4271_clk_tab) 338 + 279 339 static int cs4271_hw_params(struct snd_pcm_substream *substream, 280 340 struct snd_pcm_hw_params *params, 281 341 struct snd_soc_dai *dai) ··· 326 308 unsigned int ratio, val; 327 309 328 310 cs4271->rate = params_rate(params); 311 + 312 + /* Configure DAC */ 313 + if (cs4271->rate < 50000) 314 + val = CS4271_MODE1_MODE_1X; 315 + else if (cs4271->rate < 100000) 316 + val = CS4271_MODE1_MODE_2X; 317 + else 318 + val = CS4271_MODE1_MODE_4X; 319 + 329 320 ratio = cs4271->mclk / cs4271->rate; 330 321 for (i = 0; i < CS4171_NR_RATIOS; i++) 331 - if (cs4271_clk_tab[i].ratio == ratio) 322 + if ((cs4271_clk_tab[i].master == cs4271->master) && 323 + (cs4271_clk_tab[i].speed_mode == val) && 324 + (cs4271_clk_tab[i].ratio == ratio)) 332 325 break; 333 326 334 - if ((i == CS4171_NR_RATIOS) || ((ratio == 1024) && cs4271->master)) { 327 + if (i == CS4171_NR_RATIOS) { 335 328 dev_err(codec->dev, "Invalid sample rate\n"); 336 329 return -EINVAL; 337 330 } 338 331 339 - /* Configure DAC */ 340 - val = cs4271_clk_tab[i].speed_mode; 341 - 342 - if (cs4271->master) 343 - val |= cs4271_clk_tab[i].mclk_master; 344 - else 345 - val |= cs4271_clk_tab[i].mclk_slave; 332 + val |= cs4271_clk_tab[i].ratio_mask; 346 333 347 334 ret = snd_soc_update_bits(codec, CS4271_MODE1, 348 335 CS4271_MODE1_MODE_MASK | CS4271_MODE1_DIV_MASK, val);