Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork

Configure Feed

Select the types of activity you want to include in your feed.

usb: chipidea: need to mask when writting endptflush and endptprime

ENDPTFLUSH and ENDPTPRIME registers are set by software and clear
by hardware. There is a bit for each endpoint. When we are setting
a bit for an endpoint we should make sure we do not touch other
endpoint bit. There is a race condition if the hardware clear the
bit between the read and the write in hw_write.

Cc: stable <stable@vger.kernel.org> # 3.11+
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Tested-by: Michael Grzeschik <mgrzeschik@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Matthieu CASTET and committed by
Greg Kroah-Hartman
5bf5dbed 0fd7a820

+2 -2
+2 -2
drivers/usb/chipidea/udc.c
··· 105 105 106 106 do { 107 107 /* flush any pending transfer */ 108 - hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n)); 108 + hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n)); 109 109 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) 110 110 cpu_relax(); 111 111 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); ··· 205 205 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) 206 206 return -EAGAIN; 207 207 208 - hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n)); 208 + hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n)); 209 209 210 210 while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) 211 211 cpu_relax();