drm/bridge: tc358767: Do not cache dsi_lanes twice

The DSI lane count can be accessed via the dsi device pointer,
make use of that. No functional change.

Signed-off-by: Marek Vasut <[e-mail]>
Cc: Andrzej Hajda <[e-mail]>
Cc: Laurent Pinchart <[e-mail]>
Cc: Lucas Stach <[e-mail]>
Cc: Maxime Ripard <[e-mail]>
Cc: Robert Foss <[e-mail]>
Cc: Sam Ravnborg <[e-mail]>
Reviewed-by: Neil Armstrong <[e-mail]>
Link: https://patchwork.freedesktop.org/patch/msgid/[e-mail]

drivers/gpu/drm/bridge/tc358767.c

···
 	struct drm_connector	connector;
 
 	struct mipi_dsi_device	*dsi;
-	u8			dsi_lanes;
 
 	/* link settings */
 	struct tc_edp_link	link;
···
 	regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE);
 	regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD);
 
-	value = ((LANEENABLE_L0EN << tc->dsi_lanes) - LANEENABLE_L0EN) |
+	value = ((LANEENABLE_L0EN << tc->dsi->lanes) - LANEENABLE_L0EN) |
 		LANEENABLE_CLEN;
 	regmap_write(tc->regmap, PPI_LANEENABLE, value);
 	regmap_write(tc->regmap, DSI_LANEENABLE, value);
···
 
 	tc->dsi = dsi;
 
-	tc->dsi_lanes = dsi_lanes;
-	dsi->lanes = tc->dsi_lanes;
+	dsi->lanes = dsi_lanes;
 	dsi->format = MIPI_DSI_FMT_RGB888;
 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;