commit 5bbec3cfe376ed0014d9456a9be11d5ed75d587b · tjh.dev/kernel

+1 -3

arch/m68k/Kconfig

··· 16 16 select HAVE_DEBUG_BUGVERBOSE 17 17 select GENERIC_IRQ_SHOW 18 18 select GENERIC_ATOMIC64 19 + select NO_DMA if !MMU && !COLDFIRE 19 20 select HAVE_UID16 20 21 select VIRT_TO_BUS 21 22 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS ··· 59 58 60 59 config NO_IOPORT_MAP 61 60 def_bool y 62 - 63 - config NO_DMA 64 - def_bool (MMU && SUN3) || (!MMU && !COLDFIRE) 65 61 66 62 config ZONE_DMA 67 63 bool

+1

arch/m68k/Kconfig.machine

··· 126 126 depends on MMU 127 127 depends on !MMU_MOTOROLA 128 128 select MMU_SUN3 if MMU 129 + select NO_DMA 129 130 select M68020 130 131 help 131 132 This option enables support for the Sun 3 series of workstations

+61 -58

arch/sh/Kconfig

··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 config SUPERH 3 3 def_bool y 4 - select ARCH_HAS_BINFMT_FLAT if !MMU 5 - select ARCH_HAS_PTE_SPECIAL 6 - select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 7 - select ARCH_MIGHT_HAVE_PC_PARPORT 8 - select HAVE_PATA_PLATFORM 9 - select CLKDEV_LOOKUP 10 - select DMA_DECLARE_COHERENT 11 - select HAVE_IDE if HAS_IOPORT_MAP 12 - select HAVE_OPROFILE 13 - select HAVE_ARCH_TRACEHOOK 14 - select HAVE_PERF_EVENTS 15 - select HAVE_DEBUG_BUGVERBOSE 16 - select HAVE_FAST_GUP if MMU 4 + select ARCH_32BIT_OFF_T 17 5 select ARCH_HAVE_CUSTOM_GPIO_H 18 6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) 7 + select ARCH_HAS_BINFMT_FLAT if !MMU 8 + select ARCH_HAS_GIGANTIC_PAGE 19 9 select ARCH_HAS_GCOV_PROFILE_ALL 20 - select PERF_USE_VMALLOC 21 - select HAVE_DEBUG_KMEMLEAK 22 - select HAVE_KERNEL_GZIP 23 - select CPU_NO_EFFICIENT_FFS 24 - select HAVE_KERNEL_BZIP2 25 - select HAVE_KERNEL_LZMA 26 - select HAVE_KERNEL_XZ 27 - select HAVE_KERNEL_LZO 28 - select HAVE_UID16 10 + select ARCH_HAS_PTE_SPECIAL 11 + select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 12 + select ARCH_HIBERNATION_POSSIBLE if MMU 13 + select ARCH_MIGHT_HAVE_PC_PARPORT 29 14 select ARCH_WANT_IPC_PARSE_VERSION 30 - select HAVE_SYSCALL_TRACEPOINTS 31 - select HAVE_REGS_AND_STACK_ACCESS_API 32 - select MAY_HAVE_SPARSE_IRQ 33 - select IRQ_FORCED_THREADING 34 - select RTC_LIB 15 + select CLKDEV_LOOKUP 16 + select CPU_NO_EFFICIENT_FFS 17 + select DMA_DECLARE_COHERENT 35 18 select GENERIC_ATOMIC64 36 - select GENERIC_IRQ_SHOW 37 - select GENERIC_SMP_IDLE_THREAD 38 - select GENERIC_IDLE_POLL_SETUP 39 19 select GENERIC_CLOCKEVENTS 40 20 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST 21 + select GENERIC_IDLE_POLL_SETUP 22 + select GENERIC_IRQ_SHOW 41 23 select GENERIC_PCI_IOMAP if PCI 42 24 select GENERIC_SCHED_CLOCK 43 25 select GENERIC_STRNCPY_FROM_USER 44 26 select GENERIC_STRNLEN_USER 45 - select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER 46 - select MODULES_USE_ELF_RELA 47 - select NO_GENERIC_PCI_IOPORT_MAP if PCI 48 - select OLD_SIGSUSPEND 49 - select OLD_SIGACTION 50 - select PCI_DOMAINS if PCI 51 - select HAVE_ARCH_AUDITSYSCALL 52 - select HAVE_FUTEX_CMPXCHG if FUTEX 53 - select HAVE_NMI 54 - select NEED_SG_DMA_LENGTH 55 - select ARCH_HAS_GIGANTIC_PAGE 56 - select ARCH_32BIT_OFF_T 27 + select GENERIC_SMP_IDLE_THREAD 57 28 select GUP_GET_PTE_LOW_HIGH if X2TLB 29 + select HAVE_ARCH_AUDITSYSCALL 30 + select HAVE_ARCH_KGDB 31 + select HAVE_ARCH_SECCOMP_FILTER 32 + select HAVE_ARCH_TRACEHOOK 33 + select HAVE_COPY_THREAD_TLS 34 + select HAVE_DEBUG_BUGVERBOSE 35 + select HAVE_DEBUG_KMEMLEAK 36 + select HAVE_DYNAMIC_FTRACE 37 + select HAVE_FAST_GUP if MMU 38 + select HAVE_FUNCTION_GRAPH_TRACER 39 + select HAVE_FUNCTION_TRACER 40 + select HAVE_FUTEX_CMPXCHG if FUTEX 41 + select HAVE_FTRACE_MCOUNT_RECORD 42 + select HAVE_HW_BREAKPOINT 43 + select HAVE_IDE if HAS_IOPORT_MAP 44 + select HAVE_IOREMAP_PROT if MMU && !X2TLB 45 + select HAVE_KERNEL_BZIP2 46 + select HAVE_KERNEL_GZIP 47 + select HAVE_KERNEL_LZMA 48 + select HAVE_KERNEL_LZO 49 + select HAVE_KERNEL_XZ 58 50 select HAVE_KPROBES 59 51 select HAVE_KRETPROBES 60 - select HAVE_IOREMAP_PROT if MMU && !X2TLB 61 - select HAVE_FUNCTION_TRACER 62 - select HAVE_FTRACE_MCOUNT_RECORD 63 - select HAVE_DYNAMIC_FTRACE 64 - select ARCH_WANT_IPC_PARSE_VERSION 65 - select HAVE_FUNCTION_GRAPH_TRACER 66 - select HAVE_ARCH_KGDB 67 - select HAVE_HW_BREAKPOINT 68 52 select HAVE_MIXED_BREAKPOINTS_REGS 69 - select PERF_EVENTS 70 - select ARCH_HIBERNATION_POSSIBLE if MMU 71 - select SPARSE_IRQ 53 + select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER 54 + select HAVE_NMI 55 + select HAVE_OPROFILE 56 + select HAVE_PATA_PLATFORM 57 + select HAVE_PERF_EVENTS 58 + select HAVE_REGS_AND_STACK_ACCESS_API 59 + select HAVE_UID16 72 60 select HAVE_STACKPROTECTOR 61 + select HAVE_SYSCALL_TRACEPOINTS 62 + select IRQ_FORCED_THREADING 63 + select MAY_HAVE_SPARSE_IRQ 64 + select MODULES_USE_ELF_RELA 65 + select NEED_SG_DMA_LENGTH 66 + select NO_DMA if !MMU && !DMA_COHERENT 67 + select NO_GENERIC_PCI_IOPORT_MAP if PCI 68 + select OLD_SIGACTION 69 + select OLD_SIGSUSPEND 70 + select PCI_DOMAINS if PCI 71 + select PERF_EVENTS 72 + select PERF_USE_VMALLOC 73 + select RTC_LIB 74 + select SPARSE_IRQ 73 75 help 74 76 The SuperH is a RISC processor targeted for use in embedded systems 75 77 and consumer electronics; it was also used in the Sega Dreamcast ··· 125 123 126 124 config NO_IOPORT_MAP 127 125 def_bool !PCI 128 - depends on !SH_CAYMAN && !SH_SH4202_MICRODEV && !SH_SHMIN && \ 129 - !SH_HP6XX && !SH_SOLUTION_ENGINE 126 + depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \ 127 + !SH_SOLUTION_ENGINE 130 128 131 129 config IO_TRAPPED 132 130 bool ··· 138 136 bool 139 137 140 138 config DMA_NONCOHERENT 141 - def_bool !DMA_COHERENT 139 + def_bool !NO_DMA && !DMA_COHERENT 140 + select ARCH_HAS_DMA_PREP_COHERENT 142 141 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 142 + select DMA_DIRECT_REMAP 143 143 144 144 config PGTABLE_LEVELS 145 145 default 3 if X2TLB ··· 634 630 Y to "Enhanced Real Time Clock Support", below. 635 631 636 632 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO 637 - available at <http://www.tldp.org/docs.html#howto>. 633 + available at <https://www.tldp.org/docs.html#howto>. 638 634 639 635 If you don't know what to do here, say N. 640 636 ··· 730 726 config BOOT_LINK_OFFSET 731 727 hex 732 728 default "0x00210000" if SH_SHMIN 733 - default "0x00400000" if SH_CAYMAN 734 729 default "0x00810000" if SH_7780_SOLUTION_ENGINE 735 730 default "0x009e0000" if SH_TITAN 736 731 default "0x01800000" if SH_SDK7780

-5

arch/sh/Makefile

··· 15 15 endif 16 16 endif 17 17 18 - ifeq ($(ARCH),sh) 19 18 KBUILD_DEFCONFIG := shx3_defconfig 20 - else 21 - KBUILD_DEFCONFIG := cayman_defconfig 22 - endif 23 19 24 20 isa-y := any 25 21 isa-$(CONFIG_SH_DSP) := sh ··· 139 143 machdir-$(CONFIG_SH_SH4202_MICRODEV) += mach-microdev 140 144 machdir-$(CONFIG_SH_LANDISK) += mach-landisk 141 145 machdir-$(CONFIG_SH_LBOX_RE2) += mach-lboxre2 142 - machdir-$(CONFIG_SH_CAYMAN) += mach-cayman 143 146 machdir-$(CONFIG_SH_RSK) += mach-rsk 144 147 145 148 ifneq ($(machdir-y),)

-6

arch/sh/boards/Kconfig

··· 340 340 help 341 341 Select Magic Panel R2 if configuring for Magic Panel R2. 342 342 343 - config SH_CAYMAN 344 - bool "Hitachi Cayman" 345 - depends on CPU_SUBTYPE_SH5_101 || CPU_SUBTYPE_SH5_103 346 - select HAVE_PCI 347 - select ARCH_MIGHT_HAVE_PC_SERIO 348 - 349 343 config SH_POLARIS 350 344 bool "SMSC Polaris" 351 345 select CPU_HAS_IPR_IRQ

+2 -2

arch/sh/boards/board-sh2007.c

··· 126 126 */ 127 127 static void __init sh2007_setup(char **cmdline_p) 128 128 { 129 - printk(KERN_INFO "SH-2007 Setup..."); 129 + pr_info("SH-2007 Setup..."); 130 130 131 131 /* setup wait control registers for area 5 */ 132 132 __raw_writel(CS5BCR_D, CS5BCR); 133 133 __raw_writel(CS5WCR_D, CS5WCR); 134 134 __raw_writel(CS5PCR_D, CS5PCR); 135 135 136 - printk(KERN_INFO " done.\n"); 136 + pr_cont(" done.\n"); 137 137 } 138 138 139 139 /*

-5

arch/sh/boards/mach-cayman/Makefile

··· 1 - # SPDX-License-Identifier: GPL-2.0 2 - # 3 - # Makefile for the Hitachi Cayman specific parts of the kernel 4 - # 5 - obj-y := setup.o irq.o panic.o

-148

arch/sh/boards/mach-cayman/irq.c

··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /* 3 - * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support 4 - * 5 - * This file handles the board specific parts of the Cayman interrupt system 6 - * 7 - * Copyright (C) 2002 Stuart Menefy 8 - */ 9 - #include <linux/io.h> 10 - #include <linux/irq.h> 11 - #include <linux/interrupt.h> 12 - #include <linux/signal.h> 13 - #include <cpu/irq.h> 14 - #include <asm/page.h> 15 - 16 - /* Setup for the SMSC FDC37C935 / LAN91C100FD */ 17 - #define SMSC_IRQ IRQ_IRL1 18 - 19 - /* Setup for PCI Bus 2, which transmits interrupts via the EPLD */ 20 - #define PCI2_IRQ IRQ_IRL3 21 - 22 - unsigned long epld_virt; 23 - 24 - #define EPLD_BASE 0x04002000 25 - #define EPLD_STATUS_BASE (epld_virt + 0x10) 26 - #define EPLD_MASK_BASE (epld_virt + 0x20) 27 - 28 - /* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto 29 - the same SH-5 interrupt */ 30 - 31 - static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id) 32 - { 33 - printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n"); 34 - return IRQ_NONE; 35 - } 36 - 37 - static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id) 38 - { 39 - printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq); 40 - return IRQ_NONE; 41 - } 42 - 43 - static void enable_cayman_irq(struct irq_data *data) 44 - { 45 - unsigned int irq = data->irq; 46 - unsigned long flags; 47 - unsigned long mask; 48 - unsigned int reg; 49 - unsigned char bit; 50 - 51 - irq -= START_EXT_IRQS; 52 - reg = EPLD_MASK_BASE + ((irq / 8) << 2); 53 - bit = 1<<(irq % 8); 54 - local_irq_save(flags); 55 - mask = __raw_readl(reg); 56 - mask |= bit; 57 - __raw_writel(mask, reg); 58 - local_irq_restore(flags); 59 - } 60 - 61 - static void disable_cayman_irq(struct irq_data *data) 62 - { 63 - unsigned int irq = data->irq; 64 - unsigned long flags; 65 - unsigned long mask; 66 - unsigned int reg; 67 - unsigned char bit; 68 - 69 - irq -= START_EXT_IRQS; 70 - reg = EPLD_MASK_BASE + ((irq / 8) << 2); 71 - bit = 1<<(irq % 8); 72 - local_irq_save(flags); 73 - mask = __raw_readl(reg); 74 - mask &= ~bit; 75 - __raw_writel(mask, reg); 76 - local_irq_restore(flags); 77 - } 78 - 79 - struct irq_chip cayman_irq_type = { 80 - .name = "Cayman-IRQ", 81 - .irq_unmask = enable_cayman_irq, 82 - .irq_mask = disable_cayman_irq, 83 - }; 84 - 85 - int cayman_irq_demux(int evt) 86 - { 87 - int irq = intc_evt_to_irq[evt]; 88 - 89 - if (irq == SMSC_IRQ) { 90 - unsigned long status; 91 - int i; 92 - 93 - status = __raw_readl(EPLD_STATUS_BASE) & 94 - __raw_readl(EPLD_MASK_BASE) & 0xff; 95 - if (status == 0) { 96 - irq = -1; 97 - } else { 98 - for (i=0; i<8; i++) { 99 - if (status & (1<<i)) 100 - break; 101 - } 102 - irq = START_EXT_IRQS + i; 103 - } 104 - } 105 - 106 - if (irq == PCI2_IRQ) { 107 - unsigned long status; 108 - int i; 109 - 110 - status = __raw_readl(EPLD_STATUS_BASE + 3 * sizeof(u32)) & 111 - __raw_readl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff; 112 - if (status == 0) { 113 - irq = -1; 114 - } else { 115 - for (i=0; i<8; i++) { 116 - if (status & (1<<i)) 117 - break; 118 - } 119 - irq = START_EXT_IRQS + (3 * 8) + i; 120 - } 121 - } 122 - 123 - return irq; 124 - } 125 - 126 - void init_cayman_irq(void) 127 - { 128 - int i; 129 - 130 - epld_virt = (unsigned long)ioremap(EPLD_BASE, 1024); 131 - if (!epld_virt) { 132 - printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n"); 133 - return; 134 - } 135 - 136 - for (i = 0; i < NR_EXT_IRQS; i++) { 137 - irq_set_chip_and_handler(START_EXT_IRQS + i, 138 - &cayman_irq_type, handle_level_irq); 139 - } 140 - 141 - /* Setup the SMSC interrupt */ 142 - if (request_irq(SMSC_IRQ, cayman_interrupt_smsc, 0, "Cayman SMSC Mux", 143 - NULL)) 144 - pr_err("Failed to register Cayman SMSC Mux interrupt\n"); 145 - if (request_irq(PCI2_IRQ, cayman_interrupt_pci2, 0, "Cayman PCI2 Mux", 146 - NULL)) 147 - pr_err("Failed to register Cayman PCI2 Mux interrupt\n"); 148 - }

-46

arch/sh/boards/mach-cayman/panic.c

··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /* 3 - * Copyright (C) 2003 Richard Curnow, SuperH UK Limited 4 - */ 5 - 6 - #include <linux/kernel.h> 7 - #include <linux/io.h> 8 - #include <cpu/registers.h> 9 - 10 - /* THIS IS A PHYSICAL ADDRESS */ 11 - #define HDSP2534_ADDR (0x04002100) 12 - 13 - static void poor_mans_delay(void) 14 - { 15 - int i; 16 - 17 - for (i = 0; i < 2500000; i++) 18 - cpu_relax(); 19 - } 20 - 21 - static void show_value(unsigned long x) 22 - { 23 - int i; 24 - unsigned nibble; 25 - for (i = 0; i < 8; i++) { 26 - nibble = ((x >> (i * 4)) & 0xf); 27 - 28 - __raw_writeb(nibble + ((nibble > 9) ? 55 : 48), 29 - HDSP2534_ADDR + 0xe0 + ((7 - i) << 2)); 30 - } 31 - } 32 - 33 - void 34 - panic_handler(unsigned long panicPC, unsigned long panicSSR, 35 - unsigned long panicEXPEVT) 36 - { 37 - while (1) { 38 - /* This piece of code displays the PC on the LED display */ 39 - show_value(panicPC); 40 - poor_mans_delay(); 41 - show_value(panicSSR); 42 - poor_mans_delay(); 43 - show_value(panicEXPEVT); 44 - poor_mans_delay(); 45 - } 46 - }

-181

arch/sh/boards/mach-cayman/setup.c

··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /* 3 - * arch/sh/mach-cayman/setup.c 4 - * 5 - * SH5 Cayman support 6 - * 7 - * Copyright (C) 2002 David J. Mckay & Benedict Gaster 8 - * Copyright (C) 2003 - 2007 Paul Mundt 9 - */ 10 - #include <linux/init.h> 11 - #include <linux/io.h> 12 - #include <linux/kernel.h> 13 - #include <cpu/irq.h> 14 - 15 - /* 16 - * Platform Dependent Interrupt Priorities. 17 - */ 18 - 19 - /* Using defaults defined in irq.h */ 20 - #define RES NO_PRIORITY /* Disabled */ 21 - #define IR0 IRL0_PRIORITY /* IRLs */ 22 - #define IR1 IRL1_PRIORITY 23 - #define IR2 IRL2_PRIORITY 24 - #define IR3 IRL3_PRIORITY 25 - #define PCA INTA_PRIORITY /* PCI Ints */ 26 - #define PCB INTB_PRIORITY 27 - #define PCC INTC_PRIORITY 28 - #define PCD INTD_PRIORITY 29 - #define SER TOP_PRIORITY 30 - #define ERR TOP_PRIORITY 31 - #define PW0 TOP_PRIORITY 32 - #define PW1 TOP_PRIORITY 33 - #define PW2 TOP_PRIORITY 34 - #define PW3 TOP_PRIORITY 35 - #define DM0 NO_PRIORITY /* DMA Ints */ 36 - #define DM1 NO_PRIORITY 37 - #define DM2 NO_PRIORITY 38 - #define DM3 NO_PRIORITY 39 - #define DAE NO_PRIORITY 40 - #define TU0 TIMER_PRIORITY /* TMU Ints */ 41 - #define TU1 NO_PRIORITY 42 - #define TU2 NO_PRIORITY 43 - #define TI2 NO_PRIORITY 44 - #define ATI NO_PRIORITY /* RTC Ints */ 45 - #define PRI NO_PRIORITY 46 - #define CUI RTC_PRIORITY 47 - #define ERI SCIF_PRIORITY /* SCIF Ints */ 48 - #define RXI SCIF_PRIORITY 49 - #define BRI SCIF_PRIORITY 50 - #define TXI SCIF_PRIORITY 51 - #define ITI TOP_PRIORITY /* WDT Ints */ 52 - 53 - /* Setup for the SMSC FDC37C935 */ 54 - #define SMSC_SUPERIO_BASE 0x04000000 55 - #define SMSC_CONFIG_PORT_ADDR 0x3f0 56 - #define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR 57 - #define SMSC_DATA_PORT_ADDR 0x3f1 58 - 59 - #define SMSC_ENTER_CONFIG_KEY 0x55 60 - #define SMSC_EXIT_CONFIG_KEY 0xaa 61 - 62 - #define SMCS_LOGICAL_DEV_INDEX 0x07 63 - #define SMSC_DEVICE_ID_INDEX 0x20 64 - #define SMSC_DEVICE_REV_INDEX 0x21 65 - #define SMSC_ACTIVATE_INDEX 0x30 66 - #define SMSC_PRIMARY_BASE_INDEX 0x60 67 - #define SMSC_SECONDARY_BASE_INDEX 0x62 68 - #define SMSC_PRIMARY_INT_INDEX 0x70 69 - #define SMSC_SECONDARY_INT_INDEX 0x72 70 - 71 - #define SMSC_IDE1_DEVICE 1 72 - #define SMSC_KEYBOARD_DEVICE 7 73 - #define SMSC_CONFIG_REGISTERS 8 74 - 75 - #define SMSC_SUPERIO_READ_INDEXED(index) ({ \ 76 - outb((index), SMSC_INDEX_PORT_ADDR); \ 77 - inb(SMSC_DATA_PORT_ADDR); }) 78 - #define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \ 79 - outb((index), SMSC_INDEX_PORT_ADDR); \ 80 - outb((val), SMSC_DATA_PORT_ADDR); }) 81 - 82 - #define IDE1_PRIMARY_BASE 0x01f0 83 - #define IDE1_SECONDARY_BASE 0x03f6 84 - 85 - unsigned long smsc_superio_virt; 86 - 87 - int platform_int_priority[NR_INTC_IRQS] = { 88 - IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ 89 - RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ 90 - PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */ 91 - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */ 92 - TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */ 93 - RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */ 94 - RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */ 95 - RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */ 96 - }; 97 - 98 - static int __init smsc_superio_setup(void) 99 - { 100 - unsigned char devid, devrev; 101 - 102 - smsc_superio_virt = (unsigned long)ioremap(SMSC_SUPERIO_BASE, 1024); 103 - if (!smsc_superio_virt) { 104 - panic("Unable to remap SMSC SuperIO\n"); 105 - } 106 - 107 - /* Initially the chip is in run state */ 108 - /* Put it into configuration state */ 109 - outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); 110 - outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); 111 - 112 - /* Read device ID info */ 113 - devid = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_ID_INDEX); 114 - devrev = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_REV_INDEX); 115 - printk("SMSC SuperIO devid %02x rev %02x\n", devid, devrev); 116 - 117 - /* Select the keyboard device */ 118 - SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX); 119 - 120 - /* enable it */ 121 - SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); 122 - 123 - /* Select the interrupts */ 124 - /* On a PC keyboard is IRQ1, mouse is IRQ12 */ 125 - SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX); 126 - SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX); 127 - 128 - /* 129 - * Only IDE1 exists on the Cayman 130 - */ 131 - 132 - /* Power it on */ 133 - SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22); 134 - 135 - SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX); 136 - SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX); 137 - 138 - SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8, 139 - SMSC_PRIMARY_BASE_INDEX + 0); 140 - SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff, 141 - SMSC_PRIMARY_BASE_INDEX + 1); 142 - 143 - SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8, 144 - SMSC_SECONDARY_BASE_INDEX + 0); 145 - SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff, 146 - SMSC_SECONDARY_BASE_INDEX + 1); 147 - 148 - SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX); 149 - 150 - SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, 151 - SMCS_LOGICAL_DEV_INDEX); 152 - 153 - SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */ 154 - SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */ 155 - SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */ 156 - SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */ 157 - 158 - /* Exit the configuration state */ 159 - outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR); 160 - 161 - return 0; 162 - } 163 - device_initcall(smsc_superio_setup); 164 - 165 - static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len) 166 - { 167 - if (port < 0x400) { 168 - extern unsigned long smsc_superio_virt; 169 - return (void __iomem *)((port << 2) | smsc_superio_virt); 170 - } 171 - 172 - return (void __iomem *)port; 173 - } 174 - 175 - extern void init_cayman_irq(void); 176 - 177 - static struct sh_machine_vector mv_cayman __initmv = { 178 - .mv_name = "Hitachi Cayman", 179 - .mv_ioport_map = cayman_ioport_map, 180 - .mv_init_irq = init_cayman_irq, 181 - };

+3

arch/sh/boards/mach-landisk/setup.c

··· 82 82 83 83 static void __init landisk_setup(char **cmdline_p) 84 84 { 85 + /* I/O port identity mapping */ 86 + __set_io_port_base(0); 87 + 85 88 /* LED ON */ 86 89 __raw_writeb(__raw_readb(PA_LED) | 0x03, PA_LED); 87 90

-66

arch/sh/configs/cayman_defconfig

··· 1 - CONFIG_POSIX_MQUEUE=y 2 - CONFIG_LOG_BUF_SHIFT=14 3 - # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 4 - CONFIG_SLAB=y 5 - CONFIG_MODULES=y 6 - CONFIG_MODULE_UNLOAD=y 7 - # CONFIG_BLK_DEV_BSG is not set 8 - CONFIG_FORCE_MAX_ZONEORDER=11 9 - CONFIG_MEMORY_START=0x80000000 10 - CONFIG_MEMORY_SIZE=0x00400000 11 - CONFIG_FLATMEM_MANUAL=y 12 - CONFIG_CACHE_OFF=y 13 - CONFIG_SH_PCLK_FREQ=50000000 14 - CONFIG_HEARTBEAT=y 15 - CONFIG_PREEMPT=y 16 - CONFIG_NET=y 17 - CONFIG_PACKET=y 18 - CONFIG_UNIX=y 19 - CONFIG_INET=y 20 - CONFIG_IP_PNP=y 21 - # CONFIG_IPV6 is not set 22 - # CONFIG_FW_LOADER is not set 23 - CONFIG_BLK_DEV_LOOP=y 24 - CONFIG_BLK_DEV_RAM=y 25 - CONFIG_SCSI=y 26 - CONFIG_BLK_DEV_SD=y 27 - CONFIG_SCSI_MULTI_LUN=y 28 - CONFIG_SCSI_SPI_ATTRS=y 29 - CONFIG_NETDEVICES=y 30 - CONFIG_NET_ETHERNET=y 31 - # CONFIG_INPUT_MOUSEDEV_PSAUX is not set 32 - # CONFIG_INPUT_KEYBOARD is not set 33 - # CONFIG_INPUT_MOUSE is not set 34 - # CONFIG_SERIO is not set 35 - CONFIG_HW_RANDOM=y 36 - CONFIG_I2C=m 37 - CONFIG_WATCHDOG=y 38 - CONFIG_FB=y 39 - CONFIG_FIRMWARE_EDID=y 40 - CONFIG_FB_MODE_HELPERS=y 41 - CONFIG_FB_SH_MOBILE_LCDC=m 42 - CONFIG_FRAMEBUFFER_CONSOLE=y 43 - CONFIG_FONTS=y 44 - CONFIG_FONT_8x16=y 45 - CONFIG_LOGO=y 46 - # CONFIG_LOGO_LINUX_MONO is not set 47 - # CONFIG_LOGO_LINUX_VGA16 is not set 48 - # CONFIG_LOGO_LINUX_CLUT224 is not set 49 - # CONFIG_LOGO_SUPERH_MONO is not set 50 - # CONFIG_LOGO_SUPERH_VGA16 is not set 51 - CONFIG_EXT2_FS=y 52 - CONFIG_EXT3_FS=y 53 - # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 54 - CONFIG_MINIX_FS=y 55 - CONFIG_ROMFS_FS=y 56 - CONFIG_NFS_FS=y 57 - CONFIG_NFS_V3=y 58 - CONFIG_ROOT_NFS=y 59 - CONFIG_PARTITION_ADVANCED=y 60 - CONFIG_MAGIC_SYSRQ=y 61 - CONFIG_DEBUG_FS=y 62 - CONFIG_DEBUG_KERNEL=y 63 - CONFIG_DETECT_HUNG_TASK=y 64 - CONFIG_SCHEDSTATS=y 65 - CONFIG_FRAME_POINTER=y 66 - # CONFIG_CRYPTO_ANSI_CPRNG is not set

-1

arch/sh/drivers/pci/Makefile

··· 25 25 obj-$(CONFIG_SH_TITAN) += fixups-titan.o 26 26 obj-$(CONFIG_SH_LANDISK) += fixups-landisk.o 27 27 obj-$(CONFIG_SH_LBOX_RE2) += fixups-rts7751r2d.o 28 - obj-$(CONFIG_SH_CAYMAN) += fixups-cayman.o

+3 -3

arch/sh/drivers/pci/common.c

··· 54 54 int cap66 = -1; 55 55 u16 stat; 56 56 57 - printk(KERN_INFO "PCI: Checking 66MHz capabilities...\n"); 57 + pr_info("PCI: Checking 66MHz capabilities...\n"); 58 58 59 59 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) { 60 60 if (PCI_FUNC(pci_devfn)) ··· 134 134 pcibios_report_status(PCI_STATUS_REC_TARGET_ABORT | 135 135 PCI_STATUS_SIG_TARGET_ABORT | 136 136 PCI_STATUS_REC_MASTER_ABORT, 1); 137 - printk("\n"); 137 + pr_cont("\n"); 138 138 139 139 cmd |= PCI_STATUS_REC_TARGET_ABORT; 140 140 } ··· 143 143 printk(KERN_DEBUG "PCI: parity error detected: "); 144 144 pcibios_report_status(PCI_STATUS_PARITY | 145 145 PCI_STATUS_DETECTED_PARITY, 1); 146 - printk("\n"); 146 + pr_cont("\n"); 147 147 148 148 cmd |= PCI_STATUS_PARITY | PCI_STATUS_DETECTED_PARITY; 149 149

-78

arch/sh/drivers/pci/fixups-cayman.c

··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - #include <linux/kernel.h> 3 - #include <linux/init.h> 4 - #include <linux/pci.h> 5 - #include <linux/types.h> 6 - #include <cpu/irq.h> 7 - #include "pci-sh5.h" 8 - 9 - int pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin) 10 - { 11 - int result = -1; 12 - 13 - /* The complication here is that the PCI IRQ lines from the Cayman's 2 14 - 5V slots get into the CPU via a different path from the IRQ lines 15 - from the 3 3.3V slots. Thus, we have to detect whether the card's 16 - interrupts go via the 5V or 3.3V path, i.e. the 'bridge swizzling' 17 - at the point where we cross from 5V to 3.3V is not the normal case. 18 - 19 - The added complication is that we don't know that the 5V slots are 20 - always bus 2, because a card containing a PCI-PCI bridge may be 21 - plugged into a 3.3V slot, and this changes the bus numbering. 22 - 23 - Also, the Cayman has an intermediate PCI bus that goes a custom 24 - expansion board header (and to the secondary bridge). This bus has 25 - never been used in practice. 26 - 27 - The 1ary onboard PCI-PCI bridge is device 3 on bus 0 28 - The 2ary onboard PCI-PCI bridge is device 0 on the 2ary bus of 29 - the 1ary bridge. 30 - */ 31 - 32 - struct slot_pin { 33 - int slot; 34 - int pin; 35 - } path[4]; 36 - int i=0; 37 - 38 - while (dev->bus->number > 0) { 39 - 40 - slot = path[i].slot = PCI_SLOT(dev->devfn); 41 - pin = path[i].pin = pci_swizzle_interrupt_pin(dev, pin); 42 - dev = dev->bus->self; 43 - i++; 44 - if (i > 3) panic("PCI path to root bus too long!\n"); 45 - } 46 - 47 - slot = PCI_SLOT(dev->devfn); 48 - /* This is the slot on bus 0 through which the device is eventually 49 - reachable. */ 50 - 51 - /* Now work back up. */ 52 - if ((slot < 3) || (i == 0)) { 53 - /* Bus 0 (incl. PCI-PCI bridge itself) : perform the final 54 - swizzle now. */ 55 - result = IRQ_INTA + pci_swizzle_interrupt_pin(dev, pin) - 1; 56 - } else { 57 - i--; 58 - slot = path[i].slot; 59 - pin = path[i].pin; 60 - if (slot > 0) { 61 - panic("PCI expansion bus device found - not handled!\n"); 62 - } else { 63 - if (i > 0) { 64 - /* 5V slots */ 65 - i--; 66 - slot = path[i].slot; 67 - pin = path[i].pin; 68 - /* 'pin' was swizzled earlier wrt slot, don't do it again. */ 69 - result = IRQ_P2INTA + (pin - 1); 70 - } else { 71 - /* IRQ for 2ary PCI-PCI bridge : unused */ 72 - result = -1; 73 - } 74 - } 75 - } 76 - 77 - return result; 78 - }

+11 -12

arch/sh/drivers/pci/pci-sh7780.c

··· 148 148 149 149 printk(KERN_DEBUG "PCI: system error received: "); 150 150 pcibios_report_status(PCI_STATUS_SIG_SYSTEM_ERROR, 1); 151 - printk("\n"); 151 + pr_cont("\n"); 152 152 153 153 /* Deassert SERR */ 154 154 __raw_writel(SH4_PCIINTM_SDIM, hose->reg_base + SH4_PCIINTM); ··· 179 179 ret = request_irq(hose->serr_irq, sh7780_pci_serr_irq, 0, 180 180 "PCI SERR interrupt", hose); 181 181 if (unlikely(ret)) { 182 - printk(KERN_ERR "PCI: Failed hooking SERR IRQ\n"); 182 + pr_err("PCI: Failed hooking SERR IRQ\n"); 183 183 return ret; 184 184 } 185 185 ··· 250 250 const char *type; 251 251 int ret, i; 252 252 253 - printk(KERN_NOTICE "PCI: Starting initialization.\n"); 253 + pr_notice("PCI: Starting initialization.\n"); 254 254 255 255 chan->reg_base = 0xfe040000; 256 256 ··· 270 270 271 271 id = __raw_readw(chan->reg_base + PCI_VENDOR_ID); 272 272 if (id != PCI_VENDOR_ID_RENESAS) { 273 - printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id); 273 + pr_err("PCI: Unknown vendor ID 0x%04x.\n", id); 274 274 return -ENODEV; 275 275 } 276 276 ··· 281 281 (id == PCI_DEVICE_ID_RENESAS_SH7785) ? "SH7785" : 282 282 NULL; 283 283 if (unlikely(!type)) { 284 - printk(KERN_ERR "PCI: Found an unsupported Renesas host " 285 - "controller, device id 0x%04x.\n", id); 284 + pr_err("PCI: Found an unsupported Renesas host controller, device id 0x%04x.\n", 285 + id); 286 286 return -EINVAL; 287 287 } 288 288 289 - printk(KERN_NOTICE "PCI: Found a Renesas %s host " 290 - "controller, revision %d.\n", type, 291 - __raw_readb(chan->reg_base + PCI_REVISION_ID)); 289 + pr_notice("PCI: Found a Renesas %s host controller, revision %d.\n", 290 + type, __raw_readb(chan->reg_base + PCI_REVISION_ID)); 292 291 293 292 /* 294 293 * Now throw it in to register initialization mode and ··· 394 395 395 396 sh7780_pci66_init(chan); 396 397 397 - printk(KERN_NOTICE "PCI: Running at %dMHz.\n", 398 - (__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ) ? 399 - 66 : 33); 398 + pr_notice("PCI: Running at %dMHz.\n", 399 + (__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ) 400 + ? 66 : 33); 400 401 401 402 return 0; 402 403

+5 -6

arch/sh/drivers/pci/pci.c

··· 120 120 * Do not panic here but later - this might happen before console init. 121 121 */ 122 122 if (!hose->io_map_base) { 123 - printk(KERN_WARNING 124 - "registering PCI controller with io_map_base unset\n"); 123 + pr_warn("registering PCI controller with io_map_base unset\n"); 125 124 } 126 125 127 126 /* ··· 144 145 for (--i; i >= 0; i--) 145 146 release_resource(&hose->resources[i]); 146 147 147 - printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n"); 148 + pr_warn("Skipping PCI bus scan due to resource conflict\n"); 148 149 return -1; 149 150 } 150 151 ··· 212 213 pci_devfn, PCI_STATUS, 213 214 status & status_mask); 214 215 if (warn) 215 - printk("(%02x:%02x: %04X) ", current_bus, 216 - pci_devfn, status); 216 + pr_cont("(%02x:%02x: %04X) ", current_bus, pci_devfn, 217 + status); 217 218 } 218 219 } 219 220 ··· 248 249 pci_write_config_word(dev, PCI_STATUS, status & status_mask); 249 250 250 251 if (warn) 251 - printk("(%s: %04X) ", pci_name(dev), status); 252 + pr_cont("(%s: %04X) ", pci_name(dev), status); 252 253 } 253 254 254 255 list_for_each_entry(dev, &bus->devices, bus_list)

-2

arch/sh/include/asm/adc.h

··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 #ifndef __ASM_ADC_H 3 3 #define __ASM_ADC_H 4 - #ifdef __KERNEL__ 5 4 /* 6 5 * Copyright (C) 2004 Andriy Skulysh 7 6 */ ··· 9 10 10 11 int adc_single(unsigned int channel); 11 12 12 - #endif /* __KERNEL__ */ 13 13 #endif /* __ASM_ADC_H */

-3

arch/sh/include/asm/addrspace.h

··· 7 7 #ifndef __ASM_SH_ADDRSPACE_H 8 8 #define __ASM_SH_ADDRSPACE_H 9 9 10 - #ifdef __KERNEL__ 11 - 12 10 #include <cpu/addrspace.h> 13 11 14 12 /* If this CPU supports segmentation, hook up the helpers */ ··· 60 62 #define P3_ADDR_MAX P4SEG 61 63 #endif 62 64 63 - #endif /* __KERNEL__ */ 64 65 #endif /* __ASM_SH_ADDRSPACE_H */

-4

arch/sh/include/asm/bitops.h

··· 2 2 #ifndef __ASM_SH_BITOPS_H 3 3 #define __ASM_SH_BITOPS_H 4 4 5 - #ifdef __KERNEL__ 6 - 7 5 #ifndef _LINUX_BITOPS_H 8 6 #error only <linux/bitops.h> can be included directly 9 7 #endif ··· 68 70 #include <asm-generic/bitops/fls.h> 69 71 #include <asm-generic/bitops/__fls.h> 70 72 #include <asm-generic/bitops/fls64.h> 71 - 72 - #endif /* __KERNEL__ */ 73 73 74 74 #endif /* __ASM_SH_BITOPS_H */

-2

arch/sh/include/asm/cache.h

··· 8 8 */ 9 9 #ifndef __ASM_SH_CACHE_H 10 10 #define __ASM_SH_CACHE_H 11 - #ifdef __KERNEL__ 12 11 13 12 #include <linux/init.h> 14 13 #include <cpu/cache.h> ··· 43 44 unsigned long flags; 44 45 }; 45 46 #endif /* __ASSEMBLY__ */ 46 - #endif /* __KERNEL__ */ 47 47 #endif /* __ASM_SH_CACHE_H */

-3

arch/sh/include/asm/cacheflush.h

··· 2 2 #ifndef __ASM_SH_CACHEFLUSH_H 3 3 #define __ASM_SH_CACHEFLUSH_H 4 4 5 - #ifdef __KERNEL__ 6 - 7 5 #include <linux/mm.h> 8 6 9 7 /* ··· 107 109 return vaddr; 108 110 } 109 111 110 - #endif /* __KERNEL__ */ 111 112 #endif /* __ASM_SH_CACHEFLUSH_H */

-2

arch/sh/include/asm/dma.h

··· 6 6 */ 7 7 #ifndef __ASM_SH_DMA_H 8 8 #define __ASM_SH_DMA_H 9 - #ifdef __KERNEL__ 10 9 11 10 #include <linux/spinlock.h> 12 11 #include <linux/wait.h> ··· 143 144 #define isa_dma_bridge_buggy (0) 144 145 #endif 145 146 146 - #endif /* __KERNEL__ */ 147 147 #endif /* __ASM_SH_DMA_H */

-2

arch/sh/include/asm/elf.h

··· 90 90 #endif 91 91 #define ELF_ARCH EM_SH 92 92 93 - #ifdef __KERNEL__ 94 93 /* 95 94 * This is used to ensure we don't load something for the wrong architecture. 96 95 */ ··· 208 209 NEW_AUX_ENT(AT_L2_CACHESHAPE, l2_cache_shape); \ 209 210 } while (0) 210 211 211 - #endif /* __KERNEL__ */ 212 212 #endif /* __ASM_SH_ELF_H */

-2

arch/sh/include/asm/freq.h

··· 6 6 */ 7 7 #ifndef __ASM_SH_FREQ_H 8 8 #define __ASM_SH_FREQ_H 9 - #ifdef __KERNEL__ 10 9 11 10 #include <cpu/freq.h> 12 11 13 - #endif /* __KERNEL__ */ 14 12 #endif /* __ASM_SH_FREQ_H */

-3

arch/sh/include/asm/futex.h

··· 2 2 #ifndef __ASM_SH_FUTEX_H 3 3 #define __ASM_SH_FUTEX_H 4 4 5 - #ifdef __KERNEL__ 6 - 7 5 #include <linux/futex.h> 8 6 #include <linux/uaccess.h> 9 7 #include <asm/errno.h> ··· 69 71 return ret; 70 72 } 71 73 72 - #endif /* __KERNEL__ */ 73 74 #endif /* __ASM_SH_FUTEX_H */

+14 -105

arch/sh/include/asm/io.h

··· 21 21 #include <linux/pgtable.h> 22 22 #include <asm-generic/iomap.h> 23 23 24 - #ifdef __KERNEL__ 25 24 #define __IO_PREFIX generic 26 25 #include <asm/io_generic.h> 27 - #include <asm/io_trapped.h> 28 26 #include <asm-generic/pci_iomap.h> 29 27 #include <mach/mangle-port.h> 30 28 ··· 242 244 #define phys_to_virt(address) (__va(address)) 243 245 #endif 244 246 245 - /* 246 - * On 32-bit SH, we traditionally have the whole physical address space 247 - * mapped at all times (as MIPS does), so "ioremap()" and "iounmap()" do 248 - * not need to do anything but place the address in the proper segment. 249 - * This is true for P1 and P2 addresses, as well as some P3 ones. 250 - * However, most of the P3 addresses and newer cores using extended 251 - * addressing need to map through page tables, so the ioremap() 252 - * implementation becomes a bit more complicated. 253 - * 254 - * See arch/sh/mm/ioremap.c for additional notes on this. 255 - * 256 - * We cheat a bit and always return uncachable areas until we've fixed 257 - * the drivers to handle caching properly. 258 - * 259 - * On the SH-5 the concept of segmentation in the 1:1 PXSEG sense simply 260 - * doesn't exist, so everything must go through page tables. 261 - */ 262 247 #ifdef CONFIG_MMU 248 + void iounmap(void __iomem *addr); 263 249 void __iomem *__ioremap_caller(phys_addr_t offset, unsigned long size, 264 250 pgprot_t prot, void *caller); 265 - void iounmap(void __iomem *addr); 266 - 267 - static inline void __iomem * 268 - __ioremap(phys_addr_t offset, unsigned long size, pgprot_t prot) 269 - { 270 - return __ioremap_caller(offset, size, prot, __builtin_return_address(0)); 271 - } 272 - 273 - static inline void __iomem * 274 - __ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot) 275 - { 276 - #ifdef CONFIG_29BIT 277 - phys_addr_t last_addr = offset + size - 1; 278 - 279 - /* 280 - * For P1 and P2 space this is trivial, as everything is already 281 - * mapped. Uncached access for P1 addresses are done through P2. 282 - * In the P3 case or for addresses outside of the 29-bit space, 283 - * mapping must be done by the PMB or by using page tables. 284 - */ 285 - if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { 286 - u64 flags = pgprot_val(prot); 287 - 288 - /* 289 - * Anything using the legacy PTEA space attributes needs 290 - * to be kicked down to page table mappings. 291 - */ 292 - if (unlikely(flags & _PAGE_PCC_MASK)) 293 - return NULL; 294 - if (unlikely(flags & _PAGE_CACHABLE)) 295 - return (void __iomem *)P1SEGADDR(offset); 296 - 297 - return (void __iomem *)P2SEGADDR(offset); 298 - } 299 - 300 - /* P4 above the store queues are always mapped. */ 301 - if (unlikely(offset >= P3_ADDR_MAX)) 302 - return (void __iomem *)P4SEGADDR(offset); 303 - #endif 304 - 305 - return NULL; 306 - } 307 - 308 - static inline void __iomem * 309 - __ioremap_mode(phys_addr_t offset, unsigned long size, pgprot_t prot) 310 - { 311 - void __iomem *ret; 312 - 313 - ret = __ioremap_trapped(offset, size); 314 - if (ret) 315 - return ret; 316 - 317 - ret = __ioremap_29bit(offset, size, prot); 318 - if (ret) 319 - return ret; 320 - 321 - return __ioremap(offset, size, prot); 322 - } 323 - #else 324 - #define __ioremap(offset, size, prot) ((void __iomem *)(offset)) 325 - #define __ioremap_mode(offset, size, prot) ((void __iomem *)(offset)) 326 - static inline void iounmap(void __iomem *addr) {} 327 - #endif /* CONFIG_MMU */ 328 251 329 252 static inline void __iomem *ioremap(phys_addr_t offset, unsigned long size) 330 253 { 331 - return __ioremap_mode(offset, size, PAGE_KERNEL_NOCACHE); 254 + return __ioremap_caller(offset, size, PAGE_KERNEL_NOCACHE, 255 + __builtin_return_address(0)); 332 256 } 333 257 334 258 static inline void __iomem * 335 259 ioremap_cache(phys_addr_t offset, unsigned long size) 336 260 { 337 - return __ioremap_mode(offset, size, PAGE_KERNEL); 261 + return __ioremap_caller(offset, size, PAGE_KERNEL, 262 + __builtin_return_address(0)); 338 263 } 339 264 #define ioremap_cache ioremap_cache 340 265 341 266 #ifdef CONFIG_HAVE_IOREMAP_PROT 342 - static inline void __iomem * 343 - ioremap_prot(phys_addr_t offset, unsigned long size, unsigned long flags) 267 + static inline void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size, 268 + unsigned long flags) 344 269 { 345 - return __ioremap_mode(offset, size, __pgprot(flags)); 270 + return __ioremap_caller(offset, size, __pgprot(flags), 271 + __builtin_return_address(0)); 346 272 } 347 - #endif 273 + #endif /* CONFIG_HAVE_IOREMAP_PROT */ 348 274 349 - #ifdef CONFIG_IOREMAP_FIXED 350 - extern void __iomem *ioremap_fixed(phys_addr_t, unsigned long, pgprot_t); 351 - extern int iounmap_fixed(void __iomem *); 352 - extern void ioremap_fixed_init(void); 353 - #else 354 - static inline void __iomem * 355 - ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot) 356 - { 357 - BUG(); 358 - return NULL; 359 - } 360 - 361 - static inline void ioremap_fixed_init(void) { } 362 - static inline int iounmap_fixed(void __iomem *addr) { return -EINVAL; } 363 - #endif 275 + #else /* CONFIG_MMU */ 276 + #define iounmap(addr) do { } while (0) 277 + #define ioremap(offset, size) ((void __iomem *)(unsigned long)(offset)) 278 + #endif /* CONFIG_MMU */ 364 279 365 280 #define ioremap_uc ioremap 366 281 ··· 291 380 #define ARCH_HAS_VALID_PHYS_ADDR_RANGE 292 381 int valid_phys_addr_range(phys_addr_t addr, size_t size); 293 382 int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); 294 - 295 - #endif /* __KERNEL__ */ 296 383 297 384 #endif /* __ASM_SH_IO_H */

+1 -2

arch/sh/include/asm/kdebug.h

··· 12 12 }; 13 13 14 14 /* arch/sh/kernel/dumpstack.c */ 15 - extern void printk_address(unsigned long address, int reliable, 16 - const char *loglvl); 15 + extern void printk_address(unsigned long address, int reliable); 17 16 extern void dump_mem(const char *str, const char *loglvl, 18 17 unsigned long bottom, unsigned long top); 19 18

-2

arch/sh/include/asm/mmu_context.h

··· 8 8 #ifndef __ASM_SH_MMU_CONTEXT_H 9 9 #define __ASM_SH_MMU_CONTEXT_H 10 10 11 - #ifdef __KERNEL__ 12 11 #include <cpu/mmu_context.h> 13 12 #include <asm/tlbflush.h> 14 13 #include <linux/uaccess.h> ··· 176 177 #define disable_mmu() do { } while (0) 177 178 #endif 178 179 179 - #endif /* __KERNEL__ */ 180 180 #endif /* __ASM_SH_MMU_CONTEXT_H */

-3

arch/sh/include/asm/mmzone.h

··· 2 2 #ifndef __ASM_SH_MMZONE_H 3 3 #define __ASM_SH_MMZONE_H 4 4 5 - #ifdef __KERNEL__ 6 - 7 5 #ifdef CONFIG_NEED_MULTIPLE_NODES 8 6 #include <linux/numa.h> 9 7 ··· 42 44 /* arch/sh/mm/init.c */ 43 45 void __init allocate_pgdat(unsigned int nid); 44 46 45 - #endif /* __KERNEL__ */ 46 47 #endif /* __ASM_SH_MMZONE_H */

-4

arch/sh/include/asm/pci.h

··· 2 2 #ifndef __ASM_SH_PCI_H 3 3 #define __ASM_SH_PCI_H 4 4 5 - #ifdef __KERNEL__ 6 - 7 5 /* Can be used to override the logic in pci_scan_bus for skipping 8 6 already-configured bus numbers - to be used for buggy BIOSes 9 7 or architectures with incomplete PCI setup by the loader */ ··· 94 96 return channel ? 15 : 14; 95 97 } 96 98 97 - #endif /* __KERNEL__ */ 98 99 #endif /* __ASM_SH_PCI_H */ 99 -

-2

arch/sh/include/asm/processor_32.h

··· 8 8 9 9 #ifndef __ASM_SH_PROCESSOR_32_H 10 10 #define __ASM_SH_PROCESSOR_32_H 11 - #ifdef __KERNEL__ 12 11 13 12 #include <linux/compiler.h> 14 13 #include <linux/linkage.h> ··· 202 203 } 203 204 #endif 204 205 205 - #endif /* __KERNEL__ */ 206 206 #endif /* __ASM_SH_PROCESSOR_32_H */

+2 -2

arch/sh/include/asm/smc37c93x.h

··· 112 112 #define FCR_RFRES 0x0200 /* Receiver FIFO reset */ 113 113 #define FCR_TFRES 0x0400 /* Transmitter FIFO reset */ 114 114 #define FCR_DMA 0x0800 /* DMA mode select */ 115 - #define FCR_RTL 0x4000 /* Receiver triger (LSB) */ 116 - #define FCR_RTM 0x8000 /* Receiver triger (MSB) */ 115 + #define FCR_RTL 0x4000 /* Receiver trigger (LSB) */ 116 + #define FCR_RTM 0x8000 /* Receiver trigger (MSB) */ 117 117 118 118 /* Line Control Register */ 119 119

-3

arch/sh/include/asm/sparsemem.h

··· 2 2 #ifndef __ASM_SH_SPARSEMEM_H 3 3 #define __ASM_SH_SPARSEMEM_H 4 4 5 - #ifdef __KERNEL__ 6 5 /* 7 6 * SECTION_SIZE_BITS 2^N: how big each section will be 8 7 * MAX_PHYSMEM_BITS 2^N: how much physical address space we have 9 8 */ 10 9 #define SECTION_SIZE_BITS 26 11 10 #define MAX_PHYSMEM_BITS 32 12 - 13 - #endif 14 11 15 12 #endif /* __ASM_SH_SPARSEMEM_H */

-2

arch/sh/include/asm/stacktrace.h

··· 12 12 13 13 struct stacktrace_ops { 14 14 void (*address)(void *data, unsigned long address, int reliable); 15 - /* On negative return stop dumping */ 16 - int (*stack)(void *data, char *name); 17 15 }; 18 16 19 17 void dump_trace(struct task_struct *tsk, struct pt_regs *regs,

-4

arch/sh/include/asm/string_32.h

··· 2 2 #ifndef __ASM_SH_STRING_H 3 3 #define __ASM_SH_STRING_H 4 4 5 - #ifdef __KERNEL__ 6 - 7 5 /* 8 6 * Copyright (C) 1999 Niibe Yutaka 9 7 * But consider these trivial functions to be public domain. ··· 98 100 99 101 #define __HAVE_ARCH_STRLEN 100 102 extern size_t strlen(const char *); 101 - 102 - #endif /* __KERNEL__ */ 103 103 104 104 #endif /* __ASM_SH_STRING_H */

+1 -4

arch/sh/include/asm/syscall_32.h

··· 40 40 struct pt_regs *regs, 41 41 int error, long val) 42 42 { 43 - if (error) 44 - regs->regs[0] = -error; 45 - else 46 - regs->regs[0] = val; 43 + regs->regs[0] = (long) error ?: val; 47 44 } 48 45 49 46 static inline void syscall_get_arguments(struct task_struct *task,

-3

arch/sh/include/asm/syscalls_32.h

··· 2 2 #ifndef __ASM_SH_SYSCALLS_32_H 3 3 #define __ASM_SH_SYSCALLS_32_H 4 4 5 - #ifdef __KERNEL__ 6 - 7 5 #include <linux/compiler.h> 8 6 #include <linux/linkage.h> 9 7 #include <linux/types.h> ··· 24 26 asmlinkage void do_notify_resume(struct pt_regs *regs, unsigned int save_r0, 25 27 unsigned long thread_info_flags); 26 28 27 - #endif /* __KERNEL__ */ 28 29 #endif /* __ASM_SH_SYSCALLS_32_H */

-5

arch/sh/include/asm/thread_info.h

··· 10 10 * Copyright (C) 2002 David Howells (dhowells@redhat.com) 11 11 * - Incorporating suggestions made by Linus Torvalds and Dave Miller 12 12 */ 13 - #ifdef __KERNEL__ 14 - 15 13 #include <asm/page.h> 16 14 17 15 /* ··· 168 170 } 169 171 170 172 #endif /* !__ASSEMBLY__ */ 171 - 172 - #endif /* __KERNEL__ */ 173 - 174 173 #endif /* __ASM_SH_THREAD_INFO_H */

+53

arch/sh/include/asm/uaccess_32.h

··· 26 26 case 4: \ 27 27 __get_user_asm(x, ptr, retval, "l"); \ 28 28 break; \ 29 + case 8: \ 30 + __get_user_u64(x, ptr, retval); \ 31 + break; \ 29 32 default: \ 30 33 __get_user_unknown(); \ 31 34 break; \ ··· 68 65 #endif /* CONFIG_MMU */ 69 66 70 67 extern void __get_user_unknown(void); 68 + 69 + #if defined(CONFIG_CPU_LITTLE_ENDIAN) 70 + #define __get_user_u64(x, addr, err) \ 71 + ({ \ 72 + __asm__ __volatile__( \ 73 + "1:\n\t" \ 74 + "mov.l %2,%R1\n\t" \ 75 + "mov.l %T2,%S1\n\t" \ 76 + "2:\n" \ 77 + ".section .fixup,\"ax\"\n" \ 78 + "3:\n\t" \ 79 + "mov #0,%R1\n\t" \ 80 + "mov #0,%S1\n\t" \ 81 + "mov.l 4f, %0\n\t" \ 82 + "jmp @%0\n\t" \ 83 + " mov %3, %0\n\t" \ 84 + ".balign 4\n" \ 85 + "4: .long 2b\n\t" \ 86 + ".previous\n" \ 87 + ".section __ex_table,\"a\"\n\t" \ 88 + ".long 1b, 3b\n\t" \ 89 + ".long 1b + 2, 3b\n\t" \ 90 + ".previous" \ 91 + :"=&r" (err), "=&r" (x) \ 92 + :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); }) 93 + #else 94 + #define __get_user_u64(x, addr, err) \ 95 + ({ \ 96 + __asm__ __volatile__( \ 97 + "1:\n\t" \ 98 + "mov.l %2,%S1\n\t" \ 99 + "mov.l %T2,%R1\n\t" \ 100 + "2:\n" \ 101 + ".section .fixup,\"ax\"\n" \ 102 + "3:\n\t" \ 103 + "mov #0,%S1\n\t" \ 104 + "mov #0,%R1\n\t" \ 105 + "mov.l 4f, %0\n\t" \ 106 + "jmp @%0\n\t" \ 107 + " mov %3, %0\n\t" \ 108 + ".balign 4\n" \ 109 + "4: .long 2b\n\t" \ 110 + ".previous\n" \ 111 + ".section __ex_table,\"a\"\n\t" \ 112 + ".long 1b, 3b\n\t" \ 113 + ".long 1b + 2, 3b\n\t" \ 114 + ".previous" \ 115 + :"=&r" (err), "=&r" (x) \ 116 + :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); }) 117 + #endif 71 118 72 119 #define __put_user_size(x,ptr,size,retval) \ 73 120 do { \

-2

arch/sh/include/asm/watchdog.h

··· 8 8 */ 9 9 #ifndef __ASM_SH_WATCHDOG_H 10 10 #define __ASM_SH_WATCHDOG_H 11 - #ifdef __KERNEL__ 12 11 13 12 #include <linux/types.h> 14 13 #include <linux/io.h> ··· 156 157 __raw_writew((WTCSR_HIGH << 8) | (__u16)val, WTCSR); 157 158 } 158 159 #endif /* CONFIG_CPU_SUBTYPE_SH7785 || CONFIG_CPU_SUBTYPE_SH7780 */ 159 - #endif /* __KERNEL__ */ 160 160 #endif /* __ASM_SH_WATCHDOG_H */

-2

arch/sh/kernel/Makefile

··· 47 47 obj-$(CONFIG_PERF_EVENTS) += perf_event.o perf_callchain.o 48 48 obj-$(CONFIG_DMA_NONCOHERENT) += dma-coherent.o 49 49 obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o 50 - 51 - ccflags-y := -Werror

+52 -51

arch/sh/kernel/disassemble.c

··· 376 376 } 377 377 378 378 ok: 379 - printk("%-8s ", op->name); 379 + pr_cont("%-8s ", op->name); 380 380 lastsp = (op->arg[0] == A_END); 381 381 disp_pc = 0; 382 382 for (n = 0; n < 6 && op->arg[n] != A_END; n++) { 383 383 if (n && op->arg[1] != A_END) 384 - printk(", "); 384 + pr_cont(", "); 385 385 switch (op->arg[n]) { 386 386 case A_IMM: 387 - printk("#%d", (char)(imm)); 387 + pr_cont("#%d", (char)(imm)); 388 388 break; 389 389 case A_R0: 390 - printk("r0"); 390 + pr_cont("r0"); 391 391 break; 392 392 case A_REG_N: 393 - printk("r%d", rn); 393 + pr_cont("r%d", rn); 394 394 break; 395 395 case A_INC_N: 396 - printk("@r%d+", rn); 396 + pr_cont("@r%d+", rn); 397 397 break; 398 398 case A_DEC_N: 399 - printk("@-r%d", rn); 399 + pr_cont("@-r%d", rn); 400 400 break; 401 401 case A_IND_N: 402 - printk("@r%d", rn); 402 + pr_cont("@r%d", rn); 403 403 break; 404 404 case A_DISP_REG_N: 405 - printk("@(%d,r%d)", imm, rn); 405 + pr_cont("@(%d,r%d)", imm, rn); 406 406 break; 407 407 case A_REG_M: 408 - printk("r%d", rm); 408 + pr_cont("r%d", rm); 409 409 break; 410 410 case A_INC_M: 411 - printk("@r%d+", rm); 411 + pr_cont("@r%d+", rm); 412 412 break; 413 413 case A_DEC_M: 414 - printk("@-r%d", rm); 414 + pr_cont("@-r%d", rm); 415 415 break; 416 416 case A_IND_M: 417 - printk("@r%d", rm); 417 + pr_cont("@r%d", rm); 418 418 break; 419 419 case A_DISP_REG_M: 420 - printk("@(%d,r%d)", imm, rm); 420 + pr_cont("@(%d,r%d)", imm, rm); 421 421 break; 422 422 case A_REG_B: 423 - printk("r%d_bank", rb); 423 + pr_cont("r%d_bank", rb); 424 424 break; 425 425 case A_DISP_PC: 426 426 disp_pc = 1; 427 427 disp_pc_addr = imm + 4 + (memaddr & relmask); 428 - printk("%08x <%pS>", disp_pc_addr, 429 - (void *)disp_pc_addr); 428 + pr_cont("%08x <%pS>", disp_pc_addr, 429 + (void *)disp_pc_addr); 430 430 break; 431 431 case A_IND_R0_REG_N: 432 - printk("@(r0,r%d)", rn); 432 + pr_cont("@(r0,r%d)", rn); 433 433 break; 434 434 case A_IND_R0_REG_M: 435 - printk("@(r0,r%d)", rm); 435 + pr_cont("@(r0,r%d)", rm); 436 436 break; 437 437 case A_DISP_GBR: 438 - printk("@(%d,gbr)",imm); 438 + pr_cont("@(%d,gbr)", imm); 439 439 break; 440 440 case A_R0_GBR: 441 - printk("@(r0,gbr)"); 441 + pr_cont("@(r0,gbr)"); 442 442 break; 443 443 case A_BDISP12: 444 444 case A_BDISP8: 445 - printk("%08x", imm + memaddr); 445 + pr_cont("%08x", imm + memaddr); 446 446 break; 447 447 case A_SR: 448 - printk("sr"); 448 + pr_cont("sr"); 449 449 break; 450 450 case A_GBR: 451 - printk("gbr"); 451 + pr_cont("gbr"); 452 452 break; 453 453 case A_VBR: 454 - printk("vbr"); 454 + pr_cont("vbr"); 455 455 break; 456 456 case A_SSR: 457 - printk("ssr"); 457 + pr_cont("ssr"); 458 458 break; 459 459 case A_SPC: 460 - printk("spc"); 460 + pr_cont("spc"); 461 461 break; 462 462 case A_MACH: 463 - printk("mach"); 463 + pr_cont("mach"); 464 464 break; 465 465 case A_MACL: 466 - printk("macl"); 466 + pr_cont("macl"); 467 467 break; 468 468 case A_PR: 469 - printk("pr"); 469 + pr_cont("pr"); 470 470 break; 471 471 case A_SGR: 472 - printk("sgr"); 472 + pr_cont("sgr"); 473 473 break; 474 474 case A_DBR: 475 - printk("dbr"); 475 + pr_cont("dbr"); 476 476 break; 477 477 case FD_REG_N: 478 478 case F_REG_N: 479 - printk("fr%d", rn); 479 + pr_cont("fr%d", rn); 480 480 break; 481 481 case F_REG_M: 482 - printk("fr%d", rm); 482 + pr_cont("fr%d", rm); 483 483 break; 484 484 case DX_REG_N: 485 485 if (rn & 1) { 486 - printk("xd%d", rn & ~1); 486 + pr_cont("xd%d", rn & ~1); 487 487 break; 488 488 } 489 489 /* else, fall through */ 490 490 case D_REG_N: 491 - printk("dr%d", rn); 491 + pr_cont("dr%d", rn); 492 492 break; 493 493 case DX_REG_M: 494 494 if (rm & 1) { 495 - printk("xd%d", rm & ~1); 495 + pr_cont("xd%d", rm & ~1); 496 496 break; 497 497 } 498 498 /* else, fall through */ 499 499 case D_REG_M: 500 - printk("dr%d", rm); 500 + pr_cont("dr%d", rm); 501 501 break; 502 502 case FPSCR_M: 503 503 case FPSCR_N: 504 - printk("fpscr"); 504 + pr_cont("fpscr"); 505 505 break; 506 506 case FPUL_M: 507 507 case FPUL_N: 508 - printk("fpul"); 508 + pr_cont("fpul"); 509 509 break; 510 510 case F_FR0: 511 - printk("fr0"); 511 + pr_cont("fr0"); 512 512 break; 513 513 case V_REG_N: 514 - printk("fv%d", rn*4); 514 + pr_cont("fv%d", rn*4); 515 515 break; 516 516 case V_REG_M: 517 - printk("fv%d", rm*4); 517 + pr_cont("fv%d", rm*4); 518 518 break; 519 519 case XMTRX_M4: 520 - printk("xmtrx"); 520 + pr_cont("xmtrx"); 521 521 break; 522 522 default: 523 523 return; ··· 532 532 else 533 533 __get_user(val, (u32 *)disp_pc_addr); 534 534 535 - printk(" ! %08x <%pS>", val, (void *)val); 535 + pr_cont(" ! %08x <%pS>", val, (void *)val); 536 536 } 537 537 538 538 return; ··· 541 541 542 542 } 543 543 544 - printk(".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]); 544 + pr_info(".word 0x%x%x%x%x", nibs[0], nibs[1], nibs[2], nibs[3]); 545 545 } 546 546 547 547 void show_code(struct pt_regs *regs) ··· 552 552 if (regs->pc & 0x1) 553 553 return; 554 554 555 - printk("Code:\n"); 555 + pr_info("Code:\n"); 556 556 557 557 for (i = -3 ; i < 6 ; i++) { 558 558 unsigned short insn; 559 559 560 560 if (__get_user(insn, pc + i)) { 561 - printk(" (Bad address in pc)\n"); 561 + pr_err(" (Bad address in pc)\n"); 562 562 break; 563 563 } 564 564 565 - printk("%s%08lx: ", (i ? " ": "->"), (unsigned long)(pc + i)); 565 + pr_info("%s%08lx: ", (i ? " " : "->"), 566 + (unsigned long)(pc + i)); 566 567 print_sh_insn((unsigned long)(pc + i), insn); 567 - printk("\n"); 568 + pr_cont("\n"); 568 569 } 569 570 570 - printk("\n"); 571 + pr_info("\n"); 571 572 }

+2 -49

arch/sh/kernel/dma-coherent.c

··· 3 3 * Copyright (C) 2004 - 2007 Paul Mundt 4 4 */ 5 5 #include <linux/mm.h> 6 - #include <linux/init.h> 7 6 #include <linux/dma-noncoherent.h> 8 - #include <linux/module.h> 9 7 #include <asm/cacheflush.h> 10 8 #include <asm/addrspace.h> 11 9 12 - void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 13 - gfp_t gfp, unsigned long attrs) 10 + void arch_dma_prep_coherent(struct page *page, size_t size) 14 11 { 15 - void *ret, *ret_nocache; 16 - int order = get_order(size); 17 - 18 - gfp |= __GFP_ZERO; 19 - 20 - ret = (void *)__get_free_pages(gfp, order); 21 - if (!ret) 22 - return NULL; 23 - 24 - /* 25 - * Pages from the page allocator may have data present in 26 - * cache. So flush the cache before using uncached memory. 27 - */ 28 - arch_sync_dma_for_device(virt_to_phys(ret), size, 29 - DMA_BIDIRECTIONAL); 30 - 31 - ret_nocache = (void __force *)ioremap(virt_to_phys(ret), size); 32 - if (!ret_nocache) { 33 - free_pages((unsigned long)ret, order); 34 - return NULL; 35 - } 36 - 37 - split_page(pfn_to_page(virt_to_phys(ret) >> PAGE_SHIFT), order); 38 - 39 - *dma_handle = virt_to_phys(ret); 40 - if (!WARN_ON(!dev)) 41 - *dma_handle -= PFN_PHYS(dev->dma_pfn_offset); 42 - 43 - return ret_nocache; 44 - } 45 - 46 - void arch_dma_free(struct device *dev, size_t size, void *vaddr, 47 - dma_addr_t dma_handle, unsigned long attrs) 48 - { 49 - int order = get_order(size); 50 - unsigned long pfn = (dma_handle >> PAGE_SHIFT); 51 - int k; 52 - 53 - if (!WARN_ON(!dev)) 54 - pfn += dev->dma_pfn_offset; 55 - 56 - for (k = 0; k < (1 << order); k++) 57 - __free_pages(pfn_to_page(pfn + k), 0); 58 - 59 - iounmap(vaddr); 12 + __flush_purge_region(page_address(page), size); 60 13 } 61 14 62 15 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,

+12 -18

arch/sh/kernel/dumpstack.c

··· 16 16 #include <asm/unwinder.h> 17 17 #include <asm/stacktrace.h> 18 18 19 - void dump_mem(const char *str, const char *loglvl, 20 - unsigned long bottom, unsigned long top) 19 + void dump_mem(const char *str, const char *loglvl, unsigned long bottom, 20 + unsigned long top) 21 21 { 22 22 unsigned long p; 23 23 int i; ··· 31 31 unsigned int val; 32 32 33 33 if (p < bottom || p >= top) 34 - printk("%s ", loglvl); 34 + pr_cont(" "); 35 35 else { 36 36 if (__get_user(val, (unsigned int __user *)p)) { 37 - printk("%s\n", loglvl); 37 + pr_cont("\n"); 38 38 return; 39 39 } 40 - printk("%s%08x ", loglvl, val); 40 + pr_cont("%08x ", val); 41 41 } 42 42 } 43 - printk("%s\n", loglvl); 43 + pr_cont("\n"); 44 44 } 45 45 } 46 46 47 - void printk_address(unsigned long address, int reliable, const char *loglvl) 47 + void printk_address(unsigned long address, int reliable) 48 48 { 49 - printk("%s [<%p>] %s%pS\n", loglvl, (void *) address, 50 - reliable ? "" : "? ", (void *) address); 49 + pr_cont(" [<%px>] %s%pS\n", (void *) address, 50 + reliable ? "" : "? ", (void *) address); 51 51 } 52 52 53 53 #ifdef CONFIG_FUNCTION_GRAPH_TRACER ··· 107 107 } 108 108 } 109 109 110 - static int print_trace_stack(void *data, char *name) 111 - { 112 - printk("%s <%s> ", (char *)data, name); 113 - return 0; 114 - } 115 - 116 110 /* 117 111 * Print one address/symbol entries per line. 118 112 */ 119 113 static void print_trace_address(void *data, unsigned long addr, int reliable) 120 114 { 121 - printk_address(addr, reliable, (char *)data); 115 + printk("%s", (char *)data); 116 + printk_address(addr, reliable); 122 117 } 123 118 124 119 static const struct stacktrace_ops print_trace_ops = { 125 - .stack = print_trace_stack, 126 120 .address = print_trace_address, 127 121 }; 128 122 ··· 130 136 131 137 unwind_stack(tsk, regs, sp, &print_trace_ops, (void *)loglvl); 132 138 133 - printk("%s\n", loglvl); 139 + pr_cont("\n"); 134 140 135 141 if (!tsk) 136 142 tsk = current;

+31 -28

arch/sh/kernel/entry-common.S

··· 178 178 bra resume_userspace 179 179 nop 180 180 181 - .align 2 182 - syscall_trace_entry: 183 - ! Yes it is traced. 184 - mov r15, r4 185 - mov.l 7f, r11 ! Call do_syscall_trace_enter which notifies 186 - jsr @r11 ! superior (will chomp R[0-7]) 187 - nop 188 - mov.l r0, @(OFF_R0,r15) ! Save return value 189 - ! Reload R0-R4 from kernel stack, where the 190 - ! parent may have modified them using 191 - ! ptrace(POKEUSR). (Note that R0-R2 are 192 - ! reloaded from the kernel stack by syscall_call 193 - ! below, so don't need to be reloaded here.) 194 - ! This allows the parent to rewrite system calls 195 - ! and args on the fly. 196 - mov.l @(OFF_R4,r15), r4 ! arg0 197 - mov.l @(OFF_R5,r15), r5 198 - mov.l @(OFF_R6,r15), r6 199 - mov.l @(OFF_R7,r15), r7 ! arg3 200 - mov.l @(OFF_R3,r15), r3 ! syscall_nr 201 - ! 202 - mov.l 6f, r10 ! Number of syscalls 203 - cmp/hs r10, r3 204 - bf syscall_call 205 - mov #-ENOSYS, r0 206 - bra syscall_exit 207 - mov.l r0, @(OFF_R0,r15) ! Return value 208 - 209 181 __restore_all: 210 182 mov #OFF_SR, r0 211 183 mov.l @(r0,r15), r0 ! get status register ··· 360 388 bf syscall_exit_work 361 389 bra __restore_all 362 390 nop 391 + 392 + .align 2 393 + syscall_trace_entry: 394 + ! Yes it is traced. 395 + mov r15, r4 396 + mov.l 7f, r11 ! Call do_syscall_trace_enter which notifies 397 + jsr @r11 ! superior (will chomp R[0-7]) 398 + nop 399 + cmp/eq #-1, r0 400 + bt syscall_exit 401 + mov.l r0, @(OFF_R0,r15) ! Save return value 402 + ! Reload R0-R4 from kernel stack, where the 403 + ! parent may have modified them using 404 + ! ptrace(POKEUSR). (Note that R0-R2 are 405 + ! reloaded from the kernel stack by syscall_call 406 + ! below, so don't need to be reloaded here.) 407 + ! This allows the parent to rewrite system calls 408 + ! and args on the fly. 409 + mov.l @(OFF_R4,r15), r4 ! arg0 410 + mov.l @(OFF_R5,r15), r5 411 + mov.l @(OFF_R6,r15), r6 412 + mov.l @(OFF_R7,r15), r7 ! arg3 413 + mov.l @(OFF_R3,r15), r3 ! syscall_nr 414 + ! 415 + mov.l 6f, r10 ! Number of syscalls 416 + cmp/hs r10, r3 417 + bf syscall_call 418 + mov #-ENOSYS, r0 419 + bra syscall_exit 420 + mov.l r0, @(OFF_R0,r15) ! Return value 421 + 363 422 .align 2 364 423 #if !defined(CONFIG_CPU_SH2) 365 424 1: .long TRA

-2

arch/sh/kernel/io_trapped.c

··· 102 102 pr_warn("unable to install trapped io filter\n"); 103 103 return -1; 104 104 } 105 - EXPORT_SYMBOL_GPL(register_trapped_io); 106 105 107 106 void __iomem *match_trapped_io_handler(struct list_head *list, 108 107 unsigned long offset, ··· 130 131 spin_unlock_irqrestore(&trapped_lock, flags); 131 132 return NULL; 132 133 } 133 - EXPORT_SYMBOL_GPL(match_trapped_io_handler); 134 134 135 135 static struct trapped_io *lookup_tiop(unsigned long address) 136 136 {

+1

arch/sh/kernel/ioport.c

··· 7 7 */ 8 8 #include <linux/module.h> 9 9 #include <linux/io.h> 10 + #include <asm/io_trapped.h> 10 11 11 12 unsigned long sh_io_port_base __read_mostly = -1; 12 13 EXPORT_SYMBOL(sh_io_port_base);

+4 -4

arch/sh/kernel/machvec.c

··· 65 65 66 66 mvp = get_mv_byname(mv_name); 67 67 if (unlikely(!mvp)) { 68 - printk("Available vectors:\n\n\t'%s', ", sh_mv.mv_name); 68 + pr_info("Available vectors:\n\n\t'%s', ", sh_mv.mv_name); 69 69 for_each_mv(mvp) 70 - printk("'%s', ", mvp->mv_name); 71 - printk("\n\n"); 70 + pr_cont("'%s', ", mvp->mv_name); 71 + pr_cont("\n\n"); 72 72 panic("Failed to select machvec '%s' -- halting.\n", 73 73 mv_name); 74 74 } else ··· 105 105 sh_mv = *(struct sh_machine_vector *)&__machvec_start; 106 106 } 107 107 108 - printk(KERN_NOTICE "Booting machvec: %s\n", get_system_type()); 108 + pr_notice("Booting machvec: %s\n", get_system_type()); 109 109 110 110 /* 111 111 * Manually walk the vec, fill in anything that the board hasn't yet

-6

arch/sh/kernel/perf_callchain.c

··· 11 11 #include <asm/unwinder.h> 12 12 #include <asm/ptrace.h> 13 13 14 - static int callchain_stack(void *data, char *name) 15 - { 16 - return 0; 17 - } 18 - 19 14 static void callchain_address(void *data, unsigned long addr, int reliable) 20 15 { 21 16 struct perf_callchain_entry_ctx *entry = data; ··· 20 25 } 21 26 22 27 static const struct stacktrace_ops callchain_ops = { 23 - .stack = callchain_stack, 24 28 .address = callchain_address, 25 29 }; 26 30

+17 -21

arch/sh/kernel/process_32.c

··· 30 30 31 31 void show_regs(struct pt_regs * regs) 32 32 { 33 - printk("\n"); 33 + pr_info("\n"); 34 34 show_regs_print_info(KERN_DEFAULT); 35 35 36 - printk("PC is at %pS\n", (void *)instruction_pointer(regs)); 37 - printk("PR is at %pS\n", (void *)regs->pr); 36 + pr_info("PC is at %pS\n", (void *)instruction_pointer(regs)); 37 + pr_info("PR is at %pS\n", (void *)regs->pr); 38 38 39 - printk("PC : %08lx SP : %08lx SR : %08lx ", 40 - regs->pc, regs->regs[15], regs->sr); 39 + pr_info("PC : %08lx SP : %08lx SR : %08lx ", regs->pc, 40 + regs->regs[15], regs->sr); 41 41 #ifdef CONFIG_MMU 42 - printk("TEA : %08x\n", __raw_readl(MMU_TEA)); 42 + pr_cont("TEA : %08x\n", __raw_readl(MMU_TEA)); 43 43 #else 44 - printk("\n"); 44 + pr_cont("\n"); 45 45 #endif 46 46 47 - printk("R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n", 48 - regs->regs[0],regs->regs[1], 49 - regs->regs[2],regs->regs[3]); 50 - printk("R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n", 51 - regs->regs[4],regs->regs[5], 52 - regs->regs[6],regs->regs[7]); 53 - printk("R8 : %08lx R9 : %08lx R10 : %08lx R11 : %08lx\n", 54 - regs->regs[8],regs->regs[9], 55 - regs->regs[10],regs->regs[11]); 56 - printk("R12 : %08lx R13 : %08lx R14 : %08lx\n", 57 - regs->regs[12],regs->regs[13], 58 - regs->regs[14]); 59 - printk("MACH: %08lx MACL: %08lx GBR : %08lx PR : %08lx\n", 60 - regs->mach, regs->macl, regs->gbr, regs->pr); 47 + pr_info("R0 : %08lx R1 : %08lx R2 : %08lx R3 : %08lx\n", 48 + regs->regs[0], regs->regs[1], regs->regs[2], regs->regs[3]); 49 + pr_info("R4 : %08lx R5 : %08lx R6 : %08lx R7 : %08lx\n", 50 + regs->regs[4], regs->regs[5], regs->regs[6], regs->regs[7]); 51 + pr_info("R8 : %08lx R9 : %08lx R10 : %08lx R11 : %08lx\n", 52 + regs->regs[8], regs->regs[9], regs->regs[10], regs->regs[11]); 53 + pr_info("R12 : %08lx R13 : %08lx R14 : %08lx\n", 54 + regs->regs[12], regs->regs[13], regs->regs[14]); 55 + pr_info("MACH: %08lx MACL: %08lx GBR : %08lx PR : %08lx\n", 56 + regs->mach, regs->macl, regs->gbr, regs->pr); 61 57 62 58 show_trace(NULL, (unsigned long *)regs->regs[15], regs, KERN_DEFAULT); 63 59 show_code(regs);

+3 -2

arch/sh/kernel/ptrace_32.c

··· 457 457 { 458 458 long ret = 0; 459 459 460 - secure_computing_strict(regs->regs[0]); 461 - 462 460 if (test_thread_flag(TIF_SYSCALL_TRACE) && 463 461 tracehook_report_syscall_entry(regs)) 464 462 /* ··· 465 467 * error, but leave the original number in regs->regs[0]. 466 468 */ 467 469 ret = -1L; 470 + 471 + if (secure_computing() == -1) 472 + return -1; 468 473 469 474 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) 470 475 trace_sys_enter(regs, regs->regs[0]);

-7

arch/sh/kernel/stacktrace.c

··· 15 15 #include <asm/ptrace.h> 16 16 #include <asm/stacktrace.h> 17 17 18 - static int save_stack_stack(void *data, char *name) 19 - { 20 - return 0; 21 - } 22 - 23 18 /* 24 19 * Save stack-backtrace addresses into a stack_trace buffer. 25 20 */ ··· 35 40 } 36 41 37 42 static const struct stacktrace_ops save_stack_ops = { 38 - .stack = save_stack_stack, 39 43 .address = save_stack_address, 40 44 }; 41 45 ··· 67 73 } 68 74 69 75 static const struct stacktrace_ops save_stack_ops_nosched = { 70 - .stack = save_stack_stack, 71 76 .address = save_stack_address_nosched, 72 77 }; 73 78

-2

arch/sh/lib/Makefile

··· 30 30 lib-$(CONFIG_MMU) += copy_page.o __clear_user.o 31 31 lib-$(CONFIG_MCOUNT) += mcount.o 32 32 lib-y += $(memcpy-y) $(memset-y) $(udivsi3-y) 33 - 34 - ccflags-y := -Werror

-1

arch/sh/lib/delay.c

··· 29 29 : "0" (loops) 30 30 : "t"); 31 31 } 32 - EXPORT_SYMBOL(__delay); 33 32 34 33 inline void __const_udelay(unsigned long xloops) 35 34 {

-2

arch/sh/mm/Makefile

··· 43 43 obj-$(CONFIG_HAVE_SRAM_POOL) += sram.o 44 44 45 45 GCOV_PROFILE_pmb.o := n 46 - 47 - ccflags-y := -Werror

-2

arch/sh/mm/consistent.c

··· 57 57 return -ENOMEM; 58 58 } 59 59 60 - memset(buf, 0, memsize); 61 - 62 60 r->flags = IORESOURCE_MEM; 63 61 r->start = dma_handle; 64 62 r->end = r->start + memsize - 1;

+1 -2

arch/sh/mm/fault.c

··· 208 208 if (!oops_may_print()) 209 209 return; 210 210 211 - printk(KERN_ALERT "PC:"); 212 211 pr_alert("BUG: unable to handle kernel %s at %08lx\n", 213 212 address < PAGE_SIZE ? "NULL pointer dereference" 214 213 : "paging request", 215 214 address); 216 215 pr_alert("PC:"); 217 - printk_address(regs->pc, 1, KERN_ALERT); 216 + printk_address(regs->pc, 1); 218 217 219 218 show_pte(NULL, address); 220 219 }

+1

arch/sh/mm/init.c

··· 29 29 #include <asm/cache.h> 30 30 #include <asm/pgalloc.h> 31 31 #include <linux/sizes.h> 32 + #include "ioremap.h" 32 33 33 34 pgd_t swapper_pg_dir[PTRS_PER_PGD]; 34 35

+55

arch/sh/mm/ioremap.c

··· 18 18 #include <linux/mm.h> 19 19 #include <linux/pci.h> 20 20 #include <linux/io.h> 21 + #include <asm/io_trapped.h> 21 22 #include <asm/page.h> 22 23 #include <asm/pgalloc.h> 23 24 #include <asm/addrspace.h> 24 25 #include <asm/cacheflush.h> 25 26 #include <asm/tlbflush.h> 26 27 #include <asm/mmu.h> 28 + #include "ioremap.h" 29 + 30 + /* 31 + * On 32-bit SH, we traditionally have the whole physical address space mapped 32 + * at all times (as MIPS does), so "ioremap()" and "iounmap()" do not need to do 33 + * anything but place the address in the proper segment. This is true for P1 34 + * and P2 addresses, as well as some P3 ones. However, most of the P3 addresses 35 + * and newer cores using extended addressing need to map through page tables, so 36 + * the ioremap() implementation becomes a bit more complicated. 37 + */ 38 + #ifdef CONFIG_29BIT 39 + static void __iomem * 40 + __ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot) 41 + { 42 + phys_addr_t last_addr = offset + size - 1; 43 + 44 + /* 45 + * For P1 and P2 space this is trivial, as everything is already 46 + * mapped. Uncached access for P1 addresses are done through P2. 47 + * In the P3 case or for addresses outside of the 29-bit space, 48 + * mapping must be done by the PMB or by using page tables. 49 + */ 50 + if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { 51 + u64 flags = pgprot_val(prot); 52 + 53 + /* 54 + * Anything using the legacy PTEA space attributes needs 55 + * to be kicked down to page table mappings. 56 + */ 57 + if (unlikely(flags & _PAGE_PCC_MASK)) 58 + return NULL; 59 + if (unlikely(flags & _PAGE_CACHABLE)) 60 + return (void __iomem *)P1SEGADDR(offset); 61 + 62 + return (void __iomem *)P2SEGADDR(offset); 63 + } 64 + 65 + /* P4 above the store queues are always mapped. */ 66 + if (unlikely(offset >= P3_ADDR_MAX)) 67 + return (void __iomem *)P4SEGADDR(offset); 68 + 69 + return NULL; 70 + } 71 + #else 72 + #define __ioremap_29bit(offset, size, prot) NULL 73 + #endif /* CONFIG_29BIT */ 27 74 28 75 /* 29 76 * Remap an arbitrary physical address space into the kernel virtual ··· 88 41 struct vm_struct *area; 89 42 unsigned long offset, last_addr, addr, orig_addr; 90 43 void __iomem *mapped; 44 + 45 + mapped = __ioremap_trapped(phys_addr, size); 46 + if (mapped) 47 + return mapped; 48 + 49 + mapped = __ioremap_29bit(phys_addr, size, pgprot); 50 + if (mapped) 51 + return mapped; 91 52 92 53 /* Don't allow wraparound or zero size */ 93 54 last_addr = phys_addr + size - 1;

+23

arch/sh/mm/ioremap.h

··· 1 + #ifndef _SH_MM_IORMEMAP_H 2 + #define _SH_MM_IORMEMAP_H 1 3 + 4 + #ifdef CONFIG_IOREMAP_FIXED 5 + void __iomem *ioremap_fixed(phys_addr_t, unsigned long, pgprot_t); 6 + int iounmap_fixed(void __iomem *); 7 + void ioremap_fixed_init(void); 8 + #else 9 + static inline void __iomem * 10 + ioremap_fixed(phys_addr_t phys_addr, unsigned long size, pgprot_t prot) 11 + { 12 + BUG(); 13 + return NULL; 14 + } 15 + static inline void ioremap_fixed_init(void) 16 + { 17 + } 18 + static inline int iounmap_fixed(void __iomem *addr) 19 + { 20 + return -EINVAL; 21 + } 22 + #endif /* CONFIG_IOREMAP_FIXED */ 23 + #endif /* _SH_MM_IORMEMAP_H */

+1

arch/sh/mm/ioremap_fixed.c

··· 23 23 #include <asm/tlbflush.h> 24 24 #include <asm/mmu.h> 25 25 #include <asm/mmu_context.h> 26 + #include "ioremap.h" 26 27 27 28 struct ioremap_map { 28 29 void __iomem *addr;

+3 -4

arch/sh/mm/pgtable.c

··· 2 2 #include <linux/mm.h> 3 3 #include <linux/slab.h> 4 4 5 - #define PGALLOC_GFP GFP_KERNEL | __GFP_ZERO 6 - 7 5 static struct kmem_cache *pgd_cachep; 8 6 #if PAGETABLE_LEVELS > 2 9 7 static struct kmem_cache *pmd_cachep; ··· 11 13 { 12 14 pgd_t *pgd = x; 13 15 16 + memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t)); 14 17 memcpy(pgd + USER_PTRS_PER_PGD, 15 18 swapper_pg_dir + USER_PTRS_PER_PGD, 16 19 (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); ··· 31 32 32 33 pgd_t *pgd_alloc(struct mm_struct *mm) 33 34 { 34 - return kmem_cache_alloc(pgd_cachep, PGALLOC_GFP); 35 + return kmem_cache_alloc(pgd_cachep, GFP_KERNEL); 35 36 } 36 37 37 38 void pgd_free(struct mm_struct *mm, pgd_t *pgd) ··· 47 48 48 49 pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address) 49 50 { 50 - return kmem_cache_alloc(pmd_cachep, PGALLOC_GFP); 51 + return kmem_cache_alloc(pmd_cachep, GFP_KERNEL | __GFP_ZERO); 51 52 } 52 53 53 54 void pmd_free(struct mm_struct *mm, pmd_t *pmd)

-7

arch/sh/oprofile/backtrace.c

··· 19 19 #include <asm/sections.h> 20 20 #include <asm/stacktrace.h> 21 21 22 - static int backtrace_stack(void *data, char *name) 23 - { 24 - /* Yes, we want all stacks */ 25 - return 0; 26 - } 27 - 28 22 static void backtrace_address(void *data, unsigned long addr, int reliable) 29 23 { 30 24 unsigned int *depth = data; ··· 28 34 } 29 35 30 36 static struct stacktrace_ops backtrace_ops = { 31 - .stack = backtrace_stack, 32 37 .address = backtrace_address, 33 38 }; 34 39

-1

arch/sh/tools/mach-types

··· 46 46 MAGICPANELR2 SH_MAGIC_PANEL_R2 47 47 R2D_PLUS RTS7751R2D_PLUS 48 48 R2D_1 RTS7751R2D_1 49 - CAYMAN SH_CAYMAN 50 49 SDK7780 SH_SDK7780 51 50 MIGOR SH_MIGOR 52 51 RSK7201 SH_RSK7201

+1 -3

arch/um/Kconfig

··· 14 14 select HAVE_FUTEX_CMPXCHG if FUTEX 15 15 select HAVE_DEBUG_KMEMLEAK 16 16 select HAVE_DEBUG_BUGVERBOSE 17 + select NO_DMA 17 18 select GENERIC_IRQ_SHOW 18 19 select GENERIC_CPU_DEVICES 19 20 select GENERIC_CLOCKEVENTS ··· 167 166 help 168 167 This driver allows a host file to be used as emulated IO memory inside 169 168 UML. 170 - 171 - config NO_DMA 172 - def_bool y 173 169 174 170 config PGTABLE_LEVELS 175 171 int

-2

drivers/input/serio/i8042-io.h

··· 21 21 #elif defined(__arm__) 22 22 /* defined in include/asm-arm/arch-xxx/irqs.h */ 23 23 #include <asm/irq.h> 24 - #elif defined(CONFIG_SH_CAYMAN) 25 - #include <asm/irq.h> 26 24 #elif defined(CONFIG_PPC) 27 25 extern int of_i8042_kbd_irq; 28 26 extern int of_i8042_aux_irq;

+3

kernel/dma/Kconfig

··· 1 1 # SPDX-License-Identifier: GPL-2.0-only 2 2 3 + config NO_DMA 4 + bool 5 + 3 6 config HAS_DMA 4 7 bool 5 8 depends on !NO_DMA

+7 -1

tools/testing/selftests/seccomp/seccomp_bpf.c

··· 133 133 # define __NR_seccomp 348 134 134 # elif defined(__xtensa__) 135 135 # define __NR_seccomp 337 136 + # elif defined(__sh__) 137 + # define __NR_seccomp 372 136 138 # else 137 139 # warning "seccomp syscall number unknown for this architecture" 138 140 # define __NR_seccomp 0xffff ··· 1721 1719 * a2 of the current window which is not fixed. 1722 1720 */ 1723 1721 #define SYSCALL_RET(reg) a[(reg).windowbase * 4 + 2] 1722 + #elif defined(__sh__) 1723 + # define ARCH_REGS struct pt_regs 1724 + # define SYSCALL_NUM gpr[3] 1725 + # define SYSCALL_RET gpr[0] 1724 1726 #else 1725 1727 # error "Do not know how to find your architecture's registers and syscalls" 1726 1728 #endif ··· 1797 1791 1798 1792 #if defined(__x86_64__) || defined(__i386__) || defined(__powerpc__) || \ 1799 1793 defined(__s390__) || defined(__hppa__) || defined(__riscv) || \ 1800 - defined(__xtensa__) || defined(__csky__) 1794 + defined(__xtensa__) || defined(__csky__) || defined(__sh__) 1801 1795 { 1802 1796 regs.SYSCALL_NUM = syscall; 1803 1797 }