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dt-bindings: phy: add cpsw port interface mode selection phy bindings
Add CPSW Port's Interface Mode Selection PHY (phy-gmii-sel) DT Bindings
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
authored by
Grygorii Strashko
and committed by
Kishon Vijay Abraham I
5b9bf512
c5e18b34
+68
+68
Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt
+68
Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt
···
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CPSW Port's Interface Mode Selection PHY Tree Bindings
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-----------------------------------------------
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TI am335x/am437x/dra7(am5)/dm814x CPSW3G Ethernet Subsystem supports
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two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces.
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The interface mode is selected by configuring the MII mode selection register(s)
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(GMII_SEL) in the System Control Module chapter (SCM). GMII_SEL register(s) and
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bit fields placement in SCM are different between SoCs while fields meaning
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is the same.
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+--------------+
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+-------------------------------+ |SCM |
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| CPSW | | +---------+ |
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| +--------------------------------+gmii_sel | |
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| | | | +---------+ |
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| +----v---+ +--------+ | +--------------+
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| |Port 1..<--+-->GMII/MII<------->
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| | | | | | |
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| +--------+ | +--------+ |
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| | |
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| | +--------+ |
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| | | RMII <------->
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| +--> | |
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| | +--------+ |
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| | |
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| | +--------+ |
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| | | RGMII <------->
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| +--> | |
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| +--------+ |
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+-------------------------------+
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CPSW Port's Interface Mode Selection PHY describes MII interface mode between
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CPSW Port and Ethernet PHY which depends on Eth PHY and board configuration.
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CPSW Port's Interface Mode Selection PHY device should defined as child device
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of SCM node (scm_conf) and can be attached to each CPSW port node using standard
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PHY bindings (See phy/phy-bindings.txt).
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Required properties:
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- compatible : Should be "ti,am3352-phy-gmii-sel" for am335x platform
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"ti,dra7xx-phy-gmii-sel" for dra7xx/am57xx platform
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"ti,am43xx-phy-gmii-sel" for am43xx platform
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"ti,dm814-phy-gmii-sel" for dm814x platform
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- reg : Address and length of the register set for the device
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- #phy-cells : must be 2.
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cell 1 - CPSW port number (starting from 1)
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cell 2 - RMII refclk mode
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Examples:
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phy_gmii_sel: phy-gmii-sel {
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compatible = "ti,am3352-phy-gmii-sel";
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reg = <0x650 0x4>;
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#phy-cells = <2>;
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};
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mac: ethernet@4a100000 {
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compatible = "ti,am335x-cpsw","ti,cpsw";
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...
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cpsw_emac0: slave@4a100200 {
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...
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phys = <&phy_gmii_sel 1 1>;
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};
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cpsw_emac1: slave@4a100300 {
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...
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phys = <&phy_gmii_sel 2 1>;
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};
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};