tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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staging: vt6655: Fixes the checkpatch.pl warning

warning fixed:

WARNING: line over 80 characters

The function call containing several variables is broken to make it fit
in 80 characters.

Signed-off-by: Himani Agrawal <himani93@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Himani Agrawal and committed by
Greg Kroah-Hartman 5b4ac54f d0edf4bc

+35 -13
+35 -13
drivers/staging/vt6655/baseband.c
··· 2021 2021 if (byRFType == RF_RFMD2959) { 2022 2022 if (byLocalID <= REV_ID_VT3253_A1) { 2023 2023 for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++) 2024 - bResult &= BBbWriteEmbedded(priv, byVT3253InitTab_RFMD[ii][0], byVT3253InitTab_RFMD[ii][1]); 2024 + bResult &= BBbWriteEmbedded(priv, 2025 + byVT3253InitTab_RFMD[ii][0], 2026 + byVT3253InitTab_RFMD[ii][1]); 2025 2027 2026 2028 } else { 2027 2029 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++) 2028 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_RFMD[ii][0], byVT3253B0_RFMD[ii][1]); 2030 + bResult &= BBbWriteEmbedded(priv, 2031 + byVT3253B0_RFMD[ii][0], 2032 + byVT3253B0_RFMD[ii][1]); 2029 2033 2030 2034 for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++) 2031 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC4_RFMD2959[ii][0], byVT3253B0_AGC4_RFMD2959[ii][1]); 2035 + bResult &= BBbWriteEmbedded(priv, 2036 + byVT3253B0_AGC4_RFMD2959[ii][0], 2037 + byVT3253B0_AGC4_RFMD2959[ii][1]); 2032 2038 2033 2039 VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23); 2034 2040 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0)); ··· 2049 2043 priv->ldBmThreshold[3] = 0; 2050 2044 } else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S)) { 2051 2045 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) 2052 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]); 2046 + bResult &= BBbWriteEmbedded(priv, 2047 + byVT3253B0_AIROHA2230[ii][0], 2048 + byVT3253B0_AIROHA2230[ii][1]); 2053 2049 2054 2050 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2055 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2051 + bResult &= BBbWriteEmbedded(priv, 2052 + byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2056 2053 2057 2054 priv->abyBBVGA[0] = 0x1C; 2058 2055 priv->abyBBVGA[1] = 0x10; ··· 2067 2058 priv->ldBmThreshold[3] = 0; 2068 2059 } else if (byRFType == RF_UW2451) { 2069 2060 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) 2070 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]); 2061 + bResult &= BBbWriteEmbedded(priv, 2062 + byVT3253B0_UW2451[ii][0], 2063 + byVT3253B0_UW2451[ii][1]); 2071 2064 2072 2065 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2073 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2066 + bResult &= BBbWriteEmbedded(priv, 2067 + byVT3253B0_AGC[ii][0], 2068 + byVT3253B0_AGC[ii][1]); 2074 2069 2075 2070 VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23); 2076 2071 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0)); ··· 2089 2076 priv->ldBmThreshold[3] = 0; 2090 2077 } else if (byRFType == RF_UW2452) { 2091 2078 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) 2092 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]); 2079 + bResult &= BBbWriteEmbedded(priv, 2080 + byVT3253B0_UW2451[ii][0], 2081 + byVT3253B0_UW2451[ii][1]); 2093 2082 2094 2083 /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */ 2095 2084 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/ ··· 2112 2097 bResult &= BBbWriteEmbedded(priv, 0xb0, 0x58); 2113 2098 2114 2099 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2115 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2100 + bResult &= BBbWriteEmbedded(priv, 2101 + byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2116 2102 2117 2103 priv->abyBBVGA[0] = 0x14; 2118 2104 priv->abyBBVGA[1] = 0x0A; ··· 2127 2111 2128 2112 } else if (byRFType == RF_VT3226) { 2129 2113 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) 2130 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]); 2114 + bResult &= BBbWriteEmbedded(priv, 2115 + byVT3253B0_AIROHA2230[ii][0], 2116 + byVT3253B0_AIROHA2230[ii][1]); 2131 2117 2132 2118 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2133 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2119 + bResult &= BBbWriteEmbedded(priv, 2120 + byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2134 2121 2135 2122 priv->abyBBVGA[0] = 0x1C; 2136 2123 priv->abyBBVGA[1] = 0x10; ··· 2148 2129 /* {{ RobertYu: 20050104 */ 2149 2130 } else if (byRFType == RF_AIROHA7230) { 2150 2131 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) 2151 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]); 2132 + bResult &= BBbWriteEmbedded(priv, 2133 + byVT3253B0_AIROHA2230[ii][0], 2134 + byVT3253B0_AIROHA2230[ii][1]); 2152 2135 2153 2136 2154 2137 /* {{ RobertYu:20050223, request by JerryChung */ ··· 2163 2142 /* }} */ 2164 2143 2165 2144 for (ii = 0; ii < CB_VT3253B0_AGC; ii++) 2166 - bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2145 + bResult &= BBbWriteEmbedded(priv, 2146 + byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); 2167 2147 2168 2148 priv->abyBBVGA[0] = 0x1C; 2169 2149 priv->abyBBVGA[1] = 0x10;