tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm/imx: fix imx6q mmc error when mounting rootfs
arm/imx: fix AUTO_ZRELADDR selection
arm/imx: fix the references to ARCH_MX3
ARM: mx51/53: set pwm clock parent to ipg_perclk
arm/tegra: enable headphone detection gpio on seaboard
arm/dt: Fix ventana SDHCI power-gpios
arm/tegra: Don't create duplicate gpio and pinmux devices
ARM: at91: Fix USBA gadget registration
atmel/spi: fix missing probe
at91/yl-9200: Fix section mismatch
at91: vmalloc fix missing AT91_VIRT_BASE define
ARM: at91: usart: drop static map regs for dbgu
ARM: picoxcell: add extra temp register to addruart
ARM: msm: fix compilation flags for MSM_SCM
arm/mxs: fix mmc device adding for mach-mx28evk
ARM: mxc: Remove test_for_ltirq
ARM:i.MX: fix build error in clock-mx51-mx53.c
ARM:i.MX: fix build error in tzic/avic.c
ARM: mxc: fix local timer interrupt handling
msm: boards: Fix fallout from removal of machine_desc in fixup

Linus Torvalds 5b34b089 eb0b38a5

+117 -80
+1 -2
arch/arm/boot/dts/tegra-ventana.dts
··· 22 22 sdhci@c8000400 { 23 23 cd-gpios = <&gpio 69 0>; /* gpio PI5 */ 24 24 wp-gpios = <&gpio 57 0>; /* gpio PH1 */ 25 - power-gpios = <&gpio 155 0>; /* gpio PT3 */ 25 + power-gpios = <&gpio 70 0>; /* gpio PI6 */ 26 26 }; 27 27 28 28 sdhci@c8000600 { 29 - power-gpios = <&gpio 70 0>; /* gpio PI6 */ 30 29 support-8bit; 31 30 }; 32 31 };
+3 -4
arch/arm/mach-at91/at91cap9_devices.c
··· 98 98 * USB HS Device (Gadget) 99 99 * -------------------------------------------------------------------- */ 100 100 101 - #if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 101 + #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE) 102 102 103 103 static struct resource usba_udc_resources[] = { 104 104 [0] = { ··· 1021 1021 #if defined(CONFIG_SERIAL_ATMEL) 1022 1022 static struct resource dbgu_resources[] = { 1023 1023 [0] = { 1024 - .start = AT91_VA_BASE_SYS + AT91_DBGU, 1025 - .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1024 + .start = AT91_BASE_SYS + AT91_DBGU, 1025 + .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1026 1026 .flags = IORESOURCE_MEM, 1027 1027 }, 1028 1028 [1] = { ··· 1035 1035 static struct atmel_uart_data dbgu_data = { 1036 1036 .use_dma_tx = 0, 1037 1037 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 1038 - .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), 1039 1038 }; 1040 1039 1041 1040 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+2 -3
arch/arm/mach-at91/at91rm9200_devices.c
··· 877 877 #if defined(CONFIG_SERIAL_ATMEL) 878 878 static struct resource dbgu_resources[] = { 879 879 [0] = { 880 - .start = AT91_VA_BASE_SYS + AT91_DBGU, 881 - .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 880 + .start = AT91_BASE_SYS + AT91_DBGU, 881 + .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 882 882 .flags = IORESOURCE_MEM, 883 883 }, 884 884 [1] = { ··· 891 891 static struct atmel_uart_data dbgu_data = { 892 892 .use_dma_tx = 0, 893 893 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 894 - .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), 895 894 }; 896 895 897 896 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+2 -3
arch/arm/mach-at91/at91sam9260_devices.c
··· 837 837 #if defined(CONFIG_SERIAL_ATMEL) 838 838 static struct resource dbgu_resources[] = { 839 839 [0] = { 840 - .start = AT91_VA_BASE_SYS + AT91_DBGU, 841 - .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 840 + .start = AT91_BASE_SYS + AT91_DBGU, 841 + .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 842 842 .flags = IORESOURCE_MEM, 843 843 }, 844 844 [1] = { ··· 851 851 static struct atmel_uart_data dbgu_data = { 852 852 .use_dma_tx = 0, 853 853 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 854 - .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), 855 854 }; 856 855 857 856 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+2 -3
arch/arm/mach-at91/at91sam9261_devices.c
··· 816 816 #if defined(CONFIG_SERIAL_ATMEL) 817 817 static struct resource dbgu_resources[] = { 818 818 [0] = { 819 - .start = AT91_VA_BASE_SYS + AT91_DBGU, 820 - .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 819 + .start = AT91_BASE_SYS + AT91_DBGU, 820 + .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 821 821 .flags = IORESOURCE_MEM, 822 822 }, 823 823 [1] = { ··· 830 830 static struct atmel_uart_data dbgu_data = { 831 831 .use_dma_tx = 0, 832 832 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 833 - .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), 834 833 }; 835 834 836 835 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+2 -3
arch/arm/mach-at91/at91sam9263_devices.c
··· 1196 1196 1197 1197 static struct resource dbgu_resources[] = { 1198 1198 [0] = { 1199 - .start = AT91_VA_BASE_SYS + AT91_DBGU, 1200 - .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1199 + .start = AT91_BASE_SYS + AT91_DBGU, 1200 + .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1201 1201 .flags = IORESOURCE_MEM, 1202 1202 }, 1203 1203 [1] = { ··· 1210 1210 static struct atmel_uart_data dbgu_data = { 1211 1211 .use_dma_tx = 0, 1212 1212 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 1213 - .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), 1214 1213 }; 1215 1214 1216 1215 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+3 -4
arch/arm/mach-at91/at91sam9g45_devices.c
··· 197 197 * USB HS Device (Gadget) 198 198 * -------------------------------------------------------------------- */ 199 199 200 - #if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 200 + #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE) 201 201 static struct resource usba_udc_resources[] = { 202 202 [0] = { 203 203 .start = AT91SAM9G45_UDPHS_FIFO, ··· 1332 1332 #if defined(CONFIG_SERIAL_ATMEL) 1333 1333 static struct resource dbgu_resources[] = { 1334 1334 [0] = { 1335 - .start = AT91_VA_BASE_SYS + AT91_DBGU, 1336 - .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1335 + .start = AT91_BASE_SYS + AT91_DBGU, 1336 + .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 1337 1337 .flags = IORESOURCE_MEM, 1338 1338 }, 1339 1339 [1] = { ··· 1346 1346 static struct atmel_uart_data dbgu_data = { 1347 1347 .use_dma_tx = 0, 1348 1348 .use_dma_rx = 0, 1349 - .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), 1350 1349 }; 1351 1350 1352 1351 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+3 -4
arch/arm/mach-at91/at91sam9rl_devices.c
··· 75 75 * USB HS Device (Gadget) 76 76 * -------------------------------------------------------------------- */ 77 77 78 - #if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE) 78 + #if defined(CONFIG_USB_ATMEL_USBA) || defined(CONFIG_USB_ATMEL_USBA_MODULE) 79 79 80 80 static struct resource usba_udc_resources[] = { 81 81 [0] = { ··· 908 908 #if defined(CONFIG_SERIAL_ATMEL) 909 909 static struct resource dbgu_resources[] = { 910 910 [0] = { 911 - .start = AT91_VA_BASE_SYS + AT91_DBGU, 912 - .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, 911 + .start = AT91_BASE_SYS + AT91_DBGU, 912 + .end = AT91_BASE_SYS + AT91_DBGU + SZ_512 - 1, 913 913 .flags = IORESOURCE_MEM, 914 914 }, 915 915 [1] = { ··· 922 922 static struct atmel_uart_data dbgu_data = { 923 923 .use_dma_tx = 0, 924 924 .use_dma_rx = 0, /* DBGU not capable of receive DMA */ 925 - .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), 926 925 }; 927 926 928 927 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
+1 -1
arch/arm/mach-at91/board-yl-9200.c
··· 384 384 #include <video/s1d13xxxfb.h> 385 385 386 386 387 - static void __init yl9200_init_video(void) 387 + static void yl9200_init_video(void) 388 388 { 389 389 /* NWAIT Signal */ 390 390 at91_set_A_periph(AT91_PIN_PC6, 0);
+2
arch/arm/mach-at91/include/mach/vmalloc.h
··· 21 21 #ifndef __ASM_ARCH_VMALLOC_H 22 22 #define __ASM_ARCH_VMALLOC_H 23 23 24 + #include <mach/hardware.h> 25 + 24 26 #define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK) 25 27 26 28 #endif
+19 -15
arch/arm/mach-imx/Makefile.boot
··· 1 - zreladdr-$(CONFIG_ARCH_MX1) += 0x08008000 2 - params_phys-$(CONFIG_ARCH_MX1) := 0x08000100 3 - initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000 1 + zreladdr-$(CONFIG_SOC_IMX1) += 0x08008000 2 + params_phys-$(CONFIG_SOC_IMX1) := 0x08000100 3 + initrd_phys-$(CONFIG_SOC_IMX1) := 0x08800000 4 4 5 - zreladdr-$(CONFIG_MACH_MX21) += 0xC0008000 6 - params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 7 - initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 5 + zreladdr-$(CONFIG_SOC_IMX21) += 0xC0008000 6 + params_phys-$(CONFIG_SOC_IMX21) := 0xC0000100 7 + initrd_phys-$(CONFIG_SOC_IMX21) := 0xC0800000 8 8 9 - zreladdr-$(CONFIG_ARCH_MX25) += 0x80008000 10 - params_phys-$(CONFIG_ARCH_MX25) := 0x80000100 11 - initrd_phys-$(CONFIG_ARCH_MX25) := 0x80800000 9 + zreladdr-$(CONFIG_SOC_IMX25) += 0x80008000 10 + params_phys-$(CONFIG_SOC_IMX25) := 0x80000100 11 + initrd_phys-$(CONFIG_SOC_IMX25) := 0x80800000 12 12 13 - zreladdr-$(CONFIG_MACH_MX27) += 0xA0008000 14 - params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 15 - initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 13 + zreladdr-$(CONFIG_SOC_IMX27) += 0xA0008000 14 + params_phys-$(CONFIG_SOC_IMX27) := 0xA0000100 15 + initrd_phys-$(CONFIG_SOC_IMX27) := 0xA0800000 16 16 17 - zreladdr-$(CONFIG_ARCH_MX3) += 0x80008000 18 - params_phys-$(CONFIG_ARCH_MX3) := 0x80000100 19 - initrd_phys-$(CONFIG_ARCH_MX3) := 0x80800000 17 + zreladdr-$(CONFIG_SOC_IMX31) += 0x80008000 18 + params_phys-$(CONFIG_SOC_IMX31) := 0x80000100 19 + initrd_phys-$(CONFIG_SOC_IMX31) := 0x80800000 20 + 21 + zreladdr-$(CONFIG_SOC_IMX35) += 0x80008000 22 + params_phys-$(CONFIG_SOC_IMX35) := 0x80000100 23 + initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000 20 24 21 25 zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 22 26 params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
+16 -1
arch/arm/mach-imx/clock-imx6q.c
··· 1139 1139 return -EINVAL; 1140 1140 1141 1141 max_div = ((d->bm_pred >> d->bp_pred) + 1) * 1142 - ((d->bm_pred >> d->bp_pred) + 1); 1142 + ((d->bm_podf >> d->bp_podf) + 1); 1143 1143 1144 1144 div = parent_rate / rate; 1145 1145 if (div == 0) ··· 2001 2001 clk_set_parent(&asrc_serial_clk, &pll3_usb_otg); 2002 2002 clk_set_rate(&asrc_serial_clk, 1500000); 2003 2003 clk_set_rate(&enfc_clk, 11000000); 2004 + 2005 + /* 2006 + * Before pinctrl API is available, we have to rely on the pad 2007 + * configuration set up by bootloader. For usdhc example here, 2008 + * u-boot sets up the pads for 49.5 MHz case, and we have to lower 2009 + * the usdhc clock from 198 to 49.5 MHz to match the pad configuration. 2010 + * 2011 + * FIXME: This is should be removed after pinctrl API is available. 2012 + * At that time, usdhc driver can call pinctrl API to change pad 2013 + * configuration dynamically per different usdhc clock settings. 2014 + */ 2015 + clk_set_rate(&usdhc1_clk, 49500000); 2016 + clk_set_rate(&usdhc2_clk, 49500000); 2017 + clk_set_rate(&usdhc3_clk, 49500000); 2018 + clk_set_rate(&usdhc4_clk, 49500000); 2004 2019 2005 2020 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); 2006 2021 base = of_iomap(np, 0);
+2
arch/arm/mach-msm/Makefile
··· 15 15 obj-$(CONFIG_MSM_SMD) += last_radio_log.o 16 16 obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.o 17 17 18 + CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) 19 + 18 20 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 19 21 obj-$(CONFIG_SMP) += headsmp.o platsmp.o 20 22
+2 -2
arch/arm/mach-msm/board-msm7x30.c
··· 42 42 43 43 extern struct sys_timer msm_timer; 44 44 45 - static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag, 46 - char **cmdline, struct meminfo *mi) 45 + static void __init msm7x30_fixup(struct tag *tag, char **cmdline, 46 + struct meminfo *mi) 47 47 { 48 48 for (; tag->hdr.size; tag = tag_next(tag)) 49 49 if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
+2 -2
arch/arm/mach-msm/board-msm8960.c
··· 32 32 33 33 #include "devices.h" 34 34 35 - static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag, 36 - char **cmdline, struct meminfo *mi) 35 + static void __init msm8960_fixup(struct tag *tag, char **cmdline, 36 + struct meminfo *mi) 37 37 { 38 38 for (; tag->hdr.size; tag = tag_next(tag)) 39 39 if (tag->hdr.tag == ATAG_MEM &&
+2 -2
arch/arm/mach-msm/board-msm8x60.c
··· 28 28 #include <mach/board.h> 29 29 #include <mach/msm_iomap.h> 30 30 31 - static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag, 32 - char **cmdline, struct meminfo *mi) 31 + static void __init msm8x60_fixup(struct tag *tag, char **cmdline, 32 + struct meminfo *mi) 33 33 { 34 34 for (; tag->hdr.size; tag = tag_next(tag)) 35 35 if (tag->hdr.tag == ATAG_MEM &&
+3
arch/arm/mach-msm/scm.c
··· 180 180 __asmeq("%1", "r0") 181 181 __asmeq("%2", "r1") 182 182 __asmeq("%3", "r2") 183 + #ifdef REQUIRES_SEC 184 + ".arch_extension sec\n" 185 + #endif 183 186 "smc #0 @ switch to secure world\n" 184 187 : "=r" (r0) 185 188 : "r" (r0), "r" (r1), "r" (r2)
+4 -2
arch/arm/mach-mx5/clock-mx51-mx53.c
··· 1281 1281 NULL, NULL, &ipg_clk, &gpt_ipg_clk); 1282 1282 1283 1283 DEFINE_CLOCK(pwm1_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG6_OFFSET, 1284 - NULL, NULL, &ipg_clk, NULL); 1284 + NULL, NULL, &ipg_perclk, NULL); 1285 1285 DEFINE_CLOCK(pwm2_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG8_OFFSET, 1286 - NULL, NULL, &ipg_clk, NULL); 1286 + NULL, NULL, &ipg_perclk, NULL); 1287 1287 1288 1288 /* I2C */ 1289 1289 DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG9_OFFSET, ··· 1634 1634 return 0; 1635 1635 } 1636 1636 1637 + #ifdef CONFIG_OF 1637 1638 static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc, 1638 1639 unsigned long *ckih1, unsigned long *ckih2) 1639 1640 { ··· 1672 1671 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2); 1673 1672 return mx53_clocks_init(ckil, osc, ckih1, ckih2); 1674 1673 } 1674 + #endif
+2 -2
arch/arm/mach-mxs/mach-mx28evk.c
··· 471 471 "mmc0-slot-power"); 472 472 if (ret) 473 473 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret); 474 - mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); 474 + else 475 + mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); 475 476 476 477 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW, 477 478 "mmc1-slot-power"); ··· 481 480 else 482 481 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); 483 482 484 - mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); 485 483 mx28_add_rtc_stmp3xxx(); 486 484 487 485 gpio_led_register_device(0, &mx28evk_led_data);
+1 -1
arch/arm/mach-picoxcell/include/mach/debug-macro.S
··· 14 14 15 15 #define UART_SHIFT 2 16 16 17 - .macro addruart, rp, rv 17 + .macro addruart, rp, rv, tmp 18 18 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) 19 19 ldr \rp, =PICOXCELL_UART1_BASE 20 20 .endm
+7 -6
arch/arm/mach-tegra/board-dt.c
··· 101 101 102 102 tegra_clk_init_from_table(tegra_dt_clk_init_table); 103 103 104 + /* 105 + * Finished with the static registrations now; fill in the missing 106 + * devices 107 + */ 108 + of_platform_populate(NULL, tegra_dt_match_table, 109 + tegra20_auxdata_lookup, NULL); 110 + 104 111 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { 105 112 if (of_machine_is_compatible(pinmux_configs[i].machine)) { 106 113 pinmux_configs[i].init(); ··· 117 110 118 111 WARN(i == ARRAY_SIZE(pinmux_configs), 119 112 "Unknown platform! Pinmuxing not initialized\n"); 120 - 121 - /* 122 - * Finished with the static registrations now; fill in the missing 123 - * devices 124 - */ 125 - of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL); 126 113 } 127 114 128 115 static const char * tegra_dt_board_compat[] = {
+5 -1
arch/arm/mach-tegra/board-harmony-pinmux.c
··· 16 16 17 17 #include <linux/kernel.h> 18 18 #include <linux/gpio.h> 19 + #include <linux/of.h> 20 + 19 21 #include <mach/pinmux.h> 20 22 21 23 #include "gpio-names.h" ··· 163 161 164 162 void harmony_pinmux_init(void) 165 163 { 166 - platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 164 + if (!of_machine_is_compatible("nvidia,tegra20")) 165 + platform_add_devices(pinmux_devices, 166 + ARRAY_SIZE(pinmux_devices)); 167 167 168 168 tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); 169 169
+5 -1
arch/arm/mach-tegra/board-paz00-pinmux.c
··· 16 16 17 17 #include <linux/kernel.h> 18 18 #include <linux/gpio.h> 19 + #include <linux/of.h> 20 + 19 21 #include <mach/pinmux.h> 20 22 21 23 #include "gpio-names.h" ··· 160 158 161 159 void paz00_pinmux_init(void) 162 160 { 163 - platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 161 + if (!of_machine_is_compatible("nvidia,tegra20")) 162 + platform_add_devices(pinmux_devices, 163 + ARRAY_SIZE(pinmux_devices)); 164 164 165 165 tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); 166 166
+5 -1
arch/arm/mach-tegra/board-seaboard-pinmux.c
··· 16 16 #include <linux/kernel.h> 17 17 #include <linux/init.h> 18 18 #include <linux/gpio.h> 19 + #include <linux/of.h> 19 20 20 21 #include <mach/pinmux.h> 21 22 #include <mach/pinmux-t2.h> ··· 192 191 { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, 193 192 { .gpio = TEGRA_GPIO_LIDSWITCH, .enable = true }, 194 193 { .gpio = TEGRA_GPIO_POWERKEY, .enable = true }, 194 + { .gpio = TEGRA_GPIO_HP_DET, .enable = true }, 195 195 { .gpio = TEGRA_GPIO_ISL29018_IRQ, .enable = true }, 196 196 { .gpio = TEGRA_GPIO_CDC_IRQ, .enable = true }, 197 197 { .gpio = TEGRA_GPIO_USB1, .enable = true }, ··· 220 218 221 219 void __init seaboard_common_pinmux_init(void) 222 220 { 223 - platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 221 + if (!of_machine_is_compatible("nvidia,tegra20")) 222 + platform_add_devices(pinmux_devices, 223 + ARRAY_SIZE(pinmux_devices)); 224 224 225 225 tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); 226 226
+4 -1
arch/arm/mach-tegra/board-trimslice-pinmux.c
··· 16 16 #include <linux/gpio.h> 17 17 #include <linux/kernel.h> 18 18 #include <linux/init.h> 19 + #include <linux/of.h> 19 20 20 21 #include <mach/pinmux.h> 21 22 ··· 158 157 159 158 void __init trimslice_pinmux_init(void) 160 159 { 161 - platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); 160 + if (!of_machine_is_compatible("nvidia,tegra20")) 161 + platform_add_devices(pinmux_devices, 162 + ARRAY_SIZE(pinmux_devices)); 162 163 tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); 163 164 tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); 164 165 }
+2 -2
arch/arm/plat-mxc/Kconfig
··· 10 10 11 11 config ARCH_IMX_V4_V5 12 12 bool "i.MX1, i.MX21, i.MX25, i.MX27" 13 - select AUTO_ZRELADDR 13 + select AUTO_ZRELADDR if !ZBOOT_ROM 14 14 select ARM_PATCH_PHYS_VIRT 15 15 help 16 16 This enables support for systems based on the Freescale i.MX ARMv4 ··· 26 26 27 27 config ARCH_MX5 28 28 bool "i.MX50, i.MX51, i.MX53" 29 - select AUTO_ZRELADDR 29 + select AUTO_ZRELADDR if !ZBOOT_ROM 30 30 select ARM_PATCH_PHYS_VIRT 31 31 help 32 32 This enables support for machines using Freescale's i.MX50 and i.MX53
+1
arch/arm/plat-mxc/avic.c
··· 22 22 #include <linux/io.h> 23 23 #include <mach/common.h> 24 24 #include <asm/mach/irq.h> 25 + #include <asm/exception.h> 25 26 #include <mach/hardware.h> 26 27 27 28 #include "irq-common.h"
+2 -9
arch/arm/plat-mxc/gic.c
··· 28 28 if (irqnr == 1023) 29 29 break; 30 30 31 - if (irqnr > 29 && irqnr < 1021) 31 + if (irqnr > 15 && irqnr < 1021) 32 32 handle_IRQ(irqnr, regs); 33 33 #ifdef CONFIG_SMP 34 - else if (irqnr < 16) { 34 + else { 35 35 writel_relaxed(irqstat, gic_cpu_base_addr + 36 36 GIC_CPU_EOI); 37 37 handle_IPI(irqnr, regs); 38 - } 39 - #endif 40 - #ifdef CONFIG_LOCAL_TIMERS 41 - else if (irqnr == 29) { 42 - writel_relaxed(irqstat, gic_cpu_base_addr + 43 - GIC_CPU_EOI); 44 - handle_local_timer(regs); 45 38 } 46 39 #endif 47 40 } while (1);
-3
arch/arm/plat-mxc/include/mach/entry-macro.S
··· 25 25 26 26 .macro test_for_ipi, irqnr, irqstat, base, tmp 27 27 .endm 28 - 29 - .macro test_for_ltirq, irqnr, irqstat, base, tmp 30 - .endm
+1
arch/arm/plat-mxc/tzic.c
··· 17 17 #include <linux/io.h> 18 18 19 19 #include <asm/mach/irq.h> 20 + #include <asm/exception.h> 20 21 21 22 #include <mach/hardware.h> 22 23 #include <mach/common.h>
+8
drivers/mmc/host/sdhci-esdhc-imx.c
··· 32 32 /* VENDOR SPEC register */ 33 33 #define SDHCI_VENDOR_SPEC 0xC0 34 34 #define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002 35 + #define SDHCI_WTMK_LVL 0x44 35 36 #define SDHCI_MIX_CTRL 0x48 36 37 37 38 /* ··· 476 475 477 476 if (is_imx53_esdhc(imx_data)) 478 477 imx_data->flags |= ESDHC_FLAG_MULTIBLK_NO_INT; 478 + 479 + /* 480 + * The imx6q ROM code will change the default watermark level setting 481 + * to something insane. Change it back here. 482 + */ 483 + if (is_imx6q_usdhc(imx_data)) 484 + writel(0x08100810, host->ioaddr + SDHCI_WTMK_LVL); 479 485 480 486 boarddata = &imx_data->boarddata; 481 487 if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
+3 -2
drivers/spi/spi-atmel.c
··· 907 907 908 908 /*-------------------------------------------------------------------------*/ 909 909 910 - static int __init atmel_spi_probe(struct platform_device *pdev) 910 + static int __devinit atmel_spi_probe(struct platform_device *pdev) 911 911 { 912 912 struct resource *regs; 913 913 int irq; ··· 1003 1003 return ret; 1004 1004 } 1005 1005 1006 - static int __exit atmel_spi_remove(struct platform_device *pdev) 1006 + static int __devexit atmel_spi_remove(struct platform_device *pdev) 1007 1007 { 1008 1008 struct spi_master *master = platform_get_drvdata(pdev); 1009 1009 struct atmel_spi *as = spi_master_get_devdata(master); ··· 1072 1072 }, 1073 1073 .suspend = atmel_spi_suspend, 1074 1074 .resume = atmel_spi_resume, 1075 + .probe = atmel_spi_probe, 1075 1076 .remove = __exit_p(atmel_spi_remove), 1076 1077 }; 1077 1078 module_platform_driver(atmel_spi_driver);