[POWERPC] QE: clean up ucc_slow.c and ucc_fast.c

+61 -102

arch/powerpc/sysdev/qe_lib/ucc_fast.c

··· 1 1 /* 2 - * arch/powerpc/sysdev/qe_lib/ucc_fast.c 3 - * 4 - * QE UCC Fast API Set - UCC Fast specific routines implementations. 5 - * 6 2 * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. 7 3 * 8 4 * Authors: Shlomi Gridish <gridish@freescale.com> 9 5 * Li Yang <leoli@freescale.com> 6 + * 7 + * Description: 8 + * QE UCC Fast API Set - UCC Fast specific routines implementations. 10 9 * 11 10 * This program is free software; you can redistribute it and/or modify it 12 11 * under the terms of the GNU General Public License as published by the ··· 26 27 #include <asm/ucc.h> 27 28 #include <asm/ucc_fast.h> 28 29 29 - #define uccf_printk(level, format, arg...) \ 30 - printk(level format "\n", ## arg) 31 - 32 - #define uccf_dbg(format, arg...) \ 33 - uccf_printk(KERN_DEBUG , format , ## arg) 34 - #define uccf_err(format, arg...) \ 35 - uccf_printk(KERN_ERR , format , ## arg) 36 - #define uccf_info(format, arg...) \ 37 - uccf_printk(KERN_INFO , format , ## arg) 38 - #define uccf_warn(format, arg...) \ 39 - uccf_printk(KERN_WARNING , format , ## arg) 40 - 41 - #ifdef UCCF_VERBOSE_DEBUG 42 - #define uccf_vdbg uccf_dbg 43 - #else 44 - #define uccf_vdbg(fmt, args...) do { } while (0) 45 - #endif /* UCCF_VERBOSE_DEBUG */ 46 - 47 30 void ucc_fast_dump_regs(struct ucc_fast_private * uccf) 48 31 { 49 - uccf_info("UCC%d Fast registers:", uccf->uf_info->ucc_num); 50 - uccf_info("Base address: 0x%08x", (u32) uccf->uf_regs); 32 + printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num); 33 + printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs); 51 34 52 - uccf_info("gumr : addr - 0x%08x, val - 0x%08x", 35 + printk(KERN_INFO "gumr : addr - 0x%08x, val - 0x%08x", 53 36 (u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr)); 54 - uccf_info("upsmr : addr - 0x%08x, val - 0x%08x", 37 + printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x", 55 38 (u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr)); 56 - uccf_info("utodr : addr - 0x%08x, val - 0x%04x", 39 + printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x", 57 40 (u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr)); 58 - uccf_info("udsr : addr - 0x%08x, val - 0x%04x", 41 + printk(KERN_INFO "udsr : addr - 0x%08x, val - 0x%04x", 59 42 (u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr)); 60 - uccf_info("ucce : addr - 0x%08x, val - 0x%08x", 43 + printk(KERN_INFO "ucce : addr - 0x%08x, val - 0x%08x", 61 44 (u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce)); 62 - uccf_info("uccm : addr - 0x%08x, val - 0x%08x", 45 + printk(KERN_INFO "uccm : addr - 0x%08x, val - 0x%08x", 63 46 (u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm)); 64 - uccf_info("uccs : addr - 0x%08x, val - 0x%02x", 47 + printk(KERN_INFO "uccs : addr - 0x%08x, val - 0x%02x", 65 48 (u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs); 66 - uccf_info("urfb : addr - 0x%08x, val - 0x%08x", 49 + printk(KERN_INFO "urfb : addr - 0x%08x, val - 0x%08x", 67 50 (u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb)); 68 - uccf_info("urfs : addr - 0x%08x, val - 0x%04x", 51 + printk(KERN_INFO "urfs : addr - 0x%08x, val - 0x%04x", 69 52 (u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs)); 70 - uccf_info("urfet : addr - 0x%08x, val - 0x%04x", 53 + printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x", 71 54 (u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet)); 72 - uccf_info("urfset: addr - 0x%08x, val - 0x%04x", 55 + printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x", 73 56 (u32) & uccf->uf_regs->urfset, 74 57 in_be16(&uccf->uf_regs->urfset)); 75 - uccf_info("utfb : addr - 0x%08x, val - 0x%08x", 58 + printk(KERN_INFO "utfb : addr - 0x%08x, val - 0x%08x", 76 59 (u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb)); 77 - uccf_info("utfs : addr - 0x%08x, val - 0x%04x", 60 + printk(KERN_INFO "utfs : addr - 0x%08x, val - 0x%04x", 78 61 (u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs)); 79 - uccf_info("utfet : addr - 0x%08x, val - 0x%04x", 62 + printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x", 80 63 (u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet)); 81 - uccf_info("utftt : addr - 0x%08x, val - 0x%04x", 64 + printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x", 82 65 (u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt)); 83 - uccf_info("utpt : addr - 0x%08x, val - 0x%04x", 66 + printk(KERN_INFO "utpt : addr - 0x%08x, val - 0x%04x", 84 67 (u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt)); 85 - uccf_info("urtry : addr - 0x%08x, val - 0x%08x", 68 + printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x", 86 69 (u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry)); 87 - uccf_info("guemr : addr - 0x%08x, val - 0x%02x", 70 + printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x", 88 71 (u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr); 89 72 } 90 73 91 74 u32 ucc_fast_get_qe_cr_subblock(int uccf_num) 92 75 { 93 76 switch (uccf_num) { 94 - case 0: return QE_CR_SUBBLOCK_UCCFAST1; 77 + case 0: return QE_CR_SUBBLOCK_UCCFAST1; 95 78 case 1: return QE_CR_SUBBLOCK_UCCFAST2; 96 79 case 2: return QE_CR_SUBBLOCK_UCCFAST3; 97 80 case 3: return QE_CR_SUBBLOCK_UCCFAST4; 98 81 case 4: return QE_CR_SUBBLOCK_UCCFAST5; 99 82 case 5: return QE_CR_SUBBLOCK_UCCFAST6; 100 83 case 6: return QE_CR_SUBBLOCK_UCCFAST7; 101 - case 7: return QE_CR_SUBBLOCK_UCCFAST8; 84 + case 7: return QE_CR_SUBBLOCK_UCCFAST8; 102 85 default: return QE_CR_SUBBLOCK_INVALID; 103 86 } 104 87 } ··· 134 153 { 135 154 struct ucc_fast_private *uccf; 136 155 struct ucc_fast *uf_regs; 137 - u32 gumr = 0; 156 + u32 gumr; 138 157 int ret; 139 - 140 - uccf_vdbg("%s: IN", __FUNCTION__); 141 158 142 159 if (!uf_info) 143 160 return -EINVAL; 144 161 145 162 /* check if the UCC port number is in range. */ 146 163 if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) { 147 - uccf_err("ucc_fast_init: Illegal UCC number!"); 164 + printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__); 148 165 return -EINVAL; 149 166 } 150 167 151 168 /* Check that 'max_rx_buf_length' is properly aligned (4). */ 152 169 if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) { 153 - uccf_err("ucc_fast_init: max_rx_buf_length not aligned."); 170 + printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__); 154 171 return -EINVAL; 155 172 } 156 173 157 174 /* Validate Virtual Fifo register values */ 158 175 if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) { 159 - uccf_err 160 - ("ucc_fast_init: Virtual Fifo register urfs too small."); 176 + printk(KERN_ERR "%s: urfs is too small", __FUNCTION__); 161 177 return -EINVAL; 162 178 } 163 179 164 180 if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 165 - uccf_err 166 - ("ucc_fast_init: Virtual Fifo register urfs not aligned."); 181 + printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__); 167 182 return -EINVAL; 168 183 } 169 184 170 185 if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 171 - uccf_err 172 - ("ucc_fast_init: Virtual Fifo register urfet not aligned."); 186 + printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__); 173 187 return -EINVAL; 174 188 } 175 189 176 190 if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 177 - uccf_err 178 - ("ucc_fast_init: Virtual Fifo register urfset not aligned."); 191 + printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__); 179 192 return -EINVAL; 180 193 } 181 194 182 195 if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 183 - uccf_err 184 - ("ucc_fast_init: Virtual Fifo register utfs not aligned."); 196 + printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__); 185 197 return -EINVAL; 186 198 } 187 199 188 200 if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 189 - uccf_err 190 - ("ucc_fast_init: Virtual Fifo register utfet not aligned."); 201 + printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__); 191 202 return -EINVAL; 192 203 } 193 204 194 205 if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) { 195 - uccf_err 196 - ("ucc_fast_init: Virtual Fifo register utftt not aligned."); 206 + printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__); 197 207 return -EINVAL; 198 208 } 199 209 200 210 uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL); 201 211 if (!uccf) { 202 - uccf_err 203 - ("ucc_fast_init: No memory for UCC slow data structure!"); 212 + printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__); 204 213 return -ENOMEM; 205 214 } 206 215 207 216 /* Fill fast UCC structure */ 208 217 uccf->uf_info = uf_info; 209 218 /* Set the PHY base address */ 210 - uccf->uf_regs = 211 - (struct ucc_fast *) ioremap(uf_info->regs, sizeof(struct ucc_fast)); 219 + uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast)); 212 220 if (uccf->uf_regs == NULL) { 213 - uccf_err 214 - ("ucc_fast_init: No memory map for UCC slow controller!"); 221 + printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__); 215 222 return -ENOMEM; 216 223 } 217 224 ··· 218 249 219 250 /* Init Guemr register */ 220 251 if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) { 221 - uccf_err("ucc_fast_init: Could not init the guemr register."); 252 + printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__); 222 253 ucc_fast_free(uccf); 223 254 return ret; 224 255 } ··· 227 258 if ((ret = ucc_set_type(uf_info->ucc_num, 228 259 (struct ucc_common *) (uf_regs), 229 260 UCC_SPEED_TYPE_FAST))) { 230 - uccf_err("ucc_fast_init: Could not set type to fast."); 261 + printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__); 231 262 ucc_fast_free(uccf); 232 263 return ret; 233 264 } ··· 236 267 237 268 /* Set GUMR */ 238 269 /* For more details see the hardware spec. */ 239 - /* gumr starts as zero. */ 270 + gumr = uf_info->ttx_trx; 240 271 if (uf_info->tci) 241 272 gumr |= UCC_FAST_GUMR_TCI; 242 - gumr |= uf_info->ttx_trx; 243 273 if (uf_info->cdp) 244 274 gumr |= UCC_FAST_GUMR_CDP; 245 275 if (uf_info->ctsp) ··· 266 298 uccf->ucc_fast_tx_virtual_fifo_base_offset = 267 299 qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); 268 300 if (IS_MURAM_ERR(uccf->ucc_fast_tx_virtual_fifo_base_offset)) { 269 - uccf_err 270 - ("ucc_fast_init: Can not allocate MURAM memory for " 271 - "struct ucc_fastx_virtual_fifo_base_offset."); 301 + printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__); 272 302 uccf->ucc_fast_tx_virtual_fifo_base_offset = 0; 273 303 ucc_fast_free(uccf); 274 304 return -ENOMEM; ··· 274 308 275 309 /* Allocate memory for Rx Virtual Fifo */ 276 310 uccf->ucc_fast_rx_virtual_fifo_base_offset = 277 - qe_muram_alloc(uf_info->urfs + 278 - (u32) 311 + qe_muram_alloc(uf_info->urfs + 279 312 UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR, 280 313 UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); 281 314 if (IS_MURAM_ERR(uccf->ucc_fast_rx_virtual_fifo_base_offset)) { 282 - uccf_err 283 - ("ucc_fast_init: Can not allocate MURAM memory for " 284 - "ucc_fast_rx_virtual_fifo_base_offset."); 315 + printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__); 285 316 uccf->ucc_fast_rx_virtual_fifo_base_offset = 0; 286 317 ucc_fast_free(uccf); 287 318 return -ENOMEM; ··· 305 342 /* If NMSI (not Tsa), set Tx and Rx clock. */ 306 343 if (!uf_info->tsa) { 307 344 /* Rx clock routing */ 308 - if (uf_info->rx_clock != QE_CLK_NONE) { 309 - if (ucc_set_qe_mux_rxtx 310 - (uf_info->ucc_num, uf_info->rx_clock, 311 - COMM_DIR_RX)) { 312 - uccf_err 313 - ("ucc_fast_init: Illegal value for parameter 'RxClock'."); 314 - ucc_fast_free(uccf); 315 - return -EINVAL; 316 - } 345 + if ((uf_info->rx_clock != QE_CLK_NONE) && 346 + ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock, 347 + COMM_DIR_RX)) { 348 + printk(KERN_ERR "%s: illegal value for RX clock", 349 + __FUNCTION__); 350 + ucc_fast_free(uccf); 351 + return -EINVAL; 317 352 } 318 353 /* Tx clock routing */ 319 - if (uf_info->tx_clock != QE_CLK_NONE) { 320 - if (ucc_set_qe_mux_rxtx 321 - (uf_info->ucc_num, uf_info->tx_clock, 322 - COMM_DIR_TX)) { 323 - uccf_err 324 - ("ucc_fast_init: Illegal value for parameter 'TxClock'."); 325 - ucc_fast_free(uccf); 326 - return -EINVAL; 327 - } 354 + if ((uf_info->tx_clock != QE_CLK_NONE) && 355 + ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock, 356 + COMM_DIR_TX)) { 357 + printk(KERN_ERR "%s: illegal value for TX clock", 358 + __FUNCTION__); 359 + ucc_fast_free(uccf); 360 + return -EINVAL; 328 361 } 329 362 } 330 363 ··· 329 370 330 371 /* First, clear anything pending at UCC level, 331 372 * otherwise, old garbage may come through 332 - * as soon as the dam is opened 333 - * Writing '1' clears 334 - */ 373 + * as soon as the dam is opened. */ 374 + 375 + /* Writing '1' clears */ 335 376 out_be32(&uf_regs->ucce, 0xffffffff); 336 377 337 378 *uccf_ret = uccf;

+53 -84

arch/powerpc/sysdev/qe_lib/ucc_slow.c

··· 19 19 #include <linux/stddef.h> 20 20 #include <linux/interrupt.h> 21 21 22 - #include <asm/irq.h> 23 22 #include <asm/io.h> 24 23 #include <asm/immap_qe.h> 25 24 #include <asm/qe.h> 26 25 27 26 #include <asm/ucc.h> 28 27 #include <asm/ucc_slow.h> 29 - 30 - #define uccs_printk(level, format, arg...) \ 31 - printk(level format "\n", ## arg) 32 - 33 - #define uccs_dbg(format, arg...) \ 34 - uccs_printk(KERN_DEBUG , format , ## arg) 35 - #define uccs_err(format, arg...) \ 36 - uccs_printk(KERN_ERR , format , ## arg) 37 - #define uccs_info(format, arg...) \ 38 - uccs_printk(KERN_INFO , format , ## arg) 39 - #define uccs_warn(format, arg...) \ 40 - uccs_printk(KERN_WARNING , format , ## arg) 41 - 42 - #ifdef UCCS_VERBOSE_DEBUG 43 - #define uccs_vdbg uccs_dbg 44 - #else 45 - #define uccs_vdbg(fmt, args...) do { } while (0) 46 - #endif /* UCCS_VERBOSE_DEBUG */ 47 28 48 29 u32 ucc_slow_get_qe_cr_subblock(int uccs_num) 49 30 { ··· 116 135 117 136 int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret) 118 137 { 138 + struct ucc_slow_private *uccs; 119 139 u32 i; 120 140 struct ucc_slow *us_regs; 121 141 u32 gumr; 122 - u8 function_code = 0; 123 - u8 *bd; 124 - struct ucc_slow_private *uccs; 142 + struct qe_bd *bd; 125 143 u32 id; 126 144 u32 command; 127 - int ret; 128 - 129 - uccs_vdbg("%s: IN", __FUNCTION__); 145 + int ret = 0; 130 146 131 147 if (!us_info) 132 148 return -EINVAL; 133 149 134 150 /* check if the UCC port number is in range. */ 135 151 if ((us_info->ucc_num < 0) || (us_info->ucc_num > UCC_MAX_NUM - 1)) { 136 - uccs_err("ucc_slow_init: Illegal UCC number!"); 152 + printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__); 137 153 return -EINVAL; 138 154 } 139 155 140 156 /* 141 157 * Set mrblr 142 158 * Check that 'max_rx_buf_length' is properly aligned (4), unless 143 - * rfw is 1, meaning that QE accepts one byte at a time, unlike normal 159 + * rfw is 1, meaning that QE accepts one byte at a time, unlike normal 144 160 * case when QE accepts 32 bits at a time. 145 161 */ 146 162 if ((!us_info->rfw) && 147 163 (us_info->max_rx_buf_length & (UCC_SLOW_MRBLR_ALIGNMENT - 1))) { 148 - uccs_err("max_rx_buf_length not aligned."); 164 + printk(KERN_ERR "max_rx_buf_length not aligned."); 149 165 return -EINVAL; 150 166 } 151 167 152 168 uccs = kzalloc(sizeof(struct ucc_slow_private), GFP_KERNEL); 153 169 if (!uccs) { 154 - uccs_err 155 - ("ucc_slow_init: No memory for UCC slow data structure!"); 170 + printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__); 156 171 return -ENOMEM; 157 172 } 158 173 159 174 /* Fill slow UCC structure */ 160 175 uccs->us_info = us_info; 176 + /* Set the PHY base address */ 177 + uccs->us_regs = ioremap(us_info->regs, sizeof(struct ucc_slow)); 178 + if (uccs->us_regs == NULL) { 179 + printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__); 180 + return -ENOMEM; 181 + } 182 + 161 183 uccs->saved_uccm = 0; 162 184 uccs->p_rx_frame = 0; 163 - uccs->us_regs = us_info->regs; 164 185 us_regs = uccs->us_regs; 165 186 uccs->p_ucce = (u16 *) & (us_regs->ucce); 166 187 uccs->p_uccm = (u16 *) & (us_regs->uccm); ··· 173 190 #endif /* STATISTICS */ 174 191 175 192 /* Get PRAM base */ 176 - uccs->us_pram_offset = qe_muram_alloc(UCC_SLOW_PRAM_SIZE, 177 - ALIGNMENT_OF_UCC_SLOW_PRAM); 193 + uccs->us_pram_offset = 194 + qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM); 178 195 if (IS_MURAM_ERR(uccs->us_pram_offset)) { 179 - uccs_err 180 - ("ucc_slow_init: Can not allocate MURAM memory " 181 - "for Slow UCC."); 196 + printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __FUNCTION__); 182 197 ucc_slow_free(uccs); 183 198 return -ENOMEM; 184 199 } 185 200 id = ucc_slow_get_qe_cr_subblock(us_info->ucc_num); 186 201 qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, id, QE_CR_PROTOCOL_UNSPECIFIED, 187 - (u32) uccs->us_pram_offset); 202 + uccs->us_pram_offset); 188 203 189 204 uccs->us_pram = qe_muram_addr(uccs->us_pram_offset); 190 205 191 206 /* Init Guemr register */ 192 207 if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) { 193 - uccs_err("ucc_slow_init: Could not init the guemr register."); 208 + printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__); 194 209 ucc_slow_free(uccs); 195 210 return ret; 196 211 } ··· 197 216 if ((ret = ucc_set_type(us_info->ucc_num, 198 217 (struct ucc_common *) (us_info->regs), 199 218 UCC_SPEED_TYPE_SLOW))) { 200 - uccs_err("ucc_slow_init: Could not init the guemr register."); 219 + printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__); 201 220 ucc_slow_free(uccs); 202 221 return ret; 203 222 } ··· 211 230 qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd), 212 231 QE_ALIGNMENT_OF_BD); 213 232 if (IS_MURAM_ERR(uccs->rx_base_offset)) { 214 - uccs_err("ucc_slow_init: No memory for Rx BD's."); 233 + printk(KERN_ERR "%s: cannot allocate RX BDs", __FUNCTION__); 215 234 uccs->rx_base_offset = 0; 216 235 ucc_slow_free(uccs); 217 236 return -ENOMEM; ··· 221 240 qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd), 222 241 QE_ALIGNMENT_OF_BD); 223 242 if (IS_MURAM_ERR(uccs->tx_base_offset)) { 224 - uccs_err("ucc_slow_init: No memory for Tx BD's."); 243 + printk(KERN_ERR "%s: cannot allocate TX BDs", __FUNCTION__); 225 244 uccs->tx_base_offset = 0; 226 245 ucc_slow_free(uccs); 227 246 return -ENOMEM; ··· 229 248 230 249 /* Init Tx bds */ 231 250 bd = uccs->confBd = uccs->tx_bd = qe_muram_addr(uccs->tx_base_offset); 232 - for (i = 0; i < us_info->tx_bd_ring_len; i++) { 251 + for (i = 0; i < us_info->tx_bd_ring_len - 1; i++) { 233 252 /* clear bd buffer */ 234 - out_be32(&(((struct qe_bd *)bd)->buf), 0); 253 + out_be32(&bd->buf, 0); 235 254 /* set bd status and length */ 236 - out_be32((u32*)bd, 0); 237 - bd += sizeof(struct qe_bd); 255 + out_be32((u32 *) bd, 0); 256 + bd++; 238 257 } 239 - bd -= sizeof(struct qe_bd); 240 - /* set bd status and length */ 241 - out_be32((u32*)bd, T_W); /* for last BD set Wrap bit */ 258 + /* for last BD set Wrap bit */ 259 + out_be32(&bd->buf, 0); 260 + out_be32((u32 *) bd, cpu_to_be32(T_W)); 242 261 243 262 /* Init Rx bds */ 244 263 bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset); 245 - for (i = 0; i < us_info->rx_bd_ring_len; i++) { 264 + for (i = 0; i < us_info->rx_bd_ring_len - 1; i++) { 246 265 /* set bd status and length */ 247 266 out_be32((u32*)bd, 0); 248 267 /* clear bd buffer */ 249 - out_be32(&(((struct qe_bd *)bd)->buf), 0); 250 - bd += sizeof(struct qe_bd); 268 + out_be32(&bd->buf, 0); 269 + bd++; 251 270 } 252 - bd -= sizeof(struct qe_bd); 253 - /* set bd status and length */ 254 - out_be32((u32*)bd, R_W); /* for last BD set Wrap bit */ 271 + /* for last BD set Wrap bit */ 272 + out_be32((u32*)bd, cpu_to_be32(R_W)); 273 + out_be32(&bd->buf, 0); 255 274 256 275 /* Set GUMR (For more details see the hardware spec.). */ 257 276 /* gumr_h */ 258 - gumr = 0; 259 - gumr |= us_info->tcrc; 277 + gumr = us_info->tcrc; 260 278 if (us_info->cdp) 261 279 gumr |= UCC_SLOW_GUMR_H_CDP; 262 280 if (us_info->ctsp) ··· 275 295 out_be32(&us_regs->gumr_h, gumr); 276 296 277 297 /* gumr_l */ 278 - gumr = 0; 298 + gumr = us_info->tdcr | us_info->rdcr | us_info->tenc | us_info->renc | 299 + us_info->diag | us_info->mode; 279 300 if (us_info->tci) 280 301 gumr |= UCC_SLOW_GUMR_L_TCI; 281 302 if (us_info->rinv) ··· 285 304 gumr |= UCC_SLOW_GUMR_L_TINV; 286 305 if (us_info->tend) 287 306 gumr |= UCC_SLOW_GUMR_L_TEND; 288 - gumr |= us_info->tdcr; 289 - gumr |= us_info->rdcr; 290 - gumr |= us_info->tenc; 291 - gumr |= us_info->renc; 292 - gumr |= us_info->diag; 293 - gumr |= us_info->mode; 294 307 out_be32(&us_regs->gumr_l, gumr); 295 308 296 309 /* Function code registers */ 297 - /* function_code has initial value 0 */ 298 310 299 311 /* if the data is in cachable memory, the 'global' */ 300 312 /* in the function code should be set. */ 301 - function_code |= us_info->data_mem_part; 302 - function_code |= QE_BMR_BYTE_ORDER_BO_MOT; /* Required for QE */ 303 - uccs->us_pram->tfcr = function_code; 304 - uccs->us_pram->rfcr = function_code; 313 + uccs->us_pram->tfcr = uccs->us_pram->rfcr = 314 + us_info->data_mem_part | QE_BMR_BYTE_ORDER_BO_MOT; 305 315 306 316 /* rbase, tbase are offsets from MURAM base */ 307 317 out_be16(&uccs->us_pram->rbase, uccs->us_pram_offset); ··· 308 336 /* If NMSI (not Tsa), set Tx and Rx clock. */ 309 337 if (!us_info->tsa) { 310 338 /* Rx clock routing */ 311 - if (ucc_set_qe_mux_rxtx 312 - (us_info->ucc_num, us_info->rx_clock, COMM_DIR_RX)) { 313 - uccs_err 314 - ("ucc_slow_init: Illegal value for parameter" 315 - " 'RxClock'."); 339 + if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->rx_clock, 340 + COMM_DIR_RX)) { 341 + printk(KERN_ERR "%s: illegal value for RX clock", 342 + __FUNCTION__); 316 343 ucc_slow_free(uccs); 317 344 return -EINVAL; 318 345 } 319 346 /* Tx clock routing */ 320 - if (ucc_set_qe_mux_rxtx(us_info->ucc_num, 321 - us_info->tx_clock, COMM_DIR_TX)) { 322 - uccs_err 323 - ("ucc_slow_init: Illegal value for parameter " 324 - "'TxClock'."); 347 + if (ucc_set_qe_mux_rxtx(us_info->ucc_num, us_info->tx_clock, 348 + COMM_DIR_TX)) { 349 + printk(KERN_ERR "%s: illegal value for TX clock", 350 + __FUNCTION__); 325 351 ucc_slow_free(uccs); 326 352 return -EINVAL; 327 353 } 328 354 } 329 355 330 - /* 331 - * INTERRUPTS 332 - */ 333 356 /* Set interrupt mask register at UCC level. */ 334 357 out_be16(&us_regs->uccm, us_info->uccm_mask); 335 358 336 - /* First, clear anything pending at UCC level, */ 337 - /* otherwise, old garbage may come through */ 338 - /* as soon as the dam is opened. */ 359 + /* First, clear anything pending at UCC level, 360 + * otherwise, old garbage may come through 361 + * as soon as the dam is opened. */ 339 362 340 363 /* Writing '1' clears */ 341 364 out_be16(&us_regs->ucce, 0xffff); ··· 367 400 368 401 kfree(uccs); 369 402 } 403 + 404 +

+4 -4

include/asm-powerpc/ucc_slow.h

··· 150 150 int ucc_num; 151 151 enum qe_clock rx_clock; 152 152 enum qe_clock tx_clock; 153 - struct ucc_slow *regs; 153 + u32 regs; 154 154 int irq; 155 155 u16 uccm_mask; 156 156 int data_mem_part; ··· 199 199 and length for first BD in a frame */ 200 200 u32 tx_base_offset; /* first BD in Tx BD table offset (In MURAM) */ 201 201 u32 rx_base_offset; /* first BD in Rx BD table offset (In MURAM) */ 202 - u8 *confBd; /* next BD for confirm after Tx */ 203 - u8 *tx_bd; /* next BD for new Tx request */ 204 - u8 *rx_bd; /* next BD to collect after Rx */ 202 + struct qe_bd *confBd; /* next BD for confirm after Tx */ 203 + struct qe_bd *tx_bd; /* next BD for new Tx request */ 204 + struct qe_bd *rx_bd; /* next BD to collect after Rx */ 205 205 void *p_rx_frame; /* accumulating receive frame */ 206 206 u16 *p_ucce; /* a pointer to the event register in memory. 207 207 */