Merge tag 'multi-platform-for-3.7' of git://sources.calxeda.com/kernel/linux into next/multiplatform

+81 -84

arch/arm/Kconfig

··· 202 202 this feature (eg, building a kernel for a single machine) and 203 203 you need to shrink the kernel to the minimal size. 204 204 205 + config NEED_MACH_GPIO_H 206 + bool 207 + help 208 + Select this when mach/gpio.h is required to provide special 209 + definitions for this platform. The need for mach/gpio.h should 210 + be avoided when possible. 211 + 205 212 config NEED_MACH_IO_H 206 213 bool 207 214 help ··· 254 247 # 255 248 choice 256 249 prompt "ARM system type" 257 - default ARCH_VERSATILE 250 + default ARCH_MULTIPLATFORM 258 251 259 - config ARCH_SOCFPGA 260 - bool "Altera SOCFPGA family" 261 - select ARCH_WANT_OPTIONAL_GPIOLIB 262 - select ARM_AMBA 263 - select ARM_GIC 264 - select CACHE_L2X0 265 - select CLKDEV_LOOKUP 252 + config ARCH_MULTIPLATFORM 253 + bool "Allow multiple platforms to be selected" 254 + select ARM_PATCH_PHYS_VIRT 255 + select AUTO_ZRELADDR 266 256 select COMMON_CLK 267 - select CPU_V7 268 - select DW_APB_TIMER 269 - select DW_APB_TIMER_OF 270 - select GENERIC_CLOCKEVENTS 271 - select GPIO_PL061 if GPIOLIB 272 - select HAVE_ARM_SCU 257 + select MULTI_IRQ_HANDLER 273 258 select SPARSE_IRQ 274 259 select USE_OF 275 - help 276 - This enables support for Altera SOCFPGA Cyclone V platform 260 + depends on MMU 277 261 278 262 config ARCH_INTEGRATOR 279 263 bool "ARM Ltd. Integrator family" ··· 316 318 help 317 319 This enables support for ARM Ltd Versatile board. 318 320 319 - config ARCH_VEXPRESS 320 - bool "ARM Ltd. Versatile Express family" 321 - select ARCH_WANT_OPTIONAL_GPIOLIB 322 - select ARM_AMBA 323 - select ARM_TIMER_SP804 324 - select CLKDEV_LOOKUP 325 - select COMMON_CLK 326 - select GENERIC_CLOCKEVENTS 327 - select HAVE_CLK 328 - select HAVE_PATA_PLATFORM 329 - select ICST 330 - select NO_IOPORT 331 - select PLAT_VERSATILE 332 - select PLAT_VERSATILE_CLCD 333 - select REGULATOR_FIXED_VOLTAGE if REGULATOR 334 - help 335 - This enables support for the ARM Ltd Versatile Express boards. 336 - 337 321 config ARCH_AT91 338 322 bool "Atmel AT91" 339 323 select ARCH_REQUIRE_GPIOLIB 340 324 select HAVE_CLK 341 325 select CLKDEV_LOOKUP 342 326 select IRQ_DOMAIN 327 + select NEED_MACH_GPIO_H 343 328 select NEED_MACH_IO_H if PCCARD 344 329 help 345 330 This enables support for systems based on Atmel ··· 356 375 select ARCH_WANT_OPTIONAL_GPIOLIB 357 376 help 358 377 Support for Broadcom's BCMRing platform. 359 - 360 - config ARCH_HIGHBANK 361 - bool "Calxeda Highbank-based" 362 - select ARCH_WANT_OPTIONAL_GPIOLIB 363 - select ARM_AMBA 364 - select ARM_GIC 365 - select ARM_TIMER_SP804 366 - select CACHE_L2X0 367 - select CLKDEV_LOOKUP 368 - select COMMON_CLK 369 - select CPU_V7 370 - select GENERIC_CLOCKEVENTS 371 - select HAVE_ARM_SCU 372 - select HAVE_SMP 373 - select SPARSE_IRQ 374 - select USE_OF 375 - help 376 - Support for the Calxeda Highbank SoC based boards. 377 378 378 379 config ARCH_CLPS711X 379 380 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" ··· 497 534 bool "IOP32x-based" 498 535 depends on MMU 499 536 select CPU_XSCALE 537 + select NEED_MACH_GPIO_H 538 + select NEED_MACH_IO_H 500 539 select NEED_RET_TO_USER 501 540 select PLAT_IOP 502 541 select PCI ··· 511 546 bool "IOP33x-based" 512 547 depends on MMU 513 548 select CPU_XSCALE 549 + select NEED_MACH_GPIO_H 550 + select NEED_MACH_IO_H 514 551 select NEED_RET_TO_USER 515 552 select PLAT_IOP 516 553 select PCI ··· 533 566 select DMABOUNCE if PCI 534 567 help 535 568 Support for Intel's IXP4XX (XScale) family of processors. 536 - 537 - config ARCH_MVEBU 538 - bool "Marvell SOCs with Device Tree support" 539 - select GENERIC_CLOCKEVENTS 540 - select MULTI_IRQ_HANDLER 541 - select SPARSE_IRQ 542 - select CLKSRC_MMIO 543 - select GENERIC_IRQ_CHIP 544 - select IRQ_DOMAIN 545 - select COMMON_CLK 546 - help 547 - Support for the Marvell SoC Family with device tree support 548 569 549 570 config ARCH_DOVE 550 571 bool "Marvell Dove" ··· 605 650 select PLAT_PXA 606 651 select SPARSE_IRQ 607 652 select GENERIC_ALLOCATOR 653 + select NEED_MACH_GPIO_H 608 654 help 609 655 Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. 610 656 ··· 652 696 This enables support for NVIDIA Tegra based systems (Tegra APX, 653 697 Tegra 6xx and Tegra 2 series). 654 698 655 - config ARCH_PICOXCELL 656 - bool "Picochip picoXcell" 657 - select ARCH_REQUIRE_GPIOLIB 658 - select ARM_PATCH_PHYS_VIRT 659 - select ARM_VIC 660 - select CPU_V6K 661 - select DW_APB_TIMER 662 - select DW_APB_TIMER_OF 663 - select GENERIC_CLOCKEVENTS 664 - select GENERIC_GPIO 665 - select HAVE_TCM 666 - select NO_IOPORT 667 - select SPARSE_IRQ 668 - select USE_OF 669 - help 670 - This enables support for systems based on the Picochip picoXcell 671 - family of Femtocell devices. The picoxcell support requires device tree 672 - for all boards. 673 - 674 699 config ARCH_PXA 675 700 bool "PXA2xx/PXA3xx-based" 676 701 depends on MMU ··· 668 731 select MULTI_IRQ_HANDLER 669 732 select ARM_CPU_SUSPEND if PM 670 733 select HAVE_IDE 734 + select NEED_MACH_GPIO_H 671 735 help 672 736 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 673 737 ··· 731 793 select CLKDEV_LOOKUP 732 794 select ARCH_REQUIRE_GPIOLIB 733 795 select HAVE_IDE 796 + select NEED_MACH_GPIO_H 734 797 select NEED_MACH_MEMORY_H 735 798 select SPARSE_IRQ 736 799 help ··· 747 808 select HAVE_S3C2410_I2C if I2C 748 809 select HAVE_S3C_RTC if RTC_CLASS 749 810 select HAVE_S3C2410_WATCHDOG if WATCHDOG 811 + select NEED_MACH_GPIO_H 750 812 select NEED_MACH_IO_H 751 813 help 752 814 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 ··· 775 835 select SAMSUNG_GPIOLIB_4BIT 776 836 select HAVE_S3C2410_I2C if I2C 777 837 select HAVE_S3C2410_WATCHDOG if WATCHDOG 838 + select NEED_MACH_GPIO_H 778 839 help 779 840 Samsung S3C64XX series based systems 780 841 ··· 790 849 select GENERIC_CLOCKEVENTS 791 850 select HAVE_S3C2410_I2C if I2C 792 851 select HAVE_S3C_RTC if RTC_CLASS 852 + select NEED_MACH_GPIO_H 793 853 help 794 854 Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440, 795 855 SMDK6450. ··· 805 863 select HAVE_S3C2410_I2C if I2C 806 864 select HAVE_S3C_RTC if RTC_CLASS 807 865 select HAVE_S3C2410_WATCHDOG if WATCHDOG 866 + select NEED_MACH_GPIO_H 808 867 help 809 868 Samsung S5PC100 series based systems 810 869 ··· 823 880 select HAVE_S3C2410_I2C if I2C 824 881 select HAVE_S3C_RTC if RTC_CLASS 825 882 select HAVE_S3C2410_WATCHDOG if WATCHDOG 883 + select NEED_MACH_GPIO_H 826 884 select NEED_MACH_MEMORY_H 827 885 help 828 886 Samsung S5PV210/S5PC110 series based systems ··· 841 897 select HAVE_S3C_RTC if RTC_CLASS 842 898 select HAVE_S3C2410_I2C if I2C 843 899 select HAVE_S3C2410_WATCHDOG if WATCHDOG 900 + select NEED_MACH_GPIO_H 844 901 select NEED_MACH_MEMORY_H 845 902 help 846 903 Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5) ··· 914 969 select GENERIC_ALLOCATOR 915 970 select GENERIC_IRQ_CHIP 916 971 select ARCH_HAS_HOLES_MEMORYMODEL 972 + select NEED_MACH_GPIO_H 917 973 help 918 974 Support for TI's DaVinci platform. 919 975 ··· 927 981 select CLKSRC_MMIO 928 982 select GENERIC_CLOCKEVENTS 929 983 select ARCH_HAS_HOLES_MEMORYMODEL 984 + select NEED_MACH_GPIO_H 930 985 help 931 986 Support for TI's OMAP platform (OMAP1/2/3/4). 932 987 ··· 967 1020 Support for Xilinx Zynq ARM Cortex A9 Platform 968 1021 endchoice 969 1022 1023 + menu "Multiple platform selection" 1024 + depends on ARCH_MULTIPLATFORM 1025 + 1026 + comment "CPU Core family selection" 1027 + 1028 + config ARCH_MULTI_V4 1029 + bool "ARMv4 based platforms (FA526, StrongARM)" 1030 + select ARCH_MULTI_V4_V5 1031 + depends on !ARCH_MULTI_V6_V7 1032 + 1033 + config ARCH_MULTI_V4T 1034 + bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" 1035 + select ARCH_MULTI_V4_V5 1036 + depends on !ARCH_MULTI_V6_V7 1037 + 1038 + config ARCH_MULTI_V5 1039 + bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)" 1040 + select ARCH_MULTI_V4_V5 1041 + depends on !ARCH_MULTI_V6_V7 1042 + 1043 + config ARCH_MULTI_V4_V5 1044 + bool 1045 + 1046 + config ARCH_MULTI_V6 1047 + bool "ARMv6 based platforms (ARM11, Scorpion, ...)" 1048 + select CPU_V6 1049 + select ARCH_MULTI_V6_V7 1050 + 1051 + config ARCH_MULTI_V7 1052 + bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)" 1053 + select CPU_V7 1054 + select ARCH_VEXPRESS 1055 + default y 1056 + select ARCH_MULTI_V6_V7 1057 + 1058 + config ARCH_MULTI_V6_V7 1059 + bool 1060 + 1061 + config ARCH_MULTI_CPU_AUTO 1062 + def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7) 1063 + select ARCH_MULTI_V5 1064 + 1065 + endmenu 1066 + 970 1067 # 971 1068 # This is sorted alphabetically by mach-* pathname. However, plat-* 972 1069 # Kconfigs may be included either alphabetically (according to the ··· 1037 1046 source "arch/arm/mach-gemini/Kconfig" 1038 1047 1039 1048 source "arch/arm/mach-h720x/Kconfig" 1049 + 1050 + source "arch/arm/mach-highbank/Kconfig" 1040 1051 1041 1052 source "arch/arm/mach-integrator/Kconfig" 1042 1053 ··· 1075 1082 1076 1083 source "arch/arm/mach-orion5x/Kconfig" 1077 1084 1085 + source "arch/arm/mach-picoxcell/Kconfig" 1086 + 1078 1087 source "arch/arm/mach-pxa/Kconfig" 1079 1088 source "arch/arm/plat-pxa/Kconfig" 1080 1089 ··· 1088 1093 1089 1094 source "arch/arm/plat-samsung/Kconfig" 1090 1095 source "arch/arm/plat-s3c24xx/Kconfig" 1096 + 1097 + source "arch/arm/mach-socfpga/Kconfig" 1091 1098 1092 1099 source "arch/arm/plat-spear/Kconfig" 1093 1100 ··· 2051 2054 2052 2055 config XIP_KERNEL 2053 2056 bool "Kernel Execute-In-Place from ROM" 2054 - depends on !ZBOOT_ROM && !ARM_LPAE 2057 + depends on !ZBOOT_ROM && !ARM_LPAE && !ARCH_MULTIPLATFORM 2055 2058 help 2056 2059 Execute-In-Place allows the kernel to run from non-volatile storage 2057 2060 directly addressable by the CPU, such as NOR flash. This saves RAM

+33

arch/arm/Kconfig.debug

··· 261 261 Say Y here if you want the debug print routines to direct 262 262 their output to the serial port on MSM 8960 devices. 263 263 264 + config DEBUG_MVEBU_UART 265 + bool "Kernel low-level debugging messages via MVEBU UART" 266 + depends on ARCH_MVEBU 267 + help 268 + Say Y here if you want kernel low-level debugging support 269 + on MVEBU based platforms. 270 + 271 + config DEBUG_PICOXCELL_UART 272 + depends on ARCH_PICOXCELL 273 + bool "Use PicoXcell UART for low-level debug" 274 + help 275 + Say Y here if you want kernel low-level debugging support 276 + on PicoXcell based platforms. 277 + 264 278 config DEBUG_REALVIEW_STD_PORT 265 279 bool "RealView Default UART" 266 280 depends on ARCH_REALVIEW ··· 324 310 The uncompressor code port configuration is now handled 325 311 by CONFIG_S3C_LOWLEVEL_UART_PORT. 326 312 313 + config DEBUG_SOCFPGA_UART 314 + depends on ARCH_SOCFPGA 315 + bool "Use SOCFPGA UART for low-level debug" 316 + help 317 + Say Y here if you want kernel low-level debugging support 318 + on SOCFPGA based platforms. 319 + 327 320 config DEBUG_VEXPRESS_UART0_DETECT 328 321 bool "Autodetect UART0 on Versatile Express Cortex-A core tiles" 329 322 depends on ARCH_VEXPRESS && CPU_CP15_MMU ··· 359 338 360 339 config DEBUG_LL_UART_NONE 361 340 bool "No low-level debugging UART" 341 + depends on !ARCH_MULTIPLATFORM 362 342 help 363 343 Say Y here if your platform doesn't provide a UART option 364 344 below. This relies on your platform choosing the right UART ··· 394 372 chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. 395 373 396 374 endchoice 375 + 376 + config DEBUG_LL_INCLUDE 377 + string 378 + default "debug/icedcc.S" if DEBUG_ICEDCC 379 + default "debug/highbank.S" if DEBUG_HIGHBANK_UART 380 + default "debug/mvebu.S" if DEBUG_MVEBU_UART 381 + default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART 382 + default "debug/socfpga.S" if DEBUG_SOCFPGA_UART 383 + default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \ 384 + DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1 385 + default "mach/debug-macro.S" 397 386 398 387 config EARLY_PRINTK 399 388 bool "Early printk"

+75 -75

arch/arm/Makefile

··· 135 135 136 136 # Machine directory name. This list is sorted alphanumerically 137 137 # by CONFIG_* macro name. 138 - machine-$(CONFIG_ARCH_AT91) := at91 139 - machine-$(CONFIG_ARCH_BCM2835) := bcm2835 140 - machine-$(CONFIG_ARCH_BCMRING) := bcmring 141 - machine-$(CONFIG_ARCH_CLPS711X) := clps711x 142 - machine-$(CONFIG_ARCH_CNS3XXX) := cns3xxx 143 - machine-$(CONFIG_ARCH_DAVINCI) := davinci 144 - machine-$(CONFIG_ARCH_DOVE) := dove 145 - machine-$(CONFIG_ARCH_EBSA110) := ebsa110 146 - machine-$(CONFIG_ARCH_EP93XX) := ep93xx 147 - machine-$(CONFIG_ARCH_GEMINI) := gemini 148 - machine-$(CONFIG_ARCH_H720X) := h720x 149 - machine-$(CONFIG_ARCH_HIGHBANK) := highbank 150 - machine-$(CONFIG_ARCH_INTEGRATOR) := integrator 151 - machine-$(CONFIG_ARCH_IOP13XX) := iop13xx 152 - machine-$(CONFIG_ARCH_IOP32X) := iop32x 153 - machine-$(CONFIG_ARCH_IOP33X) := iop33x 154 - machine-$(CONFIG_ARCH_IXP4XX) := ixp4xx 155 - machine-$(CONFIG_ARCH_KIRKWOOD) := kirkwood 156 - machine-$(CONFIG_ARCH_KS8695) := ks8695 157 - machine-$(CONFIG_ARCH_LPC32XX) := lpc32xx 158 - machine-$(CONFIG_ARCH_MMP) := mmp 159 - machine-$(CONFIG_ARCH_MSM) := msm 160 - machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 161 - machine-$(CONFIG_ARCH_IMX_V4_V5) := imx 162 - machine-$(CONFIG_ARCH_IMX_V6_V7) := imx 163 - machine-$(CONFIG_ARCH_MXS) := mxs 164 - machine-$(CONFIG_ARCH_MVEBU) := mvebu 165 - machine-$(CONFIG_ARCH_NETX) := netx 166 - machine-$(CONFIG_ARCH_NOMADIK) := nomadik 167 - machine-$(CONFIG_ARCH_OMAP1) := omap1 168 - machine-$(CONFIG_ARCH_OMAP2PLUS) := omap2 169 - machine-$(CONFIG_ARCH_ORION5X) := orion5x 170 - machine-$(CONFIG_ARCH_PICOXCELL) := picoxcell 171 - machine-$(CONFIG_ARCH_PRIMA2) := prima2 172 - machine-$(CONFIG_ARCH_PXA) := pxa 173 - machine-$(CONFIG_ARCH_REALVIEW) := realview 174 - machine-$(CONFIG_ARCH_RPC) := rpc 175 - machine-$(CONFIG_ARCH_S3C24XX) := s3c24xx s3c2412 s3c2440 176 - machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx 177 - machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0 178 - machine-$(CONFIG_ARCH_S5PC100) := s5pc100 179 - machine-$(CONFIG_ARCH_S5PV210) := s5pv210 180 - machine-$(CONFIG_ARCH_EXYNOS4) := exynos 181 - machine-$(CONFIG_ARCH_EXYNOS5) := exynos 182 - machine-$(CONFIG_ARCH_SA1100) := sa1100 183 - machine-$(CONFIG_ARCH_SHARK) := shark 184 - machine-$(CONFIG_ARCH_SHMOBILE) := shmobile 185 - machine-$(CONFIG_ARCH_TEGRA) := tegra 186 - machine-$(CONFIG_ARCH_U300) := u300 187 - machine-$(CONFIG_ARCH_U8500) := ux500 188 - machine-$(CONFIG_ARCH_VERSATILE) := versatile 189 - machine-$(CONFIG_ARCH_VEXPRESS) := vexpress 190 - machine-$(CONFIG_ARCH_VT8500) := vt8500 191 - machine-$(CONFIG_ARCH_W90X900) := w90x900 192 - machine-$(CONFIG_FOOTBRIDGE) := footbridge 193 - machine-$(CONFIG_ARCH_SOCFPGA) := socfpga 194 - machine-$(CONFIG_MACH_SPEAR1310) := spear13xx 195 - machine-$(CONFIG_MACH_SPEAR1340) := spear13xx 196 - machine-$(CONFIG_MACH_SPEAR300) := spear3xx 197 - machine-$(CONFIG_MACH_SPEAR310) := spear3xx 198 - machine-$(CONFIG_MACH_SPEAR320) := spear3xx 199 - machine-$(CONFIG_MACH_SPEAR600) := spear6xx 200 - machine-$(CONFIG_ARCH_ZYNQ) := zynq 138 + machine-$(CONFIG_ARCH_AT91) += at91 139 + machine-$(CONFIG_ARCH_BCM2835) += bcm2835 140 + machine-$(CONFIG_ARCH_BCMRING) += bcmring 141 + machine-$(CONFIG_ARCH_CLPS711X) += clps711x 142 + machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx 143 + machine-$(CONFIG_ARCH_DAVINCI) += davinci 144 + machine-$(CONFIG_ARCH_DOVE) += dove 145 + machine-$(CONFIG_ARCH_EBSA110) += ebsa110 146 + machine-$(CONFIG_ARCH_EP93XX) += ep93xx 147 + machine-$(CONFIG_ARCH_GEMINI) += gemini 148 + machine-$(CONFIG_ARCH_H720X) += h720x 149 + machine-$(CONFIG_ARCH_HIGHBANK) += highbank 150 + machine-$(CONFIG_ARCH_INTEGRATOR) += integrator 151 + machine-$(CONFIG_ARCH_IOP13XX) += iop13xx 152 + machine-$(CONFIG_ARCH_IOP32X) += iop32x 153 + machine-$(CONFIG_ARCH_IOP33X) += iop33x 154 + machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx 155 + machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood 156 + machine-$(CONFIG_ARCH_KS8695) += ks8695 157 + machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx 158 + machine-$(CONFIG_ARCH_MMP) += mmp 159 + machine-$(CONFIG_ARCH_MSM) += msm 160 + machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0 161 + machine-$(CONFIG_ARCH_MXC) += imx 162 + machine-$(CONFIG_ARCH_MXS) += mxs 163 + machine-$(CONFIG_ARCH_MVEBU) += mvebu 164 + machine-$(CONFIG_ARCH_NETX) += netx 165 + machine-$(CONFIG_ARCH_NOMADIK) += nomadik 166 + machine-$(CONFIG_ARCH_OMAP1) += omap1 167 + machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 168 + machine-$(CONFIG_ARCH_ORION5X) += orion5x 169 + machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell 170 + machine-$(CONFIG_ARCH_PRIMA2) += prima2 171 + machine-$(CONFIG_ARCH_PXA) += pxa 172 + machine-$(CONFIG_ARCH_REALVIEW) += realview 173 + machine-$(CONFIG_ARCH_RPC) += rpc 174 + machine-$(CONFIG_ARCH_S3C24XX) += s3c24xx s3c2412 s3c2440 175 + machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx 176 + machine-$(CONFIG_ARCH_S5P64X0) += s5p64x0 177 + machine-$(CONFIG_ARCH_S5PC100) += s5pc100 178 + machine-$(CONFIG_ARCH_S5PV210) += s5pv210 179 + machine-$(CONFIG_ARCH_EXYNOS) += exynos 180 + machine-$(CONFIG_ARCH_SA1100) += sa1100 181 + machine-$(CONFIG_ARCH_SHARK) += shark 182 + machine-$(CONFIG_ARCH_SHMOBILE) += shmobile 183 + machine-$(CONFIG_ARCH_TEGRA) += tegra 184 + machine-$(CONFIG_ARCH_U300) += u300 185 + machine-$(CONFIG_ARCH_U8500) += ux500 186 + machine-$(CONFIG_ARCH_VERSATILE) += versatile 187 + machine-$(CONFIG_ARCH_VEXPRESS) += vexpress 188 + machine-$(CONFIG_ARCH_VT8500) += vt8500 189 + machine-$(CONFIG_ARCH_W90X900) += w90x900 190 + machine-$(CONFIG_FOOTBRIDGE) += footbridge 191 + machine-$(CONFIG_ARCH_SOCFPGA) += socfpga 192 + machine-$(CONFIG_ARCH_SPEAR13XX) += spear13xx 193 + machine-$(CONFIG_ARCH_SPEAR3XX) += spear3xx 194 + machine-$(CONFIG_MACH_SPEAR600) += spear6xx 195 + machine-$(CONFIG_ARCH_ZYNQ) += zynq 201 196 202 197 # Platform directory name. This list is sorted alphanumerically 203 198 # by CONFIG_* macro name. 204 - plat-$(CONFIG_ARCH_MXC) := mxc 205 - plat-$(CONFIG_ARCH_OMAP) := omap 206 - plat-$(CONFIG_ARCH_S3C64XX) := samsung 207 - plat-$(CONFIG_ARCH_ZYNQ) := versatile 208 - plat-$(CONFIG_PLAT_IOP) := iop 209 - plat-$(CONFIG_PLAT_NOMADIK) := nomadik 210 - plat-$(CONFIG_PLAT_ORION) := orion 211 - plat-$(CONFIG_PLAT_PXA) := pxa 212 - plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung 213 - plat-$(CONFIG_PLAT_S5P) := samsung 214 - plat-$(CONFIG_PLAT_SPEAR) := spear 215 - plat-$(CONFIG_PLAT_VERSATILE) := versatile 199 + plat-$(CONFIG_ARCH_MXC) += mxc 200 + plat-$(CONFIG_ARCH_OMAP) += omap 201 + plat-$(CONFIG_ARCH_S3C64XX) += samsung 202 + plat-$(CONFIG_ARCH_ZYNQ) += versatile 203 + plat-$(CONFIG_PLAT_IOP) += iop 204 + plat-$(CONFIG_PLAT_NOMADIK) += nomadik 205 + plat-$(CONFIG_PLAT_ORION) += orion 206 + plat-$(CONFIG_PLAT_PXA) += pxa 207 + plat-$(CONFIG_PLAT_S3C24XX) += s3c24xx samsung 208 + plat-$(CONFIG_PLAT_S5P) += samsung 209 + plat-$(CONFIG_PLAT_SPEAR) += spear 210 + plat-$(CONFIG_PLAT_VERSATILE) += versatile 216 211 217 212 ifeq ($(CONFIG_ARCH_EBSA110),y) 218 213 # This is what happens if you forget the IOCS16 line. ··· 225 230 else 226 231 MACHINE := 227 232 endif 233 + ifeq ($(CONFIG_ARCH_MULTIPLATFORM),y) 234 + MACHINE := 235 + endif 228 236 229 237 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) 230 238 platdirs := $(patsubst %,arch/arm/plat-%/,$(plat-y)) 231 239 240 + ifneq ($(CONFIG_ARCH_MULTIPLATFORM),y) 232 241 ifeq ($(KBUILD_SRC),) 233 242 KBUILD_CPPFLAGS += $(patsubst %,-I%include,$(machdirs) $(platdirs)) 234 243 else 235 244 KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(machdirs) $(platdirs)) 245 + endif 236 246 endif 237 247 238 248 export TEXT_OFFSET GZFLAGS MMUEXT

+2

arch/arm/boot/Makefile

··· 15 15 include $(srctree)/$(MACHINE)/Makefile.boot 16 16 endif 17 17 18 + include $(srctree)/arch/arm/boot/dts/Makefile 19 + 18 20 # Note: the following conditions must always be true: 19 21 # ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET) 20 22 # PARAMS_PHYS must be within 4MB of ZRELADDR

+6

arch/arm/boot/compressed/misc.c

··· 25 25 static void putstr(const char *ptr); 26 26 extern void error(char *x); 27 27 28 + #ifdef CONFIG_ARCH_MULTIPLATFORM 29 + static inline void putc(int c) {} 30 + static inline void flush(void) {} 31 + static inline void arch_decomp_setup(void) {} 32 + #else 28 33 #include <mach/uncompress.h> 34 + #endif 29 35 30 36 #ifdef CONFIG_DEBUG_ICEDCC 31 37

+84

arch/arm/boot/dts/Makefile

··· 1 + ifeq ($(CONFIG_OF),y) 2 + 3 + dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \ 4 + at91sam9263ek.dtb \ 5 + at91sam9g20ek_2mmc.dtb \ 6 + at91sam9g20ek.dtb \ 7 + at91sam9g25ek.dtb \ 8 + at91sam9m10g45ek.dtb \ 9 + at91sam9n12ek.dtb \ 10 + ethernut5.dtb \ 11 + evk-pro3.dtb \ 12 + kizbox.dtb \ 13 + tny_a9260.dtb \ 14 + tny_a9263.dtb \ 15 + tny_a9g20.dtb \ 16 + usb_a9260.dtb \ 17 + usb_a9263.dtb \ 18 + usb_a9g20.dtb 19 + dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ 20 + exynos4210-smdkv310.dtb \ 21 + exynos5250-smdk5250.dtb 22 + dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb 23 + dtb-$(CONFIG_ARCH_IMX5) += imx51-babbage.dtb \ 24 + imx53-ard.dtb \ 25 + imx53-evk.dtb \ 26 + imx53-qsb.dtb \ 27 + imx53-smd.dtb 28 + dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \ 29 + imx6q-sabrelite.dtb \ 30 + imx6q-sabresd.dtb 31 + dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb 32 + dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \ 33 + kirkwood-dns325.dtb \ 34 + kirkwood-dreamplug.dtb \ 35 + kirkwood-goflexnet.dtb \ 36 + kirkwood-ib62x0.dtb \ 37 + kirkwood-iconnect.dtb \ 38 + kirkwood-lschlv2.dtb \ 39 + kirkwood-lsxhl.dtb \ 40 + kirkwood-ts219-6281.dtb \ 41 + kirkwood-ts219-6282.dtb 42 + dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ 43 + armada-xp-db.dtb 44 + dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \ 45 + imx53-ard.dtb \ 46 + imx53-evk.dtb \ 47 + imx53-qsb.dtb \ 48 + imx53-smd.dtb \ 49 + imx6q-arm2.dtb \ 50 + imx6q-sabrelite.dtb \ 51 + imx6q-sabresd.dtb 52 + dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ 53 + imx23-olinuxino.dtb \ 54 + imx23-stmp378x_devb.dtb \ 55 + imx28-apx4devkit.dtb \ 56 + imx28-cfa10036.dtb \ 57 + imx28-cfa10049.dtb \ 58 + imx28-evk.dtb \ 59 + imx28-m28evk.dtb \ 60 + imx28-tx28.dtb 61 + dtb-$(CONFIG_ARCH_U8500) += snowball.dtb 62 + dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ 63 + spear1340-evb.dtb 64 + dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ 65 + spear310-evb.dtb \ 66 + spear320-evb.dtb 67 + dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb 68 + dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ 69 + tegra20-medcom-wide.dtb \ 70 + tegra20-paz00.dtb \ 71 + tegra20-plutux.dtb \ 72 + tegra20-seaboard.dtb \ 73 + tegra20-tec.dtb \ 74 + tegra20-trimslice.dtb \ 75 + tegra20-ventana.dtb \ 76 + tegra20-whistler.dtb \ 77 + tegra30-cardhu-a02.dtb \ 78 + tegra30-cardhu-a04.dtb 79 + dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ 80 + vexpress-v2p-ca9.dtb \ 81 + vexpress-v2p-ca15-tc1.dtb \ 82 + vexpress-v2p-ca15_a7.dtb 83 + 84 + endif

+2

arch/arm/include/asm/gpio.h

··· 6 6 #endif 7 7 8 8 /* not all ARM platforms necessarily support this API ... */ 9 + #ifdef CONFIG_NEED_MACH_GPIO_H 9 10 #include <mach/gpio.h> 11 + #endif 10 12 11 13 #ifndef __ARM_GPIOLIB_COMPLEX 12 14 /* Note: this may rely upon the value of ARCH_NR_GPIOS set in mach/gpio.h */

+4

arch/arm/include/asm/timex.h

··· 13 13 #define _ASMARM_TIMEX_H 14 14 15 15 #include <asm/arch_timer.h> 16 + #ifdef CONFIG_ARCH_MULTIPLATFORM 17 + #define CLOCK_TICK_RATE 1000000 18 + #else 16 19 #include <mach/timex.h> 20 + #endif 17 21 18 22 typedef unsigned long cycles_t; 19 23

+90

arch/arm/include/debug/icedcc.S

··· 1 + /* 2 + * arch/arm/include/debug/icedcc.S 3 + * 4 + * Copyright (C) 1994-1999 Russell King 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + * 10 + */ 11 + 12 + @@ debug using ARM EmbeddedICE DCC channel 13 + 14 + .macro addruart, rp, rv, tmp 15 + .endm 16 + 17 + #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) 18 + 19 + .macro senduart, rd, rx 20 + mcr p14, 0, \rd, c0, c5, 0 21 + .endm 22 + 23 + .macro busyuart, rd, rx 24 + 1001: 25 + mrc p14, 0, \rx, c0, c1, 0 26 + tst \rx, #0x20000000 27 + beq 1001b 28 + .endm 29 + 30 + .macro waituart, rd, rx 31 + mov \rd, #0x2000000 32 + 1001: 33 + subs \rd, \rd, #1 34 + bmi 1002f 35 + mrc p14, 0, \rx, c0, c1, 0 36 + tst \rx, #0x20000000 37 + bne 1001b 38 + 1002: 39 + .endm 40 + 41 + #elif defined(CONFIG_CPU_XSCALE) 42 + 43 + .macro senduart, rd, rx 44 + mcr p14, 0, \rd, c8, c0, 0 45 + .endm 46 + 47 + .macro busyuart, rd, rx 48 + 1001: 49 + mrc p14, 0, \rx, c14, c0, 0 50 + tst \rx, #0x10000000 51 + beq 1001b 52 + .endm 53 + 54 + .macro waituart, rd, rx 55 + mov \rd, #0x10000000 56 + 1001: 57 + subs \rd, \rd, #1 58 + bmi 1002f 59 + mrc p14, 0, \rx, c14, c0, 0 60 + tst \rx, #0x10000000 61 + bne 1001b 62 + 1002: 63 + .endm 64 + 65 + #else 66 + 67 + .macro senduart, rd, rx 68 + mcr p14, 0, \rd, c1, c0, 0 69 + .endm 70 + 71 + .macro busyuart, rd, rx 72 + 1001: 73 + mrc p14, 0, \rx, c0, c0, 0 74 + tst \rx, #2 75 + beq 1001b 76 + 77 + .endm 78 + 79 + .macro waituart, rd, rx 80 + mov \rd, #0x2000000 81 + 1001: 82 + subs \rd, \rd, #1 83 + bmi 1002f 84 + mrc p14, 0, \rx, c0, c0, 0 85 + tst \rx, #2 86 + bne 1001b 87 + 1002: 88 + .endm 89 + 90 + #endif /* CONFIG_CPU_V6 */

+3 -84

arch/arm/kernel/debug.S

··· 20 20 * references to these in a production kernel! 21 21 */ 22 22 23 - #if defined(CONFIG_DEBUG_ICEDCC) 24 - @@ debug using ARM EmbeddedICE DCC channel 25 - 26 - .macro addruart, rp, rv, tmp 27 - .endm 28 - 29 - #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) 30 - 31 - .macro senduart, rd, rx 32 - mcr p14, 0, \rd, c0, c5, 0 33 - .endm 34 - 35 - .macro busyuart, rd, rx 36 - 1001: 37 - mrc p14, 0, \rx, c0, c1, 0 38 - tst \rx, #0x20000000 39 - beq 1001b 40 - .endm 41 - 42 - .macro waituart, rd, rx 43 - mov \rd, #0x2000000 44 - 1001: 45 - subs \rd, \rd, #1 46 - bmi 1002f 47 - mrc p14, 0, \rx, c0, c1, 0 48 - tst \rx, #0x20000000 49 - bne 1001b 50 - 1002: 51 - .endm 52 - 53 - #elif defined(CONFIG_CPU_XSCALE) 54 - 55 - .macro senduart, rd, rx 56 - mcr p14, 0, \rd, c8, c0, 0 57 - .endm 58 - 59 - .macro busyuart, rd, rx 60 - 1001: 61 - mrc p14, 0, \rx, c14, c0, 0 62 - tst \rx, #0x10000000 63 - beq 1001b 64 - .endm 65 - 66 - .macro waituart, rd, rx 67 - mov \rd, #0x10000000 68 - 1001: 69 - subs \rd, \rd, #1 70 - bmi 1002f 71 - mrc p14, 0, \rx, c14, c0, 0 72 - tst \rx, #0x10000000 73 - bne 1001b 74 - 1002: 75 - .endm 76 - 77 - #else 78 - 79 - .macro senduart, rd, rx 80 - mcr p14, 0, \rd, c1, c0, 0 81 - .endm 82 - 83 - .macro busyuart, rd, rx 84 - 1001: 85 - mrc p14, 0, \rx, c0, c0, 0 86 - tst \rx, #2 87 - beq 1001b 88 - 89 - .endm 90 - 91 - .macro waituart, rd, rx 92 - mov \rd, #0x2000000 93 - 1001: 94 - subs \rd, \rd, #1 95 - bmi 1002f 96 - mrc p14, 0, \rx, c0, c0, 0 97 - tst \rx, #2 98 - bne 1001b 99 - 1002: 100 - .endm 101 - 102 - #endif /* CONFIG_CPU_V6 */ 103 - 104 - #elif !defined(CONFIG_DEBUG_SEMIHOSTING) 105 - #include <mach/debug-macro.S> 106 - #endif /* CONFIG_DEBUG_ICEDCC */ 23 + #if !defined(CONFIG_DEBUG_SEMIHOSTING) 24 + #include CONFIG_DEBUG_LL_INCLUDE 25 + #endif 107 26 108 27 #ifdef CONFIG_MMU 109 28 .macro addruart_current, rx, tmp1, tmp2

+2 -2

arch/arm/kernel/head.S

··· 23 23 #include <asm/thread_info.h> 24 24 #include <asm/pgtable.h> 25 25 26 - #ifdef CONFIG_DEBUG_LL 27 - #include <mach/debug-macro.S> 26 + #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_SEMIHOSTING) 27 + #include CONFIG_DEBUG_LL_INCLUDE 28 28 #endif 29 29 30 30 /*

-24

arch/arm/mach-at91/Makefile.boot

··· 12 12 params_phys-y := 0x20000100 13 13 initrd_phys-y := 0x20410000 14 14 endif 15 - 16 - # Keep dtb files sorted alphabetically for each SoC 17 - # sam9260 18 - dtb-$(CONFIG_MACH_AT91SAM_DT) += aks-cdu.dtb 19 - dtb-$(CONFIG_MACH_AT91SAM_DT) += ethernut5.dtb 20 - dtb-$(CONFIG_MACH_AT91SAM_DT) += evk-pro3.dtb 21 - dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9260.dtb 22 - dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9260.dtb 23 - # sam9263 24 - dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9263ek.dtb 25 - dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9263.dtb 26 - dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9263.dtb 27 - # sam9g20 28 - dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek.dtb 29 - dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek_2mmc.dtb 30 - dtb-$(CONFIG_MACH_AT91SAM_DT) += kizbox.dtb 31 - dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9g20.dtb 32 - dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9g20.dtb 33 - # sam9g45 34 - dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb 35 - # sam9n12 36 - dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9n12ek.dtb 37 - # sam9x5 38 - dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g25ek.dtb

-9

arch/arm/mach-dove/include/mach/gpio.h

··· 1 - /* 2 - * arch/arm/mach-dove/include/mach/gpio.h 3 - * 4 - * This file is licensed under the terms of the GNU General Public 5 - * License version 2. This program is licensed "as is" without any 6 - * warranty of any kind, whether express or implied. 7 - */ 8 - 9 - #include <plat/gpio.h>

+1

arch/arm/mach-dove/irq.c

··· 18 18 #include <asm/mach/irq.h> 19 19 #include <mach/pm.h> 20 20 #include <mach/bridge-regs.h> 21 + #include <plat/orion-gpio.h> 21 22 #include "common.h" 22 23 23 24 static void pmu_irq_mask(struct irq_data *d)

+1

arch/arm/mach-dove/mpp.c

··· 13 13 #include <linux/io.h> 14 14 #include <plat/mpp.h> 15 15 #include <mach/dove.h> 16 + #include <plat/orion-gpio.h> 16 17 #include "mpp.h" 17 18 18 19 struct dove_mpp_grp {

-1

arch/arm/mach-ep93xx/include/mach/gpio.h

··· 1 - /* empty */

-3

arch/arm/mach-exynos/Makefile.boot

··· 1 1 zreladdr-y += 0x40008000 2 2 params_phys-y := 0x40000100 3 - 4 - dtb-$(CONFIG_MACH_EXYNOS4_DT) += exynos4210-origen.dtb exynos4210-smdkv310.dtb 5 - dtb-$(CONFIG_MACH_EXYNOS5_DT) += exynos5250-smdk5250.dtb

+15

arch/arm/mach-highbank/Kconfig

··· 1 + config ARCH_HIGHBANK 2 + bool "Calxeda ECX-1000 (Highbank)" if ARCH_MULTI_V7 3 + select ARCH_WANT_OPTIONAL_GPIOLIB 4 + select ARM_AMBA 5 + select ARM_GIC 6 + select ARM_TIMER_SP804 7 + select CACHE_L2X0 8 + select CLKDEV_LOOKUP 9 + select COMMON_CLK 10 + select CPU_V7 11 + select GENERIC_CLOCKEVENTS 12 + select HAVE_ARM_SCU 13 + select HAVE_SMP 14 + select SPARSE_IRQ 15 + select USE_OF

-1

arch/arm/mach-highbank/Makefile.boot

··· 1 - zreladdr-y := 0x00008000

+2 -4

arch/arm/mach-highbank/include/mach/debug-macro.S arch/arm/include/debug/highbank.S

··· 10 10 */ 11 11 12 12 .macro addruart,rp,rv,tmp 13 - movw \rv, #0x6000 14 - movt \rv, #0xfee3 15 - movw \rp, #0x6000 16 - movt \rp, #0xfff3 13 + ldr \rv, =0xfee36000 14 + ldr \rp, =0xfff36000 17 15 .endm 18 16 19 17 #include <asm/hardware/debug-pl01x.S>

-1

arch/arm/mach-highbank/include/mach/gpio.h

··· 1 - /* empty */

-6

arch/arm/mach-highbank/include/mach/timex.h

··· 1 - #ifndef __MACH_TIMEX_H 2 - #define __MACH_TIMEX_H 3 - 4 - #define CLOCK_TICK_RATE 1000000 5 - 6 - #endif

-9

arch/arm/mach-highbank/include/mach/uncompress.h

··· 1 - #ifndef __MACH_UNCOMPRESS_H 2 - #define __MACH_UNCOMPRESS_H 3 - 4 - #define putc(c) 5 - #define flush() 6 - #define arch_decomp_setup() 7 - #define arch_decomp_wdog() 8 - 9 - #endif

-11

arch/arm/mach-imx/Makefile.boot

··· 37 37 zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 38 38 params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 39 39 initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 40 - 41 - dtb-$(CONFIG_MACH_IMX51_DT) += imx51-babbage.dtb 42 - 43 - dtb-$(CONFIG_SOC_IMX53) += imx53-ard.dtb \ 44 - imx53-evk.dtb \ 45 - imx53-qsb.dtb \ 46 - imx53-smd.dtb \ 47 - 48 - dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \ 49 - imx6q-sabrelite.dtb \ 50 - imx6q-sabresd.dtb \

-2

arch/arm/mach-ixp4xx/include/mach/gpio.h

··· 1 - /* empty */ 2 -

-11

arch/arm/mach-kirkwood/Makefile.boot

··· 1 1 zreladdr-y += 0x00008000 2 2 params_phys-y := 0x00000100 3 3 initrd_phys-y := 0x00800000 4 - 5 - dtb-$(CONFIG_MACH_DREAMPLUG_DT) += kirkwood-dreamplug.dtb 6 - dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb 7 - dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb 8 - dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb 9 - dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb 10 - dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6281.dtb 11 - dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6282.dtb 12 - dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb 13 - dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb 14 - dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb

-9

arch/arm/mach-kirkwood/include/mach/gpio.h

··· 1 - /* 2 - * arch/asm-arm/mach-kirkwood/include/mach/gpio.h 3 - * 4 - * This file is licensed under the terms of the GNU General Public 5 - * License version 2. This program is licensed "as is" without any 6 - * warranty of any kind, whether express or implied. 7 - */ 8 - 9 - #include <plat/gpio.h>

+1

arch/arm/mach-kirkwood/irq.c

··· 11 11 #include <linux/kernel.h> 12 12 #include <linux/irq.h> 13 13 #include <mach/bridge-regs.h> 14 + #include <plat/orion-gpio.h> 14 15 #include <plat/irq.h> 15 16 16 17 static int __initdata gpio0_irqs[4] = {

+1

arch/arm/mach-kirkwood/rd88f6192-nas-setup.c

··· 19 19 #include <asm/mach-types.h> 20 20 #include <asm/mach/arch.h> 21 21 #include <mach/kirkwood.h> 22 + #include <plat/orion-gpio.h> 22 23 #include "common.h" 23 24 24 25 #define RD88F6192_GPIO_USB_VBUS 10

-2

arch/arm/mach-lpc32xx/Makefile.boot

··· 1 1 zreladdr-y += 0x80008000 2 2 params_phys-y := 0x80000100 3 3 initrd_phys-y := 0x82000000 4 - 5 - dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb

-1

arch/arm/mach-msm/include/mach/gpio.h

··· 1 - /* empty */

+1

arch/arm/mach-mv78xx0/irq.c

··· 11 11 #include <linux/kernel.h> 12 12 #include <linux/irq.h> 13 13 #include <mach/bridge-regs.h> 14 + #include <plat/orion-gpio.h> 14 15 #include <plat/irq.h> 15 16 #include "common.h" 16 17

+10

arch/arm/mach-mvebu/Kconfig

··· 1 + config ARCH_MVEBU 2 + bool "Marvell SOCs with Device Tree support" if ARCH_MULTI_V7 3 + select CLKSRC_MMIO 4 + select COMMON_CLK 5 + select GENERIC_CLOCKEVENTS 6 + select GENERIC_IRQ_CHIP 7 + select IRQ_DOMAIN 8 + select MULTI_IRQ_HANDLER 9 + select SPARSE_IRQ 10 + 1 11 if ARCH_MVEBU 2 12 3 13 menu "Marvell SOC with device tree"

+2

arch/arm/mach-mvebu/Makefile

··· 1 + ccflags-$(ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include 2 + 1 3 obj-y += system-controller.o 2 4 obj-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-xp.o irq-armada-370-xp.o

-3

arch/arm/mach-mvebu/Makefile.boot

··· 1 - zreladdr-y := 0x00008000 2 - dtb-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-db.dtb 3 - dtb-$(CONFIG_MACH_ARMADA_370_XP) += armada-xp-db.dtb

+1 -1

arch/arm/mach-mvebu/armada-370-xp.c

··· 20 20 #include <asm/mach/arch.h> 21 21 #include <asm/mach/map.h> 22 22 #include <asm/mach/time.h> 23 - #include <mach/armada-370-xp.h> 23 + #include "armada-370-xp.h" 24 24 #include "common.h" 25 25 26 26 static struct map_desc armada_370_xp_io_desc[] __initdata = {

arch/arm/mach-mvebu/include/mach/armada-370-xp.h arch/arm/mach-mvebu/armada-370-xp.h

+2 -1

arch/arm/mach-mvebu/include/mach/debug-macro.S arch/arm/include/debug/mvebu.S

··· 11 11 * published by the Free Software Foundation. 12 12 */ 13 13 14 - #include <mach/armada-370-xp.h> 14 + #define ARMADA_370_XP_REGS_PHYS_BASE 0xd0000000 15 + #define ARMADA_370_XP_REGS_VIRT_BASE 0xfeb00000 15 16 16 17 .macro addruart, rp, rv, tmp 17 18 ldr \rp, =ARMADA_370_XP_REGS_PHYS_BASE

-13

arch/arm/mach-mvebu/include/mach/timex.h

··· 1 - /* 2 - * Marvell Armada SoC time definitions 3 - * 4 - * Copyright (C) 2012 Marvell 5 - * 6 - * Lior Amsalem <alior@marvell.com> 7 - * 8 - * This file is licensed under the terms of the GNU General Public 9 - * License version 2. This program is licensed "as is" without any 10 - * warranty of any kind, whether express or implied. 11 - */ 12 - 13 - #define CLOCK_TICK_RATE (100 * HZ)

-43

arch/arm/mach-mvebu/include/mach/uncompress.h

··· 1 - /* 2 - * Marvell Armada SoC kernel uncompression UART routines 3 - * 4 - * Copyright (C) 2012 Marvell 5 - * 6 - * Lior Amsalem <alior@marvell.com> 7 - * 8 - * This file is licensed under the terms of the GNU General Public 9 - * License version 2. This program is licensed "as is" without any 10 - * warranty of any kind, whether express or implied. 11 - */ 12 - 13 - #include <mach/armada-370-xp.h> 14 - 15 - #define UART_THR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\ 16 - + 0x12000)) 17 - #define UART_LSR ((volatile unsigned char *)(ARMADA_370_XP_REGS_PHYS_BASE\ 18 - + 0x12014)) 19 - 20 - #define LSR_THRE 0x20 21 - 22 - static void putc(const char c) 23 - { 24 - int i; 25 - 26 - for (i = 0; i < 0x1000; i++) { 27 - /* Transmit fifo not full? */ 28 - if (*UART_LSR & LSR_THRE) 29 - break; 30 - } 31 - 32 - *UART_THR = c; 33 - } 34 - 35 - static void flush(void) 36 - { 37 - } 38 - 39 - /* 40 - * nothing to do 41 - */ 42 - #define arch_decomp_setup() 43 - #define arch_decomp_wdog()

-10

arch/arm/mach-mxs/Makefile.boot

··· 1 1 zreladdr-y += 0x40008000 2 - 3 - dtb-y += imx23-evk.dtb \ 4 - imx23-olinuxino.dtb \ 5 - imx23-stmp378x_devb.dtb \ 6 - imx28-apx4devkit.dtb \ 7 - imx28-cfa10036.dtb \ 8 - imx28-cfa10049.dtb \ 9 - imx28-evk.dtb \ 10 - imx28-m28evk.dtb \ 11 - imx28-tx28.dtb \

-1

arch/arm/mach-mxs/include/mach/gpio.h

··· 1 - /* empty */

-4

arch/arm/mach-nomadik/include/mach/gpio.h

··· 1 - #ifndef __ASM_ARCH_GPIO_H 2 - #define __ASM_ARCH_GPIO_H 3 - 4 - #endif /* __ASM_ARCH_GPIO_H */

+1

arch/arm/mach-orion5x/d2net-setup.c

··· 27 27 #include <asm/mach/arch.h> 28 28 #include <asm/mach/pci.h> 29 29 #include <mach/orion5x.h> 30 + #include <plat/orion-gpio.h> 30 31 #include "common.h" 31 32 #include "mpp.h" 32 33

+1

arch/arm/mach-orion5x/dns323-setup.c

··· 34 34 #include <asm/mach/pci.h> 35 35 #include <asm/system_info.h> 36 36 #include <mach/orion5x.h> 37 + #include <plat/orion-gpio.h> 37 38 #include "common.h" 38 39 #include "mpp.h" 39 40

-9

arch/arm/mach-orion5x/include/mach/gpio.h

··· 1 - /* 2 - * arch/arm/mach-orion5x/include/mach/gpio.h 3 - * 4 - * This file is licensed under the terms of the GNU General Public 5 - * License version 2. This program is licensed "as is" without any 6 - * warranty of any kind, whether express or implied. 7 - */ 8 - 9 - #include <plat/gpio.h>

+1

arch/arm/mach-orion5x/irq.c

··· 13 13 #include <linux/kernel.h> 14 14 #include <linux/irq.h> 15 15 #include <mach/bridge-regs.h> 16 + #include <plat/orion-gpio.h> 16 17 #include <plat/irq.h> 17 18 18 19 static int __initdata gpio0_irqs[4] = {

+1

arch/arm/mach-orion5x/net2big-setup.c

··· 25 25 #include <asm/mach-types.h> 26 26 #include <asm/mach/arch.h> 27 27 #include <mach/orion5x.h> 28 + #include <plat/orion-gpio.h> 28 29 #include "common.h" 29 30 #include "mpp.h" 30 31

+14

arch/arm/mach-picoxcell/Kconfig

··· 1 + config ARCH_PICOXCELL 2 + bool "Picochip PicoXcell" if ARCH_MULTI_V6 3 + select ARCH_REQUIRE_GPIOLIB 4 + select ARM_PATCH_PHYS_VIRT 5 + select ARM_VIC 6 + select CPU_V6K 7 + select DW_APB_TIMER 8 + select DW_APB_TIMER_OF 9 + select GENERIC_CLOCKEVENTS 10 + select GENERIC_GPIO 11 + select HAVE_TCM 12 + select NO_IOPORT 13 + select SPARSE_IRQ 14 + select USE_OF

-1

arch/arm/mach-picoxcell/Makefile.boot

··· 1 - zreladdr-y := 0x00008000

+7 -6

arch/arm/mach-picoxcell/common.c

··· 20 20 #include <asm/hardware/vic.h> 21 21 #include <asm/mach/map.h> 22 22 23 - #include <mach/map.h> 24 - #include <mach/picoxcell_soc.h> 25 - 26 23 #include "common.h" 27 24 28 - #define WDT_CTRL_REG_EN_MASK (1 << 0) 29 - #define WDT_CTRL_REG_OFFS (0x00) 30 - #define WDT_TIMEOUT_REG_OFFS (0x04) 25 + #define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) 26 + #define PICOXCELL_PERIPH_BASE 0x80000000 27 + #define PICOXCELL_PERIPH_LENGTH SZ_4M 28 + 29 + #define WDT_CTRL_REG_EN_MASK (1 << 0) 30 + #define WDT_CTRL_REG_OFFS (0x00) 31 + #define WDT_TIMEOUT_REG_OFFS (0x04) 31 32 static void __iomem *wdt_regs; 32 33 33 34 /*

+2 -2

arch/arm/mach-picoxcell/include/mach/debug-macro.S arch/arm/include/debug/picoxcell.S

··· 9 9 * accesses to the 8250. 10 10 */ 11 11 #include <linux/serial_reg.h> 12 - #include <mach/hardware.h> 13 - #include <mach/map.h> 14 12 15 13 #define UART_SHIFT 2 14 + #define PICOXCELL_UART1_BASE 0x80230000 15 + #define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) 16 16 17 17 .macro addruart, rp, rv, tmp 18 18 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)

-1

arch/arm/mach-picoxcell/include/mach/gpio.h

··· 1 - /* empty */

-21

arch/arm/mach-picoxcell/include/mach/hardware.h

··· 1 - /* 2 - * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 - * 4 - * This file contains the hardware definitions of the picoXcell SoC devices. 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - */ 16 - #ifndef __ASM_ARCH_HARDWARE_H 17 - #define __ASM_ARCH_HARDWARE_H 18 - 19 - #include <mach/picoxcell_soc.h> 20 - 21 - #endif

-25

arch/arm/mach-picoxcell/include/mach/map.h

··· 1 - /* 2 - * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 - * 4 - * This program is free software; you can redistribute it and/or modify 5 - * it under the terms of the GNU General Public License as published by 6 - * the Free Software Foundation; either version 2 of the License, or 7 - * (at your option) any later version. 8 - * 9 - * This program is distributed in the hope that it will be useful, 10 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 - * GNU General Public License for more details. 13 - */ 14 - #ifndef __PICOXCELL_MAP_H__ 15 - #define __PICOXCELL_MAP_H__ 16 - 17 - #define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) 18 - 19 - #ifdef __ASSEMBLY__ 20 - #define IO_ADDRESS(x) PHYS_TO_IO((x)) 21 - #else 22 - #define IO_ADDRESS(x) (void __iomem __force *)(PHYS_TO_IO((x))) 23 - #endif 24 - 25 - #endif /* __PICOXCELL_MAP_H__ */

-25

arch/arm/mach-picoxcell/include/mach/picoxcell_soc.h

··· 1 - /* 2 - * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 - * 4 - * This file contains the hardware definitions of the picoXcell SoC devices. 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - */ 16 - #ifndef __PICOXCELL_SOC_H__ 17 - #define __PICOXCELL_SOC_H__ 18 - 19 - #define PICOXCELL_UART1_BASE 0x80230000 20 - #define PICOXCELL_PERIPH_BASE 0x80000000 21 - #define PICOXCELL_PERIPH_LENGTH SZ_4M 22 - #define PICOXCELL_VIC0_BASE 0x80060000 23 - #define PICOXCELL_VIC1_BASE 0x80064000 24 - 25 - #endif /* __PICOXCELL_SOC_H__ */

-25

arch/arm/mach-picoxcell/include/mach/timex.h

··· 1 - /* 2 - * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 - * 4 - * This program is free software; you can redistribute it and/or modify 5 - * it under the terms of the GNU General Public License as published by 6 - * the Free Software Foundation; either version 2 of the License, or 7 - * (at your option) any later version. 8 - * 9 - * This program is distributed in the hope that it will be useful, 10 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 - * GNU General Public License for more details. 13 - * 14 - * You should have received a copy of the GNU General Public License 15 - * along with this program; if not, write to the Free Software 16 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 - */ 18 - #ifndef __TIMEX_H__ 19 - #define __TIMEX_H__ 20 - 21 - /* Bogus value to allow the kernel to compile. */ 22 - #define CLOCK_TICK_RATE 1000000 23 - 24 - #endif /* __TIMEX_H__ */ 25 -

-21

arch/arm/mach-picoxcell/include/mach/uncompress.h

··· 1 - /* 2 - * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 - * 4 - * This program is free software; you can redistribute it and/or modify 5 - * it under the terms of the GNU General Public License as published by 6 - * the Free Software Foundation; either version 2 of the License, or 7 - * (at your option) any later version. 8 - * 9 - * This program is distributed in the hope that it will be useful, 10 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 - * GNU General Public License for more details. 13 - * 14 - * You should have received a copy of the GNU General Public License 15 - * along with this program; if not, write to the Free Software 16 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 - */ 18 - #define putc(c) 19 - #define flush() 20 - #define arch_decomp_setup() 21 - #define arch_decomp_wdog()

+15

arch/arm/mach-pxa/devices.c

··· 383 383 384 384 static u64 pxaficp_dmamask = ~(u32)0; 385 385 386 + static struct resource pxa_ir_resources[] = { 387 + [0] = { 388 + .start = IRQ_STUART, 389 + .end = IRQ_STUART, 390 + .flags = IORESOURCE_IRQ, 391 + }, 392 + [1] = { 393 + .start = IRQ_ICP, 394 + .end = IRQ_ICP, 395 + .flags = IORESOURCE_IRQ, 396 + }, 397 + }; 398 + 386 399 struct platform_device pxa_device_ficp = { 387 400 .name = "pxa2xx-ir", 388 401 .id = -1, 402 + .num_resources = ARRAY_SIZE(pxa_ir_resources), 403 + .resource = pxa_ir_resources, 389 404 .dev = { 390 405 .dma_mask = &pxaficp_dmamask, 391 406 .coherent_dma_mask = 0xffffffff,

+17 -13

arch/arm/mach-pxa/sharpsl_pm.c

··· 879 879 880 880 static int __devinit sharpsl_pm_probe(struct platform_device *pdev) 881 881 { 882 - int ret; 882 + int ret, irq; 883 883 884 884 if (!pdev->dev.platform_data) 885 885 return -EINVAL; ··· 907 907 gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock); 908 908 909 909 /* Register interrupt handlers */ 910 - if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) { 911 - dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin)); 910 + irq = gpio_to_irq(sharpsl_pm.machinfo->gpio_acin); 911 + if (request_irq(irq, sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) { 912 + dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", irq); 912 913 } 913 914 914 - if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) { 915 - dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock)); 915 + irq = gpio_to_irq(sharpsl_pm.machinfo->gpio_batlock); 916 + if (request_irq(irq, sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) { 917 + dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", irq); 916 918 } 917 919 918 920 if (sharpsl_pm.machinfo->gpio_fatal) { 919 - if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) { 920 - dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal)); 921 + irq = gpio_to_irq(sharpsl_pm.machinfo->gpio_fatal); 922 + if (request_irq(irq, sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) { 923 + dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", irq); 921 924 } 922 925 } 923 926 924 927 if (sharpsl_pm.machinfo->batfull_irq) { 925 928 /* Register interrupt handler. */ 926 - if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) { 927 - dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull)); 929 + irq = gpio_to_irq(sharpsl_pm.machinfo->gpio_batfull); 930 + if (request_irq(irq, sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) { 931 + dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", irq); 928 932 } 929 933 } 930 934 ··· 957 953 958 954 led_trigger_unregister_simple(sharpsl_charge_led_trigger); 959 955 960 - free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); 961 - free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr); 956 + free_irq(gpio_to_irq(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); 957 + free_irq(gpio_to_irq(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr); 962 958 963 959 if (sharpsl_pm.machinfo->gpio_fatal) 964 - free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); 960 + free_irq(gpio_to_irq(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); 965 961 966 962 if (sharpsl_pm.machinfo->batfull_irq) 967 - free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); 963 + free_irq(gpio_to_irq(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); 968 964 969 965 gpio_free(sharpsl_pm.machinfo->gpio_batlock); 970 966 gpio_free(sharpsl_pm.machinfo->gpio_batfull);

-1

arch/arm/mach-realview/include/mach/gpio.h

··· 1 - /* empty */

+2

arch/arm/mach-shmobile/board-ap4evb.c

··· 66 66 #include <asm/mach/arch.h> 67 67 #include <asm/setup.h> 68 68 69 + #include "sh-gpio.h" 70 + 69 71 /* 70 72 * Address Interface BusWidth note 71 73 * ------------------------------------------------------------------

+2

arch/arm/mach-shmobile/board-armadillo800eva.c

··· 54 54 #include <sound/sh_fsi.h> 55 55 #include <sound/simple_card.h> 56 56 57 + #include "sh-gpio.h" 58 + 57 59 /* 58 60 * CON1 Camera Module 59 61 * CON2 Extension Bus

+2

arch/arm/mach-shmobile/board-g4evm.c

··· 42 42 #include <asm/mach-types.h> 43 43 #include <asm/mach/arch.h> 44 44 45 + #include "sh-gpio.h" 46 + 45 47 /* 46 48 * SDHI 47 49 *

+2

arch/arm/mach-shmobile/board-mackerel.c

··· 64 64 #include <asm/mach/arch.h> 65 65 #include <asm/mach-types.h> 66 66 67 + #include "sh-gpio.h" 68 + 67 69 /* 68 70 * Address Interface BusWidth note 69 71 * ------------------------------------------------------------------

-14

arch/arm/mach-shmobile/include/mach/gpio.h arch/arm/mach-shmobile/sh-gpio.h

··· 12 12 13 13 #include <linux/kernel.h> 14 14 #include <linux/errno.h> 15 - #include <linux/sh_pfc.h> 16 15 #include <linux/io.h> 17 - 18 - #ifdef CONFIG_GPIOLIB 19 - 20 - static inline int irq_to_gpio(unsigned int irq) 21 - { 22 - return -ENOSYS; 23 - } 24 - 25 - #else 26 - 27 - #define __ARM_GPIOLIB_COMPLEX 28 - 29 - #endif /* CONFIG_GPIOLIB */ 30 16 31 17 /* 32 18 * FIXME !!

+1 -1

arch/arm/mach-shmobile/pfc-r8a7740.c

··· 20 20 */ 21 21 #include <linux/init.h> 22 22 #include <linux/kernel.h> 23 - #include <linux/gpio.h> 23 + #include <linux/sh_pfc.h> 24 24 #include <mach/r8a7740.h> 25 25 #include <mach/irqs.h> 26 26

+1 -1

arch/arm/mach-shmobile/pfc-r8a7779.c

··· 19 19 */ 20 20 #include <linux/init.h> 21 21 #include <linux/kernel.h> 22 - #include <linux/gpio.h> 22 + #include <linux/sh_pfc.h> 23 23 #include <linux/ioport.h> 24 24 #include <mach/r8a7779.h> 25 25

+1 -1

arch/arm/mach-shmobile/pfc-sh7367.c

··· 18 18 */ 19 19 #include <linux/init.h> 20 20 #include <linux/kernel.h> 21 - #include <linux/gpio.h> 21 + #include <linux/sh_pfc.h> 22 22 #include <mach/sh7367.h> 23 23 24 24 #define CPU_ALL_PORT(fn, pfx, sfx) \

+1 -1

arch/arm/mach-shmobile/pfc-sh7372.c

··· 22 22 */ 23 23 #include <linux/init.h> 24 24 #include <linux/kernel.h> 25 - #include <linux/gpio.h> 25 + #include <linux/sh_pfc.h> 26 26 #include <mach/irqs.h> 27 27 #include <mach/sh7372.h> 28 28

+1 -1

arch/arm/mach-shmobile/pfc-sh7377.c

··· 19 19 */ 20 20 #include <linux/init.h> 21 21 #include <linux/kernel.h> 22 - #include <linux/gpio.h> 22 + #include <linux/sh_pfc.h> 23 23 #include <mach/sh7377.h> 24 24 25 25 #define CPU_ALL_PORT(fn, pfx, sfx) \

+1 -1

arch/arm/mach-shmobile/pfc-sh73a0.c

··· 20 20 */ 21 21 #include <linux/init.h> 22 22 #include <linux/kernel.h> 23 - #include <linux/gpio.h> 23 + #include <linux/sh_pfc.h> 24 24 #include <mach/sh73a0.h> 25 25 #include <mach/irqs.h> 26 26

+16

arch/arm/mach-socfpga/Kconfig

··· 1 + config ARCH_SOCFPGA 2 + bool "Altera SOCFPGA family" if ARCH_MULTI_V7 3 + select ARCH_WANT_OPTIONAL_GPIOLIB 4 + select ARM_AMBA 5 + select ARM_GIC 6 + select CACHE_L2X0 7 + select CLKDEV_LOOKUP 8 + select COMMON_CLK 9 + select CPU_V7 10 + select DW_APB_TIMER 11 + select DW_APB_TIMER_OF 12 + select GENERIC_CLOCKEVENTS 13 + select GPIO_PL061 if GPIOLIB 14 + select HAVE_ARM_SCU 15 + select SPARSE_IRQ 16 + select USE_OF

-1

arch/arm/mach-socfpga/Makefile.boot

··· 1 - zreladdr-y := 0x00008000

arch/arm/mach-socfpga/include/mach/debug-macro.S arch/arm/include/debug/socfpga.S

-19

arch/arm/mach-socfpga/include/mach/timex.h

··· 1 - /* 2 - * Copyright (C) 2003 ARM Limited 3 - * 4 - * This program is free software; you can redistribute it and/or modify 5 - * it under the terms of the GNU General Public License as published by 6 - * the Free Software Foundation; either version 2 of the License, or 7 - * (at your option) any later version. 8 - * 9 - * This program is distributed in the hope that it will be useful, 10 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 - * GNU General Public License for more details. 13 - * 14 - * You should have received a copy of the GNU General Public License 15 - * along with this program; if not, write to the Free Software 16 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 - */ 18 - 19 - #define CLOCK_TICK_RATE (50000000 / 16)

-9

arch/arm/mach-socfpga/include/mach/uncompress.h

··· 1 - #ifndef __MACH_UNCOMPRESS_H 2 - #define __MACH_UNCOMPRESS_H 3 - 4 - #define putc(c) 5 - #define flush() 6 - #define arch_decomp_setup() 7 - #define arch_decomp_wdog() 8 - 9 - #endif

-3

arch/arm/mach-spear13xx/Makefile.boot

··· 1 1 zreladdr-y += 0x00008000 2 2 params_phys-y := 0x00000100 3 3 initrd_phys-y := 0x00800000 4 - 5 - dtb-$(CONFIG_MACH_SPEAR1310) += spear1310-evb.dtb 6 - dtb-$(CONFIG_MACH_SPEAR1340) += spear1340-evb.dtb

-19

arch/arm/mach-spear13xx/include/mach/gpio.h

··· 1 - /* 2 - * arch/arm/mach-spear13xx/include/mach/gpio.h 3 - * 4 - * GPIO macros for SPEAr13xx machine family 5 - * 6 - * Copyright (C) 2012 ST Microelectronics 7 - * Viresh Kumar <viresh.linux@gmail.com> 8 - * 9 - * This file is licensed under the terms of the GNU General Public 10 - * License version 2. This program is licensed "as is" without any 11 - * warranty of any kind, whether express or implied. 12 - */ 13 - 14 - #ifndef __MACH_GPIO_H 15 - #define __MACH_GPIO_H 16 - 17 - #include <plat/gpio.h> 18 - 19 - #endif /* __MACH_GPIO_H */

-4

arch/arm/mach-spear3xx/Makefile.boot

··· 1 1 zreladdr-y += 0x00008000 2 2 params_phys-y := 0x00000100 3 3 initrd_phys-y := 0x00800000 4 - 5 - dtb-$(CONFIG_MACH_SPEAR300) += spear300-evb.dtb 6 - dtb-$(CONFIG_MACH_SPEAR310) += spear310-evb.dtb 7 - dtb-$(CONFIG_MACH_SPEAR320) += spear320-evb.dtb

-19

arch/arm/mach-spear3xx/include/mach/gpio.h

··· 1 - /* 2 - * arch/arm/mach-spear3xx/include/mach/gpio.h 3 - * 4 - * GPIO macros for SPEAr3xx machine family 5 - * 6 - * Copyright (C) 2009 ST Microelectronics 7 - * Viresh Kumar<viresh.linux@gmail.com> 8 - * 9 - * This file is licensed under the terms of the GNU General Public 10 - * License version 2. This program is licensed "as is" without any 11 - * warranty of any kind, whether express or implied. 12 - */ 13 - 14 - #ifndef __MACH_GPIO_H 15 - #define __MACH_GPIO_H 16 - 17 - #include <plat/gpio.h> 18 - 19 - #endif /* __MACH_GPIO_H */

-2

arch/arm/mach-spear6xx/Makefile.boot

··· 1 1 zreladdr-y += 0x00008000 2 2 params_phys-y := 0x00000100 3 3 initrd_phys-y := 0x00800000 4 - 5 - dtb-$(CONFIG_BOARD_SPEAR600_DT) += spear600-evb.dtb

-19

arch/arm/mach-spear6xx/include/mach/gpio.h

··· 1 - /* 2 - * arch/arm/mach-spear6xx/include/mach/gpio.h 3 - * 4 - * GPIO macros for SPEAr6xx machine family 5 - * 6 - * Copyright (C) 2009 ST Microelectronics 7 - * Viresh Kumar <viresh.linux@gmail.com> 8 - * 9 - * This file is licensed under the terms of the GNU General Public 10 - * License version 2. This program is licensed "as is" without any 11 - * warranty of any kind, whether express or implied. 12 - */ 13 - 14 - #ifndef __MACH_GPIO_H 15 - #define __MACH_GPIO_H 16 - 17 - #include <plat/gpio.h> 18 - 19 - #endif /* __MACH_GPIO_H */

-12

arch/arm/mach-tegra/Makefile.boot

··· 1 1 zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 2 2 params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 3 3 initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 4 - 5 - dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-harmony.dtb 6 - dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-medcom-wide.dtb 7 - dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-paz00.dtb 8 - dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-plutux.dtb 9 - dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-seaboard.dtb 10 - dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-tec.dtb 11 - dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-trimslice.dtb 12 - dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-ventana.dtb 13 - dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-whistler.dtb 14 - dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu-a02.dtb 15 - dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu-a04.dtb

-1

arch/arm/mach-tegra/include/mach/gpio.h

··· 1 - /* empty */

-1

arch/arm/mach-u300/include/mach/gpio.h

··· 1 - /* empty */

-2

arch/arm/mach-ux500/Makefile.boot

··· 1 1 zreladdr-y += 0x00008000 2 2 params_phys-y := 0x00000100 3 3 initrd_phys-y := 0x00800000 4 - 5 - dtb-$(CONFIG_MACH_SNOWBALL) += snowball.dtb

-5

arch/arm/mach-ux500/include/mach/gpio.h

··· 1 - #ifndef __ASM_ARCH_GPIO_H 2 - #define __ASM_ARCH_GPIO_H 3 - 4 - 5 - #endif /* __ASM_ARCH_GPIO_H */

-1

arch/arm/mach-versatile/include/mach/gpio.h

··· 1 - /* empty */

+35 -35

arch/arm/mach-vexpress/Kconfig

··· 1 + config ARCH_VEXPRESS 2 + bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7 3 + select ARCH_WANT_OPTIONAL_GPIOLIB 4 + select ARM_AMBA 5 + select ARM_GIC 6 + select ARM_TIMER_SP804 7 + select CLKDEV_LOOKUP 8 + select COMMON_CLK 9 + select CPU_V7 10 + select GENERIC_CLOCKEVENTS 11 + select HAVE_CLK 12 + select HAVE_PATA_PLATFORM 13 + select HAVE_SMP 14 + select ICST 15 + select MIGHT_HAVE_CACHE_L2X0 16 + select NO_IOPORT 17 + select PLAT_VERSATILE 18 + select PLAT_VERSATILE_CLCD 19 + select REGULATOR_FIXED_VOLTAGE if REGULATOR 20 + help 21 + This option enables support for systems using Cortex processor based 22 + ARM core and logic (FPGA) tiles on the Versatile Express motherboard, 23 + for example: 24 + 25 + - CoreTile Express A5x2 (V2P-CA5s) 26 + - CoreTile Express A9x4 (V2P-CA9) 27 + - CoreTile Express A15x2 (V2P-CA15) 28 + - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs 29 + (Soft Macrocell Models) 30 + - Versatile Express RTSMs (Models) 31 + 32 + You must boot using a Flattened Device Tree in order to use these 33 + platforms. The traditional (ATAGs) boot method is not usable on 34 + these boards with this option. 35 + 1 36 menu "Versatile Express platform type" 2 37 depends on ARCH_VEXPRESS 3 38 ··· 50 15 51 16 config ARCH_VEXPRESS_CA9X4 52 17 bool "Versatile Express Cortex-A9x4 tile" 53 - select ARM_GIC 54 - select CPU_V7 55 - select HAVE_SMP 56 - select MIGHT_HAVE_CACHE_L2X0 57 - 58 - config ARCH_VEXPRESS_DT 59 - bool "Device Tree support for Versatile Express platforms" 60 - select ARM_GIC 61 - select ARM_PATCH_PHYS_VIRT 62 - select AUTO_ZRELADDR 63 - select CPU_V7 64 - select HAVE_SMP 65 - select MIGHT_HAVE_CACHE_L2X0 66 - select USE_OF 67 - help 68 - New Versatile Express platforms require Flattened Device Tree to 69 - be passed to the kernel. 70 - 71 - This option enables support for systems using Cortex processor based 72 - ARM core and logic (FPGA) tiles on the Versatile Express motherboard, 73 - for example: 74 - 75 - - CoreTile Express A5x2 (V2P-CA5s) 76 - - CoreTile Express A9x4 (V2P-CA9) 77 - - CoreTile Express A15x2 (V2P-CA15) 78 - - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs 79 - (Soft Macrocell Models) 80 - - Versatile Express RTSMs (Models) 81 - 82 - You must boot using a Flattened Device Tree in order to use these 83 - platforms. The traditional (ATAGs) boot method is not usable on 84 - these boards with this option. 85 - 86 - If your bootloader supports Flattened Device Tree based booting, 87 - say Y here. 88 18 89 19 endmenu

+2

arch/arm/mach-vexpress/Makefile

··· 1 1 # 2 2 # Makefile for the linux kernel. 3 3 # 4 + ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include \ 5 + -I$(srctree)/arch/arm/plat-versatile/include 4 6 5 7 obj-y := v2m.o 6 8 obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o

-10

arch/arm/mach-vexpress/Makefile.boot

··· 1 - # Those numbers are used only by the non-DT V2P-CA9 platform 2 - # The DT-enabled ones require CONFIG_AUTO_ZRELADDR=y 3 - zreladdr-y += 0x60008000 4 - params_phys-y := 0x60000100 5 - initrd_phys-y := 0x60800000 6 - 7 - dtb-$(CONFIG_ARCH_VEXPRESS_DT) += vexpress-v2p-ca5s.dtb \ 8 - vexpress-v2p-ca9.dtb \ 9 - vexpress-v2p-ca15-tc1.dtb \ 10 - vexpress-v2p-ca15_a7.dtb

+1

arch/arm/mach-vexpress/ct-ca9x4.c

··· 26 26 #include "core.h" 27 27 28 28 #include <mach/motherboard.h> 29 + #include <mach/irqs.h> 29 30 30 31 #include <plat/clcd.h> 31 32

arch/arm/mach-vexpress/include/mach/debug-macro.S arch/arm/include/debug/vexpress.S

-1

arch/arm/mach-vexpress/include/mach/gpio.h

··· 1 - /* empty */

+2

arch/arm/mach-vexpress/include/mach/irqs.h

··· 1 1 #define IRQ_LOCALTIMER 29 2 2 #define IRQ_LOCALWDOG 30 3 3 4 + #ifndef CONFIG_SPARSE_IRQ 4 5 #define NR_IRQS 256 6 + #endif

-23

arch/arm/mach-vexpress/include/mach/timex.h

··· 1 - /* 2 - * arch/arm/mach-vexpress/include/mach/timex.h 3 - * 4 - * RealView architecture timex specifications 5 - * 6 - * Copyright (C) 2003 ARM Limited 7 - * 8 - * This program is free software; you can redistribute it and/or modify 9 - * it under the terms of the GNU General Public License as published by 10 - * the Free Software Foundation; either version 2 of the License, or 11 - * (at your option) any later version. 12 - * 13 - * This program is distributed in the hope that it will be useful, 14 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 - * GNU General Public License for more details. 17 - * 18 - * You should have received a copy of the GNU General Public License 19 - * along with this program; if not, write to the Free Software 20 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 - */ 22 - 23 - #define CLOCK_TICK_RATE (50000000 / 16)

-86

arch/arm/mach-vexpress/include/mach/uncompress.h

··· 1 - /* 2 - * arch/arm/mach-vexpress/include/mach/uncompress.h 3 - * 4 - * Copyright (C) 2003 ARM Limited 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License as published by 8 - * the Free Software Foundation; either version 2 of the License, or 9 - * (at your option) any later version. 10 - * 11 - * This program is distributed in the hope that it will be useful, 12 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 - * GNU General Public License for more details. 15 - * 16 - * You should have received a copy of the GNU General Public License 17 - * along with this program; if not, write to the Free Software 18 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 - */ 20 - #define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) 21 - #define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c)) 22 - #define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30)) 23 - #define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18)) 24 - 25 - #define UART_BASE 0x10009000 26 - #define UART_BASE_RS1 0x1c090000 27 - 28 - static unsigned long get_uart_base(void) 29 - { 30 - #if defined(CONFIG_DEBUG_VEXPRESS_UART0_DETECT) 31 - unsigned long mpcore_periph; 32 - 33 - /* 34 - * Make an educated guess regarding the memory map: 35 - * - the original A9 core tile, which has MPCore peripherals 36 - * located at 0x1e000000, should use UART at 0x10009000 37 - * - all other (RS1 complaint) tiles use UART mapped 38 - * at 0x1c090000 39 - */ 40 - asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (mpcore_periph)); 41 - 42 - if (mpcore_periph == 0x1e000000) 43 - return UART_BASE; 44 - else 45 - return UART_BASE_RS1; 46 - #elif defined(CONFIG_DEBUG_VEXPRESS_UART0_CA9) 47 - return UART_BASE; 48 - #elif defined(CONFIG_DEBUG_VEXPRESS_UART0_RS1) 49 - return UART_BASE_RS1; 50 - #else 51 - return 0; 52 - #endif 53 - } 54 - 55 - /* 56 - * This does not append a newline 57 - */ 58 - static inline void putc(int c) 59 - { 60 - unsigned long base = get_uart_base(); 61 - 62 - if (!base) 63 - return; 64 - 65 - while (AMBA_UART_FR(base) & (1 << 5)) 66 - barrier(); 67 - 68 - AMBA_UART_DR(base) = c; 69 - } 70 - 71 - static inline void flush(void) 72 - { 73 - unsigned long base = get_uart_base(); 74 - 75 - if (!base) 76 - return; 77 - 78 - while (AMBA_UART_FR(base) & (1 << 3)) 79 - barrier(); 80 - } 81 - 82 - /* 83 - * nothing to do 84 - */ 85 - #define arch_decomp_setup() 86 - #define arch_decomp_wdog()

-4

arch/arm/mach-vexpress/v2m.c

··· 539 539 .restart = v2m_restart, 540 540 MACHINE_END 541 541 542 - #if defined(CONFIG_ARCH_VEXPRESS_DT) 543 - 544 542 static struct map_desc v2m_rs1_io_desc __initdata = { 545 543 .virtual = V2M_PERIPH, 546 544 .pfn = __phys_to_pfn(0x1c000000), ··· 669 671 .handle_irq = gic_handle_irq, 670 672 .restart = v2m_restart, 671 673 MACHINE_END 672 - 673 - #endif

-1

arch/arm/mach-vt8500/include/mach/gpio.h

··· 1 - /* empty */

-1

arch/arm/plat-mxc/include/mach/gpio.h

··· 1 - /* empty */

+1 -1

arch/arm/plat-orion/gpio.c

··· 23 23 #include <linux/of.h> 24 24 #include <linux/of_irq.h> 25 25 #include <linux/of_address.h> 26 - #include <plat/gpio.h> 26 + #include <plat/orion-gpio.h> 27 27 28 28 /* 29 29 * GPIO unit register offsets.

+1 -1

arch/arm/plat-orion/include/plat/gpio.h arch/arm/plat-orion/include/plat/orion-gpio.h

··· 1 1 /* 2 - * arch/arm/plat-orion/include/plat/gpio.h 2 + * arch/arm/plat-orion/include/plat/orion-gpio.h 3 3 * 4 4 * Marvell Orion SoC GPIO handling. 5 5 *

+1 -1

arch/arm/plat-orion/irq.c

··· 16 16 #include <linux/of_address.h> 17 17 #include <linux/of_irq.h> 18 18 #include <plat/irq.h> 19 - #include <plat/gpio.h> 19 + #include <plat/orion-gpio.h> 20 20 21 21 void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) 22 22 {

+1

arch/arm/plat-orion/mpp.c

··· 14 14 #include <linux/io.h> 15 15 #include <linux/gpio.h> 16 16 #include <mach/hardware.h> 17 + #include <plat/orion-gpio.h> 17 18 #include <plat/mpp.h> 18 19 19 20 /* Address of the ith MPP control register */

-1

arch/arm/plat-spear/include/plat/gpio.h

··· 1 - /* empty */

+2

arch/arm/plat-versatile/Makefile

··· 1 + ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include 2 + 1 3 obj-$(CONFIG_PLAT_VERSATILE_CLOCK) += clock.o 2 4 obj-$(CONFIG_PLAT_VERSATILE_CLCD) += clcd.o 3 5 obj-$(CONFIG_PLAT_VERSATILE_FPGA_IRQ) += fpga-irq.o

+17 -11

drivers/net/irda/pxaficp_ir.c

··· 29 29 30 30 #include <mach/dma.h> 31 31 #include <mach/irda.h> 32 - #include <mach/regs-uart.h> 33 32 #include <mach/regs-ost.h> 33 + #include <mach/regs-uart.h> 34 34 35 35 #define FICP __REG(0x40800000) /* Start of FICP area */ 36 36 #define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */ ··· 111 111 unsigned int dma_tx_buff_len; 112 112 int txdma; 113 113 int rxdma; 114 + 115 + int uart_irq; 116 + int icp_irq; 114 117 115 118 struct irlap_cb *irlap; 116 119 struct qos_info qos; ··· 675 672 676 673 si->speed = 9600; 677 674 678 - err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev); 675 + err = request_irq(si->uart_irq, pxa_irda_sir_irq, 0, dev->name, dev); 679 676 if (err) 680 677 goto err_irq1; 681 678 682 - err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev); 679 + err = request_irq(si->icp_irq, pxa_irda_fir_irq, 0, dev->name, dev); 683 680 if (err) 684 681 goto err_irq2; 685 682 686 683 /* 687 684 * The interrupt must remain disabled for now. 688 685 */ 689 - disable_irq(IRQ_STUART); 690 - disable_irq(IRQ_ICP); 686 + disable_irq(si->uart_irq); 687 + disable_irq(si->icp_irq); 691 688 692 689 err = -EBUSY; 693 690 si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev); ··· 723 720 /* 724 721 * Now enable the interrupt and start the queue 725 722 */ 726 - enable_irq(IRQ_STUART); 727 - enable_irq(IRQ_ICP); 723 + enable_irq(si->uart_irq); 724 + enable_irq(si->icp_irq); 728 725 netif_start_queue(dev); 729 726 730 727 printk(KERN_DEBUG "pxa_ir: irda driver opened\n"); ··· 741 738 err_tx_dma: 742 739 pxa_free_dma(si->rxdma); 743 740 err_rx_dma: 744 - free_irq(IRQ_ICP, dev); 741 + free_irq(si->icp_irq, dev); 745 742 err_irq2: 746 - free_irq(IRQ_STUART, dev); 743 + free_irq(si->uart_irq, dev); 747 744 err_irq1: 748 745 749 746 return err; ··· 763 760 si->irlap = NULL; 764 761 } 765 762 766 - free_irq(IRQ_STUART, dev); 767 - free_irq(IRQ_ICP, dev); 763 + free_irq(si->uart_irq, dev); 764 + free_irq(si->icp_irq, dev); 768 765 769 766 pxa_free_dma(si->rxdma); 770 767 pxa_free_dma(si->txdma); ··· 853 850 si = netdev_priv(dev); 854 851 si->dev = &pdev->dev; 855 852 si->pdata = pdev->dev.platform_data; 853 + 854 + si->uart_irq = platform_get_irq(pdev, 0); 855 + si->icp_irq = platform_get_irq(pdev, 1); 856 856 857 857 si->sir_clk = clk_get(&pdev->dev, "UARTCLK"); 858 858 si->fir_clk = clk_get(&pdev->dev, "FICPCLK");

+1

drivers/sh/pfc/gpio.c

··· 17 17 #include <linux/module.h> 18 18 #include <linux/platform_device.h> 19 19 #include <linux/pinctrl/consumer.h> 20 + #include <linux/sh_pfc.h> 20 21 21 22 struct sh_pfc_chip { 22 23 struct sh_pfc *pfc;

-1

drivers/staging/ste_rmi4/board-mop500-u8500uib-rmi4.c

··· 5 5 #include <linux/i2c.h> 6 6 #include <linux/gpio.h> 7 7 #include <linux/interrupt.h> 8 - #include <mach/gpio.h> 9 8 #include <mach/irqs.h> 10 9 #include "synaptics_i2c_rmi4.h" 11 10

+1 -1

drivers/usb/gadget/pxa27x_udc.c

··· 2508 2508 IRQF_SHARED, driver_name, udc); 2509 2509 if (retval != 0) { 2510 2510 dev_err(udc->dev, "%s: can't get irq %i, err %d\n", 2511 - driver_name, IRQ_USB, retval); 2511 + driver_name, udc->irq, retval); 2512 2512 goto err_irq; 2513 2513 } 2514 2514 retval = usb_add_gadget_udc(&pdev->dev, &udc->gadget);