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platform/x86/amd: amd_3d_vcache: Add AMD 3D V-Cache optimizer driver

AMD X3D processors, also known as AMD 3D V-Cache, feature dual Core
Complex Dies (CCDs) and enlarged L3 cache, enabling dynamic mode
switching between Frequency and Cache modes. To optimize performance,
implement the AMD 3D V-Cache Optimizer, which allows selecting either:

Frequency mode: cores within the faster CCD are prioritized before
those in the slower CCD.

Cache mode: cores within the larger L3 CCD are prioritized before
those in the smaller L3 CCD.

Co-developed-by: Perry Yuan <perry.yuan@amd.com>
Signed-off-by: Perry Yuan <perry.yuan@amd.com>
Co-developed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Reviewed-by: Armin Wolf <W_Armin@gmx.de>
Signed-off-by: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
Link: https://lore.kernel.org/r/20241112170307.3745777-2-Basavaraj.Natikar@amd.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

authored by

Basavaraj Natikar and committed by
Ilpo Järvinen
5a67c0d1 75a978bd

+197
+7
MAINTAINERS
··· 973 973 F: drivers/infiniband/hw/efa/ 974 974 F: include/uapi/rdma/efa-abi.h 975 975 976 + AMD 3D V-CACHE PERFORMANCE OPTIMIZER DRIVER 977 + M: Basavaraj Natikar <Basavaraj.Natikar@amd.com> 978 + R: Mario Limonciello <mario.limonciello@amd.com> 979 + L: platform-driver-x86@vger.kernel.org 980 + S: Supported 981 + F: drivers/platform/x86/amd/x3d_vcache.c 982 + 976 983 AMD ADDRESS TRANSLATION LIBRARY (ATL) 977 984 M: Yazen Ghannam <Yazen.Ghannam@amd.com> 978 985 L: linux-edac@vger.kernel.org
+12
drivers/platform/x86/amd/Kconfig
··· 7 7 source "drivers/platform/x86/amd/pmf/Kconfig" 8 8 source "drivers/platform/x86/amd/pmc/Kconfig" 9 9 10 + config AMD_3D_VCACHE 11 + tristate "AMD 3D V-Cache Performance Optimizer Driver" 12 + depends on X86_64 && ACPI 13 + help 14 + The driver provides a sysfs interface, enabling the setting of a bias 15 + that alters CPU core reordering. This bias prefers cores with higher 16 + frequencies or larger L3 caches on processors supporting AMD 3D V-Cache 17 + technology. 18 + 19 + If you choose to compile this driver as a module the module will be 20 + called amd_3d_vcache. 21 + 10 22 config AMD_WBRF 11 23 bool "AMD Wifi RF Band mitigations (WBRF)" 12 24 depends on ACPI
+2
drivers/platform/x86/amd/Makefile
··· 4 4 # AMD x86 Platform-Specific Drivers 5 5 # 6 6 7 + obj-$(CONFIG_AMD_3D_VCACHE) += amd_3d_vcache.o 8 + amd_3d_vcache-objs := x3d_vcache.o 7 9 obj-$(CONFIG_AMD_PMC) += pmc/ 8 10 obj-$(CONFIG_AMD_HSMP) += hsmp/ 9 11 obj-$(CONFIG_AMD_PMF) += pmf/
+176
drivers/platform/x86/amd/x3d_vcache.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * AMD 3D V-Cache Performance Optimizer Driver 4 + * 5 + * Copyright (c) 2024, Advanced Micro Devices, Inc. 6 + * All Rights Reserved. 7 + * 8 + * Authors: Basavaraj Natikar <Basavaraj.Natikar@amd.com> 9 + * Perry Yuan <perry.yuan@amd.com> 10 + * Mario Limonciello <mario.limonciello@amd.com> 11 + */ 12 + 13 + #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 14 + 15 + #include <linux/acpi.h> 16 + #include <linux/array_size.h> 17 + #include <linux/device.h> 18 + #include <linux/errno.h> 19 + #include <linux/module.h> 20 + #include <linux/mutex.h> 21 + #include <linux/platform_device.h> 22 + #include <linux/pm.h> 23 + #include <linux/sysfs.h> 24 + #include <linux/uuid.h> 25 + 26 + static char *x3d_mode = "frequency"; 27 + module_param(x3d_mode, charp, 0); 28 + MODULE_PARM_DESC(x3d_mode, "Initial 3D-VCache mode; 'frequency' (default) or 'cache'"); 29 + 30 + #define DSM_REVISION_ID 0 31 + #define DSM_SET_X3D_MODE 1 32 + 33 + static guid_t x3d_guid = GUID_INIT(0xdff8e55f, 0xbcfd, 0x46fb, 0xba, 0x0a, 34 + 0xef, 0xd0, 0x45, 0x0f, 0x34, 0xee); 35 + 36 + enum amd_x3d_mode_type { 37 + MODE_INDEX_FREQ, 38 + MODE_INDEX_CACHE, 39 + }; 40 + 41 + static const char * const amd_x3d_mode_strings[] = { 42 + [MODE_INDEX_FREQ] = "frequency", 43 + [MODE_INDEX_CACHE] = "cache", 44 + }; 45 + 46 + struct amd_x3d_dev { 47 + struct device *dev; 48 + acpi_handle ahandle; 49 + /* To protect x3d mode setting */ 50 + struct mutex lock; 51 + enum amd_x3d_mode_type curr_mode; 52 + }; 53 + 54 + static int amd_x3d_get_mode(struct amd_x3d_dev *data) 55 + { 56 + guard(mutex)(&data->lock); 57 + 58 + return data->curr_mode; 59 + } 60 + 61 + static int amd_x3d_mode_switch(struct amd_x3d_dev *data, int new_state) 62 + { 63 + union acpi_object *out, argv; 64 + 65 + guard(mutex)(&data->lock); 66 + argv.type = ACPI_TYPE_INTEGER; 67 + argv.integer.value = new_state; 68 + 69 + out = acpi_evaluate_dsm(data->ahandle, &x3d_guid, DSM_REVISION_ID, 70 + DSM_SET_X3D_MODE, &argv); 71 + if (!out) { 72 + dev_err(data->dev, "failed to evaluate _DSM\n"); 73 + return -EINVAL; 74 + } 75 + 76 + data->curr_mode = new_state; 77 + 78 + kfree(out); 79 + 80 + return 0; 81 + } 82 + 83 + static ssize_t amd_x3d_mode_store(struct device *dev, struct device_attribute *attr, 84 + const char *buf, size_t count) 85 + { 86 + struct amd_x3d_dev *data = dev_get_drvdata(dev); 87 + int ret; 88 + 89 + ret = sysfs_match_string(amd_x3d_mode_strings, buf); 90 + if (ret < 0) 91 + return ret; 92 + 93 + ret = amd_x3d_mode_switch(data, ret); 94 + if (ret < 0) 95 + return ret; 96 + 97 + return count; 98 + } 99 + 100 + static ssize_t amd_x3d_mode_show(struct device *dev, struct device_attribute *attr, char *buf) 101 + { 102 + struct amd_x3d_dev *data = dev_get_drvdata(dev); 103 + int mode = amd_x3d_get_mode(data); 104 + 105 + return sysfs_emit(buf, "%s\n", amd_x3d_mode_strings[mode]); 106 + } 107 + static DEVICE_ATTR_RW(amd_x3d_mode); 108 + 109 + static struct attribute *amd_x3d_attrs[] = { 110 + &dev_attr_amd_x3d_mode.attr, 111 + NULL 112 + }; 113 + ATTRIBUTE_GROUPS(amd_x3d); 114 + 115 + static int amd_x3d_resume_handler(struct device *dev) 116 + { 117 + struct amd_x3d_dev *data = dev_get_drvdata(dev); 118 + int ret = amd_x3d_get_mode(data); 119 + 120 + return amd_x3d_mode_switch(data, ret); 121 + } 122 + 123 + static DEFINE_SIMPLE_DEV_PM_OPS(amd_x3d_pm, NULL, amd_x3d_resume_handler); 124 + 125 + static const struct acpi_device_id amd_x3d_acpi_ids[] = { 126 + {"AMDI0101"}, 127 + { }, 128 + }; 129 + MODULE_DEVICE_TABLE(acpi, amd_x3d_acpi_ids); 130 + 131 + static int amd_x3d_probe(struct platform_device *pdev) 132 + { 133 + struct amd_x3d_dev *data; 134 + acpi_handle handle; 135 + int ret; 136 + 137 + handle = ACPI_HANDLE(&pdev->dev); 138 + if (!handle) 139 + return -ENODEV; 140 + 141 + if (!acpi_check_dsm(handle, &x3d_guid, DSM_REVISION_ID, BIT(DSM_SET_X3D_MODE))) 142 + return -ENODEV; 143 + 144 + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 145 + if (!data) 146 + return -ENOMEM; 147 + 148 + data->dev = &pdev->dev; 149 + 150 + ret = devm_mutex_init(data->dev, &data->lock); 151 + if (ret) 152 + return ret; 153 + 154 + data->ahandle = handle; 155 + platform_set_drvdata(pdev, data); 156 + 157 + ret = match_string(amd_x3d_mode_strings, ARRAY_SIZE(amd_x3d_mode_strings), x3d_mode); 158 + if (ret < 0) 159 + return dev_err_probe(&pdev->dev, -EINVAL, "invalid mode %s\n", x3d_mode); 160 + 161 + return amd_x3d_mode_switch(data, ret); 162 + } 163 + 164 + static struct platform_driver amd_3d_vcache_driver = { 165 + .driver = { 166 + .name = "amd_x3d_vcache", 167 + .dev_groups = amd_x3d_groups, 168 + .acpi_match_table = amd_x3d_acpi_ids, 169 + .pm = pm_sleep_ptr(&amd_x3d_pm), 170 + }, 171 + .probe = amd_x3d_probe, 172 + }; 173 + module_platform_driver(amd_3d_vcache_driver); 174 + 175 + MODULE_DESCRIPTION("AMD 3D V-Cache Performance Optimizer Driver"); 176 + MODULE_LICENSE("GPL");