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kernel
os
linux
sh: Split out PXSEG segmentation per-CPU family.
The CPU family abstraction already exists, so move out the PXSEG
definition for each one. SH-2A already has this special cased,
and SH-5 will as well.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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include/asm-sh/addrspace.h
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include/asm-sh/addrspace.h
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*/
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#ifndef __ASM_SH_ADDRSPACE_H
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#define __ASM_SH_ADDRSPACE_H
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#ifdef __KERNEL__
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#include <asm/cpu/addrspace.h>
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/* Memory segments (32bit Privileged mode addresses) */
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#ifndef CONFIG_CPU_SH2A
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#define P0SEG 0x00000000
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#define P1SEG 0x80000000
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#define P2SEG 0xa0000000
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#define P3SEG 0xc0000000
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#define P4SEG 0xe0000000
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#else
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#define P0SEG 0x00000000
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#define P1SEG 0x00000000
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#define P2SEG 0x20000000
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#define P3SEG 0x00000000
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#define P4SEG 0x80000000
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#endif
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/* If this CPU supports segmentation, hook up the helpers */
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#ifdef P1SEG
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/* Returns the privileged segment base of a given address */
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#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
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/*
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* Map an address to a certain privileged segment
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*/
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#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
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#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
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#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
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#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
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#define P1SEGADDR(a) \
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((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
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#define P2SEGADDR(a) \
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((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
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#define P3SEGADDR(a) \
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((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
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#define P4SEGADDR(a) \
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((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
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#endif /* P1SEG */
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#endif /* __KERNEL__ */
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#endif /* __ASM_SH_ADDRSPACE_H */
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include/asm-sh/cpu-sh2/addrspace.h
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include/asm-sh/cpu-sh2/addrspace.h
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#ifndef __ASM_CPU_SH2_ADDRSPACE_H
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#define __ASM_CPU_SH2_ADDRSPACE_H
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/* Should fill here */
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#define P0SEG 0x00000000
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#define P1SEG 0x80000000
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#define P2SEG 0xa0000000
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#define P3SEG 0xc0000000
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#define P4SEG 0xe0000000
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#endif /* __ASM_CPU_SH2_ADDRSPACE_H */
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include/asm-sh/cpu-sh2a/addrspace.h
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include/asm-sh/cpu-sh2a/addrspace.h
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#include <asm/cpu-sh2/addrspace.h>
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#ifndef __ASM_SH_CPU_SH2A_ADDRSPACE_H
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#define __ASM_SH_CPU_SH2A_ADDRSPACE_H
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#define P0SEG 0x00000000
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#define P1SEG 0x00000000
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#define P2SEG 0x20000000
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#define P3SEG 0x00000000
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#define P4SEG 0x80000000
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#endif /* __ASM_SH_CPU_SH2A_ADDRSPACE_H */
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include/asm-sh/cpu-sh3/addrspace.h
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include/asm-sh/cpu-sh3/addrspace.h
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#ifndef __ASM_CPU_SH3_ADDRSPACE_H
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#define __ASM_CPU_SH3_ADDRSPACE_H
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/* Should fill here */
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#define P0SEG 0x00000000
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#define P1SEG 0x80000000
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#define P2SEG 0xa0000000
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#define P3SEG 0xc0000000
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#define P4SEG 0xe0000000
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#endif /* __ASM_CPU_SH3_ADDRSPACE_H */
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+6
include/asm-sh/cpu-sh4/addrspace.h
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include/asm-sh/cpu-sh4/addrspace.h
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#ifndef __ASM_CPU_SH4_ADDRSPACE_H
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#define __ASM_CPU_SH4_ADDRSPACE_H
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#define P0SEG 0x00000000
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#define P1SEG 0x80000000
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#define P2SEG 0xa0000000
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#define P3SEG 0xc0000000
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#define P4SEG 0xe0000000
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/* Detailed P4SEG */
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#define P4SEG_STORE_QUE (P4SEG)
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#define P4SEG_IC_ADDR 0xf0000000