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kernel
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linux
drm/i915/pps: drop dependency on intel_display_conversion.h
All the PPS register users have been converted to struct
intel_display. The backward compat conversion to struct drm_i915_private
is no longer needed. Drop it, along with the include, and convert the
dev_priv macro parameter names to display while at it.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/4c23fd8dfcadefeeb52189045421084bcfd50d57.1747128495.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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drivers/gpu/drm/i915/display/intel_pps_regs.h
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drivers/gpu/drm/i915/display/intel_pps_regs.h
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#ifndef __INTEL_PPS_REGS_H__
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#define __INTEL_PPS_REGS_H__
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#include "intel_display_conversion.h"
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#include "intel_display_reg_defs.h"
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/* Panel power sequencing */
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#define VLV_PPS_BASE (VLV_DISPLAY_BASE + PPS_BASE)
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#define PCH_PPS_BASE 0xC7200
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#define _MMIO_PPS(dev_priv, pps_idx, reg) \
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_MMIO(__to_intel_display(dev_priv)->pps.mmio_base - PPS_BASE + (reg) + (pps_idx) * 0x100)
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#define _MMIO_PPS(display, pps_idx, reg) \
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_MMIO((display)->pps.mmio_base - PPS_BASE + (reg) + (pps_idx) * 0x100)
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#define _PP_STATUS 0x61200
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#define PP_STATUS(dev_priv, pps_idx) _MMIO_PPS(dev_priv, pps_idx, _PP_STATUS)
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#define PP_STATUS(display, pps_idx) _MMIO_PPS((display), (pps_idx), _PP_STATUS)
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#define PP_ON REG_BIT(31)
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/*
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* Indicates that all dependencies of the panel are on:
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#define PP_SEQUENCE_STATE_RESET REG_FIELD_PREP(PP_SEQUENCE_STATE_MASK, 0xf)
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#define _PP_CONTROL 0x61204
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#define PP_CONTROL(dev_priv, pps_idx) _MMIO_PPS(dev_priv, pps_idx, _PP_CONTROL)
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#define PP_CONTROL(display, pps_idx) _MMIO_PPS((display), (pps_idx), _PP_CONTROL)
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#define PANEL_UNLOCK_MASK REG_GENMASK(31, 16)
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#define PANEL_UNLOCK_REGS REG_FIELD_PREP(PANEL_UNLOCK_MASK, 0xabcd)
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#define BXT_POWER_CYCLE_DELAY_MASK REG_GENMASK(8, 4)
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#define PANEL_POWER_ON REG_BIT(0)
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#define _PP_ON_DELAYS 0x61208
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#define PP_ON_DELAYS(dev_priv, pps_idx) _MMIO_PPS(dev_priv, pps_idx, _PP_ON_DELAYS)
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#define PP_ON_DELAYS(display, pps_idx) _MMIO_PPS((display), (pps_idx), _PP_ON_DELAYS)
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#define PANEL_PORT_SELECT_MASK REG_GENMASK(31, 30)
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#define PANEL_PORT_SELECT_LVDS REG_FIELD_PREP(PANEL_PORT_SELECT_MASK, 0)
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#define PANEL_PORT_SELECT_DPA REG_FIELD_PREP(PANEL_PORT_SELECT_MASK, 1)
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#define PANEL_LIGHT_ON_DELAY_MASK REG_GENMASK(12, 0)
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#define _PP_OFF_DELAYS 0x6120C
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#define PP_OFF_DELAYS(dev_priv, pps_idx) _MMIO_PPS(dev_priv, pps_idx, _PP_OFF_DELAYS)
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#define PP_OFF_DELAYS(display, pps_idx) _MMIO_PPS((display), (pps_idx), _PP_OFF_DELAYS)
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#define PANEL_POWER_DOWN_DELAY_MASK REG_GENMASK(28, 16)
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#define PANEL_LIGHT_OFF_DELAY_MASK REG_GENMASK(12, 0)
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#define _PP_DIVISOR 0x61210
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#define PP_DIVISOR(dev_priv, pps_idx) _MMIO_PPS(dev_priv, pps_idx, _PP_DIVISOR)
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#define PP_DIVISOR(display, pps_idx) _MMIO_PPS((display), (pps_idx), _PP_DIVISOR)
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#define PP_REFERENCE_DIVIDER_MASK REG_GENMASK(31, 8)
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#define PANEL_POWER_CYCLE_DELAY_MASK REG_GENMASK(4, 0)
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