tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
sh: multiple vectors per irq - sh770x.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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arch/sh/kernel/cpu/sh3/setup-sh770x.c
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arch/sh/kernel/cpu/sh3/setup-sh770x.c
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* SH3 Setup code for SH7706, SH7707, SH7708, SH7709
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*
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* Copyright (C) 2007 Magnus Damm
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* Copyright (C) 2009 Paul Mundt
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*
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* Based on setup-sh7709.c
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*
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/* interrupt sources */
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IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
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PINT07, PINT815,
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DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
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SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
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SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
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SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI,
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ADC_ADI,
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DMAC, SCIF0, SCIF2, SCI, ADC_ADI,
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LCDC, PCC0, PCC1,
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TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
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RTC_ATI, RTC_PRI, RTC_CUI,
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WDT,
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REF_RCMI, REF_ROVI,
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/* interrupt groups */
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RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0,
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TMU0, TMU1, TMU2,
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RTC, WDT, REF,
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};
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static struct intc_vect vectors[] __initdata = {
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INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
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INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
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INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
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INTC_VECT(RTC_CUI, 0x4c0),
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INTC_VECT(SCI_ERI, 0x4e0), INTC_VECT(SCI_RXI, 0x500),
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INTC_VECT(SCI_TXI, 0x520), INTC_VECT(SCI_TEI, 0x540),
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INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
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INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
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INTC_VECT(RTC, 0x4c0),
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INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500),
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INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540),
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INTC_VECT(WDT, 0x560),
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INTC_VECT(REF_RCMI, 0x580),
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INTC_VECT(REF_ROVI, 0x5a0),
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INTC_VECT(REF, 0x580),
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INTC_VECT(REF, 0x5a0),
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#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
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defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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/* IRQ0->5 are handled in setup-sh3.c */
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INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
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INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
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INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
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INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
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INTC_VECT(ADC_ADI, 0x980),
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INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
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INTC_VECT(SCIF2_BRI, 0x940), INTC_VECT(SCIF2_TXI, 0x960),
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INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
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INTC_VECT(SCIF2, 0x940), INTC_VECT(SCIF2, 0x960),
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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defined(CONFIG_CPU_SUBTYPE_SH7709)
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INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
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INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
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INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
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INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
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INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7707)
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INTC_VECT(LCDC, 0x9a0),
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INTC_VECT(PCC0, 0x9c0), INTC_VECT(PCC1, 0x9e0),
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#endif
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};
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static struct intc_group groups[] __initdata = {
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INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
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INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
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INTC_GROUP(REF, REF_RCMI, REF_ROVI),
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INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
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INTC_GROUP(SCI, SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI),
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INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
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INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
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};
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static struct intc_prio_reg prio_registers[] __initdata = {
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#endif
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};
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static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
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static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, NULL,
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NULL, prio_registers, NULL);
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static struct resource rtc_resources[] = {
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.flags = IORESOURCE_IO,
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},
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[1] = {
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.start = 21,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = 22,
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.flags = IORESOURCE_IRQ,
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},
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[3] = {
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.start = 20,
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.flags = IORESOURCE_IRQ,
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},
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.mapbase = 0xfffffe80,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCI,
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.irqs = { 23, 24, 25, 0 },
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.irqs = { 23, 23, 23, 0 },
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},
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#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
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defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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.mapbase = 0xa4000150,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 56, 57, 59, 58 },
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.irqs = { 56, 56, 56, 56 },
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},
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
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.mapbase = 0xa4000140,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_IRDA,
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.irqs = { 52, 53, 55, 54 },
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.irqs = { 52, 52, 52, 52 },
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},
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#endif
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{