Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

staging: rtl8723bs: checkpatch - fix typos in comments

Resolving checkpatch issue:
CHECK: 'Regsiter' may be misspelled - perhaps 'Register'?
CHECK: 'Interrup' may be misspelled - perhaps 'Interrupt'?

All instances resolved.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Matthew Giassa and committed by
Greg Kroah-Hartman
592a55ef 17f858d0

+8 -8
+8 -8
drivers/staging/rtl8723bs/include/rtl8723b_spec.h
··· 141 141 #define SDIO_REG_HCPWM1_8723B 0x025 /* HCI Current Power Mode 1 */ 142 142 143 143 /* */ 144 - /* 8723 Regsiter Bit and Content definition */ 144 + /* 8723 Register Bit and Content definition */ 145 145 /* */ 146 146 147 147 /* 2 HSISR */ ··· 241 241 #define IMR_BCNDMAINT3_8723B BIT23 /* Beacon DMA Interrupt 3 */ 242 242 #define IMR_BCNDMAINT2_8723B BIT22 /* Beacon DMA Interrupt 2 */ 243 243 #define IMR_BCNDMAINT1_8723B BIT21 /* Beacon DMA Interrupt 1 */ 244 - #define IMR_BCNDOK7_8723B BIT20 /* Beacon Queue DMA OK Interrup 7 */ 245 - #define IMR_BCNDOK6_8723B BIT19 /* Beacon Queue DMA OK Interrup 6 */ 246 - #define IMR_BCNDOK5_8723B BIT18 /* Beacon Queue DMA OK Interrup 5 */ 247 - #define IMR_BCNDOK4_8723B BIT17 /* Beacon Queue DMA OK Interrup 4 */ 248 - #define IMR_BCNDOK3_8723B BIT16 /* Beacon Queue DMA OK Interrup 3 */ 249 - #define IMR_BCNDOK2_8723B BIT15 /* Beacon Queue DMA OK Interrup 2 */ 250 - #define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrup 1 */ 244 + #define IMR_BCNDOK7_8723B BIT20 /* Beacon Queue DMA OK Interrupt 7 */ 245 + #define IMR_BCNDOK6_8723B BIT19 /* Beacon Queue DMA OK Interrupt 6 */ 246 + #define IMR_BCNDOK5_8723B BIT18 /* Beacon Queue DMA OK Interrupt 5 */ 247 + #define IMR_BCNDOK4_8723B BIT17 /* Beacon Queue DMA OK Interrupt 4 */ 248 + #define IMR_BCNDOK3_8723B BIT16 /* Beacon Queue DMA OK Interrupt 3 */ 249 + #define IMR_BCNDOK2_8723B BIT15 /* Beacon Queue DMA OK Interrupt 2 */ 250 + #define IMR_BCNDOK1_8723B BIT14 /* Beacon Queue DMA OK Interrupt 1 */ 251 251 #define IMR_ATIMEND_E_8723B BIT13 /* ATIM Window End Extension for Win7 */ 252 252 #define IMR_TXERR_8723B BIT11 /* Tx Error Flag Interrupt Status, write 1 clear. */ 253 253 #define IMR_RXERR_8723B BIT10 /* Rx Error Flag INT Status, Write 1 clear */