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ARM: S3C64XX: Fix coding style errors on mach-real6410
Fix errors reported by checkpatch.pl script
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
[kgene.kim@samsung.com: minor title fix]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
authored by
Darius Augulis
and committed by
Kukjin Kim
591cd25e
5343795f
+52
-52
+52
-52
arch/arm/mach-s3c64xx/mach-real6410.c
+52
-52
arch/arm/mach-s3c64xx/mach-real6410.c
···
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#include <plat/devs.h>
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#include <plat/regs-serial.h>
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#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
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#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
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#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
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#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
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#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
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#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
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static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.hwport = 0,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.hwport = 1,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.hwport = 2,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[3] = {
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.hwport = 3,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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.hwport = 3,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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};
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/* DM9000AEP 10/100 ethernet controller */
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static struct resource real6410_dm9k_resource[] = {
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[0] = {
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.start = S3C64XX_PA_XM0CSN1,
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.end = S3C64XX_PA_XM0CSN1 + 1,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = S3C64XX_PA_XM0CSN1 + 4,
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.end = S3C64XX_PA_XM0CSN1 + 5,
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.flags = IORESOURCE_MEM
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},
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[2] = {
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.start = S3C_EINT(7),
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.end = S3C_EINT(7),
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.flags = IORESOURCE_IRQ,
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}
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[0] = {
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.start = S3C64XX_PA_XM0CSN1,
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.end = S3C64XX_PA_XM0CSN1 + 1,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = S3C64XX_PA_XM0CSN1 + 4,
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.end = S3C64XX_PA_XM0CSN1 + 5,
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.flags = IORESOURCE_MEM
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},
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[2] = {
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.start = S3C_EINT(7),
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.end = S3C_EINT(7),
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct dm9000_plat_data real6410_dm9k_pdata = {
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.flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
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.flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
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};
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static struct platform_device real6410_device_eth = {
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.name = "dm9000",
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.id = -1,
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.num_resources = ARRAY_SIZE(real6410_dm9k_resource),
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.resource = real6410_dm9k_resource,
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.dev = {
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.platform_data = &real6410_dm9k_pdata,
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},
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.name = "dm9000",
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.id = -1,
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.num_resources = ARRAY_SIZE(real6410_dm9k_resource),
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.resource = real6410_dm9k_resource,
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.dev = {
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.platform_data = &real6410_dm9k_pdata,
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},
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};
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static struct platform_device *real6410_devices[] __initdata = {
···
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/* set timing for nCS1 suitable for ethernet chip */
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__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
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(6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
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(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
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(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
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(13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
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(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
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(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
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(6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
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(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
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(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
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(13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
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(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
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(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
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platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
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}