Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

cpufreq: intel_pstate: Add one more OOB control bit

Add one more bit for OOB (Out Of Band) enabling of P-states.

If OOB handling of P-states is enabled, intel_pstate shouldn't load.
Currently, only "BIT(8) == 1" of the MSR MSR_MISC_PWR_MGMT is
considered as OOB, but "BIT(18) == 1" needs to be taken into
consideration as OOB condition too.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
[ rjw: Add an empty code line, edit subject and changelog ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

authored by

Srinivas Pandruvada and committed by
Rafael J. Wysocki
589bab6b 48778464

+5 -2
+5 -2
drivers/cpufreq/intel_pstate.c
··· 2677 2677 { } /* End */ 2678 2678 }; 2679 2679 2680 + #define BITMASK_OOB (BIT(8) | BIT(18)) 2681 + 2680 2682 static bool __init intel_pstate_platform_pwr_mgmt_exists(void) 2681 2683 { 2682 2684 const struct x86_cpu_id *id; ··· 2688 2686 id = x86_match_cpu(intel_pstate_cpu_oob_ids); 2689 2687 if (id) { 2690 2688 rdmsrl(MSR_MISC_PWR_MGMT, misc_pwr); 2691 - if (misc_pwr & (1 << 8)) { 2692 - pr_debug("Bit 8 in the MISC_PWR_MGMT MSR set\n"); 2689 + if (misc_pwr & BITMASK_OOB) { 2690 + pr_debug("Bit 8 or 18 in the MISC_PWR_MGMT MSR set\n"); 2691 + pr_debug("P states are controlled in Out of Band mode by the firmware/hardware\n"); 2693 2692 return true; 2694 2693 } 2695 2694 }