tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

gpio: switch drivers to use new callback

This switches all GPIO and pin control drivers with irqchips
that were using .startup() and .shutdown() callbacks to lock
GPIO lines for IRQ usage over to using the .request_resources()
and .release_resources() callbacks just introduced into the
irqchip vtable.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Linus Walleij 57ef0428 1d4a2166

+97 -81
+7 -8
drivers/gpio/gpio-adnp.c
··· 408 408 mutex_unlock(&adnp->irq_lock); 409 409 } 410 410 411 - static unsigned int adnp_irq_startup(struct irq_data *data) 411 + static int adnp_irq_reqres(struct irq_data *data) 412 412 { 413 413 struct adnp *adnp = irq_data_get_irq_chip_data(data); 414 414 415 - if (gpio_lock_as_irq(&adnp->gpio, data->hwirq)) 415 + if (gpio_lock_as_irq(&adnp->gpio, data->hwirq)) { 416 416 dev_err(adnp->gpio.dev, 417 417 "unable to lock HW IRQ %lu for IRQ\n", 418 418 data->hwirq); 419 - /* Satisfy the .enable semantics by unmasking the line */ 420 - adnp_irq_unmask(data); 419 + return -EINVAL; 420 + } 421 421 return 0; 422 422 } 423 423 424 - static void adnp_irq_shutdown(struct irq_data *data) 424 + static void adnp_irq_relres(struct irq_data *data) 425 425 { 426 426 struct adnp *adnp = irq_data_get_irq_chip_data(data); 427 427 428 - adnp_irq_mask(data); 429 428 gpio_unlock_as_irq(&adnp->gpio, data->hwirq); 430 429 } 431 430 ··· 435 436 .irq_set_type = adnp_irq_set_type, 436 437 .irq_bus_lock = adnp_irq_bus_lock, 437 438 .irq_bus_sync_unlock = adnp_irq_bus_unlock, 438 - .irq_startup = adnp_irq_startup, 439 - .irq_shutdown = adnp_irq_shutdown, 439 + .irq_request_resources = adnp_irq_reqres, 440 + .irq_release_resources = adnp_irq_relres, 440 441 }; 441 442 442 443 static int adnp_irq_map(struct irq_domain *domain, unsigned int irq,
+7 -7
drivers/gpio/gpio-bcm-kona.c
··· 466 466 chained_irq_exit(chip, desc); 467 467 } 468 468 469 - static unsigned int bcm_kona_gpio_irq_startup(struct irq_data *d) 469 + static int bcm_kona_gpio_irq_reqres(struct irq_data *d) 470 470 { 471 471 struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); 472 472 473 - if (gpio_lock_as_irq(&kona_gpio->gpio_chip, d->hwirq)) 473 + if (gpio_lock_as_irq(&kona_gpio->gpio_chip, d->hwirq)) { 474 474 dev_err(kona_gpio->gpio_chip.dev, 475 475 "unable to lock HW IRQ %lu for IRQ\n", 476 476 d->hwirq); 477 - bcm_kona_gpio_irq_unmask(d); 477 + return -EINVAL; 478 + } 478 479 return 0; 479 480 } 480 481 481 - static void bcm_kona_gpio_irq_shutdown(struct irq_data *d) 482 + static void bcm_kona_gpio_irq_relres(struct irq_data *d) 482 483 { 483 484 struct bcm_kona_gpio *kona_gpio = irq_data_get_irq_chip_data(d); 484 485 485 - bcm_kona_gpio_irq_mask(d); 486 486 gpio_unlock_as_irq(&kona_gpio->gpio_chip, d->hwirq); 487 487 } 488 488 ··· 492 492 .irq_mask = bcm_kona_gpio_irq_mask, 493 493 .irq_unmask = bcm_kona_gpio_irq_unmask, 494 494 .irq_set_type = bcm_kona_gpio_irq_set_type, 495 - .irq_startup = bcm_kona_gpio_irq_startup, 496 - .irq_shutdown = bcm_kona_gpio_irq_shutdown, 495 + .irq_request_resources = bcm_kona_gpio_irq_reqres, 496 + .irq_release_resources = bcm_kona_gpio_irq_relres, 497 497 }; 498 498 499 499 static struct __initconst of_device_id bcm_kona_gpio_of_match[] = {
+7 -7
drivers/gpio/gpio-dwapb.c
··· 136 136 spin_unlock_irqrestore(&bgc->lock, flags); 137 137 } 138 138 139 - static unsigned int dwapb_irq_startup(struct irq_data *d) 139 + static int dwapb_irq_reqres(struct irq_data *d) 140 140 { 141 141 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); 142 142 struct dwapb_gpio *gpio = igc->private; 143 143 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 144 144 145 - if (gpio_lock_as_irq(&bgc->gc, irqd_to_hwirq(d))) 145 + if (gpio_lock_as_irq(&bgc->gc, irqd_to_hwirq(d))) { 146 146 dev_err(gpio->dev, "unable to lock HW IRQ %lu for IRQ\n", 147 147 irqd_to_hwirq(d)); 148 - dwapb_irq_enable(d); 148 + return -EINVAL; 149 + } 149 150 return 0; 150 151 } 151 152 152 - static void dwapb_irq_shutdown(struct irq_data *d) 153 + static void dwapb_irq_relres(struct irq_data *d) 153 154 { 154 155 struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d); 155 156 struct dwapb_gpio *gpio = igc->private; 156 157 struct bgpio_chip *bgc = &gpio->ports[0].bgc; 157 158 158 - dwapb_irq_disable(d); 159 159 gpio_unlock_as_irq(&bgc->gc, irqd_to_hwirq(d)); 160 160 } 161 161 ··· 255 255 ct->chip.irq_set_type = dwapb_irq_set_type; 256 256 ct->chip.irq_enable = dwapb_irq_enable; 257 257 ct->chip.irq_disable = dwapb_irq_disable; 258 - ct->chip.irq_startup = dwapb_irq_startup; 259 - ct->chip.irq_shutdown = dwapb_irq_shutdown; 258 + ct->chip.irq_request_resources = dwapb_irq_reqres; 259 + ct->chip.irq_release_resources = dwapb_irq_relres; 260 260 ct->regs.ack = GPIO_PORTA_EOI; 261 261 ct->regs.mask = GPIO_INTMASK; 262 262
+7 -7
drivers/gpio/gpio-em.c
··· 99 99 em_gio_write(p, GIO_IEN, BIT(irqd_to_hwirq(d))); 100 100 } 101 101 102 - static unsigned int em_gio_irq_startup(struct irq_data *d) 102 + static int em_gio_irq_reqres(struct irq_data *d) 103 103 { 104 104 struct em_gio_priv *p = irq_data_get_irq_chip_data(d); 105 105 106 - if (gpio_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d))) 106 + if (gpio_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d))) { 107 107 dev_err(p->gpio_chip.dev, 108 108 "unable to lock HW IRQ %lu for IRQ\n", 109 109 irqd_to_hwirq(d)); 110 - em_gio_irq_enable(d); 110 + return -EINVAL; 111 + } 111 112 return 0; 112 113 } 113 114 114 - static void em_gio_irq_shutdown(struct irq_data *d) 115 + static void em_gio_irq_relres(struct irq_data *d) 115 116 { 116 117 struct em_gio_priv *p = irq_data_get_irq_chip_data(d); 117 118 118 - em_gio_irq_disable(d); 119 119 gpio_unlock_as_irq(&p->gpio_chip, irqd_to_hwirq(d)); 120 120 } 121 121 ··· 359 359 irq_chip->irq_mask = em_gio_irq_disable; 360 360 irq_chip->irq_unmask = em_gio_irq_enable; 361 361 irq_chip->irq_set_type = em_gio_irq_set_type; 362 - irq_chip->irq_startup = em_gio_irq_startup; 363 - irq_chip->irq_shutdown = em_gio_irq_shutdown; 362 + irq_chip->irq_request_resources = em_gio_irq_reqres; 363 + irq_chip->irq_release_resources = em_gio_irq_relres; 364 364 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND; 365 365 366 366 p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
+7 -7
drivers/gpio/gpio-intel-mid.c
··· 231 231 { 232 232 } 233 233 234 - static unsigned int intel_mid_irq_startup(struct irq_data *d) 234 + static int intel_mid_irq_reqres(struct irq_data *d) 235 235 { 236 236 struct intel_mid_gpio *priv = irq_data_get_irq_chip_data(d); 237 237 238 - if (gpio_lock_as_irq(&priv->chip, irqd_to_hwirq(d))) 238 + if (gpio_lock_as_irq(&priv->chip, irqd_to_hwirq(d))) { 239 239 dev_err(priv->chip.dev, 240 240 "unable to lock HW IRQ %lu for IRQ\n", 241 241 irqd_to_hwirq(d)); 242 - intel_mid_irq_unmask(d); 242 + return -EINVAL; 243 + } 243 244 return 0; 244 245 } 245 246 246 - static void intel_mid_irq_shutdown(struct irq_data *d) 247 + static void intel_mid_irq_relres(struct irq_data *d) 247 248 { 248 249 struct intel_mid_gpio *priv = irq_data_get_irq_chip_data(d); 249 250 250 - intel_mid_irq_mask(d); 251 251 gpio_unlock_as_irq(&priv->chip, irqd_to_hwirq(d)); 252 252 } 253 253 ··· 256 256 .irq_mask = intel_mid_irq_mask, 257 257 .irq_unmask = intel_mid_irq_unmask, 258 258 .irq_set_type = intel_mid_irq_type, 259 - .irq_startup = intel_mid_irq_startup, 260 - .irq_shutdown = intel_mid_irq_shutdown, 259 + .irq_request_resources = intel_mid_irq_reqres, 260 + .irq_release_resources = intel_mid_irq_relres, 261 261 }; 262 262 263 263 static const struct intel_mid_gpio_ddata gpio_lincroft = {
+7 -7
drivers/gpio/gpio-lynxpoint.c
··· 301 301 spin_unlock_irqrestore(&lg->lock, flags); 302 302 } 303 303 304 - static unsigned int lp_irq_startup(struct irq_data *d) 304 + static int lp_irq_reqres(struct irq_data *d) 305 305 { 306 306 struct lp_gpio *lg = irq_data_get_irq_chip_data(d); 307 307 308 - if (gpio_lock_as_irq(&lg->chip, irqd_to_hwirq(d))) 308 + if (gpio_lock_as_irq(&lg->chip, irqd_to_hwirq(d))) { 309 309 dev_err(lg->chip.dev, 310 310 "unable to lock HW IRQ %lu for IRQ\n", 311 311 irqd_to_hwirq(d)); 312 - lp_irq_enable(d); 312 + return -EINVAL; 313 + } 313 314 return 0; 314 315 } 315 316 316 - static void lp_irq_shutdown(struct irq_data *d) 317 + static void lp_irq_relres(struct irq_data *d) 317 318 { 318 319 struct lp_gpio *lg = irq_data_get_irq_chip_data(d); 319 320 320 - lp_irq_disable(d); 321 321 gpio_unlock_as_irq(&lg->chip, irqd_to_hwirq(d)); 322 322 } 323 323 ··· 328 328 .irq_enable = lp_irq_enable, 329 329 .irq_disable = lp_irq_disable, 330 330 .irq_set_type = lp_irq_type, 331 - .irq_startup = lp_irq_startup, 332 - .irq_shutdown = lp_irq_shutdown, 331 + .irq_request_resources = lp_irq_reqres, 332 + .irq_release_resources = lp_irq_relres, 333 333 .flags = IRQCHIP_SKIP_SET_WAKE, 334 334 }; 335 335
+7 -7
drivers/gpio/gpio-mcp23s08.c
··· 440 440 mutex_unlock(&mcp->irq_lock); 441 441 } 442 442 443 - static unsigned int mcp23s08_irq_startup(struct irq_data *data) 443 + static int mcp23s08_irq_reqres(struct irq_data *data) 444 444 { 445 445 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); 446 446 447 - if (gpio_lock_as_irq(&mcp->chip, data->hwirq)) 447 + if (gpio_lock_as_irq(&mcp->chip, data->hwirq)) { 448 448 dev_err(mcp->chip.dev, 449 449 "unable to lock HW IRQ %lu for IRQ usage\n", 450 450 data->hwirq); 451 + return -EINVAL; 452 + } 451 453 452 - mcp23s08_irq_unmask(data); 453 454 return 0; 454 455 } 455 456 456 - static void mcp23s08_irq_shutdown(struct irq_data *data) 457 + static void mcp23s08_irq_relres(struct irq_data *data) 457 458 { 458 459 struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data); 459 460 460 - mcp23s08_irq_mask(data); 461 461 gpio_unlock_as_irq(&mcp->chip, data->hwirq); 462 462 } 463 463 ··· 468 468 .irq_set_type = mcp23s08_irq_set_type, 469 469 .irq_bus_lock = mcp23s08_irq_bus_lock, 470 470 .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock, 471 - .irq_startup = mcp23s08_irq_startup, 472 - .irq_shutdown = mcp23s08_irq_shutdown, 471 + .irq_request_resources = mcp23s08_irq_reqres, 472 + .irq_release_resources = mcp23s08_irq_relres, 473 473 }; 474 474 475 475 static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
+7 -7
drivers/gpio/gpio-pl061.c
··· 233 233 spin_unlock(&chip->lock); 234 234 } 235 235 236 - static unsigned int pl061_irq_startup(struct irq_data *d) 236 + static int pl061_irq_reqres(struct irq_data *d) 237 237 { 238 238 struct pl061_gpio *chip = irq_data_get_irq_chip_data(d); 239 239 240 - if (gpio_lock_as_irq(&chip->gc, irqd_to_hwirq(d))) 240 + if (gpio_lock_as_irq(&chip->gc, irqd_to_hwirq(d))) { 241 241 dev_err(chip->gc.dev, 242 242 "unable to lock HW IRQ %lu for IRQ\n", 243 243 irqd_to_hwirq(d)); 244 - pl061_irq_unmask(d); 244 + return -EINVAL; 245 + } 245 246 return 0; 246 247 } 247 248 248 - static void pl061_irq_shutdown(struct irq_data *d) 249 + static void pl061_irq_relres(struct irq_data *d) 249 250 { 250 251 struct pl061_gpio *chip = irq_data_get_irq_chip_data(d); 251 252 252 - pl061_irq_mask(d); 253 253 gpio_unlock_as_irq(&chip->gc, irqd_to_hwirq(d)); 254 254 } 255 255 ··· 258 258 .irq_mask = pl061_irq_mask, 259 259 .irq_unmask = pl061_irq_unmask, 260 260 .irq_set_type = pl061_irq_type, 261 - .irq_startup = pl061_irq_startup, 262 - .irq_shutdown = pl061_irq_shutdown, 261 + .irq_request_resources = pl061_irq_reqres, 262 + .irq_release_resources = pl061_irq_relres, 263 263 }; 264 264 265 265 static int pl061_irq_map(struct irq_domain *d, unsigned int irq,
+1
drivers/pinctrl/pinctrl-adi2.c
··· 324 324 325 325 if (!port) { 326 326 pr_err("GPIO IRQ %d :Not exist\n", d->irq); 327 + /* FIXME: negative return code will be ignored */ 327 328 return -ENODEV; 328 329 } 329 330
+7 -7
drivers/pinctrl/pinctrl-baytrail.c
··· 371 371 { 372 372 } 373 373 374 - static unsigned int byt_irq_startup(struct irq_data *d) 374 + static int byt_irq_reqres(struct irq_data *d) 375 375 { 376 376 struct byt_gpio *vg = irq_data_get_irq_chip_data(d); 377 377 378 - if (gpio_lock_as_irq(&vg->chip, irqd_to_hwirq(d))) 378 + if (gpio_lock_as_irq(&vg->chip, irqd_to_hwirq(d))) { 379 379 dev_err(vg->chip.dev, 380 380 "unable to lock HW IRQ %lu for IRQ\n", 381 381 irqd_to_hwirq(d)); 382 - byt_irq_unmask(d); 382 + return -EINVAL; 383 + } 383 384 return 0; 384 385 } 385 386 386 - static void byt_irq_shutdown(struct irq_data *d) 387 + static void byt_irq_relres(struct irq_data *d) 387 388 { 388 389 struct byt_gpio *vg = irq_data_get_irq_chip_data(d); 389 390 390 - byt_irq_mask(d); 391 391 gpio_unlock_as_irq(&vg->chip, irqd_to_hwirq(d)); 392 392 } 393 393 ··· 396 396 .irq_mask = byt_irq_mask, 397 397 .irq_unmask = byt_irq_unmask, 398 398 .irq_set_type = byt_irq_type, 399 - .irq_startup = byt_irq_startup, 400 - .irq_shutdown = byt_irq_shutdown, 399 + .irq_request_resources = byt_irq_reqres, 400 + .irq_release_resources = byt_irq_relres, 401 401 }; 402 402 403 403 static void byt_gpio_irq_init_hw(struct byt_gpio *vg)
+5 -6
drivers/pinctrl/pinctrl-msm.c
··· 805 805 return 0; 806 806 } 807 807 808 - static unsigned int msm_gpio_irq_startup(struct irq_data *d) 808 + static int msm_gpio_irq_reqres(struct irq_data *d) 809 809 { 810 810 struct msm_pinctrl *pctrl = irq_data_get_irq_chip_data(d); 811 811 812 812 if (gpio_lock_as_irq(&pctrl->chip, d->hwirq)) { 813 813 dev_err(pctrl->dev, "unable to lock HW IRQ %lu for IRQ\n", 814 814 d->hwirq); 815 + return -EINVAL; 815 816 } 816 - msm_gpio_irq_unmask(d); 817 817 return 0; 818 818 } 819 819 820 - static void msm_gpio_irq_shutdown(struct irq_data *d) 820 + static void msm_gpio_irq_relres(struct irq_data *d) 821 821 { 822 822 struct msm_pinctrl *pctrl = irq_data_get_irq_chip_data(d); 823 823 824 - msm_gpio_irq_mask(d); 825 824 gpio_unlock_as_irq(&pctrl->chip, d->hwirq); 826 825 } 827 826 ··· 831 832 .irq_ack = msm_gpio_irq_ack, 832 833 .irq_set_type = msm_gpio_irq_set_type, 833 834 .irq_set_wake = msm_gpio_irq_set_wake, 834 - .irq_startup = msm_gpio_irq_startup, 835 - .irq_shutdown = msm_gpio_irq_shutdown, 835 + .irq_request_resources = msm_gpio_irq_reqres, 836 + .irq_release_resources = msm_gpio_irq_relres, 836 837 }; 837 838 838 839 static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
+21 -4
drivers/pinctrl/pinctrl-nomadik.c
··· 848 848 { 849 849 struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d); 850 850 851 - if (gpio_lock_as_irq(&nmk_chip->chip, d->hwirq)) 852 - dev_err(nmk_chip->chip.dev, 853 - "unable to lock HW IRQ %lu for IRQ\n", 854 - d->hwirq); 855 851 clk_enable(nmk_chip->clk); 856 852 nmk_gpio_irq_unmask(d); 857 853 return 0; ··· 859 863 860 864 nmk_gpio_irq_mask(d); 861 865 clk_disable(nmk_chip->clk); 866 + } 867 + 868 + static int nmk_gpio_irq_reqres(struct irq_data *d) 869 + { 870 + struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d); 871 + 872 + if (gpio_lock_as_irq(&nmk_chip->chip, d->hwirq)) { 873 + dev_err(nmk_chip->chip.dev, 874 + "unable to lock HW IRQ %lu for IRQ\n", 875 + d->hwirq); 876 + return -EINVAL; 877 + } 878 + return 0; 879 + } 880 + 881 + static void nmk_gpio_irq_relres(struct irq_data *d) 882 + { 883 + struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d); 884 + 862 885 gpio_unlock_as_irq(&nmk_chip->chip, d->hwirq); 863 886 } 864 887 ··· 890 875 .irq_set_wake = nmk_gpio_irq_set_wake, 891 876 .irq_startup = nmk_gpio_irq_startup, 892 877 .irq_shutdown = nmk_gpio_irq_shutdown, 878 + .irq_request_resources = nmk_gpio_irq_reqres, 879 + .irq_release_resources = nmk_gpio_irq_relres, 893 880 .flags = IRQCHIP_MASK_ON_SUSPEND, 894 881 }; 895 882
+7 -7
drivers/pinctrl/sirf/pinctrl-sirf.c
··· 594 594 return 0; 595 595 } 596 596 597 - static unsigned int sirfsoc_gpio_irq_startup(struct irq_data *d) 597 + static int sirfsoc_gpio_irq_reqres(struct irq_data *d) 598 598 { 599 599 struct sirfsoc_gpio_bank *bank = irq_data_get_irq_chip_data(d); 600 600 601 - if (gpio_lock_as_irq(&bank->chip.gc, d->hwirq % SIRFSOC_GPIO_BANK_SIZE)) 601 + if (gpio_lock_as_irq(&bank->chip.gc, d->hwirq % SIRFSOC_GPIO_BANK_SIZE)) { 602 602 dev_err(bank->chip.gc.dev, 603 603 "unable to lock HW IRQ %lu for IRQ\n", 604 604 d->hwirq); 605 - sirfsoc_gpio_irq_unmask(d); 605 + return -EINVAL; 606 + } 606 607 return 0; 607 608 } 608 609 609 - static void sirfsoc_gpio_irq_shutdown(struct irq_data *d) 610 + static void sirfsoc_gpio_irq_relres(struct irq_data *d) 610 611 { 611 612 struct sirfsoc_gpio_bank *bank = irq_data_get_irq_chip_data(d); 612 613 613 - sirfsoc_gpio_irq_mask(d); 614 614 gpio_unlock_as_irq(&bank->chip.gc, d->hwirq % SIRFSOC_GPIO_BANK_SIZE); 615 615 } 616 616 ··· 620 620 .irq_mask = sirfsoc_gpio_irq_mask, 621 621 .irq_unmask = sirfsoc_gpio_irq_unmask, 622 622 .irq_set_type = sirfsoc_gpio_irq_type, 623 - .irq_startup = sirfsoc_gpio_irq_startup, 624 - .irq_shutdown = sirfsoc_gpio_irq_shutdown, 623 + .irq_request_resources = sirfsoc_gpio_irq_reqres, 624 + .irq_release_resources = sirfsoc_gpio_irq_relres, 625 625 }; 626 626 627 627 static void sirfsoc_gpio_handle_irq(unsigned int irq, struct irq_desc *desc)