Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'mfd-3.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6

Pull MFD changes from Samuel Ortiz:
"MFD bits for the 3.7 merge window.

As usual we have a few new drivers:

- TI LP8788
- TI OMAP USB TLL
- Maxim MAX8907
- SMSC ECE1099
- Dialog Semiconductor DA9055
- A simpler syscon driver that allow us to get rid of the anatop one.

Drivers are also gradually getting Device Tree and IRQ domain support.

The following drivers got DT support:
- palmas, 88pm860x, tc3589x and twl4030-audio

And those ones now use the IRQ domain APIs:
- 88pm860x, tc3589x, db8500_prcmu

Also some other interesting changes:
- Intel's ICH LPC now supports Lynx Point
- TI's twl4030-audio added a GPO child
- tps6527 enabled its backlight subdevice
- The twl6030 pwm driver moved to the new PWM subsystem

And finally a bunch of cleanup and casual fixes for mc13xxx, 88pm860x,
palmas, ab8500, wm8994, wm5110, max8907 and the tps65xxx family."

Fix up various annoying conflicts: the DT and IRQ domain support came in
twice and was already in 3.6. And then it was apparently rebased.

Guys, DON'T REBASE!

* tag 'mfd-3.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/mfd-2.6: (89 commits)
ARM: dts: Enable 88pm860x pmic
mfd: 88pm860x: Move gpadc init into touch
mfd: 88pm860x: Device tree support
mfd: 88pm860x: Use irqdomain
mfd: smsc: Add support for smsc gpio io/keypad driver
backlight: tps65217_bl: Add missing platform_set_drvdata in tps65217_bl_probe
mfd: DA9055 core driver
mfd: tps65910: Add alarm interrupt of TPS65910 RTC to mfd device list
mfd: wm5110: Add register patches for revision B
mfd: wm5110: Disable control interface error report for WM5110 rev B
mfd: max8907: Remove regulator-compatible from DT docs
backlight: Add TPS65217 WLED driver
mfd: Add backlight as subdevice to the tps65217
mfd: Provide the PRCMU with its own IRQ domain
mfd: Fix max8907 sparse warning
mfd: Add lp8788 mfd driver
mfd: dbx500: Provide a more accurate smp_twd clock
mfd: rc5t583: Fix warning messages
regulator: palmas: Add DT support
mfd: palmas: Change regulator defns to better suite DT
...

+8005 -1920
+85
Documentation/devicetree/bindings/mfd/88pm860x.txt
··· 1 + * Marvell 88PM860x Power Management IC 2 + 3 + Required parent device properties: 4 + - compatible : "marvell,88pm860x" 5 + - reg : the I2C slave address for the 88pm860x chip 6 + - interrupts : IRQ line for the 88pm860x chip 7 + - interrupt-controller: describes the 88pm860x as an interrupt controller (has its own domain) 8 + - #interrupt-cells : should be 1. 9 + - The cell is the 88pm860x local IRQ number 10 + 11 + Optional parent device properties: 12 + - marvell,88pm860x-irq-read-clr: inicates whether interrupt status is cleared by read 13 + - marvell,88pm860x-slave-addr: 88pm860x are two chips solution. <reg> stores the I2C address 14 + of one chip, and this property stores the I2C address of 15 + another chip. 16 + 17 + 88pm860x consists of a large and varied group of sub-devices: 18 + 19 + Device Supply Names Description 20 + ------ ------------ ----------- 21 + 88pm860x-onkey : : On key 22 + 88pm860x-rtc : : RTC 23 + 88pm8607 : : Regulators 24 + 88pm860x-backlight : : Backlight 25 + 88pm860x-led : : Led 26 + 88pm860x-touch : : Touchscreen 27 + 28 + Example: 29 + 30 + pmic: 88pm860x@34 { 31 + compatible = "marvell,88pm860x"; 32 + reg = <0x34>; 33 + interrupts = <4>; 34 + interrupt-parent = <&intc>; 35 + interrupt-controller; 36 + #interrupt-cells = <1>; 37 + 38 + marvell,88pm860x-irq-read-clr; 39 + marvell,88pm860x-slave-addr = <0x11>; 40 + 41 + regulators { 42 + BUCK1 { 43 + regulator-min-microvolt = <1000000>; 44 + regulator-max-microvolt = <1500000>; 45 + regulator-boot-on; 46 + regulator-always-on; 47 + }; 48 + LDO1 { 49 + regulator-min-microvolt = <1200000>; 50 + regulator-max-microvolt = <2800000>; 51 + regulator-boot-on; 52 + regulator-always-on; 53 + }; 54 + }; 55 + rtc { 56 + marvell,88pm860x-vrtc = <1>; 57 + }; 58 + touch { 59 + marvell,88pm860x-gpadc-prebias = <1>; 60 + marvell,88pm860x-gpadc-slot-cycle = <1>; 61 + marvell,88pm860x-tsi-prebias = <6>; 62 + marvell,88pm860x-pen-prebias = <16>; 63 + marvell,88pm860x-pen-prechg = <2>; 64 + marvell,88pm860x-resistor-X = <300>; 65 + }; 66 + backlights { 67 + backlight-0 { 68 + marvell,88pm860x-iset = <4>; 69 + marvell,88pm860x-pwm = <3>; 70 + }; 71 + backlight-2 { 72 + }; 73 + }; 74 + leds { 75 + led0-red { 76 + marvell,88pm860x-iset = <12>; 77 + }; 78 + led0-green { 79 + marvell,88pm860x-iset = <12>; 80 + }; 81 + led0-blue { 82 + marvell,88pm860x-iset = <12>; 83 + }; 84 + }; 85 + };
+20
Documentation/devicetree/bindings/mfd/syscon.txt
··· 1 + * System Controller Registers R/W driver 2 + 3 + System controller node represents a register region containing a set 4 + of miscellaneous registers. The registers are not cohesive enough to 5 + represent as any specific type of device. The typical use-case is for 6 + some other node's driver, or platform-specific code, to acquire a 7 + reference to the syscon node (e.g. by phandle, node path, or search 8 + using a specific compatible value), interrogate the node (or associated 9 + OS driver) to determine the location of the registers, and access the 10 + registers directly. 11 + 12 + Required properties: 13 + - compatible: Should contain "syscon". 14 + - reg: the register region can be accessed from syscon 15 + 16 + Examples: 17 + gpr: iomuxc-gpr@020e0000 { 18 + compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; 19 + reg = <0x020e0000 0x38>; 20 + };
+4
Documentation/devicetree/bindings/mfd/tps65910.txt
··· 59 59 in TPS6591X datasheet) 60 60 - ti,en-gpio-sleep: enable sleep control for gpios 61 61 There should be 9 entries here, one for each gpio. 62 + - ti,system-power-controller: Telling whether or not this pmic is controlling 63 + the system power. 62 64 63 65 Regulator Optional properties: 64 66 - ti,regulator-ext-sleep-control: enable external sleep ··· 80 78 81 79 #interrupt-cells = <2>; 82 80 interrupt-controller; 81 + 82 + ti,system-power-controller; 83 83 84 84 ti,vmbch-threshold = 0; 85 85 ti,vmbch2-threshold = 0;
+46
Documentation/devicetree/bindings/mfd/twl4030-audio.txt
··· 1 + Texas Instruments TWL family (twl4030) audio module 2 + 3 + The audio module inside the TWL family consist of an audio codec and a vibra 4 + driver. 5 + 6 + Required properties: 7 + - compatible : must be "ti,twl4030-audio" 8 + 9 + Optional properties, nodes: 10 + 11 + Audio functionality: 12 + - codec { }: Need to be present if the audio functionality is used. Within this 13 + section the following options can be used: 14 + - ti,digimic_delay: Delay need after enabling the digimic to reduce artifacts 15 + from the start of the recorded sample (in ms) 16 + -ti,ramp_delay_value: HS ramp delay configuration to reduce pop noise 17 + -ti,hs_extmute: Use external mute for HS pop reduction 18 + -ti,hs_extmute_gpio: Use external GPIO to control the external mute 19 + -ti,offset_cncl_path: Offset cancellation path selection, refer to TRM for the 20 + valid values. 21 + 22 + Vibra functionality 23 + - ti,enable-vibra: Need to be set to <1> if the vibra functionality is used. if 24 + missing or it is 0, the vibra functionality is disabled. 25 + 26 + Example: 27 + &i2c1 { 28 + clock-frequency = <2600000>; 29 + 30 + twl: twl@48 { 31 + reg = <0x48>; 32 + interrupts = <7>; /* SYS_NIRQ cascaded to intc */ 33 + interrupt-parent = <&intc>; 34 + 35 + twl_audio: audio { 36 + compatible = "ti,twl4030-audio"; 37 + 38 + ti,enable-vibra = <1>; 39 + 40 + codec { 41 + ti,ramp_delay_value = <3>; 42 + }; 43 + 44 + }; 45 + }; 46 + };
+6 -3
Documentation/devicetree/bindings/mfd/twl6040.txt
··· 1 1 Texas Instruments TWL6040 family 2 2 3 - The TWL6040s are 8-channel high quality low-power audio codecs providing audio 4 - and vibra functionality on OMAP4+ platforms. 3 + The TWL6040s are 8-channel high quality low-power audio codecs providing audio, 4 + vibra and GPO functionality on OMAP4+ platforms. 5 5 They are connected ot the host processor via i2c for commands, McPDM for audio 6 6 data and commands. 7 7 ··· 10 10 - reg: must be 0x4b for i2c address 11 11 - interrupts: twl6040 has one interrupt line connecteded to the main SoC 12 12 - interrupt-parent: The parent interrupt controller 13 + - gpio-controller: 14 + - #gpio-cells = <1>: twl6040 provides GPO lines. 13 15 - twl6040,audpwron-gpio: Power on GPIO line for the twl6040 14 16 15 17 - vio-supply: Regulator for the twl6040 VIO supply ··· 39 37 &i2c1 { 40 38 twl6040: twl@4b { 41 39 compatible = "ti,twl6040"; 42 - reg = <0x4b>; 43 40 44 41 interrupts = <0 119 4>; 45 42 interrupt-parent = <&gic>; ··· 61 60 }; 62 61 }; 63 62 }; 63 + 64 + /include/ "twl6040.dtsi"
+30
Documentation/devicetree/bindings/regulator/88pm860x.txt
··· 1 + Marvell 88PM860x regulator 2 + 3 + Required properties: 4 + - compatible: "marvell,88pm860x" 5 + - reg: I2C slave address 6 + - regulators: A node that houses a sub-node for each regulator within the 7 + device. Each sub-node is identified using the regulator-compatible 8 + property, with valid values listed below. 9 + 10 + Example: 11 + 12 + pmic: 88pm860x@34 { 13 + compatible = "marvell,88pm860x"; 14 + reg = <0x34>; 15 + 16 + regulators { 17 + BUCK1 { 18 + regulator-min-microvolt = <1000000>; 19 + regulator-max-microvolt = <1500000>; 20 + regulator-boot-on; 21 + regulator-always-on; 22 + }; 23 + BUCK3 { 24 + regulator-min-microvolt = <1000000>; 25 + regulator-max-microvolt = <3000000>; 26 + regulator-boot-on; 27 + regulator-always-on; 28 + }; 29 + }; 30 + };
+69
Documentation/devicetree/bindings/regulator/max8907.txt
··· 1 + MAX8907 regulator 2 + 3 + Required properties: 4 + - compatible: "maxim,max8907" 5 + - reg: I2C slave address 6 + - interrupts: The interrupt output of the controller 7 + - mbatt-supply: The input supply for MBATT, BBAT, SDBY, VRTC. 8 + - in-v1-supply: The input supply for SD1. 9 + - in-v2-supply: The input supply for SD2. 10 + - in-v3-supply: The input supply for SD3. 11 + - in1-supply: The input supply for LDO1. 12 + ... 13 + - in20-supply: The input supply for LDO20. 14 + - regulators: A node that houses a sub-node for each regulator within the 15 + device. Each sub-node is identified using the node's name (or the deprecated 16 + regulator-compatible property if present), with valid values listed below. 17 + The content of each sub-node is defined by the standard binding for 18 + regulators; see regulator.txt. 19 + 20 + Optional properties: 21 + - maxim,system-power-controller: Boolean property indicating that the PMIC 22 + controls the overall system power. 23 + 24 + The valid names for regulators are: 25 + 26 + sd1, sd2, sd3, ldo1, ldo2, ldo3, ldo4, ldo5, ldo6, ldo7, ldo8, ldo9, ldo10, 27 + ldo11, ldo12, ldo13, ldo14, ldo15, ldo16, ldo17, ldo18, ldo19, ldo20, out5v, 28 + out33v, bbat, sdby, vrtc. 29 + 30 + Example: 31 + 32 + max8907@3c { 33 + compatible = "maxim,max8907"; 34 + reg = <0x3c>; 35 + interrupts = <0 86 0x4>; 36 + 37 + maxim,system-power-controller; 38 + 39 + mbatt-supply = <&some_reg>; 40 + in-v1-supply = <&mbatt_reg>; 41 + ... 42 + in1-supply = <&mbatt_reg>; 43 + ... 44 + 45 + regulators { 46 + mbatt_reg: mbatt { 47 + regulator-name = "vbat_pmu"; 48 + regulator-min-microvolt = <5000000>; 49 + regulator-max-microvolt = <5000000>; 50 + regulator-always-on; 51 + }; 52 + 53 + sd1 { 54 + regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; 55 + regulator-min-microvolt = <1000000>; 56 + regulator-max-microvolt = <1000000>; 57 + regulator-always-on; 58 + }; 59 + 60 + sd2 { 61 + regulator-name = "nvvdd_sv2,vdd_core"; 62 + regulator-min-microvolt = <1200000>; 63 + regulator-max-microvolt = <1200000>; 64 + regulator-always-on; 65 + }; 66 + ... 67 + }; 68 + }; 69 + };
+6
Documentation/devicetree/bindings/regulator/tps6586x.txt
··· 22 22 - vinldo678-supply: The input supply for the LDO6, LDO7 and LDO8 23 23 - vinldo9-supply: The input supply for the LDO9 24 24 25 + Optional properties: 26 + - ti,system-power-controller: Telling whether or not this pmic is controlling 27 + the system power. 28 + 25 29 Each regulator is defined using the standard binding for regulators. 26 30 27 31 Note: LDO5 and LDO_RTC is supplied by SYS regulator internally and driver ··· 40 36 41 37 #gpio-cells = <2>; 42 38 gpio-controller; 39 + 40 + ti,system-power-controller; 43 41 44 42 sys-supply = <&some_reg>; 45 43 vin-sm0-supply = <&some_reg>;
+15
Documentation/devicetree/bindings/video/backlight/88pm860x.txt
··· 1 + 88pm860x-backlight bindings 2 + 3 + Optional properties: 4 + - marvell,88pm860x-iset: Current supplies on backlight device. 5 + - marvell,88pm860x-pwm: PWM frequency on backlight device. 6 + 7 + Example: 8 + 9 + backlights { 10 + backlight-0 { 11 + marvell,88pm860x-iset = <4>; 12 + marvell,88pm860x-pwm = <3>; 13 + }; 14 + backlight-2 { 15 + };
+56
Documentation/smsc_ece1099.txt
··· 1 + What is smsc-ece1099? 2 + ---------------------- 3 + 4 + The ECE1099 is a 40-Pin 3.3V Keyboard Scan Expansion 5 + or GPIO Expansion device. The device supports a keyboard 6 + scan matrix of 23x8. The device is connected to a Master 7 + via the SMSC BC-Link interface or via the SMBus. 8 + Keypad scan Input(KSI) and Keypad Scan Output(KSO) signals 9 + are multiplexed with GPIOs. 10 + 11 + Interrupt generation 12 + -------------------- 13 + 14 + Interrupts can be generated by an edge detection on a GPIO 15 + pin or an edge detection on one of the bus interface pins. 16 + Interrupts can also be detected on the keyboard scan interface. 17 + The bus interrupt pin (BC_INT# or SMBUS_INT#) is asserted if 18 + any bit in one of the Interrupt Status registers is 1 and 19 + the corresponding Interrupt Mask bit is also 1. 20 + 21 + In order for software to determine which device is the source 22 + of an interrupt, it should first read the Group Interrupt Status Register 23 + to determine which Status register group is a source for the interrupt. 24 + Software should read both the Status register and the associated Mask register, 25 + then AND the two values together. Bits that are 1 in the result of the AND 26 + are active interrupts. Software clears an interrupt by writing a 1 to the 27 + corresponding bit in the Status register. 28 + 29 + Communication Protocol 30 + ---------------------- 31 + 32 + - SMbus slave Interface 33 + The host processor communicates with the ECE1099 device 34 + through a series of read/write registers via the SMBus 35 + interface. SMBus is a serial communication protocol between 36 + a computer host and its peripheral devices. The SMBus data 37 + rate is 10KHz minimum to 400 KHz maximum 38 + 39 + - Slave Bus Interface 40 + The ECE1099 device SMBus implementation is a subset of the 41 + SMBus interface to the host. The device is a slave-only SMBus device. 42 + The implementation in the device is a subset of SMBus since it 43 + only supports four protocols. 44 + 45 + The Write Byte, Read Byte, Send Byte, and Receive Byte protocols are the 46 + only valid SMBus protocols for the device. 47 + 48 + - BC-LinkTM Interface 49 + The BC-Link is a proprietary bus that allows communication 50 + between a Master device and a Companion device. The Master 51 + device uses this serial bus to read and write registers 52 + located on the Companion device. The bus comprises three signals, 53 + BC_CLK, BC_DAT and BC_INT#. The Master device always provides the 54 + clock, BC_CLK, and the Companion device is the source for an 55 + independent asynchronous interrupt signal, BC_INT#. The ECE1099 56 + supports BC-Link speeds up to 24MHz.
+7 -2
arch/arm/boot/dts/imx6q.dtsi
··· 400 400 #clock-cells = <1>; 401 401 }; 402 402 403 - anatop@020c8000 { 404 - compatible = "fsl,imx6q-anatop"; 403 + anatop: anatop@020c8000 { 404 + compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; 405 405 reg = <0x020c8000 0x1000>; 406 406 interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; 407 407 ··· 529 529 compatible = "fsl,imx6q-gpc"; 530 530 reg = <0x020dc000 0x4000>; 531 531 interrupts = <0 89 0x04 0 90 0x04>; 532 + }; 533 + 534 + gpr: iomuxc-gpr@020e0000 { 535 + compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; 536 + reg = <0x020e0000 0x38>; 532 537 }; 533 538 534 539 iomuxc@020e0000 {
+137
arch/arm/boot/dts/pxa910-dkb.dts
··· 29 29 }; 30 30 twsi1: i2c@d4011000 { 31 31 status = "okay"; 32 + 33 + pmic: 88pm860x@34 { 34 + compatible = "marvell,88pm860x"; 35 + reg = <0x34>; 36 + interrupts = <4>; 37 + interrupt-parent = <&intc>; 38 + interrupt-controller; 39 + #interrupt-cells = <1>; 40 + 41 + marvell,88pm860x-irq-read-clr; 42 + marvell,88pm860x-slave-addr = <0x11>; 43 + 44 + regulators { 45 + BUCK1 { 46 + regulator-min-microvolt = <1000000>; 47 + regulator-max-microvolt = <1500000>; 48 + regulator-boot-on; 49 + regulator-always-on; 50 + }; 51 + BUCK2 { 52 + regulator-min-microvolt = <1000000>; 53 + regulator-max-microvolt = <1500000>; 54 + regulator-boot-on; 55 + regulator-always-on; 56 + }; 57 + BUCK3 { 58 + regulator-min-microvolt = <1000000>; 59 + regulator-max-microvolt = <3000000>; 60 + regulator-boot-on; 61 + regulator-always-on; 62 + }; 63 + LDO1 { 64 + regulator-min-microvolt = <1200000>; 65 + regulator-max-microvolt = <2800000>; 66 + regulator-boot-on; 67 + regulator-always-on; 68 + }; 69 + LDO2 { 70 + regulator-min-microvolt = <1800000>; 71 + regulator-max-microvolt = <3300000>; 72 + regulator-boot-on; 73 + regulator-always-on; 74 + }; 75 + LDO3 { 76 + regulator-min-microvolt = <1800000>; 77 + regulator-max-microvolt = <3300000>; 78 + regulator-boot-on; 79 + regulator-always-on; 80 + }; 81 + LDO4 { 82 + regulator-min-microvolt = <1800000>; 83 + regulator-max-microvolt = <3300000>; 84 + regulator-always-on; 85 + }; 86 + LDO5 { 87 + regulator-min-microvolt = <2900000>; 88 + regulator-max-microvolt = <3300000>; 89 + regulator-boot-on; 90 + regulator-always-on; 91 + }; 92 + LDO6 { 93 + regulator-min-microvolt = <1800000>; 94 + regulator-max-microvolt = <3300000>; 95 + regulator-boot-on; 96 + regulator-always-on; 97 + }; 98 + LDO7 { 99 + regulator-min-microvolt = <1800000>; 100 + regulator-max-microvolt = <2900000>; 101 + regulator-boot-on; 102 + regulator-always-on; 103 + }; 104 + LDO8 { 105 + regulator-min-microvolt = <1800000>; 106 + regulator-max-microvolt = <2900000>; 107 + regulator-boot-on; 108 + regulator-always-on; 109 + }; 110 + LDO9 { 111 + regulator-min-microvolt = <1800000>; 112 + regulator-max-microvolt = <3300000>; 113 + regulator-boot-on; 114 + regulator-always-on; 115 + }; 116 + LDO10 { 117 + regulator-min-microvolt = <1200000>; 118 + regulator-max-microvolt = <3300000>; 119 + regulator-boot-on; 120 + regulator-always-on; 121 + }; 122 + LDO12 { 123 + regulator-min-microvolt = <1200000>; 124 + regulator-max-microvolt = <3300000>; 125 + regulator-always-on; 126 + }; 127 + LDO13 { 128 + regulator-min-microvolt = <1200000>; 129 + regulator-max-microvolt = <3300000>; 130 + regulator-always-on; 131 + }; 132 + LDO14 { 133 + regulator-min-microvolt = <1800000>; 134 + regulator-max-microvolt = <3300000>; 135 + regulator-always-on; 136 + }; 137 + }; 138 + rtc { 139 + marvell,88pm860x-vrtc = <1>; 140 + }; 141 + touch { 142 + marvell,88pm860x-gpadc-prebias = <1>; 143 + marvell,88pm860x-gpadc-slot-cycle = <1>; 144 + marvell,88pm860x-tsi-prebias = <6>; 145 + marvell,88pm860x-pen-prebias = <16>; 146 + marvell,88pm860x-pen-prechg = <2>; 147 + marvell,88pm860x-resistor-X = <300>; 148 + }; 149 + backlights { 150 + backlight-0 { 151 + marvell,88pm860x-iset = <4>; 152 + marvell,88pm860x-pwm = <3>; 153 + }; 154 + backlight-2 { 155 + }; 156 + }; 157 + leds { 158 + led0-red { 159 + marvell,88pm860x-iset = <12>; 160 + }; 161 + led0-green { 162 + marvell,88pm860x-iset = <12>; 163 + }; 164 + led0-blue { 165 + marvell,88pm860x-iset = <12>; 166 + }; 167 + }; 168 + }; 32 169 }; 33 170 rtc: rtc@d4010000 { 34 171 status = "okay";
+4
arch/arm/boot/dts/pxa910.dtsi
··· 120 120 121 121 twsi1: i2c@d4011000 { 122 122 compatible = "mrvl,mmp-twsi"; 123 + #address-cells = <1>; 124 + #size-cells = <0>; 123 125 reg = <0xd4011000 0x1000>; 124 126 interrupts = <7>; 125 127 mrvl,i2c-fast-mode; ··· 130 128 131 129 twsi2: i2c@d4037000 { 132 130 compatible = "mrvl,mmp-twsi"; 131 + #address-cells = <1>; 132 + #size-cells = <0>; 133 133 reg = <0xd4037000 0x1000>; 134 134 interrupts = <54>; 135 135 status = "disabled";
+1 -1
arch/arm/mach-imx/Kconfig
··· 758 758 select HAVE_IMX_MMDC 759 759 select HAVE_IMX_SRC 760 760 select HAVE_SMP 761 - select MFD_ANATOP 761 + select MFD_SYSCON 762 762 select PINCTRL 763 763 select PINCTRL_IMX6Q 764 764
+18 -29
arch/arm/mach-imx/mach-imx6q.c
··· 23 23 #include <linux/of_irq.h> 24 24 #include <linux/of_platform.h> 25 25 #include <linux/phy.h> 26 + #include <linux/regmap.h> 26 27 #include <linux/micrel_phy.h> 27 - #include <linux/mfd/anatop.h> 28 + #include <linux/mfd/syscon.h> 28 29 #include <asm/cpuidle.h> 29 30 #include <asm/smp_twd.h> 30 31 #include <asm/hardware/cache-l2x0.h> ··· 119 118 120 119 static void __init imx6q_usb_init(void) 121 120 { 122 - struct device_node *np; 123 - struct platform_device *pdev = NULL; 124 - struct anatop *adata = NULL; 125 - 126 - np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); 127 - if (np) 128 - pdev = of_find_device_by_node(np); 129 - if (pdev) 130 - adata = platform_get_drvdata(pdev); 131 - if (!adata) { 132 - if (np) 133 - of_node_put(np); 134 - return; 135 - } 121 + struct regmap *anatop; 136 122 137 123 #define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0 138 124 #define HW_ANADIG_USB2_CHRG_DETECT 0x00000210 ··· 127 139 #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000 128 140 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000 129 141 130 - /* 131 - * The external charger detector needs to be disabled, 132 - * or the signal at DP will be poor 133 - */ 134 - anatop_write_reg(adata, HW_ANADIG_USB1_CHRG_DETECT, 135 - BM_ANADIG_USB_CHRG_DETECT_EN_B 136 - | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B, 137 - ~0); 138 - anatop_write_reg(adata, HW_ANADIG_USB2_CHRG_DETECT, 139 - BM_ANADIG_USB_CHRG_DETECT_EN_B | 140 - BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B, 141 - ~0); 142 - 143 - of_node_put(np); 142 + anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop"); 143 + if (!IS_ERR(anatop)) { 144 + /* 145 + * The external charger detector needs to be disabled, 146 + * or the signal at DP will be poor 147 + */ 148 + regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT, 149 + BM_ANADIG_USB_CHRG_DETECT_EN_B 150 + | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B); 151 + regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT, 152 + BM_ANADIG_USB_CHRG_DETECT_EN_B | 153 + BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B); 154 + } else { 155 + pr_warn("failed to find fsl,imx6q-anatop regmap\n"); 156 + } 144 157 } 145 158 146 159 static void __init imx6q_init_machine(void)
+22 -9
arch/arm/mach-omap2/usb-host.c
··· 33 33 #ifdef CONFIG_MFD_OMAP_USB_HOST 34 34 35 35 #define OMAP_USBHS_DEVICE "usbhs_omap" 36 + #define OMAP_USBTLL_DEVICE "usbhs_tll" 36 37 #define USBHS_UHH_HWMODNAME "usb_host_hs" 37 38 #define USBHS_TLL_HWMODNAME "usb_tll_hs" 38 39 39 40 static struct usbhs_omap_platform_data usbhs_data; 41 + static struct usbtll_omap_platform_data usbtll_data; 40 42 static struct ehci_hcd_omap_platform_data ehci_data; 41 43 static struct ohci_hcd_omap_platform_data ohci_data; 42 44 ··· 487 485 488 486 void __init usbhs_init(const struct usbhs_omap_board_data *pdata) 489 487 { 490 - struct omap_hwmod *oh[2]; 488 + struct omap_hwmod *uhh_hwm, *tll_hwm; 491 489 struct platform_device *pdev; 492 490 int bus_id = -1; 493 491 int i; 494 492 495 493 for (i = 0; i < OMAP3_HS_USB_PORTS; i++) { 496 494 usbhs_data.port_mode[i] = pdata->port_mode[i]; 495 + usbtll_data.port_mode[i] = pdata->port_mode[i]; 497 496 ohci_data.port_mode[i] = pdata->port_mode[i]; 498 497 ehci_data.port_mode[i] = pdata->port_mode[i]; 499 498 ehci_data.reset_gpio_port[i] = pdata->reset_gpio_port[i]; ··· 513 510 setup_4430ohci_io_mux(pdata->port_mode); 514 511 } 515 512 516 - oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME); 517 - if (!oh[0]) { 513 + uhh_hwm = omap_hwmod_lookup(USBHS_UHH_HWMODNAME); 514 + if (!uhh_hwm) { 518 515 pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME); 519 516 return; 520 517 } 521 518 522 - oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME); 523 - if (!oh[1]) { 519 + tll_hwm = omap_hwmod_lookup(USBHS_TLL_HWMODNAME); 520 + if (!tll_hwm) { 524 521 pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME); 525 522 return; 526 523 } 527 524 528 - pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2, 529 - (void *)&usbhs_data, sizeof(usbhs_data), 525 + pdev = omap_device_build(OMAP_USBTLL_DEVICE, bus_id, tll_hwm, 526 + &usbtll_data, sizeof(usbtll_data), 530 527 omap_uhhtll_latency, 531 528 ARRAY_SIZE(omap_uhhtll_latency), false); 532 529 if (IS_ERR(pdev)) { 533 - pr_err("Could not build hwmod devices %s,%s\n", 534 - USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME); 530 + pr_err("Could not build hwmod device %s\n", 531 + USBHS_TLL_HWMODNAME); 532 + return; 533 + } 534 + 535 + pdev = omap_device_build(OMAP_USBHS_DEVICE, bus_id, uhh_hwm, 536 + &usbhs_data, sizeof(usbhs_data), 537 + omap_uhhtll_latency, 538 + ARRAY_SIZE(omap_uhhtll_latency), false); 539 + if (IS_ERR(pdev)) { 540 + pr_err("Could not build hwmod devices %s\n", 541 + USBHS_UHH_HWMODNAME); 535 542 return; 536 543 } 537 544 }
+1 -1
arch/arm/mach-u300/i2c.c
··· 9 9 */ 10 10 #include <linux/kernel.h> 11 11 #include <linux/i2c.h> 12 - #include <linux/mfd/abx500.h> 12 + #include <linux/mfd/ab3100.h> 13 13 #include <linux/regulator/machine.h> 14 14 #include <linux/amba/bus.h> 15 15 #include <mach/irqs.h>
+7
arch/arm/plat-omap/include/plat/usb.h
··· 4 4 #define __ASM_ARCH_OMAP_USB_H 5 5 6 6 #include <linux/io.h> 7 + #include <linux/platform_device.h> 7 8 #include <linux/usb/musb.h> 8 9 9 10 #define OMAP3_HS_USB_PORTS 3 ··· 64 63 struct ehci_hcd_omap_platform_data *ehci_data; 65 64 struct ohci_hcd_omap_platform_data *ohci_data; 66 65 }; 66 + 67 + struct usbtll_omap_platform_data { 68 + enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; 69 + }; 67 70 /*-------------------------------------------------------------------------*/ 68 71 69 72 struct omap_musb_board_data { ··· 86 81 extern void usb_musb_init(struct omap_musb_board_data *board_data); 87 82 88 83 extern void usbhs_init(const struct usbhs_omap_board_data *pdata); 84 + extern int omap_tll_enable(void); 85 + extern int omap_tll_disable(void); 89 86 90 87 extern int omap4430_phy_power(struct device *dev, int ID, int on); 91 88 extern int omap4430_phy_set_clk(struct device *dev, int on);
+7
drivers/gpio/Kconfig
··· 409 409 Say yes here to access the GPIO signals of various multi-function 410 410 power management chips from Texas Instruments. 411 411 412 + config GPIO_TWL6040 413 + tristate "TWL6040 GPO" 414 + depends on TWL6040_CORE 415 + help 416 + Say yes here to access the GPO signals of twl6040 417 + audio chip from Texas Instruments. 418 + 412 419 config GPIO_WM831X 413 420 tristate "WM831x GPIOs" 414 421 depends on MFD_WM831X
+1
drivers/gpio/Makefile
··· 68 68 obj-$(CONFIG_GPIO_TPS65910) += gpio-tps65910.o 69 69 obj-$(CONFIG_GPIO_TPS65912) += gpio-tps65912.o 70 70 obj-$(CONFIG_GPIO_TWL4030) += gpio-twl4030.o 71 + obj-$(CONFIG_GPIO_TWL6040) += gpio-twl6040.o 71 72 obj-$(CONFIG_GPIO_UCB1400) += gpio-ucb1400.o 72 73 obj-$(CONFIG_GPIO_VR41XX) += gpio-vr41xx.o 73 74 obj-$(CONFIG_GPIO_VT8500) += gpio-vt8500.o
+69 -10
drivers/gpio/gpio-ich.c
··· 49 49 {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */ 50 50 }; 51 51 52 + static const u8 ichx_reglen[3] = { 53 + 0x30, 0x10, 0x10, 54 + }; 55 + 52 56 #define ICHX_WRITE(val, reg, base_res) outl(val, (reg) + (base_res)->start) 53 57 #define ICHX_READ(reg, base_res) inl((reg) + (base_res)->start) 54 58 ··· 79 75 struct resource *pm_base; /* Power Mangagment IO base */ 80 76 struct ichx_desc *desc; /* Pointer to chipset-specific description */ 81 77 u32 orig_gpio_ctrl; /* Orig CTRL value, used to restore on exit */ 78 + u8 use_gpio; /* Which GPIO groups are usable */ 82 79 } ichx_priv; 83 80 84 81 static int modparam_gpiobase = -1; /* dynamic */ ··· 128 123 return data & (1 << bit) ? 1 : 0; 129 124 } 130 125 126 + static int ichx_gpio_check_available(struct gpio_chip *gpio, unsigned nr) 127 + { 128 + return (ichx_priv.use_gpio & (1 << (nr / 32))) ? 0 : -ENXIO; 129 + } 130 + 131 131 static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) 132 132 { 133 + if (!ichx_gpio_check_available(gpio, nr)) 134 + return -ENXIO; 135 + 133 136 /* 134 137 * Try setting pin as an input and verify it worked since many pins 135 138 * are output-only. ··· 151 138 static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, 152 139 int val) 153 140 { 141 + if (!ichx_gpio_check_available(gpio, nr)) 142 + return -ENXIO; 143 + 154 144 /* Set GPIO output value. */ 155 145 ichx_write_bit(GPIO_LVL, nr, val, 0); 156 146 ··· 169 153 170 154 static int ichx_gpio_get(struct gpio_chip *chip, unsigned nr) 171 155 { 156 + if (!ichx_gpio_check_available(chip, nr)) 157 + return -ENXIO; 158 + 172 159 return ichx_read_bit(GPIO_LVL, nr); 173 160 } 174 161 ··· 179 160 { 180 161 unsigned long flags; 181 162 u32 data; 163 + 164 + if (!ichx_gpio_check_available(chip, nr)) 165 + return -ENXIO; 182 166 183 167 /* 184 168 * GPI 0 - 15 need to be read from the power management registers on ··· 313 291 .ngpio = 76, 314 292 }; 315 293 294 + static int __devinit ichx_gpio_request_regions(struct resource *res_base, 295 + const char *name, u8 use_gpio) 296 + { 297 + int i; 298 + 299 + if (!res_base || !res_base->start || !res_base->end) 300 + return -ENODEV; 301 + 302 + for (i = 0; i < ARRAY_SIZE(ichx_regs[0]); i++) { 303 + if (!(use_gpio & (1 << i))) 304 + continue; 305 + if (!request_region(res_base->start + ichx_regs[0][i], 306 + ichx_reglen[i], name)) 307 + goto request_err; 308 + } 309 + return 0; 310 + 311 + request_err: 312 + /* Clean up: release already requested regions, if any */ 313 + for (i--; i >= 0; i--) { 314 + if (!(use_gpio & (1 << i))) 315 + continue; 316 + release_region(res_base->start + ichx_regs[0][i], 317 + ichx_reglen[i]); 318 + } 319 + return -EBUSY; 320 + } 321 + 322 + static void ichx_gpio_release_regions(struct resource *res_base, u8 use_gpio) 323 + { 324 + int i; 325 + 326 + for (i = 0; i < ARRAY_SIZE(ichx_regs[0]); i++) { 327 + if (!(use_gpio & (1 << i))) 328 + continue; 329 + release_region(res_base->start + ichx_regs[0][i], 330 + ichx_reglen[i]); 331 + } 332 + } 333 + 316 334 static int __devinit ichx_gpio_probe(struct platform_device *pdev) 317 335 { 318 336 struct resource *res_base, *res_pm; ··· 391 329 } 392 330 393 331 res_base = platform_get_resource(pdev, IORESOURCE_IO, ICH_RES_GPIO); 394 - if (!res_base || !res_base->start || !res_base->end) 395 - return -ENODEV; 396 - 397 - if (!request_region(res_base->start, resource_size(res_base), 398 - pdev->name)) 399 - return -EBUSY; 332 + ichx_priv.use_gpio = ich_info->use_gpio; 333 + err = ichx_gpio_request_regions(res_base, pdev->name, 334 + ichx_priv.use_gpio); 335 + if (err) 336 + return err; 400 337 401 338 ichx_priv.gpio_base = res_base; 402 339 ··· 435 374 return 0; 436 375 437 376 add_err: 438 - release_region(ichx_priv.gpio_base->start, 439 - resource_size(ichx_priv.gpio_base)); 377 + ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio); 440 378 if (ichx_priv.pm_base) 441 379 release_region(ichx_priv.pm_base->start, 442 380 resource_size(ichx_priv.pm_base)); ··· 453 393 return err; 454 394 } 455 395 456 - release_region(ichx_priv.gpio_base->start, 457 - resource_size(ichx_priv.gpio_base)); 396 + ichx_gpio_release_regions(ichx_priv.gpio_base, ichx_priv.use_gpio); 458 397 if (ichx_priv.pm_base) 459 398 release_region(ichx_priv.pm_base->start, 460 399 resource_size(ichx_priv.pm_base));
+137
drivers/gpio/gpio-twl6040.c
··· 1 + /* 2 + * Access to GPOs on TWL6040 chip 3 + * 4 + * Copyright (C) 2012 Texas Instruments, Inc. 5 + * 6 + * Authors: 7 + * Sergio Aguirre <saaguirre@ti.com> 8 + * Peter Ujfalusi <peter.ujfalusi@ti.com> 9 + * 10 + * This program is free software; you can redistribute it and/or modify 11 + * it under the terms of the GNU General Public License as published by 12 + * the Free Software Foundation; either version 2 of the License, or 13 + * (at your option) any later version. 14 + * 15 + * This program is distributed in the hope that it will be useful, 16 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 + * GNU General Public License for more details. 19 + * 20 + * You should have received a copy of the GNU General Public License 21 + * along with this program; if not, write to the Free Software 22 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 + */ 24 + 25 + #include <linux/module.h> 26 + #include <linux/init.h> 27 + #include <linux/kthread.h> 28 + #include <linux/irq.h> 29 + #include <linux/gpio.h> 30 + #include <linux/platform_device.h> 31 + #include <linux/of.h> 32 + 33 + #include <linux/mfd/twl6040.h> 34 + 35 + static struct gpio_chip twl6040gpo_chip; 36 + 37 + static int twl6040gpo_get(struct gpio_chip *chip, unsigned offset) 38 + { 39 + struct twl6040 *twl6040 = dev_get_drvdata(chip->dev->parent); 40 + int ret = 0; 41 + 42 + ret = twl6040_reg_read(twl6040, TWL6040_REG_GPOCTL); 43 + if (ret < 0) 44 + return ret; 45 + 46 + return (ret >> offset) & 1; 47 + } 48 + 49 + static int twl6040gpo_direction_out(struct gpio_chip *chip, unsigned offset, 50 + int value) 51 + { 52 + /* This only drives GPOs, and can't change direction */ 53 + return 0; 54 + } 55 + 56 + static void twl6040gpo_set(struct gpio_chip *chip, unsigned offset, int value) 57 + { 58 + struct twl6040 *twl6040 = dev_get_drvdata(chip->dev->parent); 59 + int ret; 60 + u8 gpoctl; 61 + 62 + ret = twl6040_reg_read(twl6040, TWL6040_REG_GPOCTL); 63 + if (ret < 0) 64 + return; 65 + 66 + if (value) 67 + gpoctl = ret | (1 << offset); 68 + else 69 + gpoctl = ret & ~(1 << offset); 70 + 71 + twl6040_reg_write(twl6040, TWL6040_REG_GPOCTL, gpoctl); 72 + } 73 + 74 + static struct gpio_chip twl6040gpo_chip = { 75 + .label = "twl6040", 76 + .owner = THIS_MODULE, 77 + .get = twl6040gpo_get, 78 + .direction_output = twl6040gpo_direction_out, 79 + .set = twl6040gpo_set, 80 + .can_sleep = 1, 81 + }; 82 + 83 + /*----------------------------------------------------------------------*/ 84 + 85 + static int __devinit gpo_twl6040_probe(struct platform_device *pdev) 86 + { 87 + struct twl6040_gpo_data *pdata = pdev->dev.platform_data; 88 + struct device *twl6040_core_dev = pdev->dev.parent; 89 + struct twl6040 *twl6040 = dev_get_drvdata(twl6040_core_dev); 90 + int ret; 91 + 92 + if (pdata) 93 + twl6040gpo_chip.base = pdata->gpio_base; 94 + else 95 + twl6040gpo_chip.base = -1; 96 + 97 + if (twl6040_get_revid(twl6040) < TWL6041_REV_ES2_0) 98 + twl6040gpo_chip.ngpio = 3; /* twl6040 have 3 GPO */ 99 + else 100 + twl6040gpo_chip.ngpio = 1; /* twl6041 have 1 GPO */ 101 + 102 + twl6040gpo_chip.dev = &pdev->dev; 103 + #ifdef CONFIG_OF_GPIO 104 + twl6040gpo_chip.of_node = twl6040_core_dev->of_node; 105 + #endif 106 + 107 + ret = gpiochip_add(&twl6040gpo_chip); 108 + if (ret < 0) { 109 + dev_err(&pdev->dev, "could not register gpiochip, %d\n", ret); 110 + twl6040gpo_chip.ngpio = 0; 111 + } 112 + 113 + return ret; 114 + } 115 + 116 + static int __devexit gpo_twl6040_remove(struct platform_device *pdev) 117 + { 118 + return gpiochip_remove(&twl6040gpo_chip); 119 + } 120 + 121 + /* Note: this hardware lives inside an I2C-based multi-function device. */ 122 + MODULE_ALIAS("platform:twl6040-gpo"); 123 + 124 + static struct platform_driver gpo_twl6040_driver = { 125 + .driver = { 126 + .name = "twl6040-gpo", 127 + .owner = THIS_MODULE, 128 + }, 129 + .probe = gpo_twl6040_probe, 130 + .remove = gpo_twl6040_remove, 131 + }; 132 + 133 + module_platform_driver(gpo_twl6040_driver); 134 + 135 + MODULE_AUTHOR("Texas Instruments, Inc."); 136 + MODULE_DESCRIPTION("GPO interface for TWL6040"); 137 + MODULE_LICENSE("GPL");
+16 -2
drivers/input/misc/twl4030-vibra.c
··· 26 26 #include <linux/module.h> 27 27 #include <linux/jiffies.h> 28 28 #include <linux/platform_device.h> 29 + #include <linux/of.h> 29 30 #include <linux/workqueue.h> 30 31 #include <linux/i2c/twl.h> 31 32 #include <linux/mfd/twl4030-audio.h> ··· 195 194 static SIMPLE_DEV_PM_OPS(twl4030_vibra_pm_ops, 196 195 twl4030_vibra_suspend, twl4030_vibra_resume); 197 196 197 + static bool twl4030_vibra_check_coexist(struct twl4030_vibra_data *pdata, 198 + struct device_node *node) 199 + { 200 + if (pdata && pdata->coexist) 201 + return true; 202 + 203 + if (of_find_node_by_name(node, "codec")) 204 + return true; 205 + 206 + return false; 207 + } 208 + 198 209 static int __devinit twl4030_vibra_probe(struct platform_device *pdev) 199 210 { 200 211 struct twl4030_vibra_data *pdata = pdev->dev.platform_data; 212 + struct device_node *twl4030_core_node = pdev->dev.parent->of_node; 201 213 struct vibra_info *info; 202 214 int ret; 203 215 204 - if (!pdata) { 216 + if (!pdata && !twl4030_core_node) { 205 217 dev_dbg(&pdev->dev, "platform_data not available\n"); 206 218 return -EINVAL; 207 219 } ··· 224 210 return -ENOMEM; 225 211 226 212 info->dev = &pdev->dev; 227 - info->coexist = pdata->coexist; 213 + info->coexist = twl4030_vibra_check_coexist(pdata, twl4030_core_node); 228 214 INIT_WORK(&info->play_work, vibra_play_work); 229 215 230 216 info->input_dev = input_allocate_device();
+111 -16
drivers/input/touchscreen/88pm860x-ts.c
··· 10 10 */ 11 11 #include <linux/kernel.h> 12 12 #include <linux/module.h> 13 + #include <linux/of.h> 13 14 #include <linux/platform_device.h> 14 15 #include <linux/i2c.h> 15 16 #include <linux/input.h> ··· 114 113 pm860x_set_bits(touch->i2c, MEAS_EN3, data, 0); 115 114 } 116 115 116 + #ifdef CONFIG_OF 117 + static int __devinit pm860x_touch_dt_init(struct platform_device *pdev, 118 + struct pm860x_chip *chip, 119 + int *res_x) 120 + { 121 + struct device_node *np = pdev->dev.parent->of_node; 122 + struct i2c_client *i2c = (chip->id == CHIP_PM8607) ? chip->client \ 123 + : chip->companion; 124 + int data, n, ret; 125 + if (!np) 126 + return -ENODEV; 127 + np = of_find_node_by_name(np, "touch"); 128 + if (!np) { 129 + dev_err(&pdev->dev, "Can't find touch node\n"); 130 + return -EINVAL; 131 + } 132 + /* set GPADC MISC1 register */ 133 + data = 0; 134 + if (!of_property_read_u32(np, "marvell,88pm860x-gpadc-prebias", &n)) 135 + data |= (n << 1) & PM8607_GPADC_PREBIAS_MASK; 136 + if (!of_property_read_u32(np, "marvell,88pm860x-gpadc-slot-cycle", &n)) 137 + data |= (n << 3) & PM8607_GPADC_SLOT_CYCLE_MASK; 138 + if (!of_property_read_u32(np, "marvell,88pm860x-gpadc-off-scale", &n)) 139 + data |= (n << 5) & PM8607_GPADC_OFF_SCALE_MASK; 140 + if (!of_property_read_u32(np, "marvell,88pm860x-gpadc-sw-cal", &n)) 141 + data |= (n << 7) & PM8607_GPADC_SW_CAL_MASK; 142 + if (data) { 143 + ret = pm860x_reg_write(i2c, PM8607_GPADC_MISC1, data); 144 + if (ret < 0) 145 + return -EINVAL; 146 + } 147 + /* set tsi prebias time */ 148 + if (!of_property_read_u32(np, "marvell,88pm860x-tsi-prebias", &data)) { 149 + ret = pm860x_reg_write(i2c, PM8607_TSI_PREBIAS, data); 150 + if (ret < 0) 151 + return -EINVAL; 152 + } 153 + /* set prebias & prechg time of pen detect */ 154 + data = 0; 155 + if (!of_property_read_u32(np, "marvell,88pm860x-pen-prebias", &n)) 156 + data |= n & PM8607_PD_PREBIAS_MASK; 157 + if (!of_property_read_u32(np, "marvell,88pm860x-pen-prechg", &n)) 158 + data |= n & PM8607_PD_PRECHG_MASK; 159 + if (data) { 160 + ret = pm860x_reg_write(i2c, PM8607_PD_PREBIAS, data); 161 + if (ret < 0) 162 + return -EINVAL; 163 + } 164 + of_property_read_u32(np, "marvell,88pm860x-resistor-X", res_x); 165 + return 0; 166 + } 167 + #else 168 + #define pm860x_touch_dt_init(x, y, z) (-1) 169 + #endif 170 + 117 171 static int __devinit pm860x_touch_probe(struct platform_device *pdev) 118 172 { 119 173 struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent); 120 - struct pm860x_platform_data *pm860x_pdata = \ 121 - pdev->dev.parent->platform_data; 122 - struct pm860x_touch_pdata *pdata = NULL; 174 + struct pm860x_touch_pdata *pdata = pdev->dev.platform_data; 123 175 struct pm860x_touch *touch; 124 - int irq, ret; 176 + struct i2c_client *i2c = (chip->id == CHIP_PM8607) ? chip->client \ 177 + : chip->companion; 178 + int irq, ret, res_x = 0, data = 0; 125 179 126 180 irq = platform_get_irq(pdev, 0); 127 181 if (irq < 0) { ··· 184 128 return -EINVAL; 185 129 } 186 130 187 - if (!pm860x_pdata) { 188 - dev_err(&pdev->dev, "platform data is missing\n"); 189 - return -EINVAL; 131 + if (pm860x_touch_dt_init(pdev, chip, &res_x)) { 132 + if (pdata) { 133 + /* set GPADC MISC1 register */ 134 + data = 0; 135 + data |= (pdata->gpadc_prebias << 1) 136 + & PM8607_GPADC_PREBIAS_MASK; 137 + data |= (pdata->slot_cycle << 3) 138 + & PM8607_GPADC_SLOT_CYCLE_MASK; 139 + data |= (pdata->off_scale << 5) 140 + & PM8607_GPADC_OFF_SCALE_MASK; 141 + data |= (pdata->sw_cal << 7) 142 + & PM8607_GPADC_SW_CAL_MASK; 143 + if (data) { 144 + ret = pm860x_reg_write(i2c, 145 + PM8607_GPADC_MISC1, data); 146 + if (ret < 0) 147 + return -EINVAL; 148 + } 149 + /* set tsi prebias time */ 150 + if (pdata->tsi_prebias) { 151 + data = pdata->tsi_prebias; 152 + ret = pm860x_reg_write(i2c, 153 + PM8607_TSI_PREBIAS, data); 154 + if (ret < 0) 155 + return -EINVAL; 156 + } 157 + /* set prebias & prechg time of pen detect */ 158 + data = 0; 159 + data |= pdata->pen_prebias 160 + & PM8607_PD_PREBIAS_MASK; 161 + data |= (pdata->pen_prechg << 5) 162 + & PM8607_PD_PRECHG_MASK; 163 + if (data) { 164 + ret = pm860x_reg_write(i2c, 165 + PM8607_PD_PREBIAS, data); 166 + if (ret < 0) 167 + return -EINVAL; 168 + } 169 + res_x = pdata->res_x; 170 + } else { 171 + dev_err(&pdev->dev, "failed to get platform data\n"); 172 + return -EINVAL; 173 + } 190 174 } 191 - 192 - pdata = pm860x_pdata->touch; 193 - if (!pdata) { 194 - dev_err(&pdev->dev, "touchscreen data is missing\n"); 195 - return -EINVAL; 196 - } 175 + /* enable GPADC */ 176 + ret = pm860x_set_bits(i2c, PM8607_GPADC_MISC1, PM8607_GPADC_EN, 177 + PM8607_GPADC_EN); 178 + if (ret) 179 + return ret; 197 180 198 181 touch = kzalloc(sizeof(struct pm860x_touch), GFP_KERNEL); 199 182 if (touch == NULL) ··· 253 158 touch->idev->open = pm860x_touch_open; 254 159 touch->idev->close = pm860x_touch_close; 255 160 touch->chip = chip; 256 - touch->i2c = (chip->id == CHIP_PM8607) ? chip->client : chip->companion; 257 - touch->irq = irq + chip->irq_base; 258 - touch->res_x = pdata->res_x; 161 + touch->i2c = i2c; 162 + touch->irq = irq; 163 + touch->res_x = res_x; 259 164 input_set_drvdata(touch->idev, touch); 260 165 261 166 ret = request_threaded_irq(touch->irq, NULL, pm860x_touch_handler,
+98 -107
drivers/leds/leds-88pm860x.c
··· 12 12 13 13 #include <linux/kernel.h> 14 14 #include <linux/init.h> 15 + #include <linux/of.h> 15 16 #include <linux/platform_device.h> 16 17 #include <linux/i2c.h> 17 18 #include <linux/leds.h> ··· 21 20 #include <linux/mfd/88pm860x.h> 22 21 #include <linux/module.h> 23 22 24 - #define LED_PWM_SHIFT (3) 25 23 #define LED_PWM_MASK (0x1F) 26 24 #define LED_CURRENT_MASK (0x07 << 5) 27 25 28 - #define LED_BLINK_ON_MASK (0x07) 29 26 #define LED_BLINK_MASK (0x7F) 30 27 31 - #define LED_BLINK_ON(x) ((x & 0x7) * 66 + 66) 32 - #define LED_BLINK_ON_MIN LED_BLINK_ON(0) 33 - #define LED_BLINK_ON_MAX LED_BLINK_ON(0x7) 34 28 #define LED_ON_CONTINUOUS (0x0F << 3) 35 - #define LED_TO_ON(x) ((x - 66) / 66) 36 29 37 30 #define LED1_BLINK_EN (1 << 1) 38 31 #define LED2_BLINK_EN (1 << 2) ··· 44 49 unsigned char brightness; 45 50 unsigned char current_brightness; 46 51 47 - int blink_data; 48 - int blink_time; 49 - int blink_on; 50 - int blink_off; 52 + int reg_control; 53 + int reg_blink; 54 + int blink_mask; 51 55 }; 52 - 53 - /* return offset of color register */ 54 - static inline int __led_off(int port) 55 - { 56 - int ret = -EINVAL; 57 - 58 - switch (port) { 59 - case PM8606_LED1_RED: 60 - case PM8606_LED1_GREEN: 61 - case PM8606_LED1_BLUE: 62 - ret = port - PM8606_LED1_RED + PM8606_RGB1B; 63 - break; 64 - case PM8606_LED2_RED: 65 - case PM8606_LED2_GREEN: 66 - case PM8606_LED2_BLUE: 67 - ret = port - PM8606_LED2_RED + PM8606_RGB2B; 68 - break; 69 - } 70 - return ret; 71 - } 72 - 73 - /* return offset of blink register */ 74 - static inline int __blink_off(int port) 75 - { 76 - int ret = -EINVAL; 77 - 78 - switch (port) { 79 - case PM8606_LED1_RED: 80 - case PM8606_LED1_GREEN: 81 - case PM8606_LED1_BLUE: 82 - ret = PM8606_RGB1A; 83 - break; 84 - case PM8606_LED2_RED: 85 - case PM8606_LED2_GREEN: 86 - case PM8606_LED2_BLUE: 87 - ret = PM8606_RGB2A; 88 - break; 89 - } 90 - return ret; 91 - } 92 - 93 - static inline int __blink_ctl_mask(int port) 94 - { 95 - int ret = -EINVAL; 96 - 97 - switch (port) { 98 - case PM8606_LED1_RED: 99 - case PM8606_LED1_GREEN: 100 - case PM8606_LED1_BLUE: 101 - ret = LED1_BLINK_EN; 102 - break; 103 - case PM8606_LED2_RED: 104 - case PM8606_LED2_GREEN: 105 - case PM8606_LED2_BLUE: 106 - ret = LED2_BLINK_EN; 107 - break; 108 - } 109 - return ret; 110 - } 111 56 112 57 static int led_power_set(struct pm860x_chip *chip, int port, int on) 113 58 { 114 59 int ret = -EINVAL; 115 60 116 61 switch (port) { 117 - case PM8606_LED1_RED: 118 - case PM8606_LED1_GREEN: 119 - case PM8606_LED1_BLUE: 62 + case 0: 63 + case 1: 64 + case 2: 120 65 ret = on ? pm8606_osc_enable(chip, RGB1_ENABLE) : 121 66 pm8606_osc_disable(chip, RGB1_ENABLE); 122 67 break; 123 - case PM8606_LED2_RED: 124 - case PM8606_LED2_GREEN: 125 - case PM8606_LED2_BLUE: 68 + case 3: 69 + case 4: 70 + case 5: 126 71 ret = on ? pm8606_osc_enable(chip, RGB2_ENABLE) : 127 72 pm8606_osc_disable(chip, RGB2_ENABLE); 128 73 break; ··· 76 141 struct pm860x_led *led; 77 142 struct pm860x_chip *chip; 78 143 unsigned char buf[3]; 79 - int mask, ret; 144 + int ret; 80 145 81 146 led = container_of(work, struct pm860x_led, work); 82 147 chip = led->chip; ··· 84 149 if ((led->current_brightness == 0) && led->brightness) { 85 150 led_power_set(chip, led->port, 1); 86 151 if (led->iset) { 87 - pm860x_set_bits(led->i2c, __led_off(led->port), 152 + pm860x_set_bits(led->i2c, led->reg_control, 88 153 LED_CURRENT_MASK, led->iset); 89 154 } 90 - pm860x_set_bits(led->i2c, __blink_off(led->port), 155 + pm860x_set_bits(led->i2c, led->reg_blink, 91 156 LED_BLINK_MASK, LED_ON_CONTINUOUS); 92 - mask = __blink_ctl_mask(led->port); 93 - pm860x_set_bits(led->i2c, PM8606_WLED3B, mask, mask); 157 + pm860x_set_bits(led->i2c, PM8606_WLED3B, led->blink_mask, 158 + led->blink_mask); 94 159 } 95 - pm860x_set_bits(led->i2c, __led_off(led->port), LED_PWM_MASK, 160 + pm860x_set_bits(led->i2c, led->reg_control, LED_PWM_MASK, 96 161 led->brightness); 97 162 98 163 if (led->brightness == 0) { 99 - pm860x_bulk_read(led->i2c, __led_off(led->port), 3, buf); 164 + pm860x_bulk_read(led->i2c, led->reg_control, 3, buf); 100 165 ret = buf[0] & LED_PWM_MASK; 101 166 ret |= buf[1] & LED_PWM_MASK; 102 167 ret |= buf[2] & LED_PWM_MASK; 103 168 if (ret == 0) { 104 169 /* unset current since no led is lighting */ 105 - pm860x_set_bits(led->i2c, __led_off(led->port), 170 + pm860x_set_bits(led->i2c, led->reg_control, 106 171 LED_CURRENT_MASK, 0); 107 - mask = __blink_ctl_mask(led->port); 108 - pm860x_set_bits(led->i2c, PM8606_WLED3B, mask, 0); 172 + pm860x_set_bits(led->i2c, PM8606_WLED3B, 173 + led->blink_mask, 0); 109 174 led_power_set(chip, led->port, 0); 110 175 } 111 176 } 112 177 led->current_brightness = led->brightness; 113 178 dev_dbg(chip->dev, "Update LED. (reg:%d, brightness:%d)\n", 114 - __led_off(led->port), led->brightness); 179 + led->reg_control, led->brightness); 115 180 mutex_unlock(&led->lock); 116 181 } 117 182 ··· 124 189 schedule_work(&data->work); 125 190 } 126 191 192 + #ifdef CONFIG_OF 193 + static int pm860x_led_dt_init(struct platform_device *pdev, 194 + struct pm860x_led *data) 195 + { 196 + struct device_node *nproot = pdev->dev.parent->of_node, *np; 197 + int iset = 0; 198 + if (!nproot) 199 + return -ENODEV; 200 + nproot = of_find_node_by_name(nproot, "leds"); 201 + if (!nproot) { 202 + dev_err(&pdev->dev, "failed to find leds node\n"); 203 + return -ENODEV; 204 + } 205 + for_each_child_of_node(nproot, np) { 206 + if (!of_node_cmp(np->name, data->name)) { 207 + of_property_read_u32(np, "marvell,88pm860x-iset", 208 + &iset); 209 + data->iset = PM8606_LED_CURRENT(iset); 210 + break; 211 + } 212 + } 213 + return 0; 214 + } 215 + #else 216 + #define pm860x_led_dt_init(x, y) (-1) 217 + #endif 218 + 127 219 static int pm860x_led_probe(struct platform_device *pdev) 128 220 { 129 221 struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent); 130 - struct pm860x_led_pdata *pdata; 222 + struct pm860x_led_pdata *pdata = pdev->dev.platform_data; 131 223 struct pm860x_led *data; 132 224 struct resource *res; 133 - int ret; 134 - 135 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 136 - if (res == NULL) { 137 - dev_err(&pdev->dev, "No I/O resource!\n"); 138 - return -EINVAL; 139 - } 140 - 141 - pdata = pdev->dev.platform_data; 142 - if (pdata == NULL) { 143 - dev_err(&pdev->dev, "No platform data!\n"); 144 - return -EINVAL; 145 - } 225 + int ret = 0; 146 226 147 227 data = devm_kzalloc(&pdev->dev, sizeof(struct pm860x_led), GFP_KERNEL); 148 228 if (data == NULL) 149 229 return -ENOMEM; 150 - strncpy(data->name, res->name, MFD_NAME_SIZE - 1); 230 + res = platform_get_resource_byname(pdev, IORESOURCE_REG, "control"); 231 + if (!res) { 232 + dev_err(&pdev->dev, "No REG resource for control\n"); 233 + ret = -ENXIO; 234 + goto out; 235 + } 236 + data->reg_control = res->start; 237 + res = platform_get_resource_byname(pdev, IORESOURCE_REG, "blink"); 238 + if (!res) { 239 + dev_err(&pdev->dev, "No REG resource for blink\n"); 240 + ret = -ENXIO; 241 + goto out; 242 + } 243 + data->reg_blink = res->start; 244 + memset(data->name, 0, MFD_NAME_SIZE); 245 + switch (pdev->id) { 246 + case 0: 247 + data->blink_mask = LED1_BLINK_EN; 248 + sprintf(data->name, "led0-red"); 249 + break; 250 + case 1: 251 + data->blink_mask = LED1_BLINK_EN; 252 + sprintf(data->name, "led0-green"); 253 + break; 254 + case 2: 255 + data->blink_mask = LED1_BLINK_EN; 256 + sprintf(data->name, "led0-blue"); 257 + break; 258 + case 3: 259 + data->blink_mask = LED2_BLINK_EN; 260 + sprintf(data->name, "led1-red"); 261 + break; 262 + case 4: 263 + data->blink_mask = LED2_BLINK_EN; 264 + sprintf(data->name, "led1-green"); 265 + break; 266 + case 5: 267 + data->blink_mask = LED2_BLINK_EN; 268 + sprintf(data->name, "led1-blue"); 269 + break; 270 + } 151 271 dev_set_drvdata(&pdev->dev, data); 152 272 data->chip = chip; 153 273 data->i2c = (chip->id == CHIP_PM8606) ? chip->client : chip->companion; 154 - data->iset = pdata->iset; 155 - data->port = pdata->flags; 156 - if (data->port < 0) { 157 - dev_err(&pdev->dev, "check device failed\n"); 158 - return -EINVAL; 159 - } 274 + data->port = pdev->id; 275 + if (pm860x_led_dt_init(pdev, data)) 276 + if (pdata) 277 + data->iset = pdata->iset; 160 278 161 279 data->current_brightness = 0; 162 280 data->cdev.name = data->name; ··· 224 236 } 225 237 pm860x_led_set(&data->cdev, 0); 226 238 return 0; 239 + out: 240 + devm_kfree(&pdev->dev, data); 241 + return ret; 227 242 } 228 243 229 244 static int pm860x_led_remove(struct platform_device *pdev)
+557 -228
drivers/mfd/88pm860x-core.c
··· 11 11 12 12 #include <linux/kernel.h> 13 13 #include <linux/module.h> 14 + #include <linux/err.h> 14 15 #include <linux/i2c.h> 15 16 #include <linux/irq.h> 16 17 #include <linux/interrupt.h> 18 + #include <linux/irqdomain.h> 19 + #include <linux/of.h> 20 + #include <linux/of_platform.h> 17 21 #include <linux/platform_device.h> 22 + #include <linux/regmap.h> 23 + #include <linux/slab.h> 18 24 #include <linux/mfd/core.h> 19 25 #include <linux/mfd/88pm860x.h> 20 26 #include <linux/regulator/machine.h> 21 27 22 28 #define INT_STATUS_NUM 3 23 29 24 - static struct resource bk_resources[] __devinitdata = { 25 - {PM8606_BACKLIGHT1, PM8606_BACKLIGHT1, "backlight-0", IORESOURCE_IO,}, 26 - {PM8606_BACKLIGHT2, PM8606_BACKLIGHT2, "backlight-1", IORESOURCE_IO,}, 27 - {PM8606_BACKLIGHT3, PM8606_BACKLIGHT3, "backlight-2", IORESOURCE_IO,}, 30 + static struct resource bk0_resources[] __devinitdata = { 31 + {2, 2, "duty cycle", IORESOURCE_REG, }, 32 + {3, 3, "always on", IORESOURCE_REG, }, 33 + {3, 3, "current", IORESOURCE_REG, }, 34 + }; 35 + static struct resource bk1_resources[] __devinitdata = { 36 + {4, 4, "duty cycle", IORESOURCE_REG, }, 37 + {5, 5, "always on", IORESOURCE_REG, }, 38 + {5, 5, "current", IORESOURCE_REG, }, 39 + }; 40 + static struct resource bk2_resources[] __devinitdata = { 41 + {6, 6, "duty cycle", IORESOURCE_REG, }, 42 + {7, 7, "always on", IORESOURCE_REG, }, 43 + {5, 5, "current", IORESOURCE_REG, }, 28 44 }; 29 45 30 - static struct resource led_resources[] __devinitdata = { 31 - {PM8606_LED1_RED, PM8606_LED1_RED, "led0-red", IORESOURCE_IO,}, 32 - {PM8606_LED1_GREEN, PM8606_LED1_GREEN, "led0-green", IORESOURCE_IO,}, 33 - {PM8606_LED1_BLUE, PM8606_LED1_BLUE, "led0-blue", IORESOURCE_IO,}, 34 - {PM8606_LED2_RED, PM8606_LED2_RED, "led1-red", IORESOURCE_IO,}, 35 - {PM8606_LED2_GREEN, PM8606_LED2_GREEN, "led1-green", IORESOURCE_IO,}, 36 - {PM8606_LED2_BLUE, PM8606_LED2_BLUE, "led1-blue", IORESOURCE_IO,}, 46 + static struct resource led0_resources[] __devinitdata = { 47 + /* RGB1 Red LED */ 48 + {0xd, 0xd, "control", IORESOURCE_REG, }, 49 + {0xc, 0xc, "blink", IORESOURCE_REG, }, 50 + }; 51 + static struct resource led1_resources[] __devinitdata = { 52 + /* RGB1 Green LED */ 53 + {0xe, 0xe, "control", IORESOURCE_REG, }, 54 + {0xc, 0xc, "blink", IORESOURCE_REG, }, 55 + }; 56 + static struct resource led2_resources[] __devinitdata = { 57 + /* RGB1 Blue LED */ 58 + {0xf, 0xf, "control", IORESOURCE_REG, }, 59 + {0xc, 0xc, "blink", IORESOURCE_REG, }, 60 + }; 61 + static struct resource led3_resources[] __devinitdata = { 62 + /* RGB2 Red LED */ 63 + {0x9, 0x9, "control", IORESOURCE_REG, }, 64 + {0x8, 0x8, "blink", IORESOURCE_REG, }, 65 + }; 66 + static struct resource led4_resources[] __devinitdata = { 67 + /* RGB2 Green LED */ 68 + {0xa, 0xa, "control", IORESOURCE_REG, }, 69 + {0x8, 0x8, "blink", IORESOURCE_REG, }, 70 + }; 71 + static struct resource led5_resources[] __devinitdata = { 72 + /* RGB2 Blue LED */ 73 + {0xb, 0xb, "control", IORESOURCE_REG, }, 74 + {0x8, 0x8, "blink", IORESOURCE_REG, }, 37 75 }; 38 76 39 - static struct resource regulator_resources[] __devinitdata = { 40 - {PM8607_ID_BUCK1, PM8607_ID_BUCK1, "buck-1", IORESOURCE_IO,}, 41 - {PM8607_ID_BUCK2, PM8607_ID_BUCK2, "buck-2", IORESOURCE_IO,}, 42 - {PM8607_ID_BUCK3, PM8607_ID_BUCK3, "buck-3", IORESOURCE_IO,}, 43 - {PM8607_ID_LDO1, PM8607_ID_LDO1, "ldo-01", IORESOURCE_IO,}, 44 - {PM8607_ID_LDO2, PM8607_ID_LDO2, "ldo-02", IORESOURCE_IO,}, 45 - {PM8607_ID_LDO3, PM8607_ID_LDO3, "ldo-03", IORESOURCE_IO,}, 46 - {PM8607_ID_LDO4, PM8607_ID_LDO4, "ldo-04", IORESOURCE_IO,}, 47 - {PM8607_ID_LDO5, PM8607_ID_LDO5, "ldo-05", IORESOURCE_IO,}, 48 - {PM8607_ID_LDO6, PM8607_ID_LDO6, "ldo-06", IORESOURCE_IO,}, 49 - {PM8607_ID_LDO7, PM8607_ID_LDO7, "ldo-07", IORESOURCE_IO,}, 50 - {PM8607_ID_LDO8, PM8607_ID_LDO8, "ldo-08", IORESOURCE_IO,}, 51 - {PM8607_ID_LDO9, PM8607_ID_LDO9, "ldo-09", IORESOURCE_IO,}, 52 - {PM8607_ID_LDO10, PM8607_ID_LDO10, "ldo-10", IORESOURCE_IO,}, 53 - {PM8607_ID_LDO11, PM8607_ID_LDO11, "ldo-11", IORESOURCE_IO,}, 54 - {PM8607_ID_LDO12, PM8607_ID_LDO12, "ldo-12", IORESOURCE_IO,}, 55 - {PM8607_ID_LDO13, PM8607_ID_LDO13, "ldo-13", IORESOURCE_IO,}, 56 - {PM8607_ID_LDO14, PM8607_ID_LDO14, "ldo-14", IORESOURCE_IO,}, 57 - {PM8607_ID_LDO15, PM8607_ID_LDO15, "ldo-15", IORESOURCE_IO,}, 77 + static struct resource buck1_resources[] __devinitdata = { 78 + {0x24, 0x24, "buck set", IORESOURCE_REG, }, 79 + }; 80 + static struct resource buck2_resources[] __devinitdata = { 81 + {0x25, 0x25, "buck set", IORESOURCE_REG, }, 82 + }; 83 + static struct resource buck3_resources[] __devinitdata = { 84 + {0x26, 0x26, "buck set", IORESOURCE_REG, }, 85 + }; 86 + static struct resource ldo1_resources[] __devinitdata = { 87 + {0x10, 0x10, "ldo set", IORESOURCE_REG, }, 88 + }; 89 + static struct resource ldo2_resources[] __devinitdata = { 90 + {0x11, 0x11, "ldo set", IORESOURCE_REG, }, 91 + }; 92 + static struct resource ldo3_resources[] __devinitdata = { 93 + {0x12, 0x12, "ldo set", IORESOURCE_REG, }, 94 + }; 95 + static struct resource ldo4_resources[] __devinitdata = { 96 + {0x13, 0x13, "ldo set", IORESOURCE_REG, }, 97 + }; 98 + static struct resource ldo5_resources[] __devinitdata = { 99 + {0x14, 0x14, "ldo set", IORESOURCE_REG, }, 100 + }; 101 + static struct resource ldo6_resources[] __devinitdata = { 102 + {0x15, 0x15, "ldo set", IORESOURCE_REG, }, 103 + }; 104 + static struct resource ldo7_resources[] __devinitdata = { 105 + {0x16, 0x16, "ldo set", IORESOURCE_REG, }, 106 + }; 107 + static struct resource ldo8_resources[] __devinitdata = { 108 + {0x17, 0x17, "ldo set", IORESOURCE_REG, }, 109 + }; 110 + static struct resource ldo9_resources[] __devinitdata = { 111 + {0x18, 0x18, "ldo set", IORESOURCE_REG, }, 112 + }; 113 + static struct resource ldo10_resources[] __devinitdata = { 114 + {0x19, 0x19, "ldo set", IORESOURCE_REG, }, 115 + }; 116 + static struct resource ldo12_resources[] __devinitdata = { 117 + {0x1a, 0x1a, "ldo set", IORESOURCE_REG, }, 118 + }; 119 + static struct resource ldo_vibrator_resources[] __devinitdata = { 120 + {0x28, 0x28, "ldo set", IORESOURCE_REG, }, 121 + }; 122 + static struct resource ldo14_resources[] __devinitdata = { 123 + {0x1b, 0x1b, "ldo set", IORESOURCE_REG, }, 58 124 }; 59 125 60 126 static struct resource touch_resources[] __devinitdata = { ··· 156 90 {PM8607_IRQ_VCHG, PM8607_IRQ_VCHG, "vchg voltage", IORESOURCE_IRQ,}, 157 91 }; 158 92 159 - static struct resource preg_resources[] __devinitdata = { 160 - {PM8606_ID_PREG, PM8606_ID_PREG, "preg", IORESOURCE_IO,}, 161 - }; 162 - 163 93 static struct resource rtc_resources[] __devinitdata = { 164 94 {PM8607_IRQ_RTC, PM8607_IRQ_RTC, "rtc", IORESOURCE_IRQ,}, 165 95 }; 166 96 167 - static struct mfd_cell bk_devs[] = { 168 - {"88pm860x-backlight", 0,}, 169 - {"88pm860x-backlight", 1,}, 170 - {"88pm860x-backlight", 2,}, 97 + static struct mfd_cell bk_devs[] __devinitdata = { 98 + { 99 + .name = "88pm860x-backlight", 100 + .id = 0, 101 + .num_resources = ARRAY_SIZE(bk0_resources), 102 + .resources = bk0_resources, 103 + }, { 104 + .name = "88pm860x-backlight", 105 + .id = 1, 106 + .num_resources = ARRAY_SIZE(bk1_resources), 107 + .resources = bk1_resources, 108 + }, { 109 + .name = "88pm860x-backlight", 110 + .id = 2, 111 + .num_resources = ARRAY_SIZE(bk2_resources), 112 + .resources = bk2_resources, 113 + }, 171 114 }; 172 115 173 - static struct mfd_cell led_devs[] = { 174 - {"88pm860x-led", 0,}, 175 - {"88pm860x-led", 1,}, 176 - {"88pm860x-led", 2,}, 177 - {"88pm860x-led", 3,}, 178 - {"88pm860x-led", 4,}, 179 - {"88pm860x-led", 5,}, 116 + static struct mfd_cell led_devs[] __devinitdata = { 117 + { 118 + .name = "88pm860x-led", 119 + .id = 0, 120 + .num_resources = ARRAY_SIZE(led0_resources), 121 + .resources = led0_resources, 122 + }, { 123 + .name = "88pm860x-led", 124 + .id = 1, 125 + .num_resources = ARRAY_SIZE(led1_resources), 126 + .resources = led1_resources, 127 + }, { 128 + .name = "88pm860x-led", 129 + .id = 2, 130 + .num_resources = ARRAY_SIZE(led2_resources), 131 + .resources = led2_resources, 132 + }, { 133 + .name = "88pm860x-led", 134 + .id = 3, 135 + .num_resources = ARRAY_SIZE(led3_resources), 136 + .resources = led3_resources, 137 + }, { 138 + .name = "88pm860x-led", 139 + .id = 4, 140 + .num_resources = ARRAY_SIZE(led4_resources), 141 + .resources = led4_resources, 142 + }, { 143 + .name = "88pm860x-led", 144 + .id = 5, 145 + .num_resources = ARRAY_SIZE(led5_resources), 146 + .resources = led5_resources, 147 + }, 180 148 }; 181 149 182 - static struct mfd_cell regulator_devs[] = { 183 - {"88pm860x-regulator", 0,}, 184 - {"88pm860x-regulator", 1,}, 185 - {"88pm860x-regulator", 2,}, 186 - {"88pm860x-regulator", 3,}, 187 - {"88pm860x-regulator", 4,}, 188 - {"88pm860x-regulator", 5,}, 189 - {"88pm860x-regulator", 6,}, 190 - {"88pm860x-regulator", 7,}, 191 - {"88pm860x-regulator", 8,}, 192 - {"88pm860x-regulator", 9,}, 193 - {"88pm860x-regulator", 10,}, 194 - {"88pm860x-regulator", 11,}, 195 - {"88pm860x-regulator", 12,}, 196 - {"88pm860x-regulator", 13,}, 197 - {"88pm860x-regulator", 14,}, 198 - {"88pm860x-regulator", 15,}, 199 - {"88pm860x-regulator", 16,}, 200 - {"88pm860x-regulator", 17,}, 150 + static struct mfd_cell reg_devs[] __devinitdata = { 151 + { 152 + .name = "88pm860x-regulator", 153 + .id = 0, 154 + .num_resources = ARRAY_SIZE(buck1_resources), 155 + .resources = buck1_resources, 156 + }, { 157 + .name = "88pm860x-regulator", 158 + .id = 1, 159 + .num_resources = ARRAY_SIZE(buck2_resources), 160 + .resources = buck2_resources, 161 + }, { 162 + .name = "88pm860x-regulator", 163 + .id = 2, 164 + .num_resources = ARRAY_SIZE(buck3_resources), 165 + .resources = buck3_resources, 166 + }, { 167 + .name = "88pm860x-regulator", 168 + .id = 3, 169 + .num_resources = ARRAY_SIZE(ldo1_resources), 170 + .resources = ldo1_resources, 171 + }, { 172 + .name = "88pm860x-regulator", 173 + .id = 4, 174 + .num_resources = ARRAY_SIZE(ldo2_resources), 175 + .resources = ldo2_resources, 176 + }, { 177 + .name = "88pm860x-regulator", 178 + .id = 5, 179 + .num_resources = ARRAY_SIZE(ldo3_resources), 180 + .resources = ldo3_resources, 181 + }, { 182 + .name = "88pm860x-regulator", 183 + .id = 6, 184 + .num_resources = ARRAY_SIZE(ldo4_resources), 185 + .resources = ldo4_resources, 186 + }, { 187 + .name = "88pm860x-regulator", 188 + .id = 7, 189 + .num_resources = ARRAY_SIZE(ldo5_resources), 190 + .resources = ldo5_resources, 191 + }, { 192 + .name = "88pm860x-regulator", 193 + .id = 8, 194 + .num_resources = ARRAY_SIZE(ldo6_resources), 195 + .resources = ldo6_resources, 196 + }, { 197 + .name = "88pm860x-regulator", 198 + .id = 9, 199 + .num_resources = ARRAY_SIZE(ldo7_resources), 200 + .resources = ldo7_resources, 201 + }, { 202 + .name = "88pm860x-regulator", 203 + .id = 10, 204 + .num_resources = ARRAY_SIZE(ldo8_resources), 205 + .resources = ldo8_resources, 206 + }, { 207 + .name = "88pm860x-regulator", 208 + .id = 11, 209 + .num_resources = ARRAY_SIZE(ldo9_resources), 210 + .resources = ldo9_resources, 211 + }, { 212 + .name = "88pm860x-regulator", 213 + .id = 12, 214 + .num_resources = ARRAY_SIZE(ldo10_resources), 215 + .resources = ldo10_resources, 216 + }, { 217 + .name = "88pm860x-regulator", 218 + .id = 13, 219 + .num_resources = ARRAY_SIZE(ldo12_resources), 220 + .resources = ldo12_resources, 221 + }, { 222 + .name = "88pm860x-regulator", 223 + .id = 14, 224 + .num_resources = ARRAY_SIZE(ldo_vibrator_resources), 225 + .resources = ldo_vibrator_resources, 226 + }, { 227 + .name = "88pm860x-regulator", 228 + .id = 15, 229 + .num_resources = ARRAY_SIZE(ldo14_resources), 230 + .resources = ldo14_resources, 231 + }, 201 232 }; 202 233 203 234 static struct mfd_cell touch_devs[] = { ··· 523 360 524 361 static void pm860x_irq_enable(struct irq_data *data) 525 362 { 526 - struct pm860x_chip *chip = irq_data_get_irq_chip_data(data); 527 - pm860x_irqs[data->irq - chip->irq_base].enable 528 - = pm860x_irqs[data->irq - chip->irq_base].offs; 363 + pm860x_irqs[data->hwirq].enable = pm860x_irqs[data->hwirq].offs; 529 364 } 530 365 531 366 static void pm860x_irq_disable(struct irq_data *data) 532 367 { 533 - struct pm860x_chip *chip = irq_data_get_irq_chip_data(data); 534 - pm860x_irqs[data->irq - chip->irq_base].enable = 0; 368 + pm860x_irqs[data->hwirq].enable = 0; 535 369 } 536 370 537 371 static struct irq_chip pm860x_irq_chip = { ··· 539 379 .irq_disable = pm860x_irq_disable, 540 380 }; 541 381 542 - static int __devinit device_gpadc_init(struct pm860x_chip *chip, 543 - struct pm860x_platform_data *pdata) 382 + static int pm860x_irq_domain_map(struct irq_domain *d, unsigned int virq, 383 + irq_hw_number_t hw) 544 384 { 545 - struct i2c_client *i2c = (chip->id == CHIP_PM8607) ? chip->client \ 546 - : chip->companion; 547 - int data; 548 - int ret; 549 - 550 - /* initialize GPADC without activating it */ 551 - 552 - if (!pdata || !pdata->touch) 553 - return -EINVAL; 554 - 555 - /* set GPADC MISC1 register */ 556 - data = 0; 557 - data |= (pdata->touch->gpadc_prebias << 1) & PM8607_GPADC_PREBIAS_MASK; 558 - data |= (pdata->touch->slot_cycle << 3) & PM8607_GPADC_SLOT_CYCLE_MASK; 559 - data |= (pdata->touch->off_scale << 5) & PM8607_GPADC_OFF_SCALE_MASK; 560 - data |= (pdata->touch->sw_cal << 7) & PM8607_GPADC_SW_CAL_MASK; 561 - if (data) { 562 - ret = pm860x_reg_write(i2c, PM8607_GPADC_MISC1, data); 563 - if (ret < 0) 564 - goto out; 565 - } 566 - /* set tsi prebias time */ 567 - if (pdata->touch->tsi_prebias) { 568 - data = pdata->touch->tsi_prebias; 569 - ret = pm860x_reg_write(i2c, PM8607_TSI_PREBIAS, data); 570 - if (ret < 0) 571 - goto out; 572 - } 573 - /* set prebias & prechg time of pen detect */ 574 - data = 0; 575 - data |= pdata->touch->pen_prebias & PM8607_PD_PREBIAS_MASK; 576 - data |= (pdata->touch->pen_prechg << 5) & PM8607_PD_PRECHG_MASK; 577 - if (data) { 578 - ret = pm860x_reg_write(i2c, PM8607_PD_PREBIAS, data); 579 - if (ret < 0) 580 - goto out; 581 - } 582 - 583 - ret = pm860x_set_bits(i2c, PM8607_GPADC_MISC1, 584 - PM8607_GPADC_EN, PM8607_GPADC_EN); 585 - out: 586 - return ret; 385 + irq_set_chip_data(virq, d->host_data); 386 + irq_set_chip_and_handler(virq, &pm860x_irq_chip, handle_edge_irq); 387 + irq_set_nested_thread(virq, 1); 388 + #ifdef CONFIG_ARM 389 + set_irq_flags(virq, IRQF_VALID); 390 + #else 391 + irq_set_noprobe(virq); 392 + #endif 393 + return 0; 587 394 } 395 + 396 + static struct irq_domain_ops pm860x_irq_domain_ops = { 397 + .map = pm860x_irq_domain_map, 398 + .xlate = irq_domain_xlate_onetwocell, 399 + }; 588 400 589 401 static int __devinit device_irq_init(struct pm860x_chip *chip, 590 402 struct pm860x_platform_data *pdata) ··· 565 433 : chip->companion; 566 434 unsigned char status_buf[INT_STATUS_NUM]; 567 435 unsigned long flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT; 568 - int i, data, mask, ret = -EINVAL; 569 - int __irq; 570 - 571 - if (!pdata || !pdata->irq_base) { 572 - dev_warn(chip->dev, "No interrupt support on IRQ base\n"); 573 - return -EINVAL; 574 - } 436 + int data, mask, ret = -EINVAL; 437 + int nr_irqs, irq_base = -1; 438 + struct device_node *node = i2c->dev.of_node; 575 439 576 440 mask = PM8607_B0_MISC1_INV_INT | PM8607_B0_MISC1_INT_CLEAR 577 441 | PM8607_B0_MISC1_INT_MASK; ··· 607 479 goto out; 608 480 609 481 mutex_init(&chip->irq_lock); 610 - chip->irq_base = pdata->irq_base; 482 + 483 + if (pdata && pdata->irq_base) 484 + irq_base = pdata->irq_base; 485 + nr_irqs = ARRAY_SIZE(pm860x_irqs); 486 + chip->irq_base = irq_alloc_descs(irq_base, 0, nr_irqs, 0); 487 + if (chip->irq_base < 0) { 488 + dev_err(&i2c->dev, "Failed to allocate interrupts, ret:%d\n", 489 + chip->irq_base); 490 + ret = -EBUSY; 491 + goto out; 492 + } 493 + irq_domain_add_legacy(node, nr_irqs, chip->irq_base, 0, 494 + &pm860x_irq_domain_ops, chip); 611 495 chip->core_irq = i2c->irq; 612 496 if (!chip->core_irq) 613 497 goto out; 614 498 615 - /* register IRQ by genirq */ 616 - for (i = 0; i < ARRAY_SIZE(pm860x_irqs); i++) { 617 - __irq = i + chip->irq_base; 618 - irq_set_chip_data(__irq, chip); 619 - irq_set_chip_and_handler(__irq, &pm860x_irq_chip, 620 - handle_edge_irq); 621 - irq_set_nested_thread(__irq, 1); 622 - #ifdef CONFIG_ARM 623 - set_irq_flags(__irq, IRQF_VALID); 624 - #else 625 - irq_set_noprobe(__irq); 626 - #endif 627 - } 628 - 629 - ret = request_threaded_irq(chip->core_irq, NULL, pm860x_irq, flags, 499 + ret = request_threaded_irq(chip->core_irq, NULL, pm860x_irq, flags | IRQF_ONESHOT, 630 500 "88pm860x", chip); 631 501 if (ret) { 632 502 dev_err(chip->dev, "Failed to request IRQ: %d\n", ret); ··· 741 615 static void __devinit device_bk_init(struct pm860x_chip *chip, 742 616 struct pm860x_platform_data *pdata) 743 617 { 744 - int ret; 745 - int i, j, id; 618 + int ret, i; 746 619 747 - if ((pdata == NULL) || (pdata->backlight == NULL)) 748 - return; 749 - 750 - if (pdata->num_backlights > ARRAY_SIZE(bk_devs)) 751 - pdata->num_backlights = ARRAY_SIZE(bk_devs); 752 - 753 - for (i = 0; i < pdata->num_backlights; i++) { 754 - bk_devs[i].platform_data = &pdata->backlight[i]; 755 - bk_devs[i].pdata_size = sizeof(struct pm860x_backlight_pdata); 756 - 757 - for (j = 0; j < ARRAY_SIZE(bk_devs); j++) { 758 - id = bk_resources[j].start; 759 - if (pdata->backlight[i].flags != id) 760 - continue; 761 - 762 - bk_devs[i].num_resources = 1; 763 - bk_devs[i].resources = &bk_resources[j]; 764 - ret = mfd_add_devices(chip->dev, 0, 765 - &bk_devs[i], 1, 766 - &bk_resources[j], 0, NULL); 767 - if (ret < 0) { 768 - dev_err(chip->dev, "Failed to add " 769 - "backlight subdev\n"); 770 - return; 771 - } 620 + if (pdata && pdata->backlight) { 621 + if (pdata->num_backlights > ARRAY_SIZE(bk_devs)) 622 + pdata->num_backlights = ARRAY_SIZE(bk_devs); 623 + for (i = 0; i < pdata->num_backlights; i++) { 624 + bk_devs[i].platform_data = &pdata->backlight[i]; 625 + bk_devs[i].pdata_size = 626 + sizeof(struct pm860x_backlight_pdata); 772 627 } 773 628 } 629 + ret = mfd_add_devices(chip->dev, 0, bk_devs, 630 + ARRAY_SIZE(bk_devs), NULL, 0, NULL); 631 + if (ret < 0) 632 + dev_err(chip->dev, "Failed to add backlight subdev\n"); 774 633 } 775 634 776 635 static void __devinit device_led_init(struct pm860x_chip *chip, 777 636 struct pm860x_platform_data *pdata) 778 637 { 779 - int ret; 780 - int i, j, id; 638 + int ret, i; 781 639 782 - if ((pdata == NULL) || (pdata->led == NULL)) 783 - return; 784 - 785 - if (pdata->num_leds > ARRAY_SIZE(led_devs)) 786 - pdata->num_leds = ARRAY_SIZE(led_devs); 787 - 788 - for (i = 0; i < pdata->num_leds; i++) { 789 - led_devs[i].platform_data = &pdata->led[i]; 790 - led_devs[i].pdata_size = sizeof(struct pm860x_led_pdata); 791 - 792 - for (j = 0; j < ARRAY_SIZE(led_devs); j++) { 793 - id = led_resources[j].start; 794 - if (pdata->led[i].flags != id) 795 - continue; 796 - 797 - led_devs[i].num_resources = 1; 798 - led_devs[i].resources = &led_resources[j], 799 - ret = mfd_add_devices(chip->dev, 0, 800 - &led_devs[i], 1, 801 - &led_resources[j], 0, NULL); 802 - if (ret < 0) { 803 - dev_err(chip->dev, "Failed to add " 804 - "led subdev\n"); 805 - return; 806 - } 640 + if (pdata && pdata->led) { 641 + if (pdata->num_leds > ARRAY_SIZE(led_devs)) 642 + pdata->num_leds = ARRAY_SIZE(led_devs); 643 + for (i = 0; i < pdata->num_leds; i++) { 644 + led_devs[i].platform_data = &pdata->led[i]; 645 + led_devs[i].pdata_size = 646 + sizeof(struct pm860x_led_pdata); 807 647 } 648 + } 649 + ret = mfd_add_devices(chip->dev, 0, led_devs, 650 + ARRAY_SIZE(led_devs), NULL, 0, NULL); 651 + if (ret < 0) { 652 + dev_err(chip->dev, "Failed to add led subdev\n"); 653 + return; 808 654 } 809 655 } 810 656 811 657 static void __devinit device_regulator_init(struct pm860x_chip *chip, 812 658 struct pm860x_platform_data *pdata) 813 659 { 814 - struct regulator_init_data *initdata; 815 660 int ret; 816 - int i, seq; 817 661 818 - if ((pdata == NULL) || (pdata->regulator == NULL)) 662 + if (pdata == NULL) 819 663 return; 820 - 821 - if (pdata->num_regulators > ARRAY_SIZE(regulator_devs)) 822 - pdata->num_regulators = ARRAY_SIZE(regulator_devs); 823 - 824 - for (i = 0, seq = -1; i < pdata->num_regulators; i++) { 825 - initdata = &pdata->regulator[i]; 826 - seq = *(unsigned int *)initdata->driver_data; 827 - if ((seq < 0) || (seq > PM8607_ID_RG_MAX)) { 828 - dev_err(chip->dev, "Wrong ID(%d) on regulator(%s)\n", 829 - seq, initdata->constraints.name); 830 - goto out; 831 - } 832 - regulator_devs[i].platform_data = &pdata->regulator[i]; 833 - regulator_devs[i].pdata_size = sizeof(struct regulator_init_data); 834 - regulator_devs[i].num_resources = 1; 835 - regulator_devs[i].resources = &regulator_resources[seq]; 836 - 837 - ret = mfd_add_devices(chip->dev, 0, &regulator_devs[i], 1, 838 - &regulator_resources[seq], 0, NULL); 839 - if (ret < 0) { 840 - dev_err(chip->dev, "Failed to add regulator subdev\n"); 841 - goto out; 842 - } 664 + if (pdata->buck1) { 665 + reg_devs[0].platform_data = pdata->buck1; 666 + reg_devs[0].pdata_size = sizeof(struct regulator_init_data); 843 667 } 844 - out: 845 - return; 668 + if (pdata->buck2) { 669 + reg_devs[1].platform_data = pdata->buck2; 670 + reg_devs[1].pdata_size = sizeof(struct regulator_init_data); 671 + } 672 + if (pdata->buck3) { 673 + reg_devs[2].platform_data = pdata->buck3; 674 + reg_devs[2].pdata_size = sizeof(struct regulator_init_data); 675 + } 676 + if (pdata->ldo1) { 677 + reg_devs[3].platform_data = pdata->ldo1; 678 + reg_devs[3].pdata_size = sizeof(struct regulator_init_data); 679 + } 680 + if (pdata->ldo2) { 681 + reg_devs[4].platform_data = pdata->ldo2; 682 + reg_devs[4].pdata_size = sizeof(struct regulator_init_data); 683 + } 684 + if (pdata->ldo3) { 685 + reg_devs[5].platform_data = pdata->ldo3; 686 + reg_devs[5].pdata_size = sizeof(struct regulator_init_data); 687 + } 688 + if (pdata->ldo4) { 689 + reg_devs[6].platform_data = pdata->ldo4; 690 + reg_devs[6].pdata_size = sizeof(struct regulator_init_data); 691 + } 692 + if (pdata->ldo5) { 693 + reg_devs[7].platform_data = pdata->ldo5; 694 + reg_devs[7].pdata_size = sizeof(struct regulator_init_data); 695 + } 696 + if (pdata->ldo6) { 697 + reg_devs[8].platform_data = pdata->ldo6; 698 + reg_devs[8].pdata_size = sizeof(struct regulator_init_data); 699 + } 700 + if (pdata->ldo7) { 701 + reg_devs[9].platform_data = pdata->ldo7; 702 + reg_devs[9].pdata_size = sizeof(struct regulator_init_data); 703 + } 704 + if (pdata->ldo8) { 705 + reg_devs[10].platform_data = pdata->ldo8; 706 + reg_devs[10].pdata_size = sizeof(struct regulator_init_data); 707 + } 708 + if (pdata->ldo9) { 709 + reg_devs[11].platform_data = pdata->ldo9; 710 + reg_devs[11].pdata_size = sizeof(struct regulator_init_data); 711 + } 712 + if (pdata->ldo10) { 713 + reg_devs[12].platform_data = pdata->ldo10; 714 + reg_devs[12].pdata_size = sizeof(struct regulator_init_data); 715 + } 716 + if (pdata->ldo12) { 717 + reg_devs[13].platform_data = pdata->ldo12; 718 + reg_devs[13].pdata_size = sizeof(struct regulator_init_data); 719 + } 720 + if (pdata->ldo_vibrator) { 721 + reg_devs[14].platform_data = pdata->ldo_vibrator; 722 + reg_devs[14].pdata_size = sizeof(struct regulator_init_data); 723 + } 724 + if (pdata->ldo14) { 725 + reg_devs[15].platform_data = pdata->ldo14; 726 + reg_devs[15].pdata_size = sizeof(struct regulator_init_data); 727 + } 728 + ret = mfd_add_devices(chip->dev, 0, reg_devs, 729 + ARRAY_SIZE(reg_devs), NULL, 0, NULL); 730 + if (ret < 0) { 731 + dev_err(chip->dev, "Failed to add regulator subdev\n"); 732 + return; 733 + } 846 734 } 847 735 848 736 static void __devinit device_rtc_init(struct pm860x_chip *chip, ··· 925 785 926 786 power_devs[2].platform_data = &preg_init_data; 927 787 power_devs[2].pdata_size = sizeof(struct regulator_init_data); 928 - power_devs[2].num_resources = ARRAY_SIZE(preg_resources); 929 - power_devs[2].resources = &preg_resources[0], 930 788 ret = mfd_add_devices(chip->dev, 0, &power_devs[2], 1, 931 - &preg_resources[0], chip->irq_base, NULL); 789 + NULL, chip->irq_base, NULL); 932 790 if (ret < 0) 933 791 dev_err(chip->dev, "Failed to add preg subdev\n"); 934 792 } ··· 1006 868 goto out; 1007 869 } 1008 870 1009 - ret = device_gpadc_init(chip, pdata); 1010 - if (ret < 0) 1011 - goto out; 1012 - 1013 871 ret = device_irq_init(chip, pdata); 1014 872 if (ret < 0) 1015 873 goto out; ··· 1029 895 device_led_init(chip, pdata); 1030 896 } 1031 897 1032 - int __devinit pm860x_device_init(struct pm860x_chip *chip, 1033 - struct pm860x_platform_data *pdata) 898 + static int __devinit pm860x_device_init(struct pm860x_chip *chip, 899 + struct pm860x_platform_data *pdata) 1034 900 { 1035 901 chip->core_irq = 0; 1036 902 ··· 1057 923 return 0; 1058 924 } 1059 925 1060 - void __devexit pm860x_device_exit(struct pm860x_chip *chip) 926 + static void __devexit pm860x_device_exit(struct pm860x_chip *chip) 1061 927 { 1062 928 device_irq_exit(chip); 1063 929 mfd_remove_devices(chip->dev); 1064 930 } 931 + 932 + static int verify_addr(struct i2c_client *i2c) 933 + { 934 + unsigned short addr_8607[] = {0x30, 0x34}; 935 + unsigned short addr_8606[] = {0x10, 0x11}; 936 + int size, i; 937 + 938 + if (i2c == NULL) 939 + return 0; 940 + size = ARRAY_SIZE(addr_8606); 941 + for (i = 0; i < size; i++) { 942 + if (i2c->addr == *(addr_8606 + i)) 943 + return CHIP_PM8606; 944 + } 945 + size = ARRAY_SIZE(addr_8607); 946 + for (i = 0; i < size; i++) { 947 + if (i2c->addr == *(addr_8607 + i)) 948 + return CHIP_PM8607; 949 + } 950 + return 0; 951 + } 952 + 953 + static struct regmap_config pm860x_regmap_config = { 954 + .reg_bits = 8, 955 + .val_bits = 8, 956 + }; 957 + 958 + static int __devinit pm860x_dt_init(struct device_node *np, 959 + struct device *dev, 960 + struct pm860x_platform_data *pdata) 961 + { 962 + int ret; 963 + 964 + if (of_get_property(np, "marvell,88pm860x-irq-read-clr", NULL)) 965 + pdata->irq_mode = 1; 966 + ret = of_property_read_u32(np, "marvell,88pm860x-slave-addr", 967 + &pdata->companion_addr); 968 + if (ret) { 969 + dev_err(dev, "Not found \"marvell,88pm860x-slave-addr\" " 970 + "property\n"); 971 + pdata->companion_addr = 0; 972 + } 973 + return 0; 974 + } 975 + 976 + static int __devinit pm860x_probe(struct i2c_client *client, 977 + const struct i2c_device_id *id) 978 + { 979 + struct pm860x_platform_data *pdata = client->dev.platform_data; 980 + struct device_node *node = client->dev.of_node; 981 + struct pm860x_chip *chip; 982 + int ret; 983 + 984 + if (node && !pdata) { 985 + /* parse DT to get platform data */ 986 + pdata = devm_kzalloc(&client->dev, 987 + sizeof(struct pm860x_platform_data), 988 + GFP_KERNEL); 989 + if (!pdata) 990 + return -ENOMEM; 991 + ret = pm860x_dt_init(node, &client->dev, pdata); 992 + if (ret) 993 + goto err; 994 + } else if (!pdata) { 995 + pr_info("No platform data in %s!\n", __func__); 996 + return -EINVAL; 997 + } 998 + 999 + chip = kzalloc(sizeof(struct pm860x_chip), GFP_KERNEL); 1000 + if (chip == NULL) { 1001 + ret = -ENOMEM; 1002 + goto err; 1003 + } 1004 + 1005 + chip->id = verify_addr(client); 1006 + chip->regmap = regmap_init_i2c(client, &pm860x_regmap_config); 1007 + if (IS_ERR(chip->regmap)) { 1008 + ret = PTR_ERR(chip->regmap); 1009 + dev_err(&client->dev, "Failed to allocate register map: %d\n", 1010 + ret); 1011 + kfree(chip); 1012 + return ret; 1013 + } 1014 + chip->client = client; 1015 + i2c_set_clientdata(client, chip); 1016 + chip->dev = &client->dev; 1017 + dev_set_drvdata(chip->dev, chip); 1018 + 1019 + /* 1020 + * Both client and companion client shares same platform driver. 1021 + * Driver distinguishes them by pdata->companion_addr. 1022 + * pdata->companion_addr is only assigned if companion chip exists. 1023 + * At the same time, the companion_addr shouldn't equal to client 1024 + * address. 1025 + */ 1026 + if (pdata->companion_addr && (pdata->companion_addr != client->addr)) { 1027 + chip->companion_addr = pdata->companion_addr; 1028 + chip->companion = i2c_new_dummy(chip->client->adapter, 1029 + chip->companion_addr); 1030 + chip->regmap_companion = regmap_init_i2c(chip->companion, 1031 + &pm860x_regmap_config); 1032 + if (IS_ERR(chip->regmap_companion)) { 1033 + ret = PTR_ERR(chip->regmap_companion); 1034 + dev_err(&chip->companion->dev, 1035 + "Failed to allocate register map: %d\n", ret); 1036 + return ret; 1037 + } 1038 + i2c_set_clientdata(chip->companion, chip); 1039 + } 1040 + 1041 + pm860x_device_init(chip, pdata); 1042 + return 0; 1043 + err: 1044 + if (node) 1045 + devm_kfree(&client->dev, pdata); 1046 + return ret; 1047 + } 1048 + 1049 + static int __devexit pm860x_remove(struct i2c_client *client) 1050 + { 1051 + struct pm860x_chip *chip = i2c_get_clientdata(client); 1052 + 1053 + pm860x_device_exit(chip); 1054 + if (chip->companion) { 1055 + regmap_exit(chip->regmap_companion); 1056 + i2c_unregister_device(chip->companion); 1057 + } 1058 + regmap_exit(chip->regmap); 1059 + kfree(chip); 1060 + return 0; 1061 + } 1062 + 1063 + #ifdef CONFIG_PM_SLEEP 1064 + static int pm860x_suspend(struct device *dev) 1065 + { 1066 + struct i2c_client *client = container_of(dev, struct i2c_client, dev); 1067 + struct pm860x_chip *chip = i2c_get_clientdata(client); 1068 + 1069 + if (device_may_wakeup(dev) && chip->wakeup_flag) 1070 + enable_irq_wake(chip->core_irq); 1071 + return 0; 1072 + } 1073 + 1074 + static int pm860x_resume(struct device *dev) 1075 + { 1076 + struct i2c_client *client = container_of(dev, struct i2c_client, dev); 1077 + struct pm860x_chip *chip = i2c_get_clientdata(client); 1078 + 1079 + if (device_may_wakeup(dev) && chip->wakeup_flag) 1080 + disable_irq_wake(chip->core_irq); 1081 + return 0; 1082 + } 1083 + #endif 1084 + 1085 + static SIMPLE_DEV_PM_OPS(pm860x_pm_ops, pm860x_suspend, pm860x_resume); 1086 + 1087 + static const struct i2c_device_id pm860x_id_table[] = { 1088 + { "88PM860x", 0 }, 1089 + {} 1090 + }; 1091 + MODULE_DEVICE_TABLE(i2c, pm860x_id_table); 1092 + 1093 + static const struct of_device_id pm860x_dt_ids[] = { 1094 + { .compatible = "marvell,88pm860x", }, 1095 + {}, 1096 + }; 1097 + MODULE_DEVICE_TABLE(of, pm860x_dt_ids); 1098 + 1099 + static struct i2c_driver pm860x_driver = { 1100 + .driver = { 1101 + .name = "88PM860x", 1102 + .owner = THIS_MODULE, 1103 + .pm = &pm860x_pm_ops, 1104 + .of_match_table = of_match_ptr(pm860x_dt_ids), 1105 + }, 1106 + .probe = pm860x_probe, 1107 + .remove = __devexit_p(pm860x_remove), 1108 + .id_table = pm860x_id_table, 1109 + }; 1110 + 1111 + static int __init pm860x_i2c_init(void) 1112 + { 1113 + int ret; 1114 + ret = i2c_add_driver(&pm860x_driver); 1115 + if (ret != 0) 1116 + pr_err("Failed to register 88PM860x I2C driver: %d\n", ret); 1117 + return ret; 1118 + } 1119 + subsys_initcall(pm860x_i2c_init); 1120 + 1121 + static void __exit pm860x_i2c_exit(void) 1122 + { 1123 + i2c_del_driver(&pm860x_driver); 1124 + } 1125 + module_exit(pm860x_i2c_exit); 1065 1126 1066 1127 MODULE_DESCRIPTION("PMIC Driver for Marvell 88PM860x"); 1067 1128 MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
+12 -162
drivers/mfd/88pm860x-i2c.c
··· 10 10 */ 11 11 #include <linux/kernel.h> 12 12 #include <linux/module.h> 13 - #include <linux/platform_device.h> 14 13 #include <linux/i2c.h> 15 - #include <linux/err.h> 16 14 #include <linux/regmap.h> 17 15 #include <linux/mfd/88pm860x.h> 18 - #include <linux/slab.h> 19 16 20 17 int pm860x_reg_read(struct i2c_client *i2c, int reg) 21 18 { ··· 88 91 unsigned char msgbuf0[I2C_SMBUS_BLOCK_MAX + 3]; 89 92 unsigned char msgbuf1[I2C_SMBUS_BLOCK_MAX + 2]; 90 93 struct i2c_adapter *adap = i2c->adapter; 91 - struct i2c_msg msg[2] = {{i2c->addr, 0, 1, msgbuf0}, 92 - {i2c->addr, I2C_M_RD, 0, msgbuf1}, 94 + struct i2c_msg msg[2] = { 95 + { 96 + .addr = i2c->addr, 97 + .flags = 0, 98 + .len = 1, 99 + .buf = msgbuf0 100 + }, 101 + { .addr = i2c->addr, 102 + .flags = I2C_M_RD, 103 + .len = 0, 104 + .buf = msgbuf1 105 + }, 93 106 }; 94 107 int num = 1, ret = 0; 95 108 ··· 238 231 return ret; 239 232 } 240 233 EXPORT_SYMBOL(pm860x_page_set_bits); 241 - 242 - static const struct i2c_device_id pm860x_id_table[] = { 243 - { "88PM860x", 0 }, 244 - {} 245 - }; 246 - MODULE_DEVICE_TABLE(i2c, pm860x_id_table); 247 - 248 - static int verify_addr(struct i2c_client *i2c) 249 - { 250 - unsigned short addr_8607[] = {0x30, 0x34}; 251 - unsigned short addr_8606[] = {0x10, 0x11}; 252 - int size, i; 253 - 254 - if (i2c == NULL) 255 - return 0; 256 - size = ARRAY_SIZE(addr_8606); 257 - for (i = 0; i < size; i++) { 258 - if (i2c->addr == *(addr_8606 + i)) 259 - return CHIP_PM8606; 260 - } 261 - size = ARRAY_SIZE(addr_8607); 262 - for (i = 0; i < size; i++) { 263 - if (i2c->addr == *(addr_8607 + i)) 264 - return CHIP_PM8607; 265 - } 266 - return 0; 267 - } 268 - 269 - static struct regmap_config pm860x_regmap_config = { 270 - .reg_bits = 8, 271 - .val_bits = 8, 272 - }; 273 - 274 - static int __devinit pm860x_probe(struct i2c_client *client, 275 - const struct i2c_device_id *id) 276 - { 277 - struct pm860x_platform_data *pdata = client->dev.platform_data; 278 - struct pm860x_chip *chip; 279 - int ret; 280 - 281 - if (!pdata) { 282 - pr_info("No platform data in %s!\n", __func__); 283 - return -EINVAL; 284 - } 285 - 286 - chip = kzalloc(sizeof(struct pm860x_chip), GFP_KERNEL); 287 - if (chip == NULL) 288 - return -ENOMEM; 289 - 290 - chip->id = verify_addr(client); 291 - chip->regmap = regmap_init_i2c(client, &pm860x_regmap_config); 292 - if (IS_ERR(chip->regmap)) { 293 - ret = PTR_ERR(chip->regmap); 294 - dev_err(&client->dev, "Failed to allocate register map: %d\n", 295 - ret); 296 - kfree(chip); 297 - return ret; 298 - } 299 - chip->client = client; 300 - i2c_set_clientdata(client, chip); 301 - chip->dev = &client->dev; 302 - dev_set_drvdata(chip->dev, chip); 303 - 304 - /* 305 - * Both client and companion client shares same platform driver. 306 - * Driver distinguishes them by pdata->companion_addr. 307 - * pdata->companion_addr is only assigned if companion chip exists. 308 - * At the same time, the companion_addr shouldn't equal to client 309 - * address. 310 - */ 311 - if (pdata->companion_addr && (pdata->companion_addr != client->addr)) { 312 - chip->companion_addr = pdata->companion_addr; 313 - chip->companion = i2c_new_dummy(chip->client->adapter, 314 - chip->companion_addr); 315 - chip->regmap_companion = regmap_init_i2c(chip->companion, 316 - &pm860x_regmap_config); 317 - if (IS_ERR(chip->regmap_companion)) { 318 - ret = PTR_ERR(chip->regmap_companion); 319 - dev_err(&chip->companion->dev, 320 - "Failed to allocate register map: %d\n", ret); 321 - return ret; 322 - } 323 - i2c_set_clientdata(chip->companion, chip); 324 - } 325 - 326 - pm860x_device_init(chip, pdata); 327 - return 0; 328 - } 329 - 330 - static int __devexit pm860x_remove(struct i2c_client *client) 331 - { 332 - struct pm860x_chip *chip = i2c_get_clientdata(client); 333 - 334 - pm860x_device_exit(chip); 335 - if (chip->companion) { 336 - regmap_exit(chip->regmap_companion); 337 - i2c_unregister_device(chip->companion); 338 - } 339 - regmap_exit(chip->regmap); 340 - kfree(chip); 341 - return 0; 342 - } 343 - 344 - #ifdef CONFIG_PM_SLEEP 345 - static int pm860x_suspend(struct device *dev) 346 - { 347 - struct i2c_client *client = container_of(dev, struct i2c_client, dev); 348 - struct pm860x_chip *chip = i2c_get_clientdata(client); 349 - 350 - if (device_may_wakeup(dev) && chip->wakeup_flag) 351 - enable_irq_wake(chip->core_irq); 352 - return 0; 353 - } 354 - 355 - static int pm860x_resume(struct device *dev) 356 - { 357 - struct i2c_client *client = container_of(dev, struct i2c_client, dev); 358 - struct pm860x_chip *chip = i2c_get_clientdata(client); 359 - 360 - if (device_may_wakeup(dev) && chip->wakeup_flag) 361 - disable_irq_wake(chip->core_irq); 362 - return 0; 363 - } 364 - #endif 365 - 366 - static SIMPLE_DEV_PM_OPS(pm860x_pm_ops, pm860x_suspend, pm860x_resume); 367 - 368 - static struct i2c_driver pm860x_driver = { 369 - .driver = { 370 - .name = "88PM860x", 371 - .owner = THIS_MODULE, 372 - .pm = &pm860x_pm_ops, 373 - }, 374 - .probe = pm860x_probe, 375 - .remove = __devexit_p(pm860x_remove), 376 - .id_table = pm860x_id_table, 377 - }; 378 - 379 - static int __init pm860x_i2c_init(void) 380 - { 381 - int ret; 382 - ret = i2c_add_driver(&pm860x_driver); 383 - if (ret != 0) 384 - pr_err("Failed to register 88PM860x I2C driver: %d\n", ret); 385 - return ret; 386 - } 387 - subsys_initcall(pm860x_i2c_init); 388 - 389 - static void __exit pm860x_i2c_exit(void) 390 - { 391 - i2c_del_driver(&pm860x_driver); 392 - } 393 - module_exit(pm860x_i2c_exit); 394 - 395 - MODULE_DESCRIPTION("I2C Driver for Marvell 88PM860x"); 396 - MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>"); 397 - MODULE_LICENSE("GPL");
+58 -17
drivers/mfd/Kconfig
··· 298 298 select MFD_CORE 299 299 default n 300 300 301 - config TWL6030_PWM 302 - tristate "TWL6030 PWM (Pulse Width Modulator) Support" 303 - depends on TWL4030_CORE 304 - select HAVE_PWM 305 - depends on !PWM 306 - default n 307 - help 308 - Say yes here if you want support for TWL6030 PWM. 309 - This is used to control charging LED brightness. 310 - 311 301 config TWL6040_CORE 312 302 bool "Support for TWL6040 audio codec" 313 303 depends on I2C=y && GENERIC_HARDIRQS ··· 375 385 help 376 386 Support for Toshiba Mobile IO Controller T7L66XB 377 387 388 + config MFD_SMSC 389 + bool "Support for the SMSC ECE1099 series chips" 390 + depends on I2C=y 391 + select MFD_CORE 392 + select REGMAP_I2C 393 + help 394 + If you say yes here you get support for the 395 + ece1099 chips from SMSC. 396 + 397 + To compile this driver as a module, choose M here: the 398 + module will be called smsc. 399 + 378 400 config MFD_TC6387XB 379 401 bool "Support Toshiba TC6387XB" 380 402 depends on ARM && HAVE_CLK ··· 443 441 for accessing the device, additional drivers must be enabled in 444 442 order to use the functionality of the device. 445 443 444 + config MFD_DA9055 445 + bool "Dialog Semiconductor DA9055 PMIC Support" 446 + select REGMAP_I2C 447 + select REGMAP_IRQ 448 + select PMIC_DA9055 449 + select MFD_CORE 450 + depends on I2C=y 451 + help 452 + Say yes here for support of Dialog Semiconductor DA9055. This is 453 + a Power Management IC. This driver provides common support for 454 + accessing the device as well as the I2C interface to the chip itself. 455 + Additional drivers must be enabled in order to use the functionality 456 + of the device. 457 + 458 + This driver can be built as a module. If built as a module it will be 459 + called "da9055" 460 + 446 461 config PMIC_ADP5520 447 462 bool "Analog Devices ADP5520/01 MFD PMIC Core Support" 448 463 depends on I2C=y ··· 469 450 the I2C driver and the core APIs _only_, you have to select 470 451 individual components like LCD backlight, LEDs, GPIOs and Kepad 471 452 under the corresponding menus. 453 + 454 + config MFD_LP8788 455 + bool "Texas Instruments LP8788 Power Management Unit Driver" 456 + depends on I2C=y 457 + select MFD_CORE 458 + select REGMAP_I2C 459 + select IRQ_DOMAIN 460 + help 461 + TI LP8788 PMU supports regulators, battery charger, RTC, 462 + ADC, backlight driver and current sinks. 472 463 473 464 config MFD_MAX77686 474 465 bool "Maxim Semiconductor MAX77686 PMIC Support" ··· 505 476 This driver provides common support for accessing the device; 506 477 additional drivers must be enabled in order to use the functionality 507 478 of the device. 479 + 480 + config MFD_MAX8907 481 + tristate "Maxim Semiconductor MAX8907 PMIC Support" 482 + select MFD_CORE 483 + depends on I2C=y && GENERIC_HARDIRQS 484 + select REGMAP_I2C 485 + select REGMAP_IRQ 486 + help 487 + Say yes here to support for Maxim Semiconductor MAX8907. This is 488 + a Power Management IC. This driver provides common support for 489 + accessing the device; additional drivers must be enabled in order 490 + to use the functionality of the device. 508 491 509 492 config MFD_MAX8925 510 493 bool "Maxim Semiconductor MAX8925 PMIC Support" ··· 937 896 audio codec. 938 897 939 898 config MFD_OMAP_USB_HOST 940 - bool "Support OMAP USBHS core driver" 899 + bool "Support OMAP USBHS core and TLL driver" 941 900 depends on USB_EHCI_HCD_OMAP || USB_OHCI_HCD_OMAP3 942 901 default y 943 902 help ··· 1026 985 depends on STA2X11 1027 986 select MFD_CORE 1028 987 1029 - config MFD_ANATOP 1030 - bool "Support for Freescale i.MX on-chip ANATOP controller" 1031 - depends on SOC_IMX6Q 988 + config MFD_SYSCON 989 + bool "System Controller Register R/W Based on Regmap" 990 + depends on OF 991 + select REGMAP_MMIO 1032 992 help 1033 - Select this option to enable Freescale i.MX on-chip ANATOP 1034 - MFD controller. This controller embeds regulator and 1035 - thermal devices for Freescale i.MX platforms. 993 + Select this option to enable accessing system control registers 994 + via regmap. 1036 995 1037 996 config MFD_PALMAS 1038 997 bool "Support for the TI Palmas series chips"
+9 -3
drivers/mfd/Makefile
··· 63 63 obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o 64 64 obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o 65 65 obj-$(CONFIG_MFD_TWL4030_AUDIO) += twl4030-audio.o 66 - obj-$(CONFIG_TWL6030_PWM) += twl6030-pwm.o 67 66 obj-$(CONFIG_TWL6040_CORE) += twl6040-core.o twl6040-irq.o 68 67 69 68 obj-$(CONFIG_MFD_MC13XXX) += mc13xxx-core.o ··· 76 77 obj-$(CONFIG_MCP) += mcp-core.o 77 78 obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o 78 79 obj-$(CONFIG_MCP_UCB1200) += ucb1x00-core.o 80 + obj-$(CONFIG_MFD_SMSC) += smsc-ece1099.o 79 81 obj-$(CONFIG_MCP_UCB1200_TS) += ucb1x00-ts.o 80 82 81 83 ifeq ($(CONFIG_SA1100_ASSABET),y) ··· 90 90 obj-$(CONFIG_MFD_DA9052_SPI) += da9052-spi.o 91 91 obj-$(CONFIG_MFD_DA9052_I2C) += da9052-i2c.o 92 92 93 + obj-$(CONFIG_MFD_LP8788) += lp8788.o lp8788-irq.o 94 + 95 + da9055-objs := da9055-core.o da9055-i2c.o 96 + obj-$(CONFIG_MFD_DA9055) += da9055.o 97 + 93 98 obj-$(CONFIG_MFD_MAX77686) += max77686.o max77686-irq.o 94 99 obj-$(CONFIG_MFD_MAX77693) += max77693.o max77693-irq.o 100 + obj-$(CONFIG_MFD_MAX8907) += max8907.o 95 101 max8925-objs := max8925-core.o max8925-i2c.o 96 102 obj-$(CONFIG_MFD_MAX8925) += max8925.o 97 103 obj-$(CONFIG_MFD_MAX8997) += max8997.o max8997-irq.o ··· 126 120 obj-$(CONFIG_MFD_VX855) += vx855.o 127 121 obj-$(CONFIG_MFD_WL1273_CORE) += wl1273-core.o 128 122 obj-$(CONFIG_MFD_CS5535) += cs5535-mfd.o 129 - obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o 123 + obj-$(CONFIG_MFD_OMAP_USB_HOST) += omap-usb-host.o omap-usb-tll.o 130 124 obj-$(CONFIG_MFD_PM8921_CORE) += pm8921-core.o 131 125 obj-$(CONFIG_MFD_PM8XXX_IRQ) += pm8xxx-irq.o 132 126 obj-$(CONFIG_TPS65911_COMPARATOR) += tps65911-comparator.o ··· 136 130 obj-$(CONFIG_MFD_PALMAS) += palmas.o 137 131 obj-$(CONFIG_MFD_RC5T583) += rc5t583.o rc5t583-irq.o 138 132 obj-$(CONFIG_MFD_SEC_CORE) += sec-core.o sec-irq.o 139 - obj-$(CONFIG_MFD_ANATOP) += anatop-mfd.o 133 + obj-$(CONFIG_MFD_SYSCON) += syscon.o 140 134 obj-$(CONFIG_MFD_LM3533) += lm3533-core.o lm3533-ctrlbank.o
+1
drivers/mfd/ab3100-core.c
··· 21 21 #include <linux/seq_file.h> 22 22 #include <linux/uaccess.h> 23 23 #include <linux/mfd/core.h> 24 + #include <linux/mfd/ab3100.h> 24 25 #include <linux/mfd/abx500.h> 25 26 26 27 /* These are the only registers inside AB3100 used in this main file */
+19 -18
drivers/mfd/ab8500-core.c
··· 472 472 return IRQ_HANDLED; 473 473 } 474 474 475 + /** 476 + * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ 477 + * 478 + * @ab8500: ab8500_irq controller to operate on. 479 + * @irq: index of the interrupt requested in the chip IRQs 480 + * 481 + * Useful for drivers to request their own IRQs. 482 + */ 483 + static int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq) 484 + { 485 + if (!ab8500) 486 + return -EINVAL; 487 + 488 + return irq_create_mapping(ab8500->domain, irq); 489 + } 490 + 475 491 static irqreturn_t ab8500_irq(int irq, void *dev) 476 492 { 477 493 struct ab8500 *ab8500 = dev; ··· 517 501 do { 518 502 int bit = __ffs(value); 519 503 int line = i * 8 + bit; 504 + int virq = ab8500_irq_get_virq(ab8500, line); 520 505 521 - handle_nested_irq(ab8500->irq_base + line); 506 + handle_nested_irq(virq); 522 507 value &= ~(1 << bit); 523 508 524 509 } while (value); ··· 527 510 atomic_dec(&ab8500->transfer_ongoing); 528 511 return IRQ_HANDLED; 529 512 } 530 - 531 - /** 532 - * ab8500_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ 533 - * 534 - * @ab8500: ab8500_irq controller to operate on. 535 - * @irq: index of the interrupt requested in the chip IRQs 536 - * 537 - * Useful for drivers to request their own IRQs. 538 - */ 539 - int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq) 540 - { 541 - if (!ab8500) 542 - return -EINVAL; 543 - 544 - return irq_create_mapping(ab8500->domain, irq); 545 - } 546 - EXPORT_SYMBOL_GPL(ab8500_irq_get_virq); 547 513 548 514 static int ab8500_irq_map(struct irq_domain *d, unsigned int virq, 549 515 irq_hw_number_t hwirq) ··· 1076 1076 }, 1077 1077 { 1078 1078 .name = "ab8500-codec", 1079 + .of_compatible = "stericsson,ab8500-codec", 1079 1080 }, 1080 1081 }; 1081 1082
-124
drivers/mfd/anatop-mfd.c
··· 1 - /* 2 - * Anatop MFD driver 3 - * 4 - * Copyright (C) 2012 Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> 5 - * Copyright (C) 2012 Linaro 6 - * 7 - * This program is free software; you can redistribute it and/or modify 8 - * it under the terms of the GNU General Public License as published by 9 - * the Free Software Foundation; either version 2 of the License, or 10 - * (at your option) any later version. 11 - * 12 - * This program is distributed in the hope that it will be useful, 13 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 - * GNU General Public License for more details. 16 - * 17 - * You should have received a copy of the GNU General Public License along 18 - * with this program; if not, write to the Free Software Foundation, Inc., 19 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 20 - * This program is free software; you can redistribute it and/or modify 21 - * it under the terms of the GNU General Public License as published by 22 - * the Free Software Foundation; either version 2 of the License, or 23 - * (at your option) any later version. 24 - * 25 - * This program is distributed in the hope that it will be useful, 26 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 27 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 28 - * GNU General Public License for more details. 29 - * 30 - * You should have received a copy of the GNU General Public License along 31 - * with this program; if not, write to the Free Software Foundation, Inc., 32 - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. 33 - * 34 - */ 35 - 36 - #include <linux/io.h> 37 - #include <linux/module.h> 38 - #include <linux/platform_device.h> 39 - #include <linux/of.h> 40 - #include <linux/of_platform.h> 41 - #include <linux/of_address.h> 42 - #include <linux/mfd/anatop.h> 43 - 44 - u32 anatop_read_reg(struct anatop *adata, u32 addr) 45 - { 46 - return readl(adata->ioreg + addr); 47 - } 48 - EXPORT_SYMBOL_GPL(anatop_read_reg); 49 - 50 - void anatop_write_reg(struct anatop *adata, u32 addr, u32 data, u32 mask) 51 - { 52 - u32 val; 53 - 54 - data &= mask; 55 - 56 - spin_lock(&adata->reglock); 57 - val = readl(adata->ioreg + addr); 58 - val &= ~mask; 59 - val |= data; 60 - writel(val, adata->ioreg + addr); 61 - spin_unlock(&adata->reglock); 62 - } 63 - EXPORT_SYMBOL_GPL(anatop_write_reg); 64 - 65 - static const struct of_device_id of_anatop_match[] = { 66 - { .compatible = "fsl,imx6q-anatop", }, 67 - { }, 68 - }; 69 - 70 - static int __devinit of_anatop_probe(struct platform_device *pdev) 71 - { 72 - struct device *dev = &pdev->dev; 73 - struct device_node *np = dev->of_node; 74 - void *ioreg; 75 - struct anatop *drvdata; 76 - 77 - ioreg = of_iomap(np, 0); 78 - if (!ioreg) 79 - return -EADDRNOTAVAIL; 80 - drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); 81 - if (!drvdata) 82 - return -ENOMEM; 83 - drvdata->ioreg = ioreg; 84 - spin_lock_init(&drvdata->reglock); 85 - platform_set_drvdata(pdev, drvdata); 86 - of_platform_populate(np, NULL, NULL, dev); 87 - 88 - return 0; 89 - } 90 - 91 - static int __devexit of_anatop_remove(struct platform_device *pdev) 92 - { 93 - struct anatop *drvdata; 94 - drvdata = platform_get_drvdata(pdev); 95 - iounmap(drvdata->ioreg); 96 - 97 - return 0; 98 - } 99 - 100 - static struct platform_driver anatop_of_driver = { 101 - .driver = { 102 - .name = "anatop-mfd", 103 - .owner = THIS_MODULE, 104 - .of_match_table = of_anatop_match, 105 - }, 106 - .probe = of_anatop_probe, 107 - .remove = of_anatop_remove, 108 - }; 109 - 110 - static int __init anatop_init(void) 111 - { 112 - return platform_driver_register(&anatop_of_driver); 113 - } 114 - postcore_initcall(anatop_init); 115 - 116 - static void __exit anatop_exit(void) 117 - { 118 - platform_driver_unregister(&anatop_of_driver); 119 - } 120 - module_exit(anatop_exit); 121 - 122 - MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>"); 123 - MODULE_DESCRIPTION("ANATOP MFD driver"); 124 - MODULE_LICENSE("GPL v2");
+45 -11
drivers/mfd/arizona-irq.c
··· 94 94 static irqreturn_t arizona_irq_thread(int irq, void *data) 95 95 { 96 96 struct arizona *arizona = data; 97 - int i, ret; 97 + unsigned int val; 98 + int ret; 98 99 99 100 ret = pm_runtime_get_sync(arizona->dev); 100 101 if (ret < 0) { ··· 103 102 return IRQ_NONE; 104 103 } 105 104 106 - /* Check both domains */ 107 - for (i = 0; i < 2; i++) 108 - handle_nested_irq(irq_find_mapping(arizona->virq, i)); 105 + /* Always handle the AoD domain */ 106 + handle_nested_irq(irq_find_mapping(arizona->virq, 0)); 107 + 108 + /* 109 + * Check if one of the main interrupts is asserted and only 110 + * check that domain if it is. 111 + */ 112 + ret = regmap_read(arizona->regmap, ARIZONA_IRQ_PIN_STATUS, &val); 113 + if (ret == 0 && val & ARIZONA_IRQ1_STS) { 114 + handle_nested_irq(irq_find_mapping(arizona->virq, 1)); 115 + } else if (ret != 0) { 116 + dev_err(arizona->dev, "Failed to read main IRQ status: %d\n", 117 + ret); 118 + } 109 119 110 120 pm_runtime_mark_last_busy(arizona->dev); 111 121 pm_runtime_put_autosuspend(arizona->dev); ··· 168 156 int flags = IRQF_ONESHOT; 169 157 int ret, i; 170 158 const struct regmap_irq_chip *aod, *irq; 159 + bool ctrlif_error = true; 171 160 172 161 switch (arizona->type) { 173 162 #ifdef CONFIG_MFD_WM5102 174 163 case WM5102: 175 164 aod = &wm5102_aod; 176 165 irq = &wm5102_irq; 166 + 167 + switch (arizona->rev) { 168 + case 0: 169 + ctrlif_error = false; 170 + break; 171 + default: 172 + break; 173 + } 177 174 break; 178 175 #endif 179 176 #ifdef CONFIG_MFD_WM5110 180 177 case WM5110: 181 178 aod = &wm5110_aod; 182 179 irq = &wm5110_irq; 180 + 181 + switch (arizona->rev) { 182 + case 0: 183 + case 1: 184 + ctrlif_error = false; 185 + break; 186 + default: 187 + break; 188 + } 183 189 break; 184 190 #endif 185 191 default: ··· 256 226 } 257 227 258 228 /* Handle control interface errors in the core */ 259 - i = arizona_map_irq(arizona, ARIZONA_IRQ_CTRLIF_ERR); 260 - ret = request_threaded_irq(i, NULL, arizona_ctrlif_err, IRQF_ONESHOT, 261 - "Control interface error", arizona); 262 - if (ret != 0) { 263 - dev_err(arizona->dev, "Failed to request boot done %d: %d\n", 264 - arizona->irq, ret); 265 - goto err_ctrlif; 229 + if (ctrlif_error) { 230 + i = arizona_map_irq(arizona, ARIZONA_IRQ_CTRLIF_ERR); 231 + ret = request_threaded_irq(i, NULL, arizona_ctrlif_err, 232 + IRQF_ONESHOT, 233 + "Control interface error", arizona); 234 + if (ret != 0) { 235 + dev_err(arizona->dev, 236 + "Failed to request CTRLIF_ERR %d: %d\n", 237 + arizona->irq, ret); 238 + goto err_ctrlif; 239 + } 266 240 } 267 241 268 242 ret = request_threaded_irq(arizona->irq, NULL, arizona_irq_thread,
+423
drivers/mfd/da9055-core.c
··· 1 + /* 2 + * Device access for Dialog DA9055 PMICs. 3 + * 4 + * Copyright(c) 2012 Dialog Semiconductor Ltd. 5 + * 6 + * Author: David Dajun Chen <dchen@diasemi.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify it 9 + * under the terms of the GNU General Public License as published by the 10 + * Free Software Foundation; either version 2 of the License, or (at your 11 + * option) any later version. 12 + */ 13 + 14 + #include <linux/module.h> 15 + #include <linux/device.h> 16 + #include <linux/input.h> 17 + #include <linux/irq.h> 18 + #include <linux/mutex.h> 19 + 20 + #include <linux/mfd/core.h> 21 + #include <linux/mfd/da9055/core.h> 22 + #include <linux/mfd/da9055/pdata.h> 23 + #include <linux/mfd/da9055/reg.h> 24 + 25 + #define DA9055_IRQ_NONKEY_MASK 0x01 26 + #define DA9055_IRQ_ALM_MASK 0x02 27 + #define DA9055_IRQ_TICK_MASK 0x04 28 + #define DA9055_IRQ_ADC_MASK 0x08 29 + #define DA9055_IRQ_BUCK_ILIM_MASK 0x08 30 + 31 + static bool da9055_register_readable(struct device *dev, unsigned int reg) 32 + { 33 + switch (reg) { 34 + case DA9055_REG_STATUS_A: 35 + case DA9055_REG_STATUS_B: 36 + case DA9055_REG_EVENT_A: 37 + case DA9055_REG_EVENT_B: 38 + case DA9055_REG_EVENT_C: 39 + case DA9055_REG_IRQ_MASK_A: 40 + case DA9055_REG_IRQ_MASK_B: 41 + case DA9055_REG_IRQ_MASK_C: 42 + 43 + case DA9055_REG_CONTROL_A: 44 + case DA9055_REG_CONTROL_B: 45 + case DA9055_REG_CONTROL_C: 46 + case DA9055_REG_CONTROL_D: 47 + case DA9055_REG_CONTROL_E: 48 + 49 + case DA9055_REG_ADC_MAN: 50 + case DA9055_REG_ADC_CONT: 51 + case DA9055_REG_VSYS_MON: 52 + case DA9055_REG_ADC_RES_L: 53 + case DA9055_REG_ADC_RES_H: 54 + case DA9055_REG_VSYS_RES: 55 + case DA9055_REG_ADCIN1_RES: 56 + case DA9055_REG_ADCIN2_RES: 57 + case DA9055_REG_ADCIN3_RES: 58 + 59 + case DA9055_REG_COUNT_S: 60 + case DA9055_REG_COUNT_MI: 61 + case DA9055_REG_COUNT_H: 62 + case DA9055_REG_COUNT_D: 63 + case DA9055_REG_COUNT_MO: 64 + case DA9055_REG_COUNT_Y: 65 + case DA9055_REG_ALARM_H: 66 + case DA9055_REG_ALARM_D: 67 + case DA9055_REG_ALARM_MI: 68 + case DA9055_REG_ALARM_MO: 69 + case DA9055_REG_ALARM_Y: 70 + 71 + case DA9055_REG_GPIO0_1: 72 + case DA9055_REG_GPIO2: 73 + case DA9055_REG_GPIO_MODE0_2: 74 + 75 + case DA9055_REG_BCORE_CONT: 76 + case DA9055_REG_BMEM_CONT: 77 + case DA9055_REG_LDO1_CONT: 78 + case DA9055_REG_LDO2_CONT: 79 + case DA9055_REG_LDO3_CONT: 80 + case DA9055_REG_LDO4_CONT: 81 + case DA9055_REG_LDO5_CONT: 82 + case DA9055_REG_LDO6_CONT: 83 + case DA9055_REG_BUCK_LIM: 84 + case DA9055_REG_BCORE_MODE: 85 + case DA9055_REG_VBCORE_A: 86 + case DA9055_REG_VBMEM_A: 87 + case DA9055_REG_VLDO1_A: 88 + case DA9055_REG_VLDO2_A: 89 + case DA9055_REG_VLDO3_A: 90 + case DA9055_REG_VLDO4_A: 91 + case DA9055_REG_VLDO5_A: 92 + case DA9055_REG_VLDO6_A: 93 + case DA9055_REG_VBCORE_B: 94 + case DA9055_REG_VBMEM_B: 95 + case DA9055_REG_VLDO1_B: 96 + case DA9055_REG_VLDO2_B: 97 + case DA9055_REG_VLDO3_B: 98 + case DA9055_REG_VLDO4_B: 99 + case DA9055_REG_VLDO5_B: 100 + case DA9055_REG_VLDO6_B: 101 + return true; 102 + default: 103 + return false; 104 + } 105 + } 106 + 107 + static bool da9055_register_writeable(struct device *dev, unsigned int reg) 108 + { 109 + switch (reg) { 110 + case DA9055_REG_STATUS_A: 111 + case DA9055_REG_STATUS_B: 112 + case DA9055_REG_EVENT_A: 113 + case DA9055_REG_EVENT_B: 114 + case DA9055_REG_EVENT_C: 115 + case DA9055_REG_IRQ_MASK_A: 116 + case DA9055_REG_IRQ_MASK_B: 117 + case DA9055_REG_IRQ_MASK_C: 118 + 119 + case DA9055_REG_CONTROL_A: 120 + case DA9055_REG_CONTROL_B: 121 + case DA9055_REG_CONTROL_C: 122 + case DA9055_REG_CONTROL_D: 123 + case DA9055_REG_CONTROL_E: 124 + 125 + case DA9055_REG_ADC_MAN: 126 + case DA9055_REG_ADC_CONT: 127 + case DA9055_REG_VSYS_MON: 128 + case DA9055_REG_ADC_RES_L: 129 + case DA9055_REG_ADC_RES_H: 130 + case DA9055_REG_VSYS_RES: 131 + case DA9055_REG_ADCIN1_RES: 132 + case DA9055_REG_ADCIN2_RES: 133 + case DA9055_REG_ADCIN3_RES: 134 + 135 + case DA9055_REG_COUNT_S: 136 + case DA9055_REG_COUNT_MI: 137 + case DA9055_REG_COUNT_H: 138 + case DA9055_REG_COUNT_D: 139 + case DA9055_REG_COUNT_MO: 140 + case DA9055_REG_COUNT_Y: 141 + case DA9055_REG_ALARM_H: 142 + case DA9055_REG_ALARM_D: 143 + case DA9055_REG_ALARM_MI: 144 + case DA9055_REG_ALARM_MO: 145 + case DA9055_REG_ALARM_Y: 146 + 147 + case DA9055_REG_GPIO0_1: 148 + case DA9055_REG_GPIO2: 149 + case DA9055_REG_GPIO_MODE0_2: 150 + 151 + case DA9055_REG_BCORE_CONT: 152 + case DA9055_REG_BMEM_CONT: 153 + case DA9055_REG_LDO1_CONT: 154 + case DA9055_REG_LDO2_CONT: 155 + case DA9055_REG_LDO3_CONT: 156 + case DA9055_REG_LDO4_CONT: 157 + case DA9055_REG_LDO5_CONT: 158 + case DA9055_REG_LDO6_CONT: 159 + case DA9055_REG_BUCK_LIM: 160 + case DA9055_REG_BCORE_MODE: 161 + case DA9055_REG_VBCORE_A: 162 + case DA9055_REG_VBMEM_A: 163 + case DA9055_REG_VLDO1_A: 164 + case DA9055_REG_VLDO2_A: 165 + case DA9055_REG_VLDO3_A: 166 + case DA9055_REG_VLDO4_A: 167 + case DA9055_REG_VLDO5_A: 168 + case DA9055_REG_VLDO6_A: 169 + case DA9055_REG_VBCORE_B: 170 + case DA9055_REG_VBMEM_B: 171 + case DA9055_REG_VLDO1_B: 172 + case DA9055_REG_VLDO2_B: 173 + case DA9055_REG_VLDO3_B: 174 + case DA9055_REG_VLDO4_B: 175 + case DA9055_REG_VLDO5_B: 176 + case DA9055_REG_VLDO6_B: 177 + return true; 178 + default: 179 + return false; 180 + } 181 + } 182 + 183 + static bool da9055_register_volatile(struct device *dev, unsigned int reg) 184 + { 185 + switch (reg) { 186 + case DA9055_REG_STATUS_A: 187 + case DA9055_REG_STATUS_B: 188 + case DA9055_REG_EVENT_A: 189 + case DA9055_REG_EVENT_B: 190 + case DA9055_REG_EVENT_C: 191 + 192 + case DA9055_REG_CONTROL_A: 193 + case DA9055_REG_CONTROL_E: 194 + 195 + case DA9055_REG_ADC_MAN: 196 + case DA9055_REG_ADC_RES_L: 197 + case DA9055_REG_ADC_RES_H: 198 + case DA9055_REG_VSYS_RES: 199 + case DA9055_REG_ADCIN1_RES: 200 + case DA9055_REG_ADCIN2_RES: 201 + case DA9055_REG_ADCIN3_RES: 202 + 203 + case DA9055_REG_COUNT_S: 204 + case DA9055_REG_COUNT_MI: 205 + case DA9055_REG_COUNT_H: 206 + case DA9055_REG_COUNT_D: 207 + case DA9055_REG_COUNT_MO: 208 + case DA9055_REG_COUNT_Y: 209 + case DA9055_REG_ALARM_MI: 210 + 211 + case DA9055_REG_BCORE_CONT: 212 + case DA9055_REG_BMEM_CONT: 213 + case DA9055_REG_LDO1_CONT: 214 + case DA9055_REG_LDO2_CONT: 215 + case DA9055_REG_LDO3_CONT: 216 + case DA9055_REG_LDO4_CONT: 217 + case DA9055_REG_LDO5_CONT: 218 + case DA9055_REG_LDO6_CONT: 219 + return true; 220 + default: 221 + return false; 222 + } 223 + } 224 + 225 + static struct regmap_irq da9055_irqs[] = { 226 + [DA9055_IRQ_NONKEY] = { 227 + .reg_offset = 0, 228 + .mask = DA9055_IRQ_NONKEY_MASK, 229 + }, 230 + [DA9055_IRQ_ALARM] = { 231 + .reg_offset = 0, 232 + .mask = DA9055_IRQ_ALM_MASK, 233 + }, 234 + [DA9055_IRQ_TICK] = { 235 + .reg_offset = 0, 236 + .mask = DA9055_IRQ_TICK_MASK, 237 + }, 238 + [DA9055_IRQ_HWMON] = { 239 + .reg_offset = 0, 240 + .mask = DA9055_IRQ_ADC_MASK, 241 + }, 242 + [DA9055_IRQ_REGULATOR] = { 243 + .reg_offset = 1, 244 + .mask = DA9055_IRQ_BUCK_ILIM_MASK, 245 + }, 246 + }; 247 + 248 + struct regmap_config da9055_regmap_config = { 249 + .reg_bits = 8, 250 + .val_bits = 8, 251 + 252 + .cache_type = REGCACHE_RBTREE, 253 + 254 + .max_register = DA9055_MAX_REGISTER_CNT, 255 + .readable_reg = da9055_register_readable, 256 + .writeable_reg = da9055_register_writeable, 257 + .volatile_reg = da9055_register_volatile, 258 + }; 259 + EXPORT_SYMBOL_GPL(da9055_regmap_config); 260 + 261 + static struct resource da9055_onkey_resource = { 262 + .name = "ONKEY", 263 + .start = DA9055_IRQ_NONKEY, 264 + .end = DA9055_IRQ_NONKEY, 265 + .flags = IORESOURCE_IRQ, 266 + }; 267 + 268 + static struct resource da9055_rtc_resource[] = { 269 + { 270 + .name = "ALM", 271 + .start = DA9055_IRQ_ALARM, 272 + .end = DA9055_IRQ_ALARM, 273 + .flags = IORESOURCE_IRQ, 274 + }, 275 + { 276 + .name = "TICK", 277 + .start = DA9055_IRQ_TICK, 278 + .end = DA9055_IRQ_TICK, 279 + .flags = IORESOURCE_IRQ, 280 + }, 281 + }; 282 + 283 + static struct resource da9055_hwmon_resource = { 284 + .name = "HWMON", 285 + .start = DA9055_IRQ_HWMON, 286 + .end = DA9055_IRQ_HWMON, 287 + .flags = IORESOURCE_IRQ, 288 + }; 289 + 290 + static struct resource da9055_ld05_6_resource = { 291 + .name = "REGULATOR", 292 + .start = DA9055_IRQ_REGULATOR, 293 + .end = DA9055_IRQ_REGULATOR, 294 + .flags = IORESOURCE_IRQ, 295 + }; 296 + 297 + static struct mfd_cell da9055_devs[] = { 298 + { 299 + .of_compatible = "dialog,da9055-gpio", 300 + .name = "da9055-gpio", 301 + }, 302 + { 303 + .of_compatible = "dialog,da9055-regulator", 304 + .name = "da9055-regulator", 305 + .id = 1, 306 + }, 307 + { 308 + .of_compatible = "dialog,da9055-regulator", 309 + .name = "da9055-regulator", 310 + .id = 2, 311 + }, 312 + { 313 + .of_compatible = "dialog,da9055-regulator", 314 + .name = "da9055-regulator", 315 + .id = 3, 316 + }, 317 + { 318 + .of_compatible = "dialog,da9055-regulator", 319 + .name = "da9055-regulator", 320 + .id = 4, 321 + }, 322 + { 323 + .of_compatible = "dialog,da9055-regulator", 324 + .name = "da9055-regulator", 325 + .id = 5, 326 + }, 327 + { 328 + .of_compatible = "dialog,da9055-regulator", 329 + .name = "da9055-regulator", 330 + .id = 6, 331 + }, 332 + { 333 + .of_compatible = "dialog,da9055-regulator", 334 + .name = "da9055-regulator", 335 + .id = 7, 336 + .resources = &da9055_ld05_6_resource, 337 + .num_resources = 1, 338 + }, 339 + { 340 + .of_compatible = "dialog,da9055-regulator", 341 + .name = "da9055-regulator", 342 + .resources = &da9055_ld05_6_resource, 343 + .num_resources = 1, 344 + .id = 8, 345 + }, 346 + { 347 + .of_compatible = "dialog,da9055-onkey", 348 + .name = "da9055-onkey", 349 + .resources = &da9055_onkey_resource, 350 + .num_resources = 1, 351 + }, 352 + { 353 + .of_compatible = "dialog,da9055-rtc", 354 + .name = "da9055-rtc", 355 + .resources = da9055_rtc_resource, 356 + .num_resources = ARRAY_SIZE(da9055_rtc_resource), 357 + }, 358 + { 359 + .of_compatible = "dialog,da9055-hwmon", 360 + .name = "da9055-hwmon", 361 + .resources = &da9055_hwmon_resource, 362 + .num_resources = 1, 363 + }, 364 + { 365 + .of_compatible = "dialog,da9055-watchdog", 366 + .name = "da9055-watchdog", 367 + }, 368 + }; 369 + 370 + static struct regmap_irq_chip da9055_regmap_irq_chip = { 371 + .name = "da9055_irq", 372 + .status_base = DA9055_REG_EVENT_A, 373 + .mask_base = DA9055_REG_IRQ_MASK_A, 374 + .ack_base = DA9055_REG_EVENT_A, 375 + .num_regs = 3, 376 + .irqs = da9055_irqs, 377 + .num_irqs = ARRAY_SIZE(da9055_irqs), 378 + }; 379 + 380 + int __devinit da9055_device_init(struct da9055 *da9055) 381 + { 382 + struct da9055_pdata *pdata = da9055->dev->platform_data; 383 + int ret; 384 + 385 + if (pdata && pdata->init != NULL) 386 + pdata->init(da9055); 387 + 388 + if (!pdata || !pdata->irq_base) 389 + da9055->irq_base = -1; 390 + else 391 + da9055->irq_base = pdata->irq_base; 392 + 393 + ret = regmap_add_irq_chip(da9055->regmap, da9055->chip_irq, 394 + IRQF_TRIGGER_HIGH | IRQF_ONESHOT, 395 + da9055->irq_base, &da9055_regmap_irq_chip, 396 + &da9055->irq_data); 397 + if (ret < 0) 398 + return ret; 399 + 400 + da9055->irq_base = regmap_irq_chip_get_base(da9055->irq_data); 401 + 402 + ret = mfd_add_devices(da9055->dev, -1, 403 + da9055_devs, ARRAY_SIZE(da9055_devs), 404 + NULL, da9055->irq_base, NULL); 405 + if (ret) 406 + goto err; 407 + 408 + return 0; 409 + 410 + err: 411 + mfd_remove_devices(da9055->dev); 412 + return ret; 413 + } 414 + 415 + void __devexit da9055_device_exit(struct da9055 *da9055) 416 + { 417 + regmap_del_irq_chip(da9055->chip_irq, da9055->irq_data); 418 + mfd_remove_devices(da9055->dev); 419 + } 420 + 421 + MODULE_DESCRIPTION("Core support for the DA9055 PMIC"); 422 + MODULE_LICENSE("GPL"); 423 + MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>");
+93
drivers/mfd/da9055-i2c.c
··· 1 + /* I2C access for DA9055 PMICs. 2 + * 3 + * Copyright(c) 2012 Dialog Semiconductor Ltd. 4 + * 5 + * Author: David Dajun Chen <dchen@diasemi.com> 6 + * 7 + * This program is free software; you can redistribute it and/or modify 8 + * it under the terms of the GNU General Public License as published by 9 + * the Free Software Foundation; either version 2 of the License, or 10 + * (at your option) any later version. 11 + * 12 + */ 13 + 14 + #include <linux/module.h> 15 + #include <linux/device.h> 16 + #include <linux/i2c.h> 17 + #include <linux/err.h> 18 + 19 + #include <linux/mfd/da9055/core.h> 20 + 21 + static int __devinit da9055_i2c_probe(struct i2c_client *i2c, 22 + const struct i2c_device_id *id) 23 + { 24 + struct da9055 *da9055; 25 + int ret; 26 + 27 + da9055 = devm_kzalloc(&i2c->dev, sizeof(struct da9055), GFP_KERNEL); 28 + if (!da9055) 29 + return -ENOMEM; 30 + 31 + da9055->regmap = devm_regmap_init_i2c(i2c, &da9055_regmap_config); 32 + if (IS_ERR(da9055->regmap)) { 33 + ret = PTR_ERR(da9055->regmap); 34 + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 35 + ret); 36 + return ret; 37 + } 38 + 39 + da9055->dev = &i2c->dev; 40 + da9055->chip_irq = i2c->irq; 41 + 42 + i2c_set_clientdata(i2c, da9055); 43 + 44 + return da9055_device_init(da9055); 45 + } 46 + 47 + static int __devexit da9055_i2c_remove(struct i2c_client *i2c) 48 + { 49 + struct da9055 *da9055 = i2c_get_clientdata(i2c); 50 + 51 + da9055_device_exit(da9055); 52 + 53 + return 0; 54 + } 55 + 56 + static struct i2c_device_id da9055_i2c_id[] = { 57 + {"da9055-pmic", 0}, 58 + { } 59 + }; 60 + 61 + static struct i2c_driver da9055_i2c_driver = { 62 + .probe = da9055_i2c_probe, 63 + .remove = __devexit_p(da9055_i2c_remove), 64 + .id_table = da9055_i2c_id, 65 + .driver = { 66 + .name = "da9055", 67 + .owner = THIS_MODULE, 68 + }, 69 + }; 70 + 71 + static int __init da9055_i2c_init(void) 72 + { 73 + int ret; 74 + 75 + ret = i2c_add_driver(&da9055_i2c_driver); 76 + if (ret != 0) { 77 + pr_err("DA9055 I2C registration failed %d\n", ret); 78 + return ret; 79 + } 80 + 81 + return 0; 82 + } 83 + subsys_initcall(da9055_i2c_init); 84 + 85 + static void __exit da9055_i2c_exit(void) 86 + { 87 + i2c_del_driver(&da9055_i2c_driver); 88 + } 89 + module_exit(da9055_i2c_exit); 90 + 91 + MODULE_AUTHOR("David Dajun Chen <dchen@diasemi.com>"); 92 + MODULE_DESCRIPTION("I2C driver for Dialog DA9055 PMIC"); 93 + MODULE_LICENSE("GPL");
+35 -12
drivers/mfd/db8500-prcmu.c
··· 270 270 struct prcmu_fw_version version; 271 271 } fw_info; 272 272 273 + static struct irq_domain *db8500_irq_domain; 274 + 273 275 /* 274 276 * This vector maps irq numbers to the bits in the bit field used in 275 277 * communication with the PRCMU firmware. ··· 2626 2624 2627 2625 spin_lock_irqsave(&mb0_transfer.dbb_irqs_lock, flags); 2628 2626 2629 - mb0_transfer.req.dbb_irqs &= ~prcmu_irq_bit[d->irq - IRQ_PRCMU_BASE]; 2627 + mb0_transfer.req.dbb_irqs &= ~prcmu_irq_bit[d->hwirq]; 2630 2628 2631 2629 spin_unlock_irqrestore(&mb0_transfer.dbb_irqs_lock, flags); 2632 2630 ··· 2640 2638 2641 2639 spin_lock_irqsave(&mb0_transfer.dbb_irqs_lock, flags); 2642 2640 2643 - mb0_transfer.req.dbb_irqs |= prcmu_irq_bit[d->irq - IRQ_PRCMU_BASE]; 2641 + mb0_transfer.req.dbb_irqs |= prcmu_irq_bit[d->hwirq]; 2644 2642 2645 2643 spin_unlock_irqrestore(&mb0_transfer.dbb_irqs_lock, flags); 2646 2644 ··· 2680 2678 } 2681 2679 } 2682 2680 2681 + static int db8500_irq_map(struct irq_domain *d, unsigned int virq, 2682 + irq_hw_number_t hwirq) 2683 + { 2684 + irq_set_chip_and_handler(virq, &prcmu_irq_chip, 2685 + handle_simple_irq); 2686 + set_irq_flags(virq, IRQF_VALID); 2687 + 2688 + return 0; 2689 + } 2690 + 2691 + static struct irq_domain_ops db8500_irq_ops = { 2692 + .map = db8500_irq_map, 2693 + .xlate = irq_domain_xlate_twocell, 2694 + }; 2695 + 2696 + static int db8500_irq_init(struct device_node *np) 2697 + { 2698 + db8500_irq_domain = irq_domain_add_legacy( 2699 + np, NUM_PRCMU_WAKEUPS, IRQ_PRCMU_BASE, 2700 + 0, &db8500_irq_ops, NULL); 2701 + 2702 + if (!db8500_irq_domain) { 2703 + pr_err("Failed to create irqdomain\n"); 2704 + return -ENOSYS; 2705 + } 2706 + 2707 + return 0; 2708 + } 2709 + 2683 2710 void __init db8500_prcmu_early_init(void) 2684 2711 { 2685 - unsigned int i; 2686 2712 if (cpu_is_u8500v2()) { 2687 2713 void *tcpm_base = ioremap_nocache(U8500_PRCMU_TCPM_BASE, SZ_4K); 2688 2714 ··· 2755 2725 2756 2726 INIT_WORK(&mb0_transfer.mask_work, prcmu_mask_work); 2757 2727 2758 - /* Initalize irqs. */ 2759 - for (i = 0; i < NUM_PRCMU_WAKEUPS; i++) { 2760 - unsigned int irq; 2761 - 2762 - irq = IRQ_PRCMU_BASE + i; 2763 - irq_set_chip_and_handler(irq, &prcmu_irq_chip, 2764 - handle_simple_irq); 2765 - set_irq_flags(irq, IRQF_VALID); 2766 - } 2767 2728 compute_armss_rate(); 2768 2729 } 2769 2730 ··· 3061 3040 err = -EBUSY; 3062 3041 goto no_irq_return; 3063 3042 } 3043 + 3044 + db8500_irq_init(np); 3064 3045 3065 3046 for (i = 0; i < ARRAY_SIZE(db8500_prcmu_devs); i++) { 3066 3047 if (!strcmp(db8500_prcmu_devs[i].name, "ab8500-core")) {
+198
drivers/mfd/lp8788-irq.c
··· 1 + /* 2 + * TI LP8788 MFD - interrupt handler 3 + * 4 + * Copyright 2012 Texas Instruments 5 + * 6 + * Author: Milo(Woogyom) Kim <milo.kim@ti.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License version 2 as 10 + * published by the Free Software Foundation. 11 + * 12 + */ 13 + 14 + #include <linux/delay.h> 15 + #include <linux/err.h> 16 + #include <linux/interrupt.h> 17 + #include <linux/irq.h> 18 + #include <linux/irqdomain.h> 19 + #include <linux/device.h> 20 + #include <linux/mfd/lp8788.h> 21 + #include <linux/module.h> 22 + #include <linux/slab.h> 23 + 24 + /* register address */ 25 + #define LP8788_INT_1 0x00 26 + #define LP8788_INTEN_1 0x03 27 + 28 + #define BASE_INTEN_ADDR LP8788_INTEN_1 29 + #define SIZE_REG 8 30 + #define NUM_REGS 3 31 + 32 + /* 33 + * struct lp8788_irq_data 34 + * @lp : used for accessing to lp8788 registers 35 + * @irq_lock : mutex for enabling/disabling the interrupt 36 + * @domain : IRQ domain for handling nested interrupt 37 + * @enabled : status of enabled interrupt 38 + */ 39 + struct lp8788_irq_data { 40 + struct lp8788 *lp; 41 + struct mutex irq_lock; 42 + struct irq_domain *domain; 43 + int enabled[LP8788_INT_MAX]; 44 + }; 45 + 46 + static inline u8 _irq_to_addr(enum lp8788_int_id id) 47 + { 48 + return id / SIZE_REG; 49 + } 50 + 51 + static inline u8 _irq_to_enable_addr(enum lp8788_int_id id) 52 + { 53 + return _irq_to_addr(id) + BASE_INTEN_ADDR; 54 + } 55 + 56 + static inline u8 _irq_to_mask(enum lp8788_int_id id) 57 + { 58 + return 1 << (id % SIZE_REG); 59 + } 60 + 61 + static inline u8 _irq_to_val(enum lp8788_int_id id, int enable) 62 + { 63 + return enable << (id % SIZE_REG); 64 + } 65 + 66 + static void lp8788_irq_enable(struct irq_data *data) 67 + { 68 + struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data); 69 + irqd->enabled[data->hwirq] = 1; 70 + } 71 + 72 + static void lp8788_irq_disable(struct irq_data *data) 73 + { 74 + struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data); 75 + irqd->enabled[data->hwirq] = 0; 76 + } 77 + 78 + static void lp8788_irq_bus_lock(struct irq_data *data) 79 + { 80 + struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data); 81 + 82 + mutex_lock(&irqd->irq_lock); 83 + } 84 + 85 + static void lp8788_irq_bus_sync_unlock(struct irq_data *data) 86 + { 87 + struct lp8788_irq_data *irqd = irq_data_get_irq_chip_data(data); 88 + enum lp8788_int_id irq = data->hwirq; 89 + u8 addr, mask, val; 90 + 91 + addr = _irq_to_enable_addr(irq); 92 + mask = _irq_to_mask(irq); 93 + val = _irq_to_val(irq, irqd->enabled[irq]); 94 + 95 + lp8788_update_bits(irqd->lp, addr, mask, val); 96 + 97 + mutex_unlock(&irqd->irq_lock); 98 + } 99 + 100 + static struct irq_chip lp8788_irq_chip = { 101 + .name = "lp8788", 102 + .irq_enable = lp8788_irq_enable, 103 + .irq_disable = lp8788_irq_disable, 104 + .irq_bus_lock = lp8788_irq_bus_lock, 105 + .irq_bus_sync_unlock = lp8788_irq_bus_sync_unlock, 106 + }; 107 + 108 + static irqreturn_t lp8788_irq_handler(int irq, void *ptr) 109 + { 110 + struct lp8788_irq_data *irqd = ptr; 111 + struct lp8788 *lp = irqd->lp; 112 + u8 status[NUM_REGS], addr, mask; 113 + bool handled; 114 + int i; 115 + 116 + if (lp8788_read_multi_bytes(lp, LP8788_INT_1, status, NUM_REGS)) 117 + return IRQ_NONE; 118 + 119 + for (i = 0 ; i < LP8788_INT_MAX ; i++) { 120 + addr = _irq_to_addr(i); 121 + mask = _irq_to_mask(i); 122 + 123 + /* reporting only if the irq is enabled */ 124 + if (status[addr] & mask) { 125 + handle_nested_irq(irq_find_mapping(irqd->domain, i)); 126 + handled = true; 127 + } 128 + } 129 + 130 + return handled ? IRQ_HANDLED : IRQ_NONE; 131 + } 132 + 133 + static int lp8788_irq_map(struct irq_domain *d, unsigned int virq, 134 + irq_hw_number_t hwirq) 135 + { 136 + struct lp8788_irq_data *irqd = d->host_data; 137 + struct irq_chip *chip = &lp8788_irq_chip; 138 + 139 + irq_set_chip_data(virq, irqd); 140 + irq_set_chip_and_handler(virq, chip, handle_edge_irq); 141 + irq_set_nested_thread(virq, 1); 142 + 143 + #ifdef CONFIG_ARM 144 + set_irq_flags(virq, IRQF_VALID); 145 + #else 146 + irq_set_noprobe(virq); 147 + #endif 148 + 149 + return 0; 150 + } 151 + 152 + static struct irq_domain_ops lp8788_domain_ops = { 153 + .map = lp8788_irq_map, 154 + }; 155 + 156 + int lp8788_irq_init(struct lp8788 *lp, int irq) 157 + { 158 + struct lp8788_irq_data *irqd; 159 + int ret; 160 + 161 + if (irq <= 0) { 162 + dev_warn(lp->dev, "invalid irq number: %d\n", irq); 163 + return 0; 164 + } 165 + 166 + irqd = devm_kzalloc(lp->dev, sizeof(*irqd), GFP_KERNEL); 167 + if (!irqd) 168 + return -ENOMEM; 169 + 170 + irqd->lp = lp; 171 + irqd->domain = irq_domain_add_linear(lp->dev->of_node, LP8788_INT_MAX, 172 + &lp8788_domain_ops, irqd); 173 + if (!irqd->domain) { 174 + dev_err(lp->dev, "failed to add irq domain err\n"); 175 + return -EINVAL; 176 + } 177 + 178 + lp->irqdm = irqd->domain; 179 + mutex_init(&irqd->irq_lock); 180 + 181 + ret = request_threaded_irq(irq, NULL, lp8788_irq_handler, 182 + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 183 + "lp8788-irq", irqd); 184 + if (ret) { 185 + dev_err(lp->dev, "failed to create a thread for IRQ_N\n"); 186 + return ret; 187 + } 188 + 189 + lp->irq = irq; 190 + 191 + return 0; 192 + } 193 + 194 + void lp8788_irq_exit(struct lp8788 *lp) 195 + { 196 + if (lp->irq) 197 + free_irq(lp->irq, lp->irqdm); 198 + }
+245
drivers/mfd/lp8788.c
··· 1 + /* 2 + * TI LP8788 MFD - core interface 3 + * 4 + * Copyright 2012 Texas Instruments 5 + * 6 + * Author: Milo(Woogyom) Kim <milo.kim@ti.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License version 2 as 10 + * published by the Free Software Foundation. 11 + * 12 + */ 13 + 14 + #include <linux/err.h> 15 + #include <linux/i2c.h> 16 + #include <linux/mfd/core.h> 17 + #include <linux/mfd/lp8788.h> 18 + #include <linux/module.h> 19 + #include <linux/slab.h> 20 + 21 + #define MAX_LP8788_REGISTERS 0xA2 22 + 23 + #define MFD_DEV_SIMPLE(_name) \ 24 + { \ 25 + .name = LP8788_DEV_##_name, \ 26 + } 27 + 28 + #define MFD_DEV_WITH_ID(_name, _id) \ 29 + { \ 30 + .name = LP8788_DEV_##_name, \ 31 + .id = _id, \ 32 + } 33 + 34 + #define MFD_DEV_WITH_RESOURCE(_name, _resource, num_resource) \ 35 + { \ 36 + .name = LP8788_DEV_##_name, \ 37 + .resources = _resource, \ 38 + .num_resources = num_resource, \ 39 + } 40 + 41 + static struct resource chg_irqs[] = { 42 + /* Charger Interrupts */ 43 + { 44 + .start = LP8788_INT_CHG_INPUT_STATE, 45 + .end = LP8788_INT_PRECHG_TIMEOUT, 46 + .name = LP8788_CHG_IRQ, 47 + .flags = IORESOURCE_IRQ, 48 + }, 49 + /* Power Routing Switch Interrupts */ 50 + { 51 + .start = LP8788_INT_ENTER_SYS_SUPPORT, 52 + .end = LP8788_INT_EXIT_SYS_SUPPORT, 53 + .name = LP8788_PRSW_IRQ, 54 + .flags = IORESOURCE_IRQ, 55 + }, 56 + /* Battery Interrupts */ 57 + { 58 + .start = LP8788_INT_BATT_LOW, 59 + .end = LP8788_INT_NO_BATT, 60 + .name = LP8788_BATT_IRQ, 61 + .flags = IORESOURCE_IRQ, 62 + }, 63 + }; 64 + 65 + static struct resource rtc_irqs[] = { 66 + { 67 + .start = LP8788_INT_RTC_ALARM1, 68 + .end = LP8788_INT_RTC_ALARM2, 69 + .name = LP8788_ALM_IRQ, 70 + .flags = IORESOURCE_IRQ, 71 + }, 72 + }; 73 + 74 + static struct mfd_cell lp8788_devs[] = { 75 + /* 4 bucks */ 76 + MFD_DEV_WITH_ID(BUCK, 1), 77 + MFD_DEV_WITH_ID(BUCK, 2), 78 + MFD_DEV_WITH_ID(BUCK, 3), 79 + MFD_DEV_WITH_ID(BUCK, 4), 80 + 81 + /* 12 digital ldos */ 82 + MFD_DEV_WITH_ID(DLDO, 1), 83 + MFD_DEV_WITH_ID(DLDO, 2), 84 + MFD_DEV_WITH_ID(DLDO, 3), 85 + MFD_DEV_WITH_ID(DLDO, 4), 86 + MFD_DEV_WITH_ID(DLDO, 5), 87 + MFD_DEV_WITH_ID(DLDO, 6), 88 + MFD_DEV_WITH_ID(DLDO, 7), 89 + MFD_DEV_WITH_ID(DLDO, 8), 90 + MFD_DEV_WITH_ID(DLDO, 9), 91 + MFD_DEV_WITH_ID(DLDO, 10), 92 + MFD_DEV_WITH_ID(DLDO, 11), 93 + MFD_DEV_WITH_ID(DLDO, 12), 94 + 95 + /* 10 analog ldos */ 96 + MFD_DEV_WITH_ID(ALDO, 1), 97 + MFD_DEV_WITH_ID(ALDO, 2), 98 + MFD_DEV_WITH_ID(ALDO, 3), 99 + MFD_DEV_WITH_ID(ALDO, 4), 100 + MFD_DEV_WITH_ID(ALDO, 5), 101 + MFD_DEV_WITH_ID(ALDO, 6), 102 + MFD_DEV_WITH_ID(ALDO, 7), 103 + MFD_DEV_WITH_ID(ALDO, 8), 104 + MFD_DEV_WITH_ID(ALDO, 9), 105 + MFD_DEV_WITH_ID(ALDO, 10), 106 + 107 + /* ADC */ 108 + MFD_DEV_SIMPLE(ADC), 109 + 110 + /* battery charger */ 111 + MFD_DEV_WITH_RESOURCE(CHARGER, chg_irqs, ARRAY_SIZE(chg_irqs)), 112 + 113 + /* rtc */ 114 + MFD_DEV_WITH_RESOURCE(RTC, rtc_irqs, ARRAY_SIZE(rtc_irqs)), 115 + 116 + /* backlight */ 117 + MFD_DEV_SIMPLE(BACKLIGHT), 118 + 119 + /* current sink for vibrator */ 120 + MFD_DEV_SIMPLE(VIBRATOR), 121 + 122 + /* current sink for keypad LED */ 123 + MFD_DEV_SIMPLE(KEYLED), 124 + }; 125 + 126 + int lp8788_read_byte(struct lp8788 *lp, u8 reg, u8 *data) 127 + { 128 + int ret; 129 + unsigned int val; 130 + 131 + ret = regmap_read(lp->regmap, reg, &val); 132 + if (ret < 0) { 133 + dev_err(lp->dev, "failed to read 0x%.2x\n", reg); 134 + return ret; 135 + } 136 + 137 + *data = (u8)val; 138 + return 0; 139 + } 140 + EXPORT_SYMBOL_GPL(lp8788_read_byte); 141 + 142 + int lp8788_read_multi_bytes(struct lp8788 *lp, u8 reg, u8 *data, size_t count) 143 + { 144 + return regmap_bulk_read(lp->regmap, reg, data, count); 145 + } 146 + EXPORT_SYMBOL_GPL(lp8788_read_multi_bytes); 147 + 148 + int lp8788_write_byte(struct lp8788 *lp, u8 reg, u8 data) 149 + { 150 + return regmap_write(lp->regmap, reg, data); 151 + } 152 + EXPORT_SYMBOL_GPL(lp8788_write_byte); 153 + 154 + int lp8788_update_bits(struct lp8788 *lp, u8 reg, u8 mask, u8 data) 155 + { 156 + return regmap_update_bits(lp->regmap, reg, mask, data); 157 + } 158 + EXPORT_SYMBOL_GPL(lp8788_update_bits); 159 + 160 + static int lp8788_platform_init(struct lp8788 *lp) 161 + { 162 + struct lp8788_platform_data *pdata = lp->pdata; 163 + 164 + return (pdata && pdata->init_func) ? pdata->init_func(lp) : 0; 165 + } 166 + 167 + static const struct regmap_config lp8788_regmap_config = { 168 + .reg_bits = 8, 169 + .val_bits = 8, 170 + .max_register = MAX_LP8788_REGISTERS, 171 + }; 172 + 173 + static int lp8788_probe(struct i2c_client *cl, const struct i2c_device_id *id) 174 + { 175 + struct lp8788 *lp; 176 + struct lp8788_platform_data *pdata = cl->dev.platform_data; 177 + int ret; 178 + 179 + lp = devm_kzalloc(&cl->dev, sizeof(struct lp8788), GFP_KERNEL); 180 + if (!lp) 181 + return -ENOMEM; 182 + 183 + lp->regmap = devm_regmap_init_i2c(cl, &lp8788_regmap_config); 184 + if (IS_ERR(lp->regmap)) { 185 + ret = PTR_ERR(lp->regmap); 186 + dev_err(&cl->dev, "regmap init i2c err: %d\n", ret); 187 + return ret; 188 + } 189 + 190 + lp->pdata = pdata; 191 + lp->dev = &cl->dev; 192 + i2c_set_clientdata(cl, lp); 193 + 194 + ret = lp8788_platform_init(lp); 195 + if (ret) 196 + return ret; 197 + 198 + ret = lp8788_irq_init(lp, cl->irq); 199 + if (ret) 200 + return ret; 201 + 202 + return mfd_add_devices(lp->dev, -1, lp8788_devs, 203 + ARRAY_SIZE(lp8788_devs), NULL, 0, NULL); 204 + } 205 + 206 + static int __devexit lp8788_remove(struct i2c_client *cl) 207 + { 208 + struct lp8788 *lp = i2c_get_clientdata(cl); 209 + 210 + mfd_remove_devices(lp->dev); 211 + lp8788_irq_exit(lp); 212 + return 0; 213 + } 214 + 215 + static const struct i2c_device_id lp8788_ids[] = { 216 + {"lp8788", 0}, 217 + { } 218 + }; 219 + MODULE_DEVICE_TABLE(i2c, lp8788_ids); 220 + 221 + static struct i2c_driver lp8788_driver = { 222 + .driver = { 223 + .name = "lp8788", 224 + .owner = THIS_MODULE, 225 + }, 226 + .probe = lp8788_probe, 227 + .remove = __devexit_p(lp8788_remove), 228 + .id_table = lp8788_ids, 229 + }; 230 + 231 + static int __init lp8788_init(void) 232 + { 233 + return i2c_add_driver(&lp8788_driver); 234 + } 235 + subsys_initcall(lp8788_init); 236 + 237 + static void __exit lp8788_exit(void) 238 + { 239 + i2c_del_driver(&lp8788_driver); 240 + } 241 + module_exit(lp8788_exit); 242 + 243 + MODULE_DESCRIPTION("TI LP8788 MFD Driver"); 244 + MODULE_AUTHOR("Milo Kim"); 245 + MODULE_LICENSE("GPL");
+41 -2
drivers/mfd/lpc_ich.c
··· 49 49 * document number TBD : DH89xxCC 50 50 * document number TBD : Panther Point 51 51 * document number TBD : Lynx Point 52 + * document number TBD : Lynx Point-LP 52 53 */ 53 54 54 55 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ··· 193 192 LPC_DH89XXCC, /* DH89xxCC */ 194 193 LPC_PPT, /* Panther Point */ 195 194 LPC_LPT, /* Lynx Point */ 195 + LPC_LPT_LP, /* Lynx Point-LP */ 196 196 }; 197 197 198 198 struct lpc_ich_info lpc_chipset_info[] __devinitdata = { ··· 470 468 .name = "Lynx Point", 471 469 .iTCO_version = 2, 472 470 }, 471 + [LPC_LPT_LP] = { 472 + .name = "Lynx Point_LP", 473 + .iTCO_version = 2, 474 + }, 473 475 }; 474 476 475 477 /* ··· 647 641 { PCI_VDEVICE(INTEL, 0x8c5d), LPC_LPT}, 648 642 { PCI_VDEVICE(INTEL, 0x8c5e), LPC_LPT}, 649 643 { PCI_VDEVICE(INTEL, 0x8c5f), LPC_LPT}, 644 + { PCI_VDEVICE(INTEL, 0x9c40), LPC_LPT_LP}, 645 + { PCI_VDEVICE(INTEL, 0x9c41), LPC_LPT_LP}, 646 + { PCI_VDEVICE(INTEL, 0x9c42), LPC_LPT_LP}, 647 + { PCI_VDEVICE(INTEL, 0x9c43), LPC_LPT_LP}, 648 + { PCI_VDEVICE(INTEL, 0x9c44), LPC_LPT_LP}, 649 + { PCI_VDEVICE(INTEL, 0x9c45), LPC_LPT_LP}, 650 + { PCI_VDEVICE(INTEL, 0x9c46), LPC_LPT_LP}, 651 + { PCI_VDEVICE(INTEL, 0x9c47), LPC_LPT_LP}, 650 652 { 0, }, /* End of list */ 651 653 }; 652 654 MODULE_DEVICE_TABLE(pci, lpc_ich_ids); ··· 695 681 { 696 682 cell->platform_data = &lpc_chipset_info[id->driver_data]; 697 683 cell->pdata_size = sizeof(struct lpc_ich_info); 684 + } 685 + 686 + /* 687 + * We don't check for resource conflict globally. There are 2 or 3 independent 688 + * GPIO groups and it's enough to have access to one of these to instantiate 689 + * the device. 690 + */ 691 + static int __devinit lpc_ich_check_conflict_gpio(struct resource *res) 692 + { 693 + int ret; 694 + u8 use_gpio = 0; 695 + 696 + if (resource_size(res) >= 0x50 && 697 + !acpi_check_region(res->start + 0x40, 0x10, "LPC ICH GPIO3")) 698 + use_gpio |= 1 << 2; 699 + 700 + if (!acpi_check_region(res->start + 0x30, 0x10, "LPC ICH GPIO2")) 701 + use_gpio |= 1 << 1; 702 + 703 + ret = acpi_check_region(res->start + 0x00, 0x30, "LPC ICH GPIO1"); 704 + if (!ret) 705 + use_gpio |= 1 << 0; 706 + 707 + return use_gpio ? use_gpio : ret; 698 708 } 699 709 700 710 static int __devinit lpc_ich_init_gpio(struct pci_dev *dev, ··· 778 740 break; 779 741 } 780 742 781 - ret = acpi_check_resource_conflict(res); 782 - if (ret) { 743 + ret = lpc_ich_check_conflict_gpio(res); 744 + if (ret < 0) { 783 745 /* this isn't necessarily fatal for the GPIO */ 784 746 acpi_conflict = true; 785 747 goto gpio_done; 786 748 } 749 + lpc_chipset_info[id->driver_data].use_gpio = ret; 787 750 lpc_ich_enable_gpio_space(dev); 788 751 789 752 lpc_ich_finalize_cell(&lpc_ich_cells[LPC_GPIO], id);
+351
drivers/mfd/max8907.c
··· 1 + /* 2 + * max8907.c - mfd driver for MAX8907 3 + * 4 + * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com> 5 + * Copyright (C) 2010-2012, NVIDIA CORPORATION. All rights reserved. 6 + * 7 + * This program is free software; you can redistribute it and/or modify 8 + * it under the terms of the GNU General Public License version 2 as 9 + * published by the Free Software Foundation. 10 + */ 11 + 12 + #include <linux/err.h> 13 + #include <linux/i2c.h> 14 + #include <linux/init.h> 15 + #include <linux/interrupt.h> 16 + #include <linux/irq.h> 17 + #include <linux/mfd/core.h> 18 + #include <linux/mfd/max8907.h> 19 + #include <linux/module.h> 20 + #include <linux/of_device.h> 21 + #include <linux/regmap.h> 22 + #include <linux/slab.h> 23 + 24 + static struct mfd_cell max8907_cells[] = { 25 + { .name = "max8907-regulator", }, 26 + { .name = "max8907-rtc", }, 27 + }; 28 + 29 + static bool max8907_gen_is_volatile_reg(struct device *dev, unsigned int reg) 30 + { 31 + switch (reg) { 32 + case MAX8907_REG_ON_OFF_IRQ1: 33 + case MAX8907_REG_ON_OFF_STAT: 34 + case MAX8907_REG_ON_OFF_IRQ2: 35 + case MAX8907_REG_CHG_IRQ1: 36 + case MAX8907_REG_CHG_IRQ2: 37 + case MAX8907_REG_CHG_STAT: 38 + return true; 39 + default: 40 + return false; 41 + } 42 + } 43 + 44 + static bool max8907_gen_is_precious_reg(struct device *dev, unsigned int reg) 45 + { 46 + switch (reg) { 47 + case MAX8907_REG_ON_OFF_IRQ1: 48 + case MAX8907_REG_ON_OFF_IRQ2: 49 + case MAX8907_REG_CHG_IRQ1: 50 + case MAX8907_REG_CHG_IRQ2: 51 + return true; 52 + default: 53 + return false; 54 + } 55 + } 56 + 57 + static bool max8907_gen_is_writeable_reg(struct device *dev, unsigned int reg) 58 + { 59 + return !max8907_gen_is_volatile_reg(dev, reg); 60 + } 61 + 62 + static const struct regmap_config max8907_regmap_gen_config = { 63 + .reg_bits = 8, 64 + .val_bits = 8, 65 + .volatile_reg = max8907_gen_is_volatile_reg, 66 + .precious_reg = max8907_gen_is_precious_reg, 67 + .writeable_reg = max8907_gen_is_writeable_reg, 68 + .max_register = MAX8907_REG_LDO20VOUT, 69 + .cache_type = REGCACHE_RBTREE, 70 + }; 71 + 72 + static bool max8907_rtc_is_volatile_reg(struct device *dev, unsigned int reg) 73 + { 74 + if (reg <= MAX8907_REG_RTC_YEAR2) 75 + return true; 76 + 77 + switch (reg) { 78 + case MAX8907_REG_RTC_STATUS: 79 + case MAX8907_REG_RTC_IRQ: 80 + return true; 81 + default: 82 + return false; 83 + } 84 + } 85 + 86 + static bool max8907_rtc_is_precious_reg(struct device *dev, unsigned int reg) 87 + { 88 + switch (reg) { 89 + case MAX8907_REG_RTC_IRQ: 90 + return true; 91 + default: 92 + return false; 93 + } 94 + } 95 + 96 + static bool max8907_rtc_is_writeable_reg(struct device *dev, unsigned int reg) 97 + { 98 + switch (reg) { 99 + case MAX8907_REG_RTC_STATUS: 100 + case MAX8907_REG_RTC_IRQ: 101 + return false; 102 + default: 103 + return true; 104 + } 105 + } 106 + 107 + static const struct regmap_config max8907_regmap_rtc_config = { 108 + .reg_bits = 8, 109 + .val_bits = 8, 110 + .volatile_reg = max8907_rtc_is_volatile_reg, 111 + .precious_reg = max8907_rtc_is_precious_reg, 112 + .writeable_reg = max8907_rtc_is_writeable_reg, 113 + .max_register = MAX8907_REG_MPL_CNTL, 114 + .cache_type = REGCACHE_RBTREE, 115 + }; 116 + 117 + static const struct regmap_irq max8907_chg_irqs[] = { 118 + { .reg_offset = 0, .mask = 1 << 0, }, 119 + { .reg_offset = 0, .mask = 1 << 1, }, 120 + { .reg_offset = 0, .mask = 1 << 2, }, 121 + { .reg_offset = 1, .mask = 1 << 0, }, 122 + { .reg_offset = 1, .mask = 1 << 1, }, 123 + { .reg_offset = 1, .mask = 1 << 2, }, 124 + { .reg_offset = 1, .mask = 1 << 3, }, 125 + { .reg_offset = 1, .mask = 1 << 4, }, 126 + { .reg_offset = 1, .mask = 1 << 5, }, 127 + { .reg_offset = 1, .mask = 1 << 6, }, 128 + { .reg_offset = 1, .mask = 1 << 7, }, 129 + }; 130 + 131 + static const struct regmap_irq_chip max8907_chg_irq_chip = { 132 + .name = "max8907 chg", 133 + .status_base = MAX8907_REG_CHG_IRQ1, 134 + .mask_base = MAX8907_REG_CHG_IRQ1_MASK, 135 + .wake_base = MAX8907_REG_CHG_IRQ1_MASK, 136 + .irq_reg_stride = MAX8907_REG_CHG_IRQ2 - MAX8907_REG_CHG_IRQ1, 137 + .num_regs = 2, 138 + .irqs = max8907_chg_irqs, 139 + .num_irqs = ARRAY_SIZE(max8907_chg_irqs), 140 + }; 141 + 142 + static const struct regmap_irq max8907_on_off_irqs[] = { 143 + { .reg_offset = 0, .mask = 1 << 0, }, 144 + { .reg_offset = 0, .mask = 1 << 1, }, 145 + { .reg_offset = 0, .mask = 1 << 2, }, 146 + { .reg_offset = 0, .mask = 1 << 3, }, 147 + { .reg_offset = 0, .mask = 1 << 4, }, 148 + { .reg_offset = 0, .mask = 1 << 5, }, 149 + { .reg_offset = 0, .mask = 1 << 6, }, 150 + { .reg_offset = 0, .mask = 1 << 7, }, 151 + { .reg_offset = 1, .mask = 1 << 0, }, 152 + { .reg_offset = 1, .mask = 1 << 1, }, 153 + }; 154 + 155 + static const struct regmap_irq_chip max8907_on_off_irq_chip = { 156 + .name = "max8907 on_off", 157 + .status_base = MAX8907_REG_ON_OFF_IRQ1, 158 + .mask_base = MAX8907_REG_ON_OFF_IRQ1_MASK, 159 + .irq_reg_stride = MAX8907_REG_ON_OFF_IRQ2 - MAX8907_REG_ON_OFF_IRQ1, 160 + .num_regs = 2, 161 + .irqs = max8907_on_off_irqs, 162 + .num_irqs = ARRAY_SIZE(max8907_on_off_irqs), 163 + }; 164 + 165 + static const struct regmap_irq max8907_rtc_irqs[] = { 166 + { .reg_offset = 0, .mask = 1 << 2, }, 167 + { .reg_offset = 0, .mask = 1 << 3, }, 168 + }; 169 + 170 + static const struct regmap_irq_chip max8907_rtc_irq_chip = { 171 + .name = "max8907 rtc", 172 + .status_base = MAX8907_REG_RTC_IRQ, 173 + .mask_base = MAX8907_REG_RTC_IRQ_MASK, 174 + .num_regs = 1, 175 + .irqs = max8907_rtc_irqs, 176 + .num_irqs = ARRAY_SIZE(max8907_rtc_irqs), 177 + }; 178 + 179 + static struct max8907 *max8907_pm_off; 180 + static void max8907_power_off(void) 181 + { 182 + regmap_update_bits(max8907_pm_off->regmap_gen, MAX8907_REG_RESET_CNFG, 183 + MAX8907_MASK_POWER_OFF, MAX8907_MASK_POWER_OFF); 184 + } 185 + 186 + static __devinit int max8907_i2c_probe(struct i2c_client *i2c, 187 + const struct i2c_device_id *id) 188 + { 189 + struct max8907 *max8907; 190 + int ret; 191 + struct max8907_platform_data *pdata = dev_get_platdata(&i2c->dev); 192 + bool pm_off = false; 193 + 194 + if (pdata) 195 + pm_off = pdata->pm_off; 196 + else if (i2c->dev.of_node) 197 + pm_off = of_property_read_bool(i2c->dev.of_node, 198 + "maxim,system-power-controller"); 199 + 200 + max8907 = devm_kzalloc(&i2c->dev, sizeof(struct max8907), GFP_KERNEL); 201 + if (!max8907) { 202 + ret = -ENOMEM; 203 + goto err_alloc_drvdata; 204 + } 205 + 206 + max8907->dev = &i2c->dev; 207 + dev_set_drvdata(max8907->dev, max8907); 208 + 209 + max8907->i2c_gen = i2c; 210 + i2c_set_clientdata(i2c, max8907); 211 + max8907->regmap_gen = devm_regmap_init_i2c(i2c, 212 + &max8907_regmap_gen_config); 213 + if (IS_ERR(max8907->regmap_gen)) { 214 + ret = PTR_ERR(max8907->regmap_gen); 215 + dev_err(&i2c->dev, "gen regmap init failed: %d\n", ret); 216 + goto err_regmap_gen; 217 + } 218 + 219 + max8907->i2c_rtc = i2c_new_dummy(i2c->adapter, MAX8907_RTC_I2C_ADDR); 220 + if (!max8907->i2c_rtc) { 221 + ret = -ENOMEM; 222 + goto err_dummy_rtc; 223 + } 224 + i2c_set_clientdata(max8907->i2c_rtc, max8907); 225 + max8907->regmap_rtc = devm_regmap_init_i2c(max8907->i2c_rtc, 226 + &max8907_regmap_rtc_config); 227 + if (IS_ERR(max8907->regmap_rtc)) { 228 + ret = PTR_ERR(max8907->regmap_rtc); 229 + dev_err(&i2c->dev, "rtc regmap init failed: %d\n", ret); 230 + goto err_regmap_rtc; 231 + } 232 + 233 + irq_set_status_flags(max8907->i2c_gen->irq, IRQ_NOAUTOEN); 234 + 235 + ret = regmap_add_irq_chip(max8907->regmap_gen, max8907->i2c_gen->irq, 236 + IRQF_ONESHOT | IRQF_SHARED, -1, 237 + &max8907_chg_irq_chip, 238 + &max8907->irqc_chg); 239 + if (ret != 0) { 240 + dev_err(&i2c->dev, "failed to add chg irq chip: %d\n", ret); 241 + goto err_irqc_chg; 242 + } 243 + ret = regmap_add_irq_chip(max8907->regmap_gen, max8907->i2c_gen->irq, 244 + IRQF_ONESHOT | IRQF_SHARED, -1, 245 + &max8907_on_off_irq_chip, 246 + &max8907->irqc_on_off); 247 + if (ret != 0) { 248 + dev_err(&i2c->dev, "failed to add on off irq chip: %d\n", ret); 249 + goto err_irqc_on_off; 250 + } 251 + ret = regmap_add_irq_chip(max8907->regmap_rtc, max8907->i2c_gen->irq, 252 + IRQF_ONESHOT | IRQF_SHARED, -1, 253 + &max8907_rtc_irq_chip, 254 + &max8907->irqc_rtc); 255 + if (ret != 0) { 256 + dev_err(&i2c->dev, "failed to add rtc irq chip: %d\n", ret); 257 + goto err_irqc_rtc; 258 + } 259 + 260 + enable_irq(max8907->i2c_gen->irq); 261 + 262 + ret = mfd_add_devices(max8907->dev, -1, max8907_cells, 263 + ARRAY_SIZE(max8907_cells), NULL, 0, NULL); 264 + if (ret != 0) { 265 + dev_err(&i2c->dev, "failed to add MFD devices %d\n", ret); 266 + goto err_add_devices; 267 + } 268 + 269 + if (pm_off && !pm_power_off) { 270 + max8907_pm_off = max8907; 271 + pm_power_off = max8907_power_off; 272 + } 273 + 274 + return 0; 275 + 276 + err_add_devices: 277 + regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_rtc); 278 + err_irqc_rtc: 279 + regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_on_off); 280 + err_irqc_on_off: 281 + regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_chg); 282 + err_irqc_chg: 283 + err_regmap_rtc: 284 + i2c_unregister_device(max8907->i2c_rtc); 285 + err_dummy_rtc: 286 + err_regmap_gen: 287 + err_alloc_drvdata: 288 + return ret; 289 + } 290 + 291 + static __devexit int max8907_i2c_remove(struct i2c_client *i2c) 292 + { 293 + struct max8907 *max8907 = i2c_get_clientdata(i2c); 294 + 295 + mfd_remove_devices(max8907->dev); 296 + 297 + regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_rtc); 298 + regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_on_off); 299 + regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_chg); 300 + 301 + i2c_unregister_device(max8907->i2c_rtc); 302 + 303 + return 0; 304 + } 305 + 306 + #ifdef CONFIG_OF 307 + static struct of_device_id max8907_of_match[] = { 308 + { .compatible = "maxim,max8907" }, 309 + { }, 310 + }; 311 + MODULE_DEVICE_TABLE(of, max8907_of_match); 312 + #endif 313 + 314 + static const struct i2c_device_id max8907_i2c_id[] = { 315 + {"max8907", 0}, 316 + {} 317 + }; 318 + MODULE_DEVICE_TABLE(i2c, max8907_i2c_id); 319 + 320 + static struct i2c_driver max8907_i2c_driver = { 321 + .driver = { 322 + .name = "max8907", 323 + .owner = THIS_MODULE, 324 + .of_match_table = of_match_ptr(max8907_of_match), 325 + }, 326 + .probe = max8907_i2c_probe, 327 + .remove = max8907_i2c_remove, 328 + .id_table = max8907_i2c_id, 329 + }; 330 + 331 + static int __init max8907_i2c_init(void) 332 + { 333 + int ret = -ENODEV; 334 + 335 + ret = i2c_add_driver(&max8907_i2c_driver); 336 + if (ret != 0) 337 + pr_err("Failed to register I2C driver: %d\n", ret); 338 + 339 + return ret; 340 + } 341 + subsys_initcall(max8907_i2c_init); 342 + 343 + static void __exit max8907_i2c_exit(void) 344 + { 345 + i2c_del_driver(&max8907_i2c_driver); 346 + } 347 + module_exit(max8907_i2c_exit); 348 + 349 + MODULE_DESCRIPTION("MAX8907 multi-function core driver"); 350 + MODULE_AUTHOR("Gyungoh Yoo <jack.yoo@maxim-ic.com>"); 351 + MODULE_LICENSE("GPL v2");
+333 -92
drivers/mfd/max8925-core.c
··· 15 15 #include <linux/irq.h> 16 16 #include <linux/interrupt.h> 17 17 #include <linux/platform_device.h> 18 + #include <linux/regulator/machine.h> 18 19 #include <linux/mfd/core.h> 19 20 #include <linux/mfd/max8925.h> 20 21 21 - static struct resource backlight_resources[] = { 22 - { 23 - .name = "max8925-backlight", 24 - .start = MAX8925_WLED_MODE_CNTL, 25 - .end = MAX8925_WLED_CNTL, 26 - .flags = IORESOURCE_IO, 27 - }, 22 + static struct resource bk_resources[] __devinitdata = { 23 + { 0x84, 0x84, "mode control", IORESOURCE_REG, }, 24 + { 0x85, 0x85, "control", IORESOURCE_REG, }, 28 25 }; 29 26 30 - static struct mfd_cell backlight_devs[] = { 27 + static struct mfd_cell bk_devs[] __devinitdata = { 31 28 { 32 29 .name = "max8925-backlight", 33 - .num_resources = 1, 34 - .resources = &backlight_resources[0], 30 + .num_resources = ARRAY_SIZE(bk_resources), 31 + .resources = &bk_resources[0], 35 32 .id = -1, 36 33 }, 37 34 }; ··· 38 41 .name = "max8925-tsc", 39 42 .start = MAX8925_TSC_IRQ, 40 43 .end = MAX8925_ADC_RES_END, 41 - .flags = IORESOURCE_IO, 44 + .flags = IORESOURCE_REG, 42 45 }, 43 46 }; 44 47 ··· 56 59 .name = "max8925-power", 57 60 .start = MAX8925_CHG_IRQ1, 58 61 .end = MAX8925_CHG_IRQ1_MASK, 59 - .flags = IORESOURCE_IO, 62 + .flags = IORESOURCE_REG, 60 63 }, 61 64 }; 62 65 ··· 110 113 }, 111 114 }; 112 115 113 - #define MAX8925_REG_RESOURCE(_start, _end) \ 114 - { \ 115 - .start = MAX8925_##_start, \ 116 - .end = MAX8925_##_end, \ 117 - .flags = IORESOURCE_IO, \ 118 - } 119 - 120 - static struct resource regulator_resources[] = { 121 - MAX8925_REG_RESOURCE(SDCTL1, SDCTL1), 122 - MAX8925_REG_RESOURCE(SDCTL2, SDCTL2), 123 - MAX8925_REG_RESOURCE(SDCTL3, SDCTL3), 124 - MAX8925_REG_RESOURCE(LDOCTL1, LDOCTL1), 125 - MAX8925_REG_RESOURCE(LDOCTL2, LDOCTL2), 126 - MAX8925_REG_RESOURCE(LDOCTL3, LDOCTL3), 127 - MAX8925_REG_RESOURCE(LDOCTL4, LDOCTL4), 128 - MAX8925_REG_RESOURCE(LDOCTL5, LDOCTL5), 129 - MAX8925_REG_RESOURCE(LDOCTL6, LDOCTL6), 130 - MAX8925_REG_RESOURCE(LDOCTL7, LDOCTL7), 131 - MAX8925_REG_RESOURCE(LDOCTL8, LDOCTL8), 132 - MAX8925_REG_RESOURCE(LDOCTL9, LDOCTL9), 133 - MAX8925_REG_RESOURCE(LDOCTL10, LDOCTL10), 134 - MAX8925_REG_RESOURCE(LDOCTL11, LDOCTL11), 135 - MAX8925_REG_RESOURCE(LDOCTL12, LDOCTL12), 136 - MAX8925_REG_RESOURCE(LDOCTL13, LDOCTL13), 137 - MAX8925_REG_RESOURCE(LDOCTL14, LDOCTL14), 138 - MAX8925_REG_RESOURCE(LDOCTL15, LDOCTL15), 139 - MAX8925_REG_RESOURCE(LDOCTL16, LDOCTL16), 140 - MAX8925_REG_RESOURCE(LDOCTL17, LDOCTL17), 141 - MAX8925_REG_RESOURCE(LDOCTL18, LDOCTL18), 142 - MAX8925_REG_RESOURCE(LDOCTL19, LDOCTL19), 143 - MAX8925_REG_RESOURCE(LDOCTL20, LDOCTL20), 116 + static struct resource sd1_resources[] __devinitdata = { 117 + {0x06, 0x06, "sdv", IORESOURCE_REG, }, 144 118 }; 145 119 146 - #define MAX8925_REG_DEVS(_id) \ 147 - { \ 148 - .name = "max8925-regulator", \ 149 - .num_resources = 1, \ 150 - .resources = &regulator_resources[MAX8925_ID_##_id], \ 151 - .id = MAX8925_ID_##_id, \ 152 - } 120 + static struct resource sd2_resources[] __devinitdata = { 121 + {0x09, 0x09, "sdv", IORESOURCE_REG, }, 122 + }; 153 123 154 - static struct mfd_cell regulator_devs[] = { 155 - MAX8925_REG_DEVS(SD1), 156 - MAX8925_REG_DEVS(SD2), 157 - MAX8925_REG_DEVS(SD3), 158 - MAX8925_REG_DEVS(LDO1), 159 - MAX8925_REG_DEVS(LDO2), 160 - MAX8925_REG_DEVS(LDO3), 161 - MAX8925_REG_DEVS(LDO4), 162 - MAX8925_REG_DEVS(LDO5), 163 - MAX8925_REG_DEVS(LDO6), 164 - MAX8925_REG_DEVS(LDO7), 165 - MAX8925_REG_DEVS(LDO8), 166 - MAX8925_REG_DEVS(LDO9), 167 - MAX8925_REG_DEVS(LDO10), 168 - MAX8925_REG_DEVS(LDO11), 169 - MAX8925_REG_DEVS(LDO12), 170 - MAX8925_REG_DEVS(LDO13), 171 - MAX8925_REG_DEVS(LDO14), 172 - MAX8925_REG_DEVS(LDO15), 173 - MAX8925_REG_DEVS(LDO16), 174 - MAX8925_REG_DEVS(LDO17), 175 - MAX8925_REG_DEVS(LDO18), 176 - MAX8925_REG_DEVS(LDO19), 177 - MAX8925_REG_DEVS(LDO20), 124 + static struct resource sd3_resources[] __devinitdata = { 125 + {0x0c, 0x0c, "sdv", IORESOURCE_REG, }, 126 + }; 127 + 128 + static struct resource ldo1_resources[] __devinitdata = { 129 + {0x1a, 0x1a, "ldov", IORESOURCE_REG, }, 130 + }; 131 + 132 + static struct resource ldo2_resources[] __devinitdata = { 133 + {0x1e, 0x1e, "ldov", IORESOURCE_REG, }, 134 + }; 135 + 136 + static struct resource ldo3_resources[] __devinitdata = { 137 + {0x22, 0x22, "ldov", IORESOURCE_REG, }, 138 + }; 139 + 140 + static struct resource ldo4_resources[] __devinitdata = { 141 + {0x26, 0x26, "ldov", IORESOURCE_REG, }, 142 + }; 143 + 144 + static struct resource ldo5_resources[] __devinitdata = { 145 + {0x2a, 0x2a, "ldov", IORESOURCE_REG, }, 146 + }; 147 + 148 + static struct resource ldo6_resources[] __devinitdata = { 149 + {0x2e, 0x2e, "ldov", IORESOURCE_REG, }, 150 + }; 151 + 152 + static struct resource ldo7_resources[] __devinitdata = { 153 + {0x32, 0x32, "ldov", IORESOURCE_REG, }, 154 + }; 155 + 156 + static struct resource ldo8_resources[] __devinitdata = { 157 + {0x36, 0x36, "ldov", IORESOURCE_REG, }, 158 + }; 159 + 160 + static struct resource ldo9_resources[] __devinitdata = { 161 + {0x3a, 0x3a, "ldov", IORESOURCE_REG, }, 162 + }; 163 + 164 + static struct resource ldo10_resources[] __devinitdata = { 165 + {0x3e, 0x3e, "ldov", IORESOURCE_REG, }, 166 + }; 167 + 168 + static struct resource ldo11_resources[] __devinitdata = { 169 + {0x42, 0x42, "ldov", IORESOURCE_REG, }, 170 + }; 171 + 172 + static struct resource ldo12_resources[] __devinitdata = { 173 + {0x46, 0x46, "ldov", IORESOURCE_REG, }, 174 + }; 175 + 176 + static struct resource ldo13_resources[] __devinitdata = { 177 + {0x4a, 0x4a, "ldov", IORESOURCE_REG, }, 178 + }; 179 + 180 + static struct resource ldo14_resources[] __devinitdata = { 181 + {0x4e, 0x4e, "ldov", IORESOURCE_REG, }, 182 + }; 183 + 184 + static struct resource ldo15_resources[] __devinitdata = { 185 + {0x52, 0x52, "ldov", IORESOURCE_REG, }, 186 + }; 187 + 188 + static struct resource ldo16_resources[] __devinitdata = { 189 + {0x12, 0x12, "ldov", IORESOURCE_REG, }, 190 + }; 191 + 192 + static struct resource ldo17_resources[] __devinitdata = { 193 + {0x16, 0x16, "ldov", IORESOURCE_REG, }, 194 + }; 195 + 196 + static struct resource ldo18_resources[] __devinitdata = { 197 + {0x74, 0x74, "ldov", IORESOURCE_REG, }, 198 + }; 199 + 200 + static struct resource ldo19_resources[] __devinitdata = { 201 + {0x5e, 0x5e, "ldov", IORESOURCE_REG, }, 202 + }; 203 + 204 + static struct resource ldo20_resources[] __devinitdata = { 205 + {0x9e, 0x9e, "ldov", IORESOURCE_REG, }, 206 + }; 207 + 208 + static struct mfd_cell reg_devs[] __devinitdata = { 209 + { 210 + .name = "max8925-regulator", 211 + .id = 0, 212 + .num_resources = ARRAY_SIZE(sd1_resources), 213 + .resources = sd1_resources, 214 + }, { 215 + .name = "max8925-regulator", 216 + .id = 1, 217 + .num_resources = ARRAY_SIZE(sd2_resources), 218 + .resources = sd2_resources, 219 + }, { 220 + .name = "max8925-regulator", 221 + .id = 2, 222 + .num_resources = ARRAY_SIZE(sd3_resources), 223 + .resources = sd3_resources, 224 + }, { 225 + .name = "max8925-regulator", 226 + .id = 3, 227 + .num_resources = ARRAY_SIZE(ldo1_resources), 228 + .resources = ldo1_resources, 229 + }, { 230 + .name = "max8925-regulator", 231 + .id = 4, 232 + .num_resources = ARRAY_SIZE(ldo2_resources), 233 + .resources = ldo2_resources, 234 + }, { 235 + .name = "max8925-regulator", 236 + .id = 5, 237 + .num_resources = ARRAY_SIZE(ldo3_resources), 238 + .resources = ldo3_resources, 239 + }, { 240 + .name = "max8925-regulator", 241 + .id = 6, 242 + .num_resources = ARRAY_SIZE(ldo4_resources), 243 + .resources = ldo4_resources, 244 + }, { 245 + .name = "max8925-regulator", 246 + .id = 7, 247 + .num_resources = ARRAY_SIZE(ldo5_resources), 248 + .resources = ldo5_resources, 249 + }, { 250 + .name = "max8925-regulator", 251 + .id = 8, 252 + .num_resources = ARRAY_SIZE(ldo6_resources), 253 + .resources = ldo6_resources, 254 + }, { 255 + .name = "max8925-regulator", 256 + .id = 9, 257 + .num_resources = ARRAY_SIZE(ldo7_resources), 258 + .resources = ldo7_resources, 259 + }, { 260 + .name = "max8925-regulator", 261 + .id = 10, 262 + .num_resources = ARRAY_SIZE(ldo8_resources), 263 + .resources = ldo8_resources, 264 + }, { 265 + .name = "max8925-regulator", 266 + .id = 11, 267 + .num_resources = ARRAY_SIZE(ldo9_resources), 268 + .resources = ldo9_resources, 269 + }, { 270 + .name = "max8925-regulator", 271 + .id = 12, 272 + .num_resources = ARRAY_SIZE(ldo10_resources), 273 + .resources = ldo10_resources, 274 + }, { 275 + .name = "max8925-regulator", 276 + .id = 13, 277 + .num_resources = ARRAY_SIZE(ldo11_resources), 278 + .resources = ldo11_resources, 279 + }, { 280 + .name = "max8925-regulator", 281 + .id = 14, 282 + .num_resources = ARRAY_SIZE(ldo12_resources), 283 + .resources = ldo12_resources, 284 + }, { 285 + .name = "max8925-regulator", 286 + .id = 15, 287 + .num_resources = ARRAY_SIZE(ldo13_resources), 288 + .resources = ldo13_resources, 289 + }, { 290 + .name = "max8925-regulator", 291 + .id = 16, 292 + .num_resources = ARRAY_SIZE(ldo14_resources), 293 + .resources = ldo14_resources, 294 + }, { 295 + .name = "max8925-regulator", 296 + .id = 17, 297 + .num_resources = ARRAY_SIZE(ldo15_resources), 298 + .resources = ldo15_resources, 299 + }, { 300 + .name = "max8925-regulator", 301 + .id = 18, 302 + .num_resources = ARRAY_SIZE(ldo16_resources), 303 + .resources = ldo16_resources, 304 + }, { 305 + .name = "max8925-regulator", 306 + .id = 19, 307 + .num_resources = ARRAY_SIZE(ldo17_resources), 308 + .resources = ldo17_resources, 309 + }, { 310 + .name = "max8925-regulator", 311 + .id = 20, 312 + .num_resources = ARRAY_SIZE(ldo18_resources), 313 + .resources = ldo18_resources, 314 + }, { 315 + .name = "max8925-regulator", 316 + .id = 21, 317 + .num_resources = ARRAY_SIZE(ldo19_resources), 318 + .resources = ldo19_resources, 319 + }, { 320 + .name = "max8925-regulator", 321 + .id = 22, 322 + .num_resources = ARRAY_SIZE(ldo20_resources), 323 + .resources = ldo20_resources, 324 + }, 178 325 }; 179 326 180 327 enum { ··· 688 547 goto tsc_irq; 689 548 } 690 549 691 - ret = request_threaded_irq(irq, NULL, max8925_irq, flags, 550 + ret = request_threaded_irq(irq, NULL, max8925_irq, flags | IRQF_ONESHOT, 692 551 "max8925", chip); 693 552 if (ret) { 694 553 dev_err(chip->dev, "Failed to request core IRQ: %d\n", ret); ··· 706 565 chip->tsc_irq = pdata->tsc_irq; 707 566 708 567 ret = request_threaded_irq(chip->tsc_irq, NULL, max8925_tsc_irq, 709 - flags, "max8925-tsc", chip); 568 + flags | IRQF_ONESHOT, "max8925-tsc", chip); 710 569 if (ret) { 711 570 dev_err(chip->dev, "Failed to request TSC IRQ: %d\n", ret); 712 571 chip->tsc_irq = 0; 713 572 } 714 573 return 0; 574 + } 575 + 576 + static void __devinit init_regulator(struct max8925_chip *chip, 577 + struct max8925_platform_data *pdata) 578 + { 579 + int ret; 580 + 581 + if (!pdata) 582 + return; 583 + if (pdata->sd1) { 584 + reg_devs[0].platform_data = pdata->sd1; 585 + reg_devs[0].pdata_size = sizeof(struct regulator_init_data); 586 + } 587 + if (pdata->sd2) { 588 + reg_devs[1].platform_data = pdata->sd2; 589 + reg_devs[1].pdata_size = sizeof(struct regulator_init_data); 590 + } 591 + if (pdata->sd3) { 592 + reg_devs[2].platform_data = pdata->sd3; 593 + reg_devs[2].pdata_size = sizeof(struct regulator_init_data); 594 + } 595 + if (pdata->ldo1) { 596 + reg_devs[3].platform_data = pdata->ldo1; 597 + reg_devs[3].pdata_size = sizeof(struct regulator_init_data); 598 + } 599 + if (pdata->ldo2) { 600 + reg_devs[4].platform_data = pdata->ldo2; 601 + reg_devs[4].pdata_size = sizeof(struct regulator_init_data); 602 + } 603 + if (pdata->ldo3) { 604 + reg_devs[5].platform_data = pdata->ldo3; 605 + reg_devs[5].pdata_size = sizeof(struct regulator_init_data); 606 + } 607 + if (pdata->ldo4) { 608 + reg_devs[6].platform_data = pdata->ldo4; 609 + reg_devs[6].pdata_size = sizeof(struct regulator_init_data); 610 + } 611 + if (pdata->ldo5) { 612 + reg_devs[7].platform_data = pdata->ldo5; 613 + reg_devs[7].pdata_size = sizeof(struct regulator_init_data); 614 + } 615 + if (pdata->ldo6) { 616 + reg_devs[8].platform_data = pdata->ldo6; 617 + reg_devs[8].pdata_size = sizeof(struct regulator_init_data); 618 + } 619 + if (pdata->ldo7) { 620 + reg_devs[9].platform_data = pdata->ldo7; 621 + reg_devs[9].pdata_size = sizeof(struct regulator_init_data); 622 + } 623 + if (pdata->ldo8) { 624 + reg_devs[10].platform_data = pdata->ldo8; 625 + reg_devs[10].pdata_size = sizeof(struct regulator_init_data); 626 + } 627 + if (pdata->ldo9) { 628 + reg_devs[11].platform_data = pdata->ldo9; 629 + reg_devs[11].pdata_size = sizeof(struct regulator_init_data); 630 + } 631 + if (pdata->ldo10) { 632 + reg_devs[12].platform_data = pdata->ldo10; 633 + reg_devs[12].pdata_size = sizeof(struct regulator_init_data); 634 + } 635 + if (pdata->ldo11) { 636 + reg_devs[13].platform_data = pdata->ldo11; 637 + reg_devs[13].pdata_size = sizeof(struct regulator_init_data); 638 + } 639 + if (pdata->ldo12) { 640 + reg_devs[14].platform_data = pdata->ldo12; 641 + reg_devs[14].pdata_size = sizeof(struct regulator_init_data); 642 + } 643 + if (pdata->ldo13) { 644 + reg_devs[15].platform_data = pdata->ldo13; 645 + reg_devs[15].pdata_size = sizeof(struct regulator_init_data); 646 + } 647 + if (pdata->ldo14) { 648 + reg_devs[16].platform_data = pdata->ldo14; 649 + reg_devs[16].pdata_size = sizeof(struct regulator_init_data); 650 + } 651 + if (pdata->ldo15) { 652 + reg_devs[17].platform_data = pdata->ldo15; 653 + reg_devs[17].pdata_size = sizeof(struct regulator_init_data); 654 + } 655 + if (pdata->ldo16) { 656 + reg_devs[18].platform_data = pdata->ldo16; 657 + reg_devs[18].pdata_size = sizeof(struct regulator_init_data); 658 + } 659 + if (pdata->ldo17) { 660 + reg_devs[19].platform_data = pdata->ldo17; 661 + reg_devs[19].pdata_size = sizeof(struct regulator_init_data); 662 + } 663 + if (pdata->ldo18) { 664 + reg_devs[20].platform_data = pdata->ldo18; 665 + reg_devs[20].pdata_size = sizeof(struct regulator_init_data); 666 + } 667 + if (pdata->ldo19) { 668 + reg_devs[21].platform_data = pdata->ldo19; 669 + reg_devs[21].pdata_size = sizeof(struct regulator_init_data); 670 + } 671 + if (pdata->ldo20) { 672 + reg_devs[22].platform_data = pdata->ldo20; 673 + reg_devs[22].pdata_size = sizeof(struct regulator_init_data); 674 + } 675 + ret = mfd_add_devices(chip->dev, 0, reg_devs, ARRAY_SIZE(reg_devs), 676 + NULL, 0, NULL); 677 + if (ret < 0) { 678 + dev_err(chip->dev, "Failed to add regulator subdev\n"); 679 + return; 680 + } 715 681 } 716 682 717 683 int __devinit max8925_device_init(struct max8925_chip *chip, ··· 860 612 goto out_dev; 861 613 } 862 614 863 - if (pdata) { 864 - ret = mfd_add_devices(chip->dev, 0, &regulator_devs[0], 865 - ARRAY_SIZE(regulator_devs), 866 - &regulator_resources[0], 0, NULL); 867 - if (ret < 0) { 868 - dev_err(chip->dev, "Failed to add regulator subdev\n"); 869 - goto out_dev; 870 - } 871 - } 615 + init_regulator(chip, pdata); 872 616 873 617 if (pdata && pdata->backlight) { 874 - ret = mfd_add_devices(chip->dev, 0, &backlight_devs[0], 875 - ARRAY_SIZE(backlight_devs), 876 - &backlight_resources[0], 0, NULL); 877 - if (ret < 0) { 878 - dev_err(chip->dev, "Failed to add backlight subdev\n"); 879 - goto out_dev; 880 - } 618 + bk_devs[0].platform_data = &pdata->backlight; 619 + bk_devs[0].pdata_size = sizeof(struct max8925_backlight_pdata); 620 + } 621 + ret = mfd_add_devices(chip->dev, 0, bk_devs, ARRAY_SIZE(bk_devs), 622 + NULL, 0, NULL); 623 + if (ret < 0) { 624 + dev_err(chip->dev, "Failed to add backlight subdev\n"); 625 + goto out_dev; 881 626 } 882 627 883 628 if (pdata && pdata->power) {
-1
drivers/mfd/mc13xxx-core.c
··· 676 676 err_mask: 677 677 err_revision: 678 678 mc13xxx_unlock(mc13xxx); 679 - kfree(mc13xxx); 680 679 return ret; 681 680 } 682 681
+15 -223
drivers/mfd/omap-usb-host.c
··· 21 21 #include <linux/types.h> 22 22 #include <linux/slab.h> 23 23 #include <linux/delay.h> 24 - #include <linux/platform_device.h> 25 24 #include <linux/clk.h> 26 25 #include <linux/dma-mapping.h> 27 26 #include <linux/spinlock.h> ··· 34 35 #define OMAP_OHCI_DEVICE "ohci-omap3" 35 36 36 37 /* OMAP USBHOST Register addresses */ 37 - 38 - /* TLL Register Set */ 39 - #define OMAP_USBTLL_REVISION (0x00) 40 - #define OMAP_USBTLL_SYSCONFIG (0x10) 41 - #define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) 42 - #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) 43 - #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) 44 - #define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) 45 - #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0) 46 - 47 - #define OMAP_USBTLL_SYSSTATUS (0x14) 48 - #define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0) 49 - 50 - #define OMAP_USBTLL_IRQSTATUS (0x18) 51 - #define OMAP_USBTLL_IRQENABLE (0x1C) 52 - 53 - #define OMAP_TLL_SHARED_CONF (0x30) 54 - #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6) 55 - #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5) 56 - #define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2) 57 - #define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1) 58 - #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0) 59 - 60 - #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num) 61 - #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24 62 - #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11) 63 - #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10) 64 - #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9) 65 - #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8) 66 - #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1) 67 - #define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0) 68 - 69 - #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0 70 - #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1 71 - #define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2 72 - #define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3 73 - #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4 74 - #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5 75 - #define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6 76 - #define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7 77 - #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA 78 - #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB 79 - 80 - #define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num) 81 - #define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num) 82 - #define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num) 83 - #define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num) 84 - #define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num) 85 - #define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num) 86 - #define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num) 87 - #define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num) 88 - #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num) 89 - 90 - #define OMAP_TLL_CHANNEL_COUNT 3 91 - #define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0) 92 - #define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1) 93 - #define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2) 94 38 95 39 /* UHH Register Set */ 96 40 #define OMAP_UHH_REVISION (0x00) ··· 74 132 #define OMAP4_P2_MODE_TLL (1 << 18) 75 133 #define OMAP4_P2_MODE_HSIC (3 << 18) 76 134 77 - #define OMAP_REV2_TLL_CHANNEL_COUNT 2 78 - 79 135 #define OMAP_UHH_DEBUG_CSR (0x44) 80 136 81 137 /* Values of UHH_REVISION - Note: these are not given in the TRM */ ··· 93 153 struct clk *xclk60mhsp2_ck; 94 154 struct clk *utmi_p1_fck; 95 155 struct clk *usbhost_p1_fck; 96 - struct clk *usbtll_p1_fck; 97 156 struct clk *utmi_p2_fck; 98 157 struct clk *usbhost_p2_fck; 99 - struct clk *usbtll_p2_fck; 100 158 struct clk *init_60m_fclk; 101 159 struct clk *ehci_logic_fck; 102 160 103 161 void __iomem *uhh_base; 104 - void __iomem *tll_base; 105 162 106 163 struct usbhs_omap_platform_data platdata; 107 164 ··· 273 336 } 274 337 } 275 338 276 - /* 277 - * convert the port-mode enum to a value we can use in the FSLSMODE 278 - * field of USBTLL_CHANNEL_CONF 279 - */ 280 - static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode) 281 - { 282 - switch (mode) { 283 - case OMAP_USBHS_PORT_MODE_UNUSED: 284 - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: 285 - return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; 286 - 287 - case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: 288 - return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM; 289 - 290 - case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: 291 - return OMAP_TLL_FSLSMODE_3PIN_PHY; 292 - 293 - case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: 294 - return OMAP_TLL_FSLSMODE_4PIN_PHY; 295 - 296 - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: 297 - return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0; 298 - 299 - case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: 300 - return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM; 301 - 302 - case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: 303 - return OMAP_TLL_FSLSMODE_3PIN_TLL; 304 - 305 - case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: 306 - return OMAP_TLL_FSLSMODE_4PIN_TLL; 307 - 308 - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: 309 - return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0; 310 - 311 - case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: 312 - return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM; 313 - default: 314 - pr_warning("Invalid port mode, using default\n"); 315 - return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; 316 - } 317 - } 318 - 319 - static void usbhs_omap_tll_init(struct device *dev, u8 tll_channel_count) 320 - { 321 - struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); 322 - struct usbhs_omap_platform_data *pdata = dev->platform_data; 323 - unsigned reg; 324 - int i; 325 - 326 - /* Program Common TLL register */ 327 - reg = usbhs_read(omap->tll_base, OMAP_TLL_SHARED_CONF); 328 - reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON 329 - | OMAP_TLL_SHARED_CONF_USB_DIVRATION); 330 - reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN; 331 - reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN; 332 - 333 - usbhs_write(omap->tll_base, OMAP_TLL_SHARED_CONF, reg); 334 - 335 - /* Enable channels now */ 336 - for (i = 0; i < tll_channel_count; i++) { 337 - reg = usbhs_read(omap->tll_base, 338 - OMAP_TLL_CHANNEL_CONF(i)); 339 - 340 - if (is_ohci_port(pdata->port_mode[i])) { 341 - reg |= ohci_omap3_fslsmode(pdata->port_mode[i]) 342 - << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT; 343 - reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS; 344 - } else if (pdata->port_mode[i] == OMAP_EHCI_PORT_MODE_TLL) { 345 - 346 - /* Disable AutoIdle, BitStuffing and use SDR Mode */ 347 - reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE 348 - | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF 349 - | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE); 350 - 351 - } else 352 - continue; 353 - 354 - reg |= OMAP_TLL_CHANNEL_CONF_CHANEN; 355 - usbhs_write(omap->tll_base, 356 - OMAP_TLL_CHANNEL_CONF(i), reg); 357 - 358 - usbhs_writeb(omap->tll_base, 359 - OMAP_TLL_ULPI_SCRATCH_REGISTER(i), 0xbe); 360 - } 361 - } 362 - 363 339 static int usbhs_runtime_resume(struct device *dev) 364 340 { 365 341 struct usbhs_hcd_omap *omap = dev_get_drvdata(dev); ··· 286 436 return -ENODEV; 287 437 } 288 438 439 + omap_tll_enable(); 289 440 spin_lock_irqsave(&omap->lock, flags); 290 441 291 442 if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck)) 292 443 clk_enable(omap->ehci_logic_fck); 293 444 294 - if (is_ehci_tll_mode(pdata->port_mode[0])) { 445 + if (is_ehci_tll_mode(pdata->port_mode[0])) 295 446 clk_enable(omap->usbhost_p1_fck); 296 - clk_enable(omap->usbtll_p1_fck); 297 - } 298 - if (is_ehci_tll_mode(pdata->port_mode[1])) { 447 + if (is_ehci_tll_mode(pdata->port_mode[1])) 299 448 clk_enable(omap->usbhost_p2_fck); 300 - clk_enable(omap->usbtll_p2_fck); 301 - } 449 + 302 450 clk_enable(omap->utmi_p1_fck); 303 451 clk_enable(omap->utmi_p2_fck); 304 452 ··· 320 472 321 473 spin_lock_irqsave(&omap->lock, flags); 322 474 323 - if (is_ehci_tll_mode(pdata->port_mode[0])) { 475 + if (is_ehci_tll_mode(pdata->port_mode[0])) 324 476 clk_disable(omap->usbhost_p1_fck); 325 - clk_disable(omap->usbtll_p1_fck); 326 - } 327 - if (is_ehci_tll_mode(pdata->port_mode[1])) { 477 + if (is_ehci_tll_mode(pdata->port_mode[1])) 328 478 clk_disable(omap->usbhost_p2_fck); 329 - clk_disable(omap->usbtll_p2_fck); 330 - } 479 + 331 480 clk_disable(omap->utmi_p2_fck); 332 481 clk_disable(omap->utmi_p1_fck); 333 482 ··· 332 487 clk_disable(omap->ehci_logic_fck); 333 488 334 489 spin_unlock_irqrestore(&omap->lock, flags); 490 + omap_tll_disable(); 335 491 336 492 return 0; 337 493 } ··· 345 499 unsigned reg; 346 500 347 501 dev_dbg(dev, "starting TI HSUSB Controller\n"); 348 - 349 - pm_runtime_get_sync(dev); 350 502 351 503 if (pdata->ehci_data->phy_reset) { 352 504 if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0])) ··· 359 515 udelay(10); 360 516 } 361 517 518 + pm_runtime_get_sync(dev); 362 519 spin_lock_irqsave(&omap->lock, flags); 363 520 omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION); 364 521 dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev); ··· 425 580 usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg); 426 581 dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg); 427 582 428 - if (is_ehci_tll_mode(pdata->port_mode[0]) || 429 - is_ehci_tll_mode(pdata->port_mode[1]) || 430 - is_ehci_tll_mode(pdata->port_mode[2]) || 431 - (is_ohci_port(pdata->port_mode[0])) || 432 - (is_ohci_port(pdata->port_mode[1])) || 433 - (is_ohci_port(pdata->port_mode[2]))) { 434 - 435 - /* Enable UTMI mode for required TLL channels */ 436 - if (is_omap_usbhs_rev2(omap)) 437 - usbhs_omap_tll_init(dev, OMAP_REV2_TLL_CHANNEL_COUNT); 438 - else 439 - usbhs_omap_tll_init(dev, OMAP_TLL_CHANNEL_COUNT); 440 - } 441 - 442 583 spin_unlock_irqrestore(&omap->lock, flags); 443 584 585 + pm_runtime_put_sync(dev); 444 586 if (pdata->ehci_data->phy_reset) { 445 587 /* Hold the PHY in RESET for enough time till 446 588 * PHY is settled and ready ··· 442 610 gpio_set_value_cansleep 443 611 (pdata->ehci_data->reset_gpio_port[1], 1); 444 612 } 445 - 446 - pm_runtime_put_sync(dev); 447 613 } 448 614 449 615 static void omap_usbhs_deinit(struct device *dev) ··· 544 714 goto err_xclk60mhsp2_ck; 545 715 } 546 716 547 - omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk"); 548 - if (IS_ERR(omap->usbtll_p1_fck)) { 549 - ret = PTR_ERR(omap->usbtll_p1_fck); 550 - dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret); 551 - goto err_usbhost_p1_fck; 552 - } 553 - 554 717 omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk"); 555 718 if (IS_ERR(omap->usbhost_p2_fck)) { 556 719 ret = PTR_ERR(omap->usbhost_p2_fck); 557 720 dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret); 558 - goto err_usbtll_p1_fck; 559 - } 560 - 561 - omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk"); 562 - if (IS_ERR(omap->usbtll_p2_fck)) { 563 - ret = PTR_ERR(omap->usbtll_p2_fck); 564 - dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret); 565 - goto err_usbhost_p2_fck; 721 + goto err_usbhost_p1_fck; 566 722 } 567 723 568 724 omap->init_60m_fclk = clk_get(dev, "init_60m_fclk"); 569 725 if (IS_ERR(omap->init_60m_fclk)) { 570 726 ret = PTR_ERR(omap->init_60m_fclk); 571 727 dev_err(dev, "init_60m_fclk failed error:%d\n", ret); 572 - goto err_usbtll_p2_fck; 728 + goto err_usbhost_p2_fck; 573 729 } 574 730 575 731 if (is_ehci_phy_mode(pdata->port_mode[0])) { ··· 601 785 goto err_init_60m_fclk; 602 786 } 603 787 604 - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll"); 605 - if (!res) { 606 - dev_err(dev, "UHH EHCI get resource failed\n"); 607 - ret = -ENODEV; 608 - goto err_tll; 609 - } 610 - 611 - omap->tll_base = ioremap(res->start, resource_size(res)); 612 - if (!omap->tll_base) { 613 - dev_err(dev, "TLL ioremap failed\n"); 614 - ret = -ENOMEM; 615 - goto err_tll; 616 - } 617 - 618 788 platform_set_drvdata(pdev, omap); 619 789 620 790 omap_usbhs_init(dev); ··· 614 812 615 813 err_alloc: 616 814 omap_usbhs_deinit(&pdev->dev); 617 - iounmap(omap->tll_base); 618 - 619 - err_tll: 620 815 iounmap(omap->uhh_base); 621 816 622 817 err_init_60m_fclk: 623 818 clk_put(omap->init_60m_fclk); 624 819 625 - err_usbtll_p2_fck: 626 - clk_put(omap->usbtll_p2_fck); 627 - 628 820 err_usbhost_p2_fck: 629 821 clk_put(omap->usbhost_p2_fck); 630 - 631 - err_usbtll_p1_fck: 632 - clk_put(omap->usbtll_p1_fck); 633 822 634 823 err_usbhost_p1_fck: 635 824 clk_put(omap->usbhost_p1_fck); ··· 657 864 struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev); 658 865 659 866 omap_usbhs_deinit(&pdev->dev); 660 - iounmap(omap->tll_base); 661 867 iounmap(omap->uhh_base); 662 868 clk_put(omap->init_60m_fclk); 663 - clk_put(omap->usbtll_p2_fck); 664 869 clk_put(omap->usbhost_p2_fck); 665 - clk_put(omap->usbtll_p1_fck); 666 870 clk_put(omap->usbhost_p1_fck); 667 871 clk_put(omap->xclk60mhsp2_ck); 668 872 clk_put(omap->utmi_p2_fck); ··· 700 910 * init before ehci and ohci drivers; 701 911 * The usbhs core driver should be initialized much before 702 912 * the omap ehci and ohci probe functions are called. 913 + * This usbhs core driver should be initialized after 914 + * usb tll driver 703 915 */ 704 - fs_initcall(omap_usbhs_drvinit); 916 + fs_initcall_sync(omap_usbhs_drvinit); 705 917 706 918 static void __exit omap_usbhs_drvexit(void) 707 919 {
+471
drivers/mfd/omap-usb-tll.c
··· 1 + /** 2 + * omap-usb-tll.c - The USB TLL driver for OMAP EHCI & OHCI 3 + * 4 + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com 5 + * Author: Keshava Munegowda <keshava_mgowda@ti.com> 6 + * 7 + * This program is free software: you can redistribute it and/or modify 8 + * it under the terms of the GNU General Public License version 2 of 9 + * the License as published by the Free Software Foundation. 10 + * 11 + * This program is distributed in the hope that it will be useful, 12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License for more details. 15 + * 16 + * You should have received a copy of the GNU General Public License 17 + * along with this program. If not, see <http://www.gnu.org/licenses/>. 18 + */ 19 + #include <linux/kernel.h> 20 + #include <linux/module.h> 21 + #include <linux/types.h> 22 + #include <linux/slab.h> 23 + #include <linux/spinlock.h> 24 + #include <linux/platform_device.h> 25 + #include <linux/clk.h> 26 + #include <linux/io.h> 27 + #include <linux/err.h> 28 + #include <plat/usb.h> 29 + #include <linux/pm_runtime.h> 30 + 31 + #define USBTLL_DRIVER_NAME "usbhs_tll" 32 + 33 + /* TLL Register Set */ 34 + #define OMAP_USBTLL_REVISION (0x00) 35 + #define OMAP_USBTLL_SYSCONFIG (0x10) 36 + #define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8) 37 + #define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3) 38 + #define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2) 39 + #define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1) 40 + #define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0) 41 + 42 + #define OMAP_USBTLL_SYSSTATUS (0x14) 43 + #define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0) 44 + 45 + #define OMAP_USBTLL_IRQSTATUS (0x18) 46 + #define OMAP_USBTLL_IRQENABLE (0x1C) 47 + 48 + #define OMAP_TLL_SHARED_CONF (0x30) 49 + #define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6) 50 + #define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5) 51 + #define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2) 52 + #define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1) 53 + #define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0) 54 + 55 + #define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num) 56 + #define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24 57 + #define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11) 58 + #define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10) 59 + #define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9) 60 + #define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8) 61 + #define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1) 62 + #define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0) 63 + 64 + #define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0 65 + #define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1 66 + #define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2 67 + #define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3 68 + #define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4 69 + #define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5 70 + #define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6 71 + #define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7 72 + #define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA 73 + #define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB 74 + 75 + #define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num) 76 + #define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num) 77 + #define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num) 78 + #define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num) 79 + #define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num) 80 + #define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num) 81 + #define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num) 82 + #define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num) 83 + #define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num) 84 + 85 + #define OMAP_REV2_TLL_CHANNEL_COUNT 2 86 + #define OMAP_TLL_CHANNEL_COUNT 3 87 + #define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0) 88 + #define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1) 89 + #define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2) 90 + 91 + /* Values of USBTLL_REVISION - Note: these are not given in the TRM */ 92 + #define OMAP_USBTLL_REV1 0x00000015 /* OMAP3 */ 93 + #define OMAP_USBTLL_REV2 0x00000018 /* OMAP 3630 */ 94 + #define OMAP_USBTLL_REV3 0x00000004 /* OMAP4 */ 95 + 96 + #define is_ehci_tll_mode(x) (x == OMAP_EHCI_PORT_MODE_TLL) 97 + 98 + struct usbtll_omap { 99 + struct clk *usbtll_p1_fck; 100 + struct clk *usbtll_p2_fck; 101 + struct usbtll_omap_platform_data platdata; 102 + /* secure the register updates */ 103 + spinlock_t lock; 104 + }; 105 + 106 + /*-------------------------------------------------------------------------*/ 107 + 108 + const char usbtll_driver_name[] = USBTLL_DRIVER_NAME; 109 + struct platform_device *tll_pdev; 110 + 111 + /*-------------------------------------------------------------------------*/ 112 + 113 + static inline void usbtll_write(void __iomem *base, u32 reg, u32 val) 114 + { 115 + __raw_writel(val, base + reg); 116 + } 117 + 118 + static inline u32 usbtll_read(void __iomem *base, u32 reg) 119 + { 120 + return __raw_readl(base + reg); 121 + } 122 + 123 + static inline void usbtll_writeb(void __iomem *base, u8 reg, u8 val) 124 + { 125 + __raw_writeb(val, base + reg); 126 + } 127 + 128 + static inline u8 usbtll_readb(void __iomem *base, u8 reg) 129 + { 130 + return __raw_readb(base + reg); 131 + } 132 + 133 + /*-------------------------------------------------------------------------*/ 134 + 135 + static bool is_ohci_port(enum usbhs_omap_port_mode pmode) 136 + { 137 + switch (pmode) { 138 + case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: 139 + case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: 140 + case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: 141 + case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: 142 + case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: 143 + case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: 144 + case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: 145 + case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: 146 + case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: 147 + case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: 148 + return true; 149 + 150 + default: 151 + return false; 152 + } 153 + } 154 + 155 + /* 156 + * convert the port-mode enum to a value we can use in the FSLSMODE 157 + * field of USBTLL_CHANNEL_CONF 158 + */ 159 + static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode) 160 + { 161 + switch (mode) { 162 + case OMAP_USBHS_PORT_MODE_UNUSED: 163 + case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0: 164 + return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; 165 + 166 + case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM: 167 + return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM; 168 + 169 + case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0: 170 + return OMAP_TLL_FSLSMODE_3PIN_PHY; 171 + 172 + case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM: 173 + return OMAP_TLL_FSLSMODE_4PIN_PHY; 174 + 175 + case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0: 176 + return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0; 177 + 178 + case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM: 179 + return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM; 180 + 181 + case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0: 182 + return OMAP_TLL_FSLSMODE_3PIN_TLL; 183 + 184 + case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM: 185 + return OMAP_TLL_FSLSMODE_4PIN_TLL; 186 + 187 + case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0: 188 + return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0; 189 + 190 + case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM: 191 + return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM; 192 + default: 193 + pr_warn("Invalid port mode, using default\n"); 194 + return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0; 195 + } 196 + } 197 + 198 + /** 199 + * usbtll_omap_probe - initialize TI-based HCDs 200 + * 201 + * Allocates basic resources for this USB host controller. 202 + */ 203 + static int __devinit usbtll_omap_probe(struct platform_device *pdev) 204 + { 205 + struct device *dev = &pdev->dev; 206 + struct usbtll_omap_platform_data *pdata = dev->platform_data; 207 + void __iomem *base; 208 + struct resource *res; 209 + struct usbtll_omap *tll; 210 + unsigned reg; 211 + unsigned long flags; 212 + int ret = 0; 213 + int i, ver, count; 214 + 215 + dev_dbg(dev, "starting TI HSUSB TLL Controller\n"); 216 + 217 + tll = kzalloc(sizeof(struct usbtll_omap), GFP_KERNEL); 218 + if (!tll) { 219 + dev_err(dev, "Memory allocation failed\n"); 220 + ret = -ENOMEM; 221 + goto end; 222 + } 223 + 224 + spin_lock_init(&tll->lock); 225 + 226 + for (i = 0; i < OMAP3_HS_USB_PORTS; i++) 227 + tll->platdata.port_mode[i] = pdata->port_mode[i]; 228 + 229 + tll->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk"); 230 + if (IS_ERR(tll->usbtll_p1_fck)) { 231 + ret = PTR_ERR(tll->usbtll_p1_fck); 232 + dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret); 233 + goto err_tll; 234 + } 235 + 236 + tll->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk"); 237 + if (IS_ERR(tll->usbtll_p2_fck)) { 238 + ret = PTR_ERR(tll->usbtll_p2_fck); 239 + dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret); 240 + goto err_usbtll_p1_fck; 241 + } 242 + 243 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 244 + if (!res) { 245 + dev_err(dev, "usb tll get resource failed\n"); 246 + ret = -ENODEV; 247 + goto err_usbtll_p2_fck; 248 + } 249 + 250 + base = ioremap(res->start, resource_size(res)); 251 + if (!base) { 252 + dev_err(dev, "TLL ioremap failed\n"); 253 + ret = -ENOMEM; 254 + goto err_usbtll_p2_fck; 255 + } 256 + 257 + platform_set_drvdata(pdev, tll); 258 + pm_runtime_enable(dev); 259 + pm_runtime_get_sync(dev); 260 + 261 + spin_lock_irqsave(&tll->lock, flags); 262 + 263 + ver = usbtll_read(base, OMAP_USBTLL_REVISION); 264 + switch (ver) { 265 + case OMAP_USBTLL_REV1: 266 + case OMAP_USBTLL_REV2: 267 + count = OMAP_TLL_CHANNEL_COUNT; 268 + break; 269 + case OMAP_USBTLL_REV3: 270 + count = OMAP_REV2_TLL_CHANNEL_COUNT; 271 + break; 272 + default: 273 + dev_err(dev, "TLL version failed\n"); 274 + ret = -ENODEV; 275 + goto err_ioremap; 276 + } 277 + 278 + if (is_ehci_tll_mode(pdata->port_mode[0]) || 279 + is_ehci_tll_mode(pdata->port_mode[1]) || 280 + is_ehci_tll_mode(pdata->port_mode[2]) || 281 + is_ohci_port(pdata->port_mode[0]) || 282 + is_ohci_port(pdata->port_mode[1]) || 283 + is_ohci_port(pdata->port_mode[2])) { 284 + 285 + /* Program Common TLL register */ 286 + reg = usbtll_read(base, OMAP_TLL_SHARED_CONF); 287 + reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON 288 + | OMAP_TLL_SHARED_CONF_USB_DIVRATION); 289 + reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN; 290 + reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN; 291 + 292 + usbtll_write(base, OMAP_TLL_SHARED_CONF, reg); 293 + 294 + /* Enable channels now */ 295 + for (i = 0; i < count; i++) { 296 + reg = usbtll_read(base, OMAP_TLL_CHANNEL_CONF(i)); 297 + 298 + if (is_ohci_port(pdata->port_mode[i])) { 299 + reg |= ohci_omap3_fslsmode(pdata->port_mode[i]) 300 + << OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT; 301 + reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS; 302 + } else if (pdata->port_mode[i] == 303 + OMAP_EHCI_PORT_MODE_TLL) { 304 + /* 305 + * Disable AutoIdle, BitStuffing 306 + * and use SDR Mode 307 + */ 308 + reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE 309 + | OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF 310 + | OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE); 311 + } else { 312 + continue; 313 + } 314 + reg |= OMAP_TLL_CHANNEL_CONF_CHANEN; 315 + usbtll_write(base, OMAP_TLL_CHANNEL_CONF(i), reg); 316 + 317 + usbtll_writeb(base, 318 + OMAP_TLL_ULPI_SCRATCH_REGISTER(i), 319 + 0xbe); 320 + } 321 + } 322 + 323 + err_ioremap: 324 + spin_unlock_irqrestore(&tll->lock, flags); 325 + iounmap(base); 326 + pm_runtime_put_sync(dev); 327 + tll_pdev = pdev; 328 + if (!ret) 329 + goto end; 330 + pm_runtime_disable(dev); 331 + 332 + err_usbtll_p2_fck: 333 + clk_put(tll->usbtll_p2_fck); 334 + 335 + err_usbtll_p1_fck: 336 + clk_put(tll->usbtll_p1_fck); 337 + 338 + err_tll: 339 + kfree(tll); 340 + 341 + end: 342 + return ret; 343 + } 344 + 345 + /** 346 + * usbtll_omap_remove - shutdown processing for UHH & TLL HCDs 347 + * @pdev: USB Host Controller being removed 348 + * 349 + * Reverses the effect of usbtll_omap_probe(). 350 + */ 351 + static int __devexit usbtll_omap_remove(struct platform_device *pdev) 352 + { 353 + struct usbtll_omap *tll = platform_get_drvdata(pdev); 354 + 355 + clk_put(tll->usbtll_p2_fck); 356 + clk_put(tll->usbtll_p1_fck); 357 + pm_runtime_disable(&pdev->dev); 358 + kfree(tll); 359 + return 0; 360 + } 361 + 362 + static int usbtll_runtime_resume(struct device *dev) 363 + { 364 + struct usbtll_omap *tll = dev_get_drvdata(dev); 365 + struct usbtll_omap_platform_data *pdata = &tll->platdata; 366 + unsigned long flags; 367 + 368 + dev_dbg(dev, "usbtll_runtime_resume\n"); 369 + 370 + if (!pdata) { 371 + dev_dbg(dev, "missing platform_data\n"); 372 + return -ENODEV; 373 + } 374 + 375 + spin_lock_irqsave(&tll->lock, flags); 376 + 377 + if (is_ehci_tll_mode(pdata->port_mode[0])) 378 + clk_enable(tll->usbtll_p1_fck); 379 + 380 + if (is_ehci_tll_mode(pdata->port_mode[1])) 381 + clk_enable(tll->usbtll_p2_fck); 382 + 383 + spin_unlock_irqrestore(&tll->lock, flags); 384 + 385 + return 0; 386 + } 387 + 388 + static int usbtll_runtime_suspend(struct device *dev) 389 + { 390 + struct usbtll_omap *tll = dev_get_drvdata(dev); 391 + struct usbtll_omap_platform_data *pdata = &tll->platdata; 392 + unsigned long flags; 393 + 394 + dev_dbg(dev, "usbtll_runtime_suspend\n"); 395 + 396 + if (!pdata) { 397 + dev_dbg(dev, "missing platform_data\n"); 398 + return -ENODEV; 399 + } 400 + 401 + spin_lock_irqsave(&tll->lock, flags); 402 + 403 + if (is_ehci_tll_mode(pdata->port_mode[0])) 404 + clk_disable(tll->usbtll_p1_fck); 405 + 406 + if (is_ehci_tll_mode(pdata->port_mode[1])) 407 + clk_disable(tll->usbtll_p2_fck); 408 + 409 + spin_unlock_irqrestore(&tll->lock, flags); 410 + 411 + return 0; 412 + } 413 + 414 + static const struct dev_pm_ops usbtllomap_dev_pm_ops = { 415 + SET_RUNTIME_PM_OPS(usbtll_runtime_suspend, 416 + usbtll_runtime_resume, 417 + NULL) 418 + }; 419 + 420 + static struct platform_driver usbtll_omap_driver = { 421 + .driver = { 422 + .name = (char *)usbtll_driver_name, 423 + .owner = THIS_MODULE, 424 + .pm = &usbtllomap_dev_pm_ops, 425 + }, 426 + .probe = usbtll_omap_probe, 427 + .remove = __devexit_p(usbtll_omap_remove), 428 + }; 429 + 430 + int omap_tll_enable(void) 431 + { 432 + if (!tll_pdev) { 433 + pr_err("missing omap usbhs tll platform_data\n"); 434 + return -ENODEV; 435 + } 436 + return pm_runtime_get_sync(&tll_pdev->dev); 437 + } 438 + EXPORT_SYMBOL_GPL(omap_tll_enable); 439 + 440 + int omap_tll_disable(void) 441 + { 442 + if (!tll_pdev) { 443 + pr_err("missing omap usbhs tll platform_data\n"); 444 + return -ENODEV; 445 + } 446 + return pm_runtime_put_sync(&tll_pdev->dev); 447 + } 448 + EXPORT_SYMBOL_GPL(omap_tll_disable); 449 + 450 + MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>"); 451 + MODULE_ALIAS("platform:" USBHS_DRIVER_NAME); 452 + MODULE_LICENSE("GPL v2"); 453 + MODULE_DESCRIPTION("usb tll driver for TI OMAP EHCI and OHCI controllers"); 454 + 455 + static int __init omap_usbtll_drvinit(void) 456 + { 457 + return platform_driver_register(&usbtll_omap_driver); 458 + } 459 + 460 + /* 461 + * init before usbhs core driver; 462 + * The usbtll driver should be initialized before 463 + * the usbhs core driver probe function is called. 464 + */ 465 + fs_initcall(omap_usbtll_drvinit); 466 + 467 + static void __exit omap_usbtll_drvexit(void) 468 + { 469 + platform_driver_unregister(&usbtll_omap_driver); 470 + } 471 + module_exit(omap_usbtll_drvexit);
+77 -72
drivers/mfd/palmas.c
··· 23 23 #include <linux/err.h> 24 24 #include <linux/mfd/core.h> 25 25 #include <linux/mfd/palmas.h> 26 - 27 - static const struct resource gpadc_resource[] = { 28 - { 29 - .name = "EOC_SW", 30 - .start = PALMAS_GPADC_EOC_SW_IRQ, 31 - .end = PALMAS_GPADC_EOC_SW_IRQ, 32 - .flags = IORESOURCE_IRQ, 33 - } 34 - }; 35 - 36 - static const struct resource usb_resource[] = { 37 - { 38 - .name = "ID", 39 - .start = PALMAS_ID_OTG_IRQ, 40 - .end = PALMAS_ID_OTG_IRQ, 41 - .flags = IORESOURCE_IRQ, 42 - }, 43 - { 44 - .name = "ID_WAKEUP", 45 - .start = PALMAS_ID_IRQ, 46 - .end = PALMAS_ID_IRQ, 47 - .flags = IORESOURCE_IRQ, 48 - }, 49 - { 50 - .name = "VBUS", 51 - .start = PALMAS_VBUS_OTG_IRQ, 52 - .end = PALMAS_VBUS_OTG_IRQ, 53 - .flags = IORESOURCE_IRQ, 54 - }, 55 - { 56 - .name = "VBUS_WAKEUP", 57 - .start = PALMAS_VBUS_IRQ, 58 - .end = PALMAS_VBUS_IRQ, 59 - .flags = IORESOURCE_IRQ, 60 - }, 61 - }; 62 - 63 - static const struct resource rtc_resource[] = { 64 - { 65 - .name = "RTC_ALARM", 66 - .start = PALMAS_RTC_ALARM_IRQ, 67 - .end = PALMAS_RTC_ALARM_IRQ, 68 - .flags = IORESOURCE_IRQ, 69 - }, 70 - }; 71 - 72 - static const struct resource pwron_resource[] = { 73 - { 74 - .name = "PWRON_BUTTON", 75 - .start = PALMAS_PWRON_IRQ, 76 - .end = PALMAS_PWRON_IRQ, 77 - .flags = IORESOURCE_IRQ, 78 - }, 79 - }; 26 + #include <linux/of_platform.h> 80 27 81 28 enum palmas_ids { 82 29 PALMAS_PMIC_ID, ··· 58 111 }, 59 112 { 60 113 .name = "palmas-rtc", 61 - .num_resources = ARRAY_SIZE(rtc_resource), 62 - .resources = rtc_resource, 63 114 .id = PALMAS_RTC_ID, 64 115 }, 65 116 { 66 117 .name = "palmas-pwrbutton", 67 - .num_resources = ARRAY_SIZE(pwron_resource), 68 - .resources = pwron_resource, 69 118 .id = PALMAS_PWRBUTTON_ID, 70 119 }, 71 120 { 72 121 .name = "palmas-gpadc", 73 - .num_resources = ARRAY_SIZE(gpadc_resource), 74 - .resources = gpadc_resource, 75 122 .id = PALMAS_GPADC_ID, 76 123 }, 77 124 { ··· 82 141 }, 83 142 { 84 143 .name = "palmas-usb", 85 - .num_resources = ARRAY_SIZE(usb_resource), 86 - .resources = usb_resource, 87 144 .id = PALMAS_USB_ID, 88 145 } 89 146 }; ··· 247 308 PALMAS_INT1_MASK), 248 309 }; 249 310 311 + static void __devinit palmas_dt_to_pdata(struct device_node *node, 312 + struct palmas_platform_data *pdata) 313 + { 314 + int ret; 315 + u32 prop; 316 + 317 + ret = of_property_read_u32(node, "ti,mux_pad1", &prop); 318 + if (!ret) { 319 + pdata->mux_from_pdata = 1; 320 + pdata->pad1 = prop; 321 + } 322 + 323 + ret = of_property_read_u32(node, "ti,mux_pad2", &prop); 324 + if (!ret) { 325 + pdata->mux_from_pdata = 1; 326 + pdata->pad2 = prop; 327 + } 328 + 329 + /* The default for this register is all masked */ 330 + ret = of_property_read_u32(node, "ti,power_ctrl", &prop); 331 + if (!ret) 332 + pdata->power_ctrl = prop; 333 + else 334 + pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK | 335 + PALMAS_POWER_CTRL_ENABLE1_MASK | 336 + PALMAS_POWER_CTRL_ENABLE2_MASK; 337 + } 338 + 250 339 static int __devinit palmas_i2c_probe(struct i2c_client *i2c, 251 340 const struct i2c_device_id *id) 252 341 { 253 342 struct palmas *palmas; 254 343 struct palmas_platform_data *pdata; 344 + struct device_node *node = i2c->dev.of_node; 255 345 int ret = 0, i; 256 346 unsigned int reg, addr; 257 347 int slave; 258 348 struct mfd_cell *children; 259 349 260 350 pdata = dev_get_platdata(&i2c->dev); 351 + 352 + if (node && !pdata) { 353 + pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL); 354 + 355 + if (!pdata) 356 + return -ENOMEM; 357 + 358 + palmas_dt_to_pdata(node, pdata); 359 + } 360 + 261 361 if (!pdata) 262 362 return -EINVAL; 263 363 ··· 342 364 regmap_write(palmas->regmap[slave], addr, reg); 343 365 344 366 ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq, 345 - IRQF_ONESHOT | IRQF_TRIGGER_LOW, -1, &palmas_irq_chip, 367 + IRQF_ONESHOT | IRQF_TRIGGER_LOW, 0, &palmas_irq_chip, 346 368 &palmas->irq_data); 347 369 if (ret < 0) 348 370 goto err; ··· 355 377 reg = pdata->pad1; 356 378 ret = regmap_write(palmas->regmap[slave], addr, reg); 357 379 if (ret) 358 - goto err; 380 + goto err_irq; 359 381 } else { 360 382 ret = regmap_read(palmas->regmap[slave], addr, &reg); 361 383 if (ret) 362 - goto err; 384 + goto err_irq; 363 385 } 364 386 365 387 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0)) ··· 390 412 reg = pdata->pad2; 391 413 ret = regmap_write(palmas->regmap[slave], addr, reg); 392 414 if (ret) 393 - goto err; 415 + goto err_irq; 394 416 } else { 395 417 ret = regmap_read(palmas->regmap[slave], addr, &reg); 396 418 if (ret) 397 - goto err; 419 + goto err_irq; 398 420 } 399 421 400 422 if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4)) ··· 417 439 418 440 ret = regmap_write(palmas->regmap[slave], addr, reg); 419 441 if (ret) 420 - goto err; 442 + goto err_irq; 443 + 444 + /* 445 + * If we are probing with DT do this the DT way and return here 446 + * otherwise continue and add devices using mfd helpers. 447 + */ 448 + if (node) { 449 + ret = of_platform_populate(node, NULL, NULL, &i2c->dev); 450 + if (ret < 0) 451 + goto err_irq; 452 + else 453 + return ret; 454 + } 421 455 422 456 children = kmemdup(palmas_children, sizeof(palmas_children), 423 457 GFP_KERNEL); 424 458 if (!children) { 425 459 ret = -ENOMEM; 426 - goto err; 460 + goto err_irq; 427 461 } 428 462 429 463 children[PALMAS_PMIC_ID].platform_data = pdata->pmic_pdata; 430 464 children[PALMAS_PMIC_ID].pdata_size = sizeof(*pdata->pmic_pdata); 465 + 466 + children[PALMAS_GPADC_ID].platform_data = pdata->gpadc_pdata; 467 + children[PALMAS_GPADC_ID].pdata_size = sizeof(*pdata->gpadc_pdata); 468 + 469 + children[PALMAS_RESOURCE_ID].platform_data = pdata->resource_pdata; 470 + children[PALMAS_RESOURCE_ID].pdata_size = 471 + sizeof(*pdata->resource_pdata); 472 + 473 + children[PALMAS_USB_ID].platform_data = pdata->usb_pdata; 474 + children[PALMAS_USB_ID].pdata_size = sizeof(*pdata->usb_pdata); 475 + 476 + children[PALMAS_CLK_ID].platform_data = pdata->clk_pdata; 477 + children[PALMAS_CLK_ID].pdata_size = sizeof(*pdata->clk_pdata); 431 478 432 479 ret = mfd_add_devices(palmas->dev, -1, 433 480 children, ARRAY_SIZE(palmas_children), ··· 461 458 kfree(children); 462 459 463 460 if (ret < 0) 464 - goto err; 461 + goto err_devices; 465 462 466 463 return ret; 467 464 468 - err: 465 + err_devices: 469 466 mfd_remove_devices(palmas->dev); 470 - kfree(palmas); 467 + err_irq: 468 + regmap_del_irq_chip(palmas->irq, palmas->irq_data); 469 + err: 471 470 return ret; 472 471 } 473 472
+1 -1
drivers/mfd/rc5t583-irq.c
··· 255 255 { 256 256 struct rc5t583 *rc5t583 = data; 257 257 uint8_t int_sts[RC5T583_MAX_INTERRUPT_MASK_REGS]; 258 - uint8_t master_int; 258 + uint8_t master_int = 0; 259 259 int i; 260 260 int ret; 261 261 unsigned int rtc_int_sts = 0;
+1 -1
drivers/mfd/rc5t583.c
··· 85 85 int id, int ext_pwr, int slots) 86 86 { 87 87 int ret; 88 - uint8_t sleepseq_val; 88 + uint8_t sleepseq_val = 0; 89 89 unsigned int en_bit; 90 90 unsigned int slot_bit; 91 91
+113
drivers/mfd/smsc-ece1099.c
··· 1 + /* 2 + * TI SMSC MFD Driver 3 + * 4 + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com 5 + * 6 + * Author: Sourav Poddar <sourav.poddar@ti.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify it 9 + * under the terms of the GNU General Public License as published by the 10 + * Free Software Foundation; GPL v2. 11 + * 12 + */ 13 + 14 + #include <linux/module.h> 15 + #include <linux/moduleparam.h> 16 + #include <linux/init.h> 17 + #include <linux/slab.h> 18 + #include <linux/i2c.h> 19 + #include <linux/gpio.h> 20 + #include <linux/workqueue.h> 21 + #include <linux/irq.h> 22 + #include <linux/regmap.h> 23 + #include <linux/err.h> 24 + #include <linux/mfd/core.h> 25 + #include <linux/mfd/smsc.h> 26 + #include <linux/of_platform.h> 27 + 28 + static struct regmap_config smsc_regmap_config = { 29 + .reg_bits = 8, 30 + .val_bits = 8, 31 + .max_register = SMSC_VEN_ID_H, 32 + .cache_type = REGCACHE_RBTREE, 33 + }; 34 + 35 + static int smsc_i2c_probe(struct i2c_client *i2c, 36 + const struct i2c_device_id *id) 37 + { 38 + struct smsc *smsc; 39 + int devid, rev, venid_l, venid_h; 40 + int ret = 0; 41 + 42 + smsc = devm_kzalloc(&i2c->dev, sizeof(struct smsc), 43 + GFP_KERNEL); 44 + if (!smsc) { 45 + dev_err(&i2c->dev, "smsc mfd driver memory allocation failed\n"); 46 + return -ENOMEM; 47 + } 48 + 49 + smsc->regmap = devm_regmap_init_i2c(i2c, &smsc_regmap_config); 50 + if (IS_ERR(smsc->regmap)) { 51 + ret = PTR_ERR(smsc->regmap); 52 + goto err; 53 + } 54 + 55 + i2c_set_clientdata(i2c, smsc); 56 + smsc->dev = &i2c->dev; 57 + 58 + #ifdef CONFIG_OF 59 + of_property_read_u32(i2c->dev.of_node, "clock", &smsc->clk); 60 + #endif 61 + 62 + regmap_read(smsc->regmap, SMSC_DEV_ID, &devid); 63 + regmap_read(smsc->regmap, SMSC_DEV_REV, &rev); 64 + regmap_read(smsc->regmap, SMSC_VEN_ID_L, &venid_l); 65 + regmap_read(smsc->regmap, SMSC_VEN_ID_H, &venid_h); 66 + 67 + dev_info(&i2c->dev, "SMSCxxx devid: %02x rev: %02x venid: %02x\n", 68 + devid, rev, (venid_h << 8) | venid_l); 69 + 70 + ret = regmap_write(smsc->regmap, SMSC_CLK_CTRL, smsc->clk); 71 + if (ret) 72 + goto err; 73 + 74 + #ifdef CONFIG_OF 75 + if (i2c->dev.of_node) 76 + ret = of_platform_populate(i2c->dev.of_node, 77 + NULL, NULL, &i2c->dev); 78 + #endif 79 + 80 + err: 81 + return ret; 82 + } 83 + 84 + static int smsc_i2c_remove(struct i2c_client *i2c) 85 + { 86 + struct smsc *smsc = i2c_get_clientdata(i2c); 87 + 88 + mfd_remove_devices(smsc->dev); 89 + 90 + return 0; 91 + } 92 + 93 + static const struct i2c_device_id smsc_i2c_id[] = { 94 + { "smscece1099", 0}, 95 + {}, 96 + }; 97 + MODULE_DEVICE_TABLE(i2c, smsc_i2c_id); 98 + 99 + static struct i2c_driver smsc_i2c_driver = { 100 + .driver = { 101 + .name = "smsc", 102 + .owner = THIS_MODULE, 103 + }, 104 + .probe = smsc_i2c_probe, 105 + .remove = smsc_i2c_remove, 106 + .id_table = smsc_i2c_id, 107 + }; 108 + 109 + module_i2c_driver(smsc_i2c_driver); 110 + 111 + MODULE_AUTHOR("Sourav Poddar <sourav.poddar@ti.com>"); 112 + MODULE_DESCRIPTION("SMSC chip multi-function driver"); 113 + MODULE_LICENSE("GPL v2");
+176
drivers/mfd/syscon.c
··· 1 + /* 2 + * System Control Driver 3 + * 4 + * Copyright (C) 2012 Freescale Semiconductor, Inc. 5 + * Copyright (C) 2012 Linaro Ltd. 6 + * 7 + * Author: Dong Aisheng <dong.aisheng@linaro.org> 8 + * 9 + * This program is free software; you can redistribute it and/or modify 10 + * it under the terms of the GNU General Public License as published by 11 + * the Free Software Foundation; either version 2 of the License, or 12 + * (at your option) any later version. 13 + */ 14 + 15 + #include <linux/err.h> 16 + #include <linux/io.h> 17 + #include <linux/module.h> 18 + #include <linux/of.h> 19 + #include <linux/of_address.h> 20 + #include <linux/of_platform.h> 21 + #include <linux/platform_device.h> 22 + #include <linux/regmap.h> 23 + 24 + static struct platform_driver syscon_driver; 25 + 26 + struct syscon { 27 + struct device *dev; 28 + void __iomem *base; 29 + struct regmap *regmap; 30 + }; 31 + 32 + static int syscon_match(struct device *dev, void *data) 33 + { 34 + struct syscon *syscon = dev_get_drvdata(dev); 35 + struct device_node *dn = data; 36 + 37 + return (syscon->dev->of_node == dn) ? 1 : 0; 38 + } 39 + 40 + struct regmap *syscon_node_to_regmap(struct device_node *np) 41 + { 42 + struct syscon *syscon; 43 + struct device *dev; 44 + 45 + dev = driver_find_device(&syscon_driver.driver, NULL, np, 46 + syscon_match); 47 + if (!dev) 48 + return ERR_PTR(-EPROBE_DEFER); 49 + 50 + syscon = dev_get_drvdata(dev); 51 + 52 + return syscon->regmap; 53 + } 54 + EXPORT_SYMBOL_GPL(syscon_node_to_regmap); 55 + 56 + struct regmap *syscon_regmap_lookup_by_compatible(const char *s) 57 + { 58 + struct device_node *syscon_np; 59 + struct regmap *regmap; 60 + 61 + syscon_np = of_find_compatible_node(NULL, NULL, s); 62 + if (!syscon_np) 63 + return ERR_PTR(-ENODEV); 64 + 65 + regmap = syscon_node_to_regmap(syscon_np); 66 + of_node_put(syscon_np); 67 + 68 + return regmap; 69 + } 70 + EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_compatible); 71 + 72 + struct regmap *syscon_regmap_lookup_by_phandle(struct device_node *np, 73 + const char *property) 74 + { 75 + struct device_node *syscon_np; 76 + struct regmap *regmap; 77 + 78 + syscon_np = of_parse_phandle(np, property, 0); 79 + if (!syscon_np) 80 + return ERR_PTR(-ENODEV); 81 + 82 + regmap = syscon_node_to_regmap(syscon_np); 83 + of_node_put(syscon_np); 84 + 85 + return regmap; 86 + } 87 + EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_phandle); 88 + 89 + static const struct of_device_id of_syscon_match[] = { 90 + { .compatible = "syscon", }, 91 + { }, 92 + }; 93 + 94 + static struct regmap_config syscon_regmap_config = { 95 + .reg_bits = 32, 96 + .val_bits = 32, 97 + .reg_stride = 4, 98 + }; 99 + 100 + static int __devinit syscon_probe(struct platform_device *pdev) 101 + { 102 + struct device *dev = &pdev->dev; 103 + struct device_node *np = dev->of_node; 104 + struct syscon *syscon; 105 + struct resource res; 106 + int ret; 107 + 108 + if (!np) 109 + return -ENOENT; 110 + 111 + syscon = devm_kzalloc(dev, sizeof(struct syscon), 112 + GFP_KERNEL); 113 + if (!syscon) 114 + return -ENOMEM; 115 + 116 + syscon->base = of_iomap(np, 0); 117 + if (!syscon->base) 118 + return -EADDRNOTAVAIL; 119 + 120 + ret = of_address_to_resource(np, 0, &res); 121 + if (ret) 122 + return ret; 123 + 124 + syscon_regmap_config.max_register = res.end - res.start - 3; 125 + syscon->regmap = devm_regmap_init_mmio(dev, syscon->base, 126 + &syscon_regmap_config); 127 + if (IS_ERR(syscon->regmap)) { 128 + dev_err(dev, "regmap init failed\n"); 129 + return PTR_ERR(syscon->regmap); 130 + } 131 + 132 + syscon->dev = dev; 133 + platform_set_drvdata(pdev, syscon); 134 + 135 + dev_info(dev, "syscon regmap start 0x%x end 0x%x registered\n", 136 + res.start, res.end); 137 + 138 + return 0; 139 + } 140 + 141 + static int __devexit syscon_remove(struct platform_device *pdev) 142 + { 143 + struct syscon *syscon; 144 + 145 + syscon = platform_get_drvdata(pdev); 146 + iounmap(syscon->base); 147 + platform_set_drvdata(pdev, NULL); 148 + 149 + return 0; 150 + } 151 + 152 + static struct platform_driver syscon_driver = { 153 + .driver = { 154 + .name = "syscon", 155 + .owner = THIS_MODULE, 156 + .of_match_table = of_syscon_match, 157 + }, 158 + .probe = syscon_probe, 159 + .remove = __devexit_p(syscon_remove), 160 + }; 161 + 162 + static int __init syscon_init(void) 163 + { 164 + return platform_driver_register(&syscon_driver); 165 + } 166 + postcore_initcall(syscon_init); 167 + 168 + static void __exit syscon_exit(void) 169 + { 170 + platform_driver_unregister(&syscon_driver); 171 + } 172 + module_exit(syscon_exit); 173 + 174 + MODULE_AUTHOR("Dong Aisheng <dong.aisheng@linaro.org>"); 175 + MODULE_DESCRIPTION("System Control driver"); 176 + MODULE_LICENSE("GPL v2");
+85 -27
drivers/mfd/tc3589x.c
··· 9 9 #include <linux/module.h> 10 10 #include <linux/interrupt.h> 11 11 #include <linux/irq.h> 12 + #include <linux/irqdomain.h> 12 13 #include <linux/slab.h> 13 14 #include <linux/i2c.h> 15 + #include <linux/of.h> 14 16 #include <linux/mfd/core.h> 15 17 #include <linux/mfd/tc3589x.h> 16 18 ··· 147 145 .name = "tc3589x-gpio", 148 146 .num_resources = ARRAY_SIZE(gpio_resources), 149 147 .resources = &gpio_resources[0], 148 + .of_compatible = "tc3589x-gpio", 150 149 }, 151 150 }; 152 151 ··· 156 153 .name = "tc3589x-keypad", 157 154 .num_resources = ARRAY_SIZE(keypad_resources), 158 155 .resources = &keypad_resources[0], 156 + .of_compatible = "tc3589x-keypad", 159 157 }, 160 158 }; 161 159 ··· 172 168 173 169 while (status) { 174 170 int bit = __ffs(status); 171 + int virq = irq_create_mapping(tc3589x->domain, bit); 175 172 176 - handle_nested_irq(tc3589x->irq_base + bit); 173 + handle_nested_irq(virq); 177 174 status &= ~(1 << bit); 178 175 } 179 176 ··· 191 186 return IRQ_HANDLED; 192 187 } 193 188 194 - static int tc3589x_irq_init(struct tc3589x *tc3589x) 189 + static int tc3589x_irq_map(struct irq_domain *d, unsigned int virq, 190 + irq_hw_number_t hwirq) 195 191 { 196 - int base = tc3589x->irq_base; 197 - int irq; 192 + struct tc3589x *tc3589x = d->host_data; 198 193 199 - for (irq = base; irq < base + TC3589x_NR_INTERNAL_IRQS; irq++) { 200 - irq_set_chip_data(irq, tc3589x); 201 - irq_set_chip_and_handler(irq, &dummy_irq_chip, 202 - handle_edge_irq); 203 - irq_set_nested_thread(irq, 1); 194 + irq_set_chip_data(virq, tc3589x); 195 + irq_set_chip_and_handler(virq, &dummy_irq_chip, 196 + handle_edge_irq); 197 + irq_set_nested_thread(virq, 1); 204 198 #ifdef CONFIG_ARM 205 - set_irq_flags(irq, IRQF_VALID); 199 + set_irq_flags(virq, IRQF_VALID); 206 200 #else 207 - irq_set_noprobe(irq); 201 + irq_set_noprobe(virq); 208 202 #endif 209 - } 210 203 211 204 return 0; 212 205 } 213 206 214 - static void tc3589x_irq_remove(struct tc3589x *tc3589x) 207 + static void tc3589x_irq_unmap(struct irq_domain *d, unsigned int virq) 208 + { 209 + #ifdef CONFIG_ARM 210 + set_irq_flags(virq, 0); 211 + #endif 212 + irq_set_chip_and_handler(virq, NULL, NULL); 213 + irq_set_chip_data(virq, NULL); 214 + } 215 + 216 + static struct irq_domain_ops tc3589x_irq_ops = { 217 + .map = tc3589x_irq_map, 218 + .unmap = tc3589x_irq_unmap, 219 + .xlate = irq_domain_xlate_twocell, 220 + }; 221 + 222 + static int tc3589x_irq_init(struct tc3589x *tc3589x, struct device_node *np) 215 223 { 216 224 int base = tc3589x->irq_base; 217 - int irq; 218 225 219 - for (irq = base; irq < base + TC3589x_NR_INTERNAL_IRQS; irq++) { 220 - #ifdef CONFIG_ARM 221 - set_irq_flags(irq, 0); 222 - #endif 223 - irq_set_chip_and_handler(irq, NULL, NULL); 224 - irq_set_chip_data(irq, NULL); 226 + if (base) { 227 + tc3589x->domain = irq_domain_add_legacy( 228 + NULL, TC3589x_NR_INTERNAL_IRQS, base, 229 + 0, &tc3589x_irq_ops, tc3589x); 225 230 } 231 + else { 232 + tc3589x->domain = irq_domain_add_linear( 233 + np, TC3589x_NR_INTERNAL_IRQS, 234 + &tc3589x_irq_ops, tc3589x); 235 + } 236 + 237 + if (!tc3589x->domain) { 238 + dev_err(tc3589x->dev, "Failed to create irqdomain\n"); 239 + return -ENOSYS; 240 + } 241 + 242 + return 0; 226 243 } 227 244 228 245 static int tc3589x_chip_init(struct tc3589x *tc3589x) ··· 290 263 if (blocks & TC3589x_BLOCK_GPIO) { 291 264 ret = mfd_add_devices(tc3589x->dev, -1, tc3589x_dev_gpio, 292 265 ARRAY_SIZE(tc3589x_dev_gpio), NULL, 293 - tc3589x->irq_base, NULL); 266 + tc3589x->irq_base, tc3589x->domain); 294 267 if (ret) { 295 268 dev_err(tc3589x->dev, "failed to add gpio child\n"); 296 269 return ret; ··· 301 274 if (blocks & TC3589x_BLOCK_KEYPAD) { 302 275 ret = mfd_add_devices(tc3589x->dev, -1, tc3589x_dev_keypad, 303 276 ARRAY_SIZE(tc3589x_dev_keypad), NULL, 304 - tc3589x->irq_base, NULL); 277 + tc3589x->irq_base, tc3589x->domain); 305 278 if (ret) { 306 279 dev_err(tc3589x->dev, "failed to keypad child\n"); 307 280 return ret; ··· 312 285 return ret; 313 286 } 314 287 288 + static int tc3589x_of_probe(struct device_node *np, 289 + struct tc3589x_platform_data *pdata) 290 + { 291 + struct device_node *child; 292 + 293 + for_each_child_of_node(np, child) { 294 + if (!strcmp(child->name, "tc3589x_gpio")) { 295 + pdata->block |= TC3589x_BLOCK_GPIO; 296 + } 297 + if (!strcmp(child->name, "tc3589x_keypad")) { 298 + pdata->block |= TC3589x_BLOCK_KEYPAD; 299 + } 300 + } 301 + 302 + return 0; 303 + } 304 + 315 305 static int __devinit tc3589x_probe(struct i2c_client *i2c, 316 306 const struct i2c_device_id *id) 317 307 { 318 308 struct tc3589x_platform_data *pdata = i2c->dev.platform_data; 309 + struct device_node *np = i2c->dev.of_node; 319 310 struct tc3589x *tc3589x; 320 311 int ret; 312 + 313 + if (!pdata) { 314 + if (np) { 315 + pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL); 316 + if (!pdata) 317 + return -ENOMEM; 318 + 319 + ret = tc3589x_of_probe(np, pdata); 320 + if (ret) 321 + return ret; 322 + } 323 + else { 324 + dev_err(&i2c->dev, "No platform data or DT found\n"); 325 + return -EINVAL; 326 + } 327 + } 321 328 322 329 if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_BYTE_DATA 323 330 | I2C_FUNC_SMBUS_I2C_BLOCK)) ··· 375 314 if (ret) 376 315 goto out_free; 377 316 378 - ret = tc3589x_irq_init(tc3589x); 317 + ret = tc3589x_irq_init(tc3589x, np); 379 318 if (ret) 380 319 goto out_free; 381 320 ··· 384 323 "tc3589x", tc3589x); 385 324 if (ret) { 386 325 dev_err(tc3589x->dev, "failed to request IRQ: %d\n", ret); 387 - goto out_removeirq; 326 + goto out_free; 388 327 } 389 328 390 329 ret = tc3589x_device_init(tc3589x); ··· 397 336 398 337 out_freeirq: 399 338 free_irq(tc3589x->i2c->irq, tc3589x); 400 - out_removeirq: 401 - tc3589x_irq_remove(tc3589x); 402 339 out_free: 403 340 kfree(tc3589x); 404 341 return ret; ··· 409 350 mfd_remove_devices(tc3589x->dev); 410 351 411 352 free_irq(tc3589x->i2c->irq, tc3589x); 412 - tc3589x_irq_remove(tc3589x); 413 353 414 354 kfree(tc3589x); 415 355
+1 -1
drivers/mfd/tps65090.c
··· 236 236 237 237 static bool is_volatile_reg(struct device *dev, unsigned int reg) 238 238 { 239 - if ((reg == TPS65090_INT_STS) || (reg == TPS65090_INT_STS)) 239 + if (reg == TPS65090_INT_STS) 240 240 return true; 241 241 else 242 242 return false;
+3
drivers/mfd/tps65217.c
··· 34 34 { 35 35 .name = "tps65217-pmic", 36 36 }, 37 + { 38 + .name = "tps65217-bl", 39 + }, 37 40 }; 38 41 39 42 /**
+19
drivers/mfd/tps6586x.c
··· 30 30 #include <linux/mfd/core.h> 31 31 #include <linux/mfd/tps6586x.h> 32 32 33 + #define TPS6586X_SUPPLYENE 0x14 34 + #define EXITSLREQ_BIT BIT(1) 35 + #define SLEEP_MODE_BIT BIT(3) 36 + 33 37 /* interrupt control registers */ 34 38 #define TPS6586X_INT_ACK1 0xb5 35 39 #define TPS6586X_INT_ACK2 0xb6 ··· 426 422 pdata->subdevs = devs; 427 423 pdata->gpio_base = -1; 428 424 pdata->irq_base = -1; 425 + pdata->pm_off = of_property_read_bool(np, "ti,system-power-controller"); 429 426 430 427 return pdata; 431 428 } ··· 458 453 .volatile_reg = is_volatile_reg, 459 454 .cache_type = REGCACHE_RBTREE, 460 455 }; 456 + 457 + static struct device *tps6586x_dev; 458 + static void tps6586x_power_off(void) 459 + { 460 + if (tps6586x_clr_bits(tps6586x_dev, TPS6586X_SUPPLYENE, EXITSLREQ_BIT)) 461 + return; 462 + 463 + tps6586x_set_bits(tps6586x_dev, TPS6586X_SUPPLYENE, SLEEP_MODE_BIT); 464 + } 461 465 462 466 static int __devinit tps6586x_i2c_probe(struct i2c_client *client, 463 467 const struct i2c_device_id *id) ··· 531 517 if (ret) { 532 518 dev_err(&client->dev, "add devices failed: %d\n", ret); 533 519 goto err_add_devs; 520 + } 521 + 522 + if (pdata->pm_off && !pm_power_off) { 523 + tps6586x_dev = &client->dev; 524 + pm_power_off = tps6586x_power_off; 534 525 } 535 526 536 527 return 0;
+32
drivers/mfd/tps65910.c
··· 24 24 #include <linux/mfd/tps65910.h> 25 25 #include <linux/of_device.h> 26 26 27 + static struct resource rtc_resources[] = { 28 + { 29 + .start = TPS65910_IRQ_RTC_ALARM, 30 + .end = TPS65910_IRQ_RTC_ALARM, 31 + .flags = IORESOURCE_IRQ, 32 + } 33 + }; 34 + 27 35 static struct mfd_cell tps65910s[] = { 28 36 { 29 37 .name = "tps65910-gpio", ··· 41 33 }, 42 34 { 43 35 .name = "tps65910-rtc", 36 + .num_resources = ARRAY_SIZE(rtc_resources), 37 + .resources = &rtc_resources[0], 44 38 }, 45 39 { 46 40 .name = "tps65910-power", ··· 208 198 209 199 board_info->irq = client->irq; 210 200 board_info->irq_base = -1; 201 + board_info->pm_off = of_property_read_bool(np, 202 + "ti,system-power-controller"); 211 203 212 204 return board_info; 213 205 } ··· 221 209 return NULL; 222 210 } 223 211 #endif 212 + 213 + static struct i2c_client *tps65910_i2c_client; 214 + static void tps65910_power_off(void) 215 + { 216 + struct tps65910 *tps65910; 217 + 218 + tps65910 = dev_get_drvdata(&tps65910_i2c_client->dev); 219 + 220 + if (tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL, 221 + DEVCTRL_PWR_OFF_MASK) < 0) 222 + return; 223 + 224 + tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL, 225 + DEVCTRL_DEV_ON_MASK); 226 + } 224 227 225 228 static __devinit int tps65910_i2c_probe(struct i2c_client *i2c, 226 229 const struct i2c_device_id *id) ··· 293 266 tps65910_irq_init(tps65910, init_data->irq, init_data); 294 267 tps65910_ck32k_init(tps65910, pmic_plat_data); 295 268 tps65910_sleepinit(tps65910, pmic_plat_data); 269 + 270 + if (pmic_plat_data->pm_off && !pm_power_off) { 271 + tps65910_i2c_client = i2c; 272 + pm_power_off = tps65910_power_off; 273 + } 296 274 297 275 return ret; 298 276 }
+64 -92
drivers/mfd/twl-core.c
··· 63 63 64 64 #define DRIVER_NAME "twl" 65 65 66 - #if defined(CONFIG_KEYBOARD_TWL4030) || defined(CONFIG_KEYBOARD_TWL4030_MODULE) 67 - #define twl_has_keypad() true 68 - #else 69 - #define twl_has_keypad() false 70 - #endif 71 - 72 - #if defined(CONFIG_GPIO_TWL4030) || defined(CONFIG_GPIO_TWL4030_MODULE) 73 - #define twl_has_gpio() true 74 - #else 75 - #define twl_has_gpio() false 76 - #endif 77 - 78 - #if defined(CONFIG_REGULATOR_TWL4030) \ 79 - || defined(CONFIG_REGULATOR_TWL4030_MODULE) 80 - #define twl_has_regulator() true 81 - #else 82 - #define twl_has_regulator() false 83 - #endif 84 - 85 - #if defined(CONFIG_TWL4030_MADC) || defined(CONFIG_TWL4030_MADC_MODULE) 86 - #define twl_has_madc() true 87 - #else 88 - #define twl_has_madc() false 89 - #endif 90 - 91 - #ifdef CONFIG_TWL4030_POWER 92 - #define twl_has_power() true 93 - #else 94 - #define twl_has_power() false 95 - #endif 96 - 97 - #if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE) 98 - #define twl_has_rtc() true 99 - #else 100 - #define twl_has_rtc() false 101 - #endif 102 - 103 - #if defined(CONFIG_TWL4030_USB) || defined(CONFIG_TWL4030_USB_MODULE) ||\ 104 - defined(CONFIG_TWL6030_USB) || defined(CONFIG_TWL6030_USB_MODULE) 105 - #define twl_has_usb() true 106 - #else 107 - #define twl_has_usb() false 108 - #endif 109 - 110 - #if defined(CONFIG_TWL4030_WATCHDOG) || \ 111 - defined(CONFIG_TWL4030_WATCHDOG_MODULE) 112 - #define twl_has_watchdog() true 113 - #else 114 - #define twl_has_watchdog() false 115 - #endif 116 - 117 - #if defined(CONFIG_MFD_TWL4030_AUDIO) || \ 118 - defined(CONFIG_MFD_TWL4030_AUDIO_MODULE) 119 - #define twl_has_codec() true 120 - #else 121 - #define twl_has_codec() false 122 - #endif 123 - 124 - #if defined(CONFIG_CHARGER_TWL4030) || defined(CONFIG_CHARGER_TWL4030_MODULE) 125 - #define twl_has_bci() true 126 - #else 127 - #define twl_has_bci() false 128 - #endif 129 - 130 66 /* Triton Core internal information (BEGIN) */ 131 67 132 68 /* Last - for index max*/ 133 69 #define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG 134 70 135 71 #define TWL_NUM_SLAVES 4 136 - 137 - #if defined(CONFIG_INPUT_TWL4030_PWRBUTTON) \ 138 - || defined(CONFIG_INPUT_TWL4030_PWRBUTTON_MODULE) 139 - #define twl_has_pwrbutton() true 140 - #else 141 - #define twl_has_pwrbutton() false 142 - #endif 143 72 144 73 #define SUB_CHIP_ID0 0 145 74 #define SUB_CHIP_ID1 1 ··· 481 552 } 482 553 EXPORT_SYMBOL_GPL(twl_get_version); 483 554 555 + /** 556 + * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate. 557 + * 558 + * Api to get the TWL HFCLK rate based on BOOT_CFG register. 559 + */ 560 + int twl_get_hfclk_rate(void) 561 + { 562 + u8 ctrl; 563 + int rate; 564 + 565 + twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT); 566 + 567 + switch (ctrl & 0x3) { 568 + case HFCLK_FREQ_19p2_MHZ: 569 + rate = 19200000; 570 + break; 571 + case HFCLK_FREQ_26_MHZ: 572 + rate = 26000000; 573 + break; 574 + case HFCLK_FREQ_38p4_MHZ: 575 + rate = 38400000; 576 + break; 577 + default: 578 + pr_err("TWL4030: HFCLK is not configured\n"); 579 + rate = -EINVAL; 580 + break; 581 + } 582 + 583 + return rate; 584 + } 585 + EXPORT_SYMBOL_GPL(twl_get_hfclk_rate); 586 + 484 587 static struct device * 485 588 add_numbered_child(unsigned chip, const char *name, int num, 486 589 void *pdata, unsigned pdata_len, ··· 630 669 struct device *child; 631 670 unsigned sub_chip_id; 632 671 633 - if (twl_has_gpio() && pdata->gpio) { 672 + if (IS_ENABLED(CONFIG_GPIO_TWL4030) && pdata->gpio) { 634 673 child = add_child(SUB_CHIP_ID1, "twl4030_gpio", 635 674 pdata->gpio, sizeof(*pdata->gpio), 636 675 false, irq_base + GPIO_INTR_OFFSET, 0); ··· 638 677 return PTR_ERR(child); 639 678 } 640 679 641 - if (twl_has_keypad() && pdata->keypad) { 680 + if (IS_ENABLED(CONFIG_KEYBOARD_TWL4030) && pdata->keypad) { 642 681 child = add_child(SUB_CHIP_ID2, "twl4030_keypad", 643 682 pdata->keypad, sizeof(*pdata->keypad), 644 683 true, irq_base + KEYPAD_INTR_OFFSET, 0); ··· 646 685 return PTR_ERR(child); 647 686 } 648 687 649 - if (twl_has_madc() && pdata->madc) { 688 + if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc) { 650 689 child = add_child(2, "twl4030_madc", 651 690 pdata->madc, sizeof(*pdata->madc), 652 691 true, irq_base + MADC_INTR_OFFSET, 0); ··· 654 693 return PTR_ERR(child); 655 694 } 656 695 657 - if (twl_has_rtc()) { 696 + if (IS_ENABLED(CONFIG_RTC_DRV_TWL4030)) { 658 697 /* 659 698 * REVISIT platform_data here currently might expose the 660 699 * "msecure" line ... but for now we just expect board ··· 670 709 return PTR_ERR(child); 671 710 } 672 711 673 - if (twl_has_usb() && pdata->usb && twl_class_is_4030()) { 712 + if (IS_ENABLED(CONFIG_PWM_TWL6030) && twl_class_is_6030()) { 713 + child = add_child(TWL6030_MODULE_ID1, "twl6030-pwm", NULL, 0, 714 + false, 0, 0); 715 + if (IS_ERR(child)) 716 + return PTR_ERR(child); 717 + } 718 + 719 + if (IS_ENABLED(CONFIG_TWL4030_USB) && pdata->usb && 720 + twl_class_is_4030()) { 674 721 675 722 static struct regulator_consumer_supply usb1v5 = { 676 723 .supply = "usb1v5", ··· 692 723 }; 693 724 694 725 /* First add the regulators so that they can be used by transceiver */ 695 - if (twl_has_regulator()) { 726 + if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) { 696 727 /* this is a template that gets copied */ 697 728 struct regulator_init_data usb_fixed = { 698 729 .constraints.valid_modes_mask = ··· 734 765 return PTR_ERR(child); 735 766 736 767 /* we need to connect regulators to this transceiver */ 737 - if (twl_has_regulator() && child) { 768 + if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child) { 738 769 usb1v5.dev_name = dev_name(child); 739 770 usb1v8.dev_name = dev_name(child); 740 771 usb3v1[0].dev_name = dev_name(child); 741 772 } 742 773 } 743 - if (twl_has_usb() && pdata->usb && twl_class_is_6030()) { 774 + if (IS_ENABLED(CONFIG_TWL6030_USB) && pdata->usb && 775 + twl_class_is_6030()) { 744 776 745 777 static struct regulator_consumer_supply usb3v3; 746 778 int regulator; 747 779 748 - if (twl_has_regulator()) { 780 + if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) { 749 781 /* this is a template that gets copied */ 750 782 struct regulator_init_data usb_fixed = { 751 783 .constraints.valid_modes_mask = ··· 783 813 if (IS_ERR(child)) 784 814 return PTR_ERR(child); 785 815 /* we need to connect regulators to this transceiver */ 786 - if (twl_has_regulator() && child) 816 + if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child) 787 817 usb3v3.dev_name = dev_name(child); 788 - } else if (twl_has_regulator() && twl_class_is_6030()) { 818 + } else if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && 819 + twl_class_is_6030()) { 789 820 if (features & TWL6025_SUBCLASS) 790 821 child = add_regulator(TWL6025_REG_LDOUSB, 791 822 pdata->ldousb, features); ··· 798 827 return PTR_ERR(child); 799 828 } 800 829 801 - if (twl_has_watchdog() && twl_class_is_4030()) { 830 + if (IS_ENABLED(CONFIG_TWL4030_WATCHDOG) && twl_class_is_4030()) { 802 831 child = add_child(0, "twl4030_wdt", NULL, 0, false, 0, 0); 803 832 if (IS_ERR(child)) 804 833 return PTR_ERR(child); 805 834 } 806 835 807 - if (twl_has_pwrbutton() && twl_class_is_4030()) { 836 + if (IS_ENABLED(CONFIG_INPUT_TWL4030_PWRBUTTON) && twl_class_is_4030()) { 808 837 child = add_child(1, "twl4030_pwrbutton", 809 838 NULL, 0, true, irq_base + 8 + 0, 0); 810 839 if (IS_ERR(child)) 811 840 return PTR_ERR(child); 812 841 } 813 842 814 - if (twl_has_codec() && pdata->audio && twl_class_is_4030()) { 843 + if (IS_ENABLED(CONFIG_MFD_TWL4030_AUDIO) && pdata->audio && 844 + twl_class_is_4030()) { 815 845 sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid; 816 846 child = add_child(sub_chip_id, "twl4030-audio", 817 847 pdata->audio, sizeof(*pdata->audio), ··· 822 850 } 823 851 824 852 /* twl4030 regulators */ 825 - if (twl_has_regulator() && twl_class_is_4030()) { 853 + if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_4030()) { 826 854 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1, 827 855 features); 828 856 if (IS_ERR(child)) ··· 877 905 } 878 906 879 907 /* maybe add LDOs that are omitted on cost-reduced parts */ 880 - if (twl_has_regulator() && !(features & TPS_SUBSET) 908 + if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && !(features & TPS_SUBSET) 881 909 && twl_class_is_4030()) { 882 910 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2, 883 911 features); ··· 911 939 } 912 940 913 941 /* twl6030 regulators */ 914 - if (twl_has_regulator() && twl_class_is_6030() && 942 + if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_6030() && 915 943 !(features & TWL6025_SUBCLASS)) { 916 944 child = add_regulator(TWL6030_REG_VDD1, pdata->vdd1, 917 945 features); ··· 985 1013 } 986 1014 987 1015 /* 6030 and 6025 share this regulator */ 988 - if (twl_has_regulator() && twl_class_is_6030()) { 1016 + if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_6030()) { 989 1017 child = add_regulator(TWL6030_REG_VANA, pdata->vana, 990 1018 features); 991 1019 if (IS_ERR(child)) ··· 993 1021 } 994 1022 995 1023 /* twl6025 regulators */ 996 - if (twl_has_regulator() && twl_class_is_6030() && 1024 + if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_6030() && 997 1025 (features & TWL6025_SUBCLASS)) { 998 1026 child = add_regulator(TWL6025_REG_LDO5, pdata->ldo5, 999 1027 features); ··· 1052 1080 1053 1081 } 1054 1082 1055 - if (twl_has_bci() && pdata->bci && 1083 + if (IS_ENABLED(CONFIG_CHARGER_TWL4030) && pdata->bci && 1056 1084 !(features & (TPS_SUBSET | TWL5031))) { 1057 1085 child = add_child(3, "twl4030_bci", 1058 1086 pdata->bci, sizeof(*pdata->bci), false, ··· 1267 1295 } 1268 1296 1269 1297 /* load power event scripts */ 1270 - if (twl_has_power() && pdata->power) 1298 + if (IS_ENABLED(CONFIG_TWL4030_POWER) && pdata->power) 1271 1299 twl4030_power_init(pdata->power); 1272 1300 1273 1301 /* Maybe init the T2 Interrupt subsystem */
+70 -35
drivers/mfd/twl4030-audio.c
··· 28 28 #include <linux/kernel.h> 29 29 #include <linux/fs.h> 30 30 #include <linux/platform_device.h> 31 + #include <linux/of.h> 32 + #include <linux/of_platform.h> 31 33 #include <linux/i2c/twl.h> 32 34 #include <linux/mfd/core.h> 33 35 #include <linux/mfd/twl4030-audio.h> ··· 158 156 } 159 157 EXPORT_SYMBOL_GPL(twl4030_audio_get_mclk); 160 158 159 + static bool twl4030_audio_has_codec(struct twl4030_audio_data *pdata, 160 + struct device_node *node) 161 + { 162 + if (pdata && pdata->codec) 163 + return true; 164 + 165 + if (of_find_node_by_name(node, "codec")) 166 + return true; 167 + 168 + return false; 169 + } 170 + 171 + static bool twl4030_audio_has_vibra(struct twl4030_audio_data *pdata, 172 + struct device_node *node) 173 + { 174 + int vibra; 175 + 176 + if (pdata && pdata->vibra) 177 + return true; 178 + 179 + if (!of_property_read_u32(node, "ti,enable-vibra", &vibra) && vibra) 180 + return true; 181 + 182 + return false; 183 + } 184 + 161 185 static int __devinit twl4030_audio_probe(struct platform_device *pdev) 162 186 { 163 187 struct twl4030_audio *audio; 164 188 struct twl4030_audio_data *pdata = pdev->dev.platform_data; 189 + struct device_node *node = pdev->dev.of_node; 165 190 struct mfd_cell *cell = NULL; 166 191 int ret, childs = 0; 167 192 u8 val; 168 193 169 - if (!pdata) { 194 + if (!pdata && !node) { 170 195 dev_err(&pdev->dev, "Platform data is missing\n"); 171 196 return -EINVAL; 172 197 } 173 198 199 + audio = devm_kzalloc(&pdev->dev, sizeof(struct twl4030_audio), 200 + GFP_KERNEL); 201 + if (!audio) 202 + return -ENOMEM; 203 + 204 + mutex_init(&audio->mutex); 205 + audio->audio_mclk = twl_get_hfclk_rate(); 206 + 174 207 /* Configure APLL_INFREQ and disable APLL if enabled */ 175 - val = 0; 176 - switch (pdata->audio_mclk) { 208 + switch (audio->audio_mclk) { 177 209 case 19200000: 178 - val |= TWL4030_APLL_INFREQ_19200KHZ; 210 + val = TWL4030_APLL_INFREQ_19200KHZ; 179 211 break; 180 212 case 26000000: 181 - val |= TWL4030_APLL_INFREQ_26000KHZ; 213 + val = TWL4030_APLL_INFREQ_26000KHZ; 182 214 break; 183 215 case 38400000: 184 - val |= TWL4030_APLL_INFREQ_38400KHZ; 216 + val = TWL4030_APLL_INFREQ_38400KHZ; 185 217 break; 186 218 default: 187 219 dev_err(&pdev->dev, "Invalid audio_mclk\n"); 188 220 return -EINVAL; 189 221 } 190 - twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 191 - val, TWL4030_REG_APLL_CTL); 192 - 193 - audio = kzalloc(sizeof(struct twl4030_audio), GFP_KERNEL); 194 - if (!audio) 195 - return -ENOMEM; 196 - 197 - platform_set_drvdata(pdev, audio); 198 - 199 - twl4030_audio_dev = pdev; 200 - mutex_init(&audio->mutex); 201 - audio->audio_mclk = pdata->audio_mclk; 222 + twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, val, TWL4030_REG_APLL_CTL); 202 223 203 224 /* Codec power */ 204 225 audio->resource[TWL4030_AUDIO_RES_POWER].reg = TWL4030_REG_CODEC_MODE; ··· 231 206 audio->resource[TWL4030_AUDIO_RES_APLL].reg = TWL4030_REG_APLL_CTL; 232 207 audio->resource[TWL4030_AUDIO_RES_APLL].mask = TWL4030_APLL_EN; 233 208 234 - if (pdata->codec) { 209 + if (twl4030_audio_has_codec(pdata, node)) { 235 210 cell = &audio->cells[childs]; 236 211 cell->name = "twl4030-codec"; 237 - cell->platform_data = pdata->codec; 238 - cell->pdata_size = sizeof(*pdata->codec); 212 + if (pdata) { 213 + cell->platform_data = pdata->codec; 214 + cell->pdata_size = sizeof(*pdata->codec); 215 + } 239 216 childs++; 240 217 } 241 - if (pdata->vibra) { 218 + if (twl4030_audio_has_vibra(pdata, node)) { 242 219 cell = &audio->cells[childs]; 243 220 cell->name = "twl4030-vibra"; 244 - cell->platform_data = pdata->vibra; 245 - cell->pdata_size = sizeof(*pdata->vibra); 221 + if (pdata) { 222 + cell->platform_data = pdata->vibra; 223 + cell->pdata_size = sizeof(*pdata->vibra); 224 + } 246 225 childs++; 247 226 } 227 + 228 + platform_set_drvdata(pdev, audio); 229 + twl4030_audio_dev = pdev; 248 230 249 231 if (childs) 250 232 ret = mfd_add_devices(&pdev->dev, pdev->id, audio->cells, ··· 261 229 ret = -ENODEV; 262 230 } 263 231 264 - if (!ret) 265 - return 0; 232 + if (ret) { 233 + platform_set_drvdata(pdev, NULL); 234 + twl4030_audio_dev = NULL; 235 + } 266 236 267 - platform_set_drvdata(pdev, NULL); 268 - kfree(audio); 269 - twl4030_audio_dev = NULL; 270 237 return ret; 271 238 } 272 239 273 240 static int __devexit twl4030_audio_remove(struct platform_device *pdev) 274 241 { 275 - struct twl4030_audio *audio = platform_get_drvdata(pdev); 276 - 277 242 mfd_remove_devices(&pdev->dev); 278 243 platform_set_drvdata(pdev, NULL); 279 - kfree(audio); 280 244 twl4030_audio_dev = NULL; 281 245 282 246 return 0; 283 247 } 284 248 285 - MODULE_ALIAS("platform:twl4030-audio"); 249 + static const struct of_device_id twl4030_audio_of_match[] = { 250 + {.compatible = "ti,twl4030-audio", }, 251 + { }, 252 + }; 253 + MODULE_DEVICE_TABLE(of, twl4030_audio_of_match); 286 254 287 255 static struct platform_driver twl4030_audio_driver = { 288 - .probe = twl4030_audio_probe, 289 - .remove = __devexit_p(twl4030_audio_remove), 290 256 .driver = { 291 257 .owner = THIS_MODULE, 292 258 .name = "twl4030-audio", 259 + .of_match_table = twl4030_audio_of_match, 293 260 }, 261 + .probe = twl4030_audio_probe, 262 + .remove = __devexit_p(twl4030_audio_remove), 294 263 }; 295 264 296 265 module_platform_driver(twl4030_audio_driver); 297 266 298 267 MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>"); 268 + MODULE_DESCRIPTION("TWL4030 audio block MFD driver"); 299 269 MODULE_LICENSE("GPL"); 270 + MODULE_ALIAS("platform:twl4030-audio");
-165
drivers/mfd/twl6030-pwm.c
··· 1 - /* 2 - * twl6030_pwm.c 3 - * Driver for PHOENIX (TWL6030) Pulse Width Modulator 4 - * 5 - * Copyright (C) 2010 Texas Instruments 6 - * Author: Hemanth V <hemanthv@ti.com> 7 - * 8 - * This program is free software; you can redistribute it and/or modify it 9 - * under the terms of the GNU General Public License version 2 as published by 10 - * the Free Software Foundation. 11 - * 12 - * This program is distributed in the hope that it will be useful, but WITHOUT 13 - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 - * more details. 16 - * 17 - * You should have received a copy of the GNU General Public License along with 18 - * this program. If not, see <http://www.gnu.org/licenses/>. 19 - */ 20 - 21 - #include <linux/module.h> 22 - #include <linux/platform_device.h> 23 - #include <linux/i2c/twl.h> 24 - #include <linux/slab.h> 25 - 26 - #define LED_PWM_CTRL1 0xF4 27 - #define LED_PWM_CTRL2 0xF5 28 - 29 - /* Max value for CTRL1 register */ 30 - #define PWM_CTRL1_MAX 255 31 - 32 - /* Pull down disable */ 33 - #define PWM_CTRL2_DIS_PD (1 << 6) 34 - 35 - /* Current control 2.5 milli Amps */ 36 - #define PWM_CTRL2_CURR_02 (2 << 4) 37 - 38 - /* LED supply source */ 39 - #define PWM_CTRL2_SRC_VAC (1 << 2) 40 - 41 - /* LED modes */ 42 - #define PWM_CTRL2_MODE_HW (0 << 0) 43 - #define PWM_CTRL2_MODE_SW (1 << 0) 44 - #define PWM_CTRL2_MODE_DIS (2 << 0) 45 - 46 - #define PWM_CTRL2_MODE_MASK 0x3 47 - 48 - struct pwm_device { 49 - const char *label; 50 - unsigned int pwm_id; 51 - }; 52 - 53 - int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) 54 - { 55 - u8 duty_cycle; 56 - int ret; 57 - 58 - if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) 59 - return -EINVAL; 60 - 61 - duty_cycle = (duty_ns * PWM_CTRL1_MAX) / period_ns; 62 - 63 - ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, duty_cycle, LED_PWM_CTRL1); 64 - 65 - if (ret < 0) { 66 - pr_err("%s: Failed to configure PWM, Error %d\n", 67 - pwm->label, ret); 68 - return ret; 69 - } 70 - return 0; 71 - } 72 - EXPORT_SYMBOL(pwm_config); 73 - 74 - int pwm_enable(struct pwm_device *pwm) 75 - { 76 - u8 val; 77 - int ret; 78 - 79 - ret = twl_i2c_read_u8(TWL6030_MODULE_ID1, &val, LED_PWM_CTRL2); 80 - if (ret < 0) { 81 - pr_err("%s: Failed to enable PWM, Error %d\n", pwm->label, ret); 82 - return ret; 83 - } 84 - 85 - /* Change mode to software control */ 86 - val &= ~PWM_CTRL2_MODE_MASK; 87 - val |= PWM_CTRL2_MODE_SW; 88 - 89 - ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, val, LED_PWM_CTRL2); 90 - if (ret < 0) { 91 - pr_err("%s: Failed to enable PWM, Error %d\n", pwm->label, ret); 92 - return ret; 93 - } 94 - 95 - twl_i2c_read_u8(TWL6030_MODULE_ID1, &val, LED_PWM_CTRL2); 96 - return 0; 97 - } 98 - EXPORT_SYMBOL(pwm_enable); 99 - 100 - void pwm_disable(struct pwm_device *pwm) 101 - { 102 - u8 val; 103 - int ret; 104 - 105 - ret = twl_i2c_read_u8(TWL6030_MODULE_ID1, &val, LED_PWM_CTRL2); 106 - if (ret < 0) { 107 - pr_err("%s: Failed to disable PWM, Error %d\n", 108 - pwm->label, ret); 109 - return; 110 - } 111 - 112 - val &= ~PWM_CTRL2_MODE_MASK; 113 - val |= PWM_CTRL2_MODE_HW; 114 - 115 - ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, val, LED_PWM_CTRL2); 116 - if (ret < 0) { 117 - pr_err("%s: Failed to disable PWM, Error %d\n", 118 - pwm->label, ret); 119 - return; 120 - } 121 - return; 122 - } 123 - EXPORT_SYMBOL(pwm_disable); 124 - 125 - struct pwm_device *pwm_request(int pwm_id, const char *label) 126 - { 127 - u8 val; 128 - int ret; 129 - struct pwm_device *pwm; 130 - 131 - pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL); 132 - if (pwm == NULL) { 133 - pr_err("%s: failed to allocate memory\n", label); 134 - return NULL; 135 - } 136 - 137 - pwm->label = label; 138 - pwm->pwm_id = pwm_id; 139 - 140 - /* Configure PWM */ 141 - val = PWM_CTRL2_DIS_PD | PWM_CTRL2_CURR_02 | PWM_CTRL2_SRC_VAC | 142 - PWM_CTRL2_MODE_HW; 143 - 144 - ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, val, LED_PWM_CTRL2); 145 - 146 - if (ret < 0) { 147 - pr_err("%s: Failed to configure PWM, Error %d\n", 148 - pwm->label, ret); 149 - 150 - kfree(pwm); 151 - return NULL; 152 - } 153 - 154 - return pwm; 155 - } 156 - EXPORT_SYMBOL(pwm_request); 157 - 158 - void pwm_free(struct pwm_device *pwm) 159 - { 160 - pwm_disable(pwm); 161 - kfree(pwm); 162 - } 163 - EXPORT_SYMBOL(pwm_free); 164 - 165 - MODULE_LICENSE("GPL");
+16 -1
drivers/mfd/twl6040-core.c
··· 584 584 goto irq_init_err; 585 585 586 586 ret = request_threaded_irq(twl6040->irq_base + TWL6040_IRQ_READY, 587 - NULL, twl6040_naudint_handler, 0, 587 + NULL, twl6040_naudint_handler, IRQF_ONESHOT, 588 588 "twl6040_irq_ready", twl6040); 589 589 if (ret) { 590 590 dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ··· 627 627 if (pdata && pdata->vibra) { 628 628 cell->platform_data = pdata->vibra; 629 629 cell->pdata_size = sizeof(*pdata->vibra); 630 + } 631 + children++; 632 + } 633 + 634 + /* 635 + * Enable the GPO driver in the following cases: 636 + * DT booted kernel or legacy boot with valid gpo platform_data 637 + */ 638 + if (!pdata || (pdata && pdata->gpo)) { 639 + cell = &twl6040->cells[children]; 640 + cell->name = "twl6040-gpo"; 641 + 642 + if (pdata) { 643 + cell->platform_data = pdata->gpo; 644 + cell->pdata_size = sizeof(*pdata->gpo); 630 645 } 631 646 children++; 632 647 }
+95 -1
drivers/mfd/wm5110-tables.c
··· 133 133 { 0x209, 0x002A }, 134 134 }; 135 135 136 + static const struct reg_default wm5110_revb_patch[] = { 137 + { 0x80, 0x3 }, 138 + { 0x36e, 0x0210 }, 139 + { 0x370, 0x0210 }, 140 + { 0x372, 0x0210 }, 141 + { 0x374, 0x0210 }, 142 + { 0x376, 0x0210 }, 143 + { 0x378, 0x0210 }, 144 + { 0x36d, 0x0028 }, 145 + { 0x36f, 0x0028 }, 146 + { 0x371, 0x0028 }, 147 + { 0x373, 0x0028 }, 148 + { 0x375, 0x0028 }, 149 + { 0x377, 0x0028 }, 150 + { 0x280, 0x2002 }, 151 + { 0x44, 0x20 }, 152 + { 0x45, 0x40 }, 153 + { 0x46, 0x60 }, 154 + { 0x47, 0x80 }, 155 + { 0x48, 0xa0 }, 156 + { 0x51, 0x13 }, 157 + { 0x52, 0x33 }, 158 + { 0x53, 0x53 }, 159 + { 0x54, 0x73 }, 160 + { 0x55, 0x93 }, 161 + { 0x56, 0xb3 }, 162 + { 0xc30, 0x3e3e }, 163 + { 0xc31, 0x3e }, 164 + { 0xc32, 0x3e3e }, 165 + { 0xc33, 0x3e3e }, 166 + { 0xc34, 0x3e3e }, 167 + { 0xc35, 0x3e3e }, 168 + { 0xc36, 0x3e3e }, 169 + { 0xc37, 0x3e3e }, 170 + { 0xc38, 0x3e3e }, 171 + { 0xc39, 0x3e3e }, 172 + { 0xc3a, 0x3e3e }, 173 + { 0xc3b, 0x3e3e }, 174 + { 0xc3c, 0x3e }, 175 + { 0x201, 0x18a5 }, 176 + { 0x202, 0x4100 }, 177 + { 0x460, 0x0c40 }, 178 + { 0x461, 0x8000 }, 179 + { 0x462, 0x0c41 }, 180 + { 0x463, 0x4820 }, 181 + { 0x464, 0x0c41 }, 182 + { 0x465, 0x4040 }, 183 + { 0x466, 0x0841 }, 184 + { 0x467, 0x3940 }, 185 + { 0x468, 0x0841 }, 186 + { 0x469, 0x2030 }, 187 + { 0x46a, 0x0842 }, 188 + { 0x46b, 0x1990 }, 189 + { 0x46c, 0x08c2 }, 190 + { 0x46d, 0x1450 }, 191 + { 0x46e, 0x08c6 }, 192 + { 0x46f, 0x1020 }, 193 + { 0x470, 0x08c6 }, 194 + { 0x471, 0x0cd0 }, 195 + { 0x472, 0x08c6 }, 196 + { 0x473, 0x0a30 }, 197 + { 0x474, 0x0442 }, 198 + { 0x475, 0x0660 }, 199 + { 0x476, 0x0446 }, 200 + { 0x477, 0x0510 }, 201 + { 0x478, 0x04c6 }, 202 + { 0x479, 0x0400 }, 203 + { 0x47a, 0x04ce }, 204 + { 0x47b, 0x0330 }, 205 + { 0x47c, 0x05df }, 206 + { 0x47d, 0x0001 }, 207 + { 0x47e, 0x07ff }, 208 + { 0x2db, 0x0a00 }, 209 + { 0x2dd, 0x0023 }, 210 + { 0x2df, 0x0102 }, 211 + { 0x2ef, 0x924 }, 212 + { 0x2f0, 0x924 }, 213 + { 0x2f1, 0x924 }, 214 + { 0x2f2, 0x924 }, 215 + { 0x2f3, 0x924 }, 216 + { 0x2f4, 0x924 }, 217 + { 0x2eb, 0x60 }, 218 + { 0x2ec, 0x60 }, 219 + { 0x2ed, 0x60 }, 220 + { 0x4f2, 0x33e }, 221 + { 0x458, 0x0000 }, 222 + { 0x15a, 0x0003 }, 223 + { 0x80, 0x0 }, 224 + }; 225 + 136 226 /* We use a function so we can use ARRAY_SIZE() */ 137 227 int wm5110_patch(struct arizona *arizona) 138 228 { 139 229 switch (arizona->rev) { 140 230 case 0: 141 - case 1: 142 231 return regmap_register_patch(arizona->regmap, 143 232 wm5110_reva_patch, 144 233 ARRAY_SIZE(wm5110_reva_patch)); 234 + case 1: 235 + return regmap_register_patch(arizona->regmap, 236 + wm5110_revb_patch, 237 + ARRAY_SIZE(wm5110_revb_patch)); 238 + 145 239 default: 146 240 return 0; 147 241 }
+20 -46
drivers/mfd/wm831x-core.c
··· 614 614 } 615 615 EXPORT_SYMBOL_GPL(wm831x_set_bits); 616 616 617 - static struct resource wm831x_io_parent = { 618 - .start = 0, 619 - .end = 0xffffffff, 620 - .flags = IORESOURCE_IO, 621 - }; 622 - 623 617 static struct resource wm831x_dcdc1_resources[] = { 624 618 { 625 - .parent = &wm831x_io_parent, 626 619 .start = WM831X_DC1_CONTROL_1, 627 620 .end = WM831X_DC1_DVS_CONTROL, 628 - .flags = IORESOURCE_IO, 621 + .flags = IORESOURCE_REG, 629 622 }, 630 623 { 631 624 .name = "UV", ··· 637 644 638 645 static struct resource wm831x_dcdc2_resources[] = { 639 646 { 640 - .parent = &wm831x_io_parent, 641 647 .start = WM831X_DC2_CONTROL_1, 642 648 .end = WM831X_DC2_DVS_CONTROL, 643 - .flags = IORESOURCE_IO, 649 + .flags = IORESOURCE_REG, 644 650 }, 645 651 { 646 652 .name = "UV", ··· 657 665 658 666 static struct resource wm831x_dcdc3_resources[] = { 659 667 { 660 - .parent = &wm831x_io_parent, 661 668 .start = WM831X_DC3_CONTROL_1, 662 669 .end = WM831X_DC3_SLEEP_CONTROL, 663 - .flags = IORESOURCE_IO, 670 + .flags = IORESOURCE_REG, 664 671 }, 665 672 { 666 673 .name = "UV", ··· 671 680 672 681 static struct resource wm831x_dcdc4_resources[] = { 673 682 { 674 - .parent = &wm831x_io_parent, 675 683 .start = WM831X_DC4_CONTROL, 676 684 .end = WM831X_DC4_SLEEP_CONTROL, 677 - .flags = IORESOURCE_IO, 685 + .flags = IORESOURCE_REG, 678 686 }, 679 687 { 680 688 .name = "UV", ··· 685 695 686 696 static struct resource wm8320_dcdc4_buck_resources[] = { 687 697 { 688 - .parent = &wm831x_io_parent, 689 698 .start = WM831X_DC4_CONTROL, 690 699 .end = WM832X_DC4_SLEEP_CONTROL, 691 - .flags = IORESOURCE_IO, 700 + .flags = IORESOURCE_REG, 692 701 }, 693 702 { 694 703 .name = "UV", ··· 707 718 708 719 static struct resource wm831x_isink1_resources[] = { 709 720 { 710 - .parent = &wm831x_io_parent, 711 721 .start = WM831X_CURRENT_SINK_1, 712 722 .end = WM831X_CURRENT_SINK_1, 713 - .flags = IORESOURCE_IO, 723 + .flags = IORESOURCE_REG, 714 724 }, 715 725 { 716 726 .start = WM831X_IRQ_CS1, ··· 720 732 721 733 static struct resource wm831x_isink2_resources[] = { 722 734 { 723 - .parent = &wm831x_io_parent, 724 735 .start = WM831X_CURRENT_SINK_2, 725 736 .end = WM831X_CURRENT_SINK_2, 726 - .flags = IORESOURCE_IO, 737 + .flags = IORESOURCE_REG, 727 738 }, 728 739 { 729 740 .start = WM831X_IRQ_CS2, ··· 733 746 734 747 static struct resource wm831x_ldo1_resources[] = { 735 748 { 736 - .parent = &wm831x_io_parent, 737 749 .start = WM831X_LDO1_CONTROL, 738 750 .end = WM831X_LDO1_SLEEP_CONTROL, 739 - .flags = IORESOURCE_IO, 751 + .flags = IORESOURCE_REG, 740 752 }, 741 753 { 742 754 .name = "UV", ··· 747 761 748 762 static struct resource wm831x_ldo2_resources[] = { 749 763 { 750 - .parent = &wm831x_io_parent, 751 764 .start = WM831X_LDO2_CONTROL, 752 765 .end = WM831X_LDO2_SLEEP_CONTROL, 753 - .flags = IORESOURCE_IO, 766 + .flags = IORESOURCE_REG, 754 767 }, 755 768 { 756 769 .name = "UV", ··· 761 776 762 777 static struct resource wm831x_ldo3_resources[] = { 763 778 { 764 - .parent = &wm831x_io_parent, 765 779 .start = WM831X_LDO3_CONTROL, 766 780 .end = WM831X_LDO3_SLEEP_CONTROL, 767 - .flags = IORESOURCE_IO, 781 + .flags = IORESOURCE_REG, 768 782 }, 769 783 { 770 784 .name = "UV", ··· 775 791 776 792 static struct resource wm831x_ldo4_resources[] = { 777 793 { 778 - .parent = &wm831x_io_parent, 779 794 .start = WM831X_LDO4_CONTROL, 780 795 .end = WM831X_LDO4_SLEEP_CONTROL, 781 - .flags = IORESOURCE_IO, 796 + .flags = IORESOURCE_REG, 782 797 }, 783 798 { 784 799 .name = "UV", ··· 789 806 790 807 static struct resource wm831x_ldo5_resources[] = { 791 808 { 792 - .parent = &wm831x_io_parent, 793 809 .start = WM831X_LDO5_CONTROL, 794 810 .end = WM831X_LDO5_SLEEP_CONTROL, 795 - .flags = IORESOURCE_IO, 811 + .flags = IORESOURCE_REG, 796 812 }, 797 813 { 798 814 .name = "UV", ··· 803 821 804 822 static struct resource wm831x_ldo6_resources[] = { 805 823 { 806 - .parent = &wm831x_io_parent, 807 824 .start = WM831X_LDO6_CONTROL, 808 825 .end = WM831X_LDO6_SLEEP_CONTROL, 809 - .flags = IORESOURCE_IO, 826 + .flags = IORESOURCE_REG, 810 827 }, 811 828 { 812 829 .name = "UV", ··· 817 836 818 837 static struct resource wm831x_ldo7_resources[] = { 819 838 { 820 - .parent = &wm831x_io_parent, 821 839 .start = WM831X_LDO7_CONTROL, 822 840 .end = WM831X_LDO7_SLEEP_CONTROL, 823 - .flags = IORESOURCE_IO, 841 + .flags = IORESOURCE_REG, 824 842 }, 825 843 { 826 844 .name = "UV", ··· 831 851 832 852 static struct resource wm831x_ldo8_resources[] = { 833 853 { 834 - .parent = &wm831x_io_parent, 835 854 .start = WM831X_LDO8_CONTROL, 836 855 .end = WM831X_LDO8_SLEEP_CONTROL, 837 - .flags = IORESOURCE_IO, 856 + .flags = IORESOURCE_REG, 838 857 }, 839 858 { 840 859 .name = "UV", ··· 845 866 846 867 static struct resource wm831x_ldo9_resources[] = { 847 868 { 848 - .parent = &wm831x_io_parent, 849 869 .start = WM831X_LDO9_CONTROL, 850 870 .end = WM831X_LDO9_SLEEP_CONTROL, 851 - .flags = IORESOURCE_IO, 871 + .flags = IORESOURCE_REG, 852 872 }, 853 873 { 854 874 .name = "UV", ··· 859 881 860 882 static struct resource wm831x_ldo10_resources[] = { 861 883 { 862 - .parent = &wm831x_io_parent, 863 884 .start = WM831X_LDO10_CONTROL, 864 885 .end = WM831X_LDO10_SLEEP_CONTROL, 865 - .flags = IORESOURCE_IO, 886 + .flags = IORESOURCE_REG, 866 887 }, 867 888 { 868 889 .name = "UV", ··· 873 896 874 897 static struct resource wm831x_ldo11_resources[] = { 875 898 { 876 - .parent = &wm831x_io_parent, 877 899 .start = WM831X_LDO11_ON_CONTROL, 878 900 .end = WM831X_LDO11_SLEEP_CONTROL, 879 - .flags = IORESOURCE_IO, 901 + .flags = IORESOURCE_REG, 880 902 }, 881 903 }; 882 904 ··· 974 998 975 999 static struct resource wm831x_status1_resources[] = { 976 1000 { 977 - .parent = &wm831x_io_parent, 978 1001 .start = WM831X_STATUS_LED_1, 979 1002 .end = WM831X_STATUS_LED_1, 980 - .flags = IORESOURCE_IO, 1003 + .flags = IORESOURCE_REG, 981 1004 }, 982 1005 }; 983 1006 984 1007 static struct resource wm831x_status2_resources[] = { 985 1008 { 986 - .parent = &wm831x_io_parent, 987 1009 .start = WM831X_STATUS_LED_2, 988 1010 .end = WM831X_STATUS_LED_2, 989 - .flags = IORESOURCE_IO, 1011 + .flags = IORESOURCE_REG, 990 1012 }, 991 1013 }; 992 1014
+1 -1
drivers/mfd/wm8994-core.c
··· 390 390 391 391 static const __devinitdata struct reg_default wm1811_reva_patch[] = { 392 392 { 0x102, 0x3 }, 393 - { 0x56, 0x7 }, 393 + { 0x56, 0xc07 }, 394 394 { 0x5d, 0x7e }, 395 395 { 0x5e, 0x0 }, 396 396 { 0x102, 0x0 },
+1 -1
drivers/mfd/wm8994-regmap.c
··· 1136 1136 1137 1137 switch (reg) { 1138 1138 case WM8994_GPIO_6: 1139 - if (wm8994->revision > 1) 1139 + if (wm8994->cust_id > 1 || wm8994->revision > 1) 1140 1140 return true; 1141 1141 else 1142 1142 return false;
+9
drivers/pwm/Kconfig
··· 115 115 To compile this driver as a module, choose M here: the module 116 116 will be called pwm-tiehrpwm. 117 117 118 + config PWM_TWL6030 119 + tristate "TWL6030 PWM support" 120 + depends on TWL4030_CORE 121 + help 122 + Generic PWM framework driver for TWL6030. 123 + 124 + To compile this driver as a module, choose M here: the module 125 + will be called pwm-twl6030. 126 + 118 127 config PWM_VT8500 119 128 tristate "vt8500 pwm support" 120 129 depends on ARCH_VT8500
+1
drivers/pwm/Makefile
··· 8 8 obj-$(CONFIG_PWM_TEGRA) += pwm-tegra.o 9 9 obj-$(CONFIG_PWM_TIECAP) += pwm-tiecap.o 10 10 obj-$(CONFIG_PWM_TIEHRPWM) += pwm-tiehrpwm.o 11 + obj-$(CONFIG_PWM_TWL6030) += pwm-twl6030.o 11 12 obj-$(CONFIG_PWM_VT8500) += pwm-vt8500.o
+184
drivers/pwm/pwm-twl6030.c
··· 1 + /* 2 + * twl6030_pwm.c 3 + * Driver for PHOENIX (TWL6030) Pulse Width Modulator 4 + * 5 + * Copyright (C) 2010 Texas Instruments 6 + * Author: Hemanth V <hemanthv@ti.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify it 9 + * under the terms of the GNU General Public License version 2 as published by 10 + * the Free Software Foundation. 11 + * 12 + * This program is distributed in the hope that it will be useful, but WITHOUT 13 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 + * more details. 16 + * 17 + * You should have received a copy of the GNU General Public License along with 18 + * this program. If not, see <http://www.gnu.org/licenses/>. 19 + */ 20 + 21 + #include <linux/module.h> 22 + #include <linux/platform_device.h> 23 + #include <linux/pwm.h> 24 + #include <linux/i2c/twl.h> 25 + #include <linux/slab.h> 26 + 27 + #define LED_PWM_CTRL1 0xF4 28 + #define LED_PWM_CTRL2 0xF5 29 + 30 + /* Max value for CTRL1 register */ 31 + #define PWM_CTRL1_MAX 255 32 + 33 + /* Pull down disable */ 34 + #define PWM_CTRL2_DIS_PD (1 << 6) 35 + 36 + /* Current control 2.5 milli Amps */ 37 + #define PWM_CTRL2_CURR_02 (2 << 4) 38 + 39 + /* LED supply source */ 40 + #define PWM_CTRL2_SRC_VAC (1 << 2) 41 + 42 + /* LED modes */ 43 + #define PWM_CTRL2_MODE_HW (0 << 0) 44 + #define PWM_CTRL2_MODE_SW (1 << 0) 45 + #define PWM_CTRL2_MODE_DIS (2 << 0) 46 + 47 + #define PWM_CTRL2_MODE_MASK 0x3 48 + 49 + struct twl6030_pwm_chip { 50 + struct pwm_chip chip; 51 + }; 52 + 53 + static int twl6030_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) 54 + { 55 + int ret; 56 + u8 val; 57 + 58 + /* Configure PWM */ 59 + val = PWM_CTRL2_DIS_PD | PWM_CTRL2_CURR_02 | PWM_CTRL2_SRC_VAC | 60 + PWM_CTRL2_MODE_HW; 61 + 62 + ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, val, LED_PWM_CTRL2); 63 + if (ret < 0) { 64 + dev_err(chip->dev, "%s: Failed to configure PWM, Error %d\n", 65 + pwm->label, ret); 66 + return ret; 67 + } 68 + 69 + return 0; 70 + } 71 + 72 + static int twl6030_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, 73 + int duty_ns, int period_ns) 74 + { 75 + u8 duty_cycle = (duty_ns * PWM_CTRL1_MAX) / period_ns; 76 + int ret; 77 + 78 + ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, duty_cycle, LED_PWM_CTRL1); 79 + if (ret < 0) { 80 + pr_err("%s: Failed to configure PWM, Error %d\n", 81 + pwm->label, ret); 82 + return ret; 83 + } 84 + 85 + return 0; 86 + } 87 + 88 + static int twl6030_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) 89 + { 90 + int ret; 91 + u8 val; 92 + 93 + ret = twl_i2c_read_u8(TWL6030_MODULE_ID1, &val, LED_PWM_CTRL2); 94 + if (ret < 0) { 95 + dev_err(chip->dev, "%s: Failed to enable PWM, Error %d\n", 96 + pwm->label, ret); 97 + return ret; 98 + } 99 + 100 + /* Change mode to software control */ 101 + val &= ~PWM_CTRL2_MODE_MASK; 102 + val |= PWM_CTRL2_MODE_SW; 103 + 104 + ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, val, LED_PWM_CTRL2); 105 + if (ret < 0) { 106 + dev_err(chip->dev, "%s: Failed to enable PWM, Error %d\n", 107 + pwm->label, ret); 108 + return ret; 109 + } 110 + 111 + twl_i2c_read_u8(TWL6030_MODULE_ID1, &val, LED_PWM_CTRL2); 112 + return 0; 113 + } 114 + 115 + static void twl6030_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) 116 + { 117 + int ret; 118 + u8 val; 119 + 120 + ret = twl_i2c_read_u8(TWL6030_MODULE_ID1, &val, LED_PWM_CTRL2); 121 + if (ret < 0) { 122 + dev_err(chip->dev, "%s: Failed to disable PWM, Error %d\n", 123 + pwm->label, ret); 124 + return; 125 + } 126 + 127 + val &= ~PWM_CTRL2_MODE_MASK; 128 + val |= PWM_CTRL2_MODE_HW; 129 + 130 + ret = twl_i2c_write_u8(TWL6030_MODULE_ID1, val, LED_PWM_CTRL2); 131 + if (ret < 0) { 132 + dev_err(chip->dev, "%s: Failed to disable PWM, Error %d\n", 133 + pwm->label, ret); 134 + } 135 + } 136 + 137 + static const struct pwm_ops twl6030_pwm_ops = { 138 + .request = twl6030_pwm_request, 139 + .config = twl6030_pwm_config, 140 + .enable = twl6030_pwm_enable, 141 + .disable = twl6030_pwm_disable, 142 + }; 143 + 144 + static int twl6030_pwm_probe(struct platform_device *pdev) 145 + { 146 + struct twl6030_pwm_chip *twl6030; 147 + int ret; 148 + 149 + twl6030 = devm_kzalloc(&pdev->dev, sizeof(*twl6030), GFP_KERNEL); 150 + if (!twl6030) 151 + return -ENOMEM; 152 + 153 + twl6030->chip.dev = &pdev->dev; 154 + twl6030->chip.ops = &twl6030_pwm_ops; 155 + twl6030->chip.base = -1; 156 + twl6030->chip.npwm = 1; 157 + 158 + ret = pwmchip_add(&twl6030->chip); 159 + if (ret < 0) 160 + return ret; 161 + 162 + platform_set_drvdata(pdev, twl6030); 163 + 164 + return 0; 165 + } 166 + 167 + static int twl6030_pwm_remove(struct platform_device *pdev) 168 + { 169 + struct twl6030_pwm_chip *twl6030 = platform_get_drvdata(pdev); 170 + 171 + return pwmchip_remove(&twl6030->chip); 172 + } 173 + 174 + static struct platform_driver twl6030_pwm_driver = { 175 + .driver = { 176 + .name = "twl6030-pwm", 177 + }, 178 + .probe = twl6030_pwm_probe, 179 + .remove = __devexit_p(twl6030_pwm_remove), 180 + }; 181 + module_platform_driver(twl6030_pwm_driver); 182 + 183 + MODULE_ALIAS("platform:twl6030-pwm"); 184 + MODULE_LICENSE("GPL");
+120 -16
drivers/regulator/88pm8607.c
··· 12 12 #include <linux/init.h> 13 13 #include <linux/err.h> 14 14 #include <linux/i2c.h> 15 + #include <linux/of.h> 16 + #include <linux/regulator/of_regulator.h> 15 17 #include <linux/platform_device.h> 16 18 #include <linux/regulator/driver.h> 17 19 #include <linux/regulator/machine.h> ··· 25 23 struct pm860x_chip *chip; 26 24 struct regulator_dev *regulator; 27 25 struct i2c_client *i2c; 26 + struct i2c_client *i2c_8606; 28 27 29 28 unsigned int *vol_table; 30 29 unsigned int *vol_suspend; ··· 245 242 return ret; 246 243 } 247 244 245 + static int pm8606_preg_enable(struct regulator_dev *rdev) 246 + { 247 + struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); 248 + 249 + return pm860x_set_bits(info->i2c, rdev->desc->enable_reg, 250 + 1 << rdev->desc->enable_mask, 0); 251 + } 252 + 253 + static int pm8606_preg_disable(struct regulator_dev *rdev) 254 + { 255 + struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); 256 + 257 + return pm860x_set_bits(info->i2c, rdev->desc->enable_reg, 258 + 1 << rdev->desc->enable_mask, 259 + 1 << rdev->desc->enable_mask); 260 + } 261 + 262 + static int pm8606_preg_is_enabled(struct regulator_dev *rdev) 263 + { 264 + struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); 265 + int ret; 266 + 267 + ret = pm860x_reg_read(info->i2c, rdev->desc->enable_reg); 268 + if (ret < 0) 269 + return ret; 270 + 271 + return !((unsigned char)ret & (1 << rdev->desc->enable_mask)); 272 + } 273 + 248 274 static struct regulator_ops pm8607_regulator_ops = { 249 275 .list_voltage = pm8607_list_voltage, 250 276 .set_voltage_sel = pm8607_set_voltage_sel, ··· 282 250 .disable = regulator_disable_regmap, 283 251 .is_enabled = regulator_is_enabled_regmap, 284 252 }; 253 + 254 + static struct regulator_ops pm8606_preg_ops = { 255 + .enable = pm8606_preg_enable, 256 + .disable = pm8606_preg_disable, 257 + .is_enabled = pm8606_preg_is_enabled, 258 + }; 259 + 260 + #define PM8606_PREG(ereg, ebit) \ 261 + { \ 262 + .desc = { \ 263 + .name = "PREG", \ 264 + .ops = &pm8606_preg_ops, \ 265 + .type = REGULATOR_CURRENT, \ 266 + .id = PM8606_ID_PREG, \ 267 + .owner = THIS_MODULE, \ 268 + .enable_reg = PM8606_##ereg, \ 269 + .enable_mask = (ebit), \ 270 + }, \ 271 + } 285 272 286 273 #define PM8607_DVC(vreg, ureg, ubit, ereg, ebit) \ 287 274 { \ ··· 362 311 PM8607_LDO(14, LDO14, 0, SUPPLIES_EN12, 6), 363 312 }; 364 313 314 + static struct pm8607_regulator_info pm8606_regulator_info[] = { 315 + PM8606_PREG(PREREGULATORB, 5), 316 + }; 317 + 318 + #ifdef CONFIG_OF 319 + static int pm8607_regulator_dt_init(struct platform_device *pdev, 320 + struct pm8607_regulator_info *info, 321 + struct regulator_config *config) 322 + { 323 + struct device_node *nproot, *np; 324 + nproot = pdev->dev.parent->of_node; 325 + if (!nproot) 326 + return -ENODEV; 327 + nproot = of_find_node_by_name(nproot, "regulators"); 328 + if (!nproot) { 329 + dev_err(&pdev->dev, "failed to find regulators node\n"); 330 + return -ENODEV; 331 + } 332 + for_each_child_of_node(nproot, np) { 333 + if (!of_node_cmp(np->name, info->desc.name)) { 334 + config->init_data = 335 + of_get_regulator_init_data(&pdev->dev, np); 336 + config->of_node = np; 337 + break; 338 + } 339 + } 340 + return 0; 341 + } 342 + #else 343 + #define pm8607_regulator_dt_init(x, y, z) (-1) 344 + #endif 345 + 365 346 static int __devinit pm8607_regulator_probe(struct platform_device *pdev) 366 347 { 367 348 struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent); ··· 403 320 struct resource *res; 404 321 int i; 405 322 406 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 407 - if (res == NULL) { 408 - dev_err(&pdev->dev, "No I/O resource!\n"); 409 - return -EINVAL; 410 - } 411 - for (i = 0; i < ARRAY_SIZE(pm8607_regulator_info); i++) { 412 - info = &pm8607_regulator_info[i]; 413 - if (info->desc.id == res->start) 414 - break; 415 - } 416 - if (i == ARRAY_SIZE(pm8607_regulator_info)) { 417 - dev_err(&pdev->dev, "Failed to find regulator %llu\n", 418 - (unsigned long long)res->start); 419 - return -EINVAL; 323 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 324 + if (res) { 325 + /* There're resources in 88PM8607 regulator driver */ 326 + for (i = 0; i < ARRAY_SIZE(pm8607_regulator_info); i++) { 327 + info = &pm8607_regulator_info[i]; 328 + if (info->desc.vsel_reg == res->start) 329 + break; 330 + } 331 + if (i == ARRAY_SIZE(pm8607_regulator_info)) { 332 + dev_err(&pdev->dev, "Failed to find regulator %llu\n", 333 + (unsigned long long)res->start); 334 + return -EINVAL; 335 + } 336 + } else { 337 + /* There's no resource in 88PM8606 PREG regulator driver */ 338 + info = &pm8606_regulator_info[0]; 339 + /* i is used to check regulator ID */ 340 + i = -1; 420 341 } 421 342 info->i2c = (chip->id == CHIP_PM8607) ? chip->client : chip->companion; 343 + info->i2c_8606 = (chip->id == CHIP_PM8607) ? chip->companion : 344 + chip->client; 422 345 info->chip = chip; 423 346 424 347 /* check DVC ramp slope double */ ··· 432 343 info->slope_double = 1; 433 344 434 345 config.dev = &pdev->dev; 435 - config.init_data = pdata; 436 346 config.driver_data = info; 347 + 348 + if (pm8607_regulator_dt_init(pdev, info, &config)) 349 + if (pdata) 350 + config.init_data = pdata; 437 351 438 352 if (chip->id == CHIP_PM8607) 439 353 config.regmap = chip->regmap; 440 354 else 441 355 config.regmap = chip->regmap_companion; 442 356 443 - /* replace driver_data with info */ 444 357 info->regulator = regulator_register(&info->desc, &config); 445 358 if (IS_ERR(info->regulator)) { 446 359 dev_err(&pdev->dev, "failed to register regulator %s\n", ··· 463 372 return 0; 464 373 } 465 374 375 + static struct platform_device_id pm8607_regulator_driver_ids[] = { 376 + { 377 + .name = "88pm860x-regulator", 378 + .driver_data = 0, 379 + }, { 380 + .name = "88pm860x-preg", 381 + .driver_data = 0, 382 + }, 383 + { }, 384 + }; 385 + MODULE_DEVICE_TABLE(platform, pm8607_regulator_driver_ids); 386 + 466 387 static struct platform_driver pm8607_regulator_driver = { 467 388 .driver = { 468 389 .name = "88pm860x-regulator", ··· 482 379 }, 483 380 .probe = pm8607_regulator_probe, 484 381 .remove = __devexit_p(pm8607_regulator_remove), 382 + .id_table = pm8607_regulator_driver_ids, 485 383 }; 486 384 487 385 static int __init pm8607_regulator_init(void)
+1 -1
drivers/regulator/Kconfig
··· 122 122 123 123 config REGULATOR_ANATOP 124 124 tristate "Freescale i.MX on-chip ANATOP LDO regulators" 125 - depends on MFD_ANATOP 125 + depends on MFD_SYSCON 126 126 help 127 127 Say y here to support Freescale i.MX on-chip ANATOP LDOs 128 128 regulators. It is recommended that this option be
+1
drivers/regulator/ab3100.c
··· 15 15 #include <linux/err.h> 16 16 #include <linux/platform_device.h> 17 17 #include <linux/regulator/driver.h> 18 + #include <linux/mfd/ab3100.h> 18 19 #include <linux/mfd/abx500.h> 19 20 20 21 /* LDO registers and some handy masking definitions for AB3100 */
+21 -10
drivers/regulator/anatop-regulator.c
··· 21 21 #include <linux/slab.h> 22 22 #include <linux/device.h> 23 23 #include <linux/module.h> 24 + #include <linux/mfd/syscon.h> 24 25 #include <linux/err.h> 25 26 #include <linux/io.h> 26 27 #include <linux/platform_device.h> 27 28 #include <linux/of.h> 28 29 #include <linux/of_address.h> 29 - #include <linux/mfd/anatop.h> 30 + #include <linux/regmap.h> 30 31 #include <linux/regulator/driver.h> 31 32 #include <linux/regulator/of_regulator.h> 32 33 33 34 struct anatop_regulator { 34 35 const char *name; 35 36 u32 control_reg; 36 - struct anatop *mfd; 37 + struct regmap *anatop; 37 38 int vol_bit_shift; 38 39 int vol_bit_width; 39 40 int min_bit_val; ··· 44 43 struct regulator_init_data *initdata; 45 44 }; 46 45 47 - static int anatop_set_voltage_sel(struct regulator_dev *reg, unsigned selector) 46 + static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg, 47 + unsigned selector) 48 48 { 49 49 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); 50 50 u32 val, mask; ··· 58 56 mask = ((1 << anatop_reg->vol_bit_width) - 1) << 59 57 anatop_reg->vol_bit_shift; 60 58 val <<= anatop_reg->vol_bit_shift; 61 - anatop_write_reg(anatop_reg->mfd, anatop_reg->control_reg, val, mask); 59 + regmap_update_bits(anatop_reg->anatop, anatop_reg->control_reg, 60 + mask, val); 62 61 63 62 return 0; 64 63 } 65 64 66 - static int anatop_get_voltage_sel(struct regulator_dev *reg) 65 + static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg) 67 66 { 68 67 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); 69 68 u32 val, mask; ··· 72 69 if (!anatop_reg->control_reg) 73 70 return -ENOTSUPP; 74 71 75 - val = anatop_read_reg(anatop_reg->mfd, anatop_reg->control_reg); 72 + regmap_read(anatop_reg->anatop, anatop_reg->control_reg, &val); 76 73 mask = ((1 << anatop_reg->vol_bit_width) - 1) << 77 74 anatop_reg->vol_bit_shift; 78 75 val = (val & mask) >> anatop_reg->vol_bit_shift; ··· 81 78 } 82 79 83 80 static struct regulator_ops anatop_rops = { 84 - .set_voltage_sel = anatop_set_voltage_sel, 85 - .get_voltage_sel = anatop_get_voltage_sel, 81 + .set_voltage_sel = anatop_regmap_set_voltage_sel, 82 + .get_voltage_sel = anatop_regmap_get_voltage_sel, 86 83 .list_voltage = regulator_list_voltage_linear, 87 84 .map_voltage = regulator_map_voltage_linear, 88 85 }; ··· 91 88 { 92 89 struct device *dev = &pdev->dev; 93 90 struct device_node *np = dev->of_node; 91 + struct device_node *anatop_np; 94 92 struct regulator_desc *rdesc; 95 93 struct regulator_dev *rdev; 96 94 struct anatop_regulator *sreg; 97 95 struct regulator_init_data *initdata; 98 - struct anatop *anatopmfd = dev_get_drvdata(pdev->dev.parent); 99 96 struct regulator_config config = { }; 100 97 int ret = 0; 101 98 ··· 112 109 rdesc->ops = &anatop_rops; 113 110 rdesc->type = REGULATOR_VOLTAGE; 114 111 rdesc->owner = THIS_MODULE; 115 - sreg->mfd = anatopmfd; 112 + 113 + anatop_np = of_get_parent(np); 114 + if (!anatop_np) 115 + return -ENODEV; 116 + sreg->anatop = syscon_node_to_regmap(anatop_np); 117 + of_node_put(anatop_np); 118 + if (IS_ERR(sreg->anatop)) 119 + return PTR_ERR(sreg->anatop); 120 + 116 121 ret = of_property_read_u32(np, "anatop-reg-offset", 117 122 &sreg->control_reg); 118 123 if (ret) {
+17 -18
drivers/regulator/max8925-regulator.c
··· 214 214 MAX8925_LDO(20, 750, 3900, 50), 215 215 }; 216 216 217 - static struct max8925_regulator_info * __devinit find_regulator_info(int id) 218 - { 219 - struct max8925_regulator_info *ri; 220 - int i; 221 - 222 - for (i = 0; i < ARRAY_SIZE(max8925_regulator_info); i++) { 223 - ri = &max8925_regulator_info[i]; 224 - if (ri->desc.id == id) 225 - return ri; 226 - } 227 - return NULL; 228 - } 229 - 230 217 static int __devinit max8925_regulator_probe(struct platform_device *pdev) 231 218 { 232 219 struct max8925_chip *chip = dev_get_drvdata(pdev->dev.parent); 233 - struct max8925_platform_data *pdata = chip->dev->platform_data; 220 + struct regulator_init_data *pdata = pdev->dev.platform_data; 234 221 struct regulator_config config = { }; 235 222 struct max8925_regulator_info *ri; 223 + struct resource *res; 236 224 struct regulator_dev *rdev; 225 + int i; 237 226 238 - ri = find_regulator_info(pdev->id); 239 - if (ri == NULL) { 240 - dev_err(&pdev->dev, "invalid regulator ID specified\n"); 227 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 228 + if (!res) { 229 + dev_err(&pdev->dev, "No REG resource!\n"); 230 + return -EINVAL; 231 + } 232 + for (i = 0; i < ARRAY_SIZE(max8925_regulator_info); i++) { 233 + ri = &max8925_regulator_info[i]; 234 + if (ri->vol_reg == res->start) 235 + break; 236 + } 237 + if (i == ARRAY_SIZE(max8925_regulator_info)) { 238 + dev_err(&pdev->dev, "Failed to find regulator %llu\n", 239 + (unsigned long long)res->start); 241 240 return -EINVAL; 242 241 } 243 242 ri->i2c = chip->i2c; 244 243 ri->chip = chip; 245 244 246 245 config.dev = &pdev->dev; 247 - config.init_data = pdata->regulator[pdev->id]; 246 + config.init_data = pdata; 248 247 config.driver_data = ri; 249 248 250 249 rdev = regulator_register(&ri->desc, &config);
+119 -8
drivers/regulator/palmas-regulator.c
··· 22 22 #include <linux/slab.h> 23 23 #include <linux/regmap.h> 24 24 #include <linux/mfd/palmas.h> 25 + #include <linux/of.h> 26 + #include <linux/of_platform.h> 27 + #include <linux/regulator/of_regulator.h> 25 28 26 29 struct regs_info { 27 30 char *name; ··· 571 568 return 0; 572 569 } 573 570 571 + static struct of_regulator_match palmas_matches[] = { 572 + { .name = "smps12", }, 573 + { .name = "smps123", }, 574 + { .name = "smps3", }, 575 + { .name = "smps45", }, 576 + { .name = "smps457", }, 577 + { .name = "smps6", }, 578 + { .name = "smps7", }, 579 + { .name = "smps8", }, 580 + { .name = "smps9", }, 581 + { .name = "smps10", }, 582 + { .name = "ldo1", }, 583 + { .name = "ldo2", }, 584 + { .name = "ldo3", }, 585 + { .name = "ldo4", }, 586 + { .name = "ldo5", }, 587 + { .name = "ldo6", }, 588 + { .name = "ldo7", }, 589 + { .name = "ldo8", }, 590 + { .name = "ldo9", }, 591 + { .name = "ldoln", }, 592 + { .name = "ldousb", }, 593 + }; 594 + 595 + static void __devinit palmas_dt_to_pdata(struct device *dev, 596 + struct device_node *node, 597 + struct palmas_pmic_platform_data *pdata) 598 + { 599 + struct device_node *regulators; 600 + u32 prop; 601 + int idx, ret; 602 + 603 + regulators = of_find_node_by_name(node, "regulators"); 604 + if (!regulators) { 605 + dev_info(dev, "regulator node not found\n"); 606 + return; 607 + } 608 + 609 + ret = of_regulator_match(dev, regulators, palmas_matches, 610 + PALMAS_NUM_REGS); 611 + if (ret < 0) { 612 + dev_err(dev, "Error parsing regulator init data: %d\n", ret); 613 + return; 614 + } 615 + 616 + for (idx = 0; idx < PALMAS_NUM_REGS; idx++) { 617 + if (!palmas_matches[idx].init_data || 618 + !palmas_matches[idx].of_node) 619 + continue; 620 + 621 + pdata->reg_data[idx] = palmas_matches[idx].init_data; 622 + 623 + pdata->reg_init[idx] = devm_kzalloc(dev, 624 + sizeof(struct palmas_reg_init), GFP_KERNEL); 625 + 626 + ret = of_property_read_u32(palmas_matches[idx].of_node, 627 + "ti,warm_reset", &prop); 628 + if (!ret) 629 + pdata->reg_init[idx]->warm_reset = prop; 630 + 631 + ret = of_property_read_u32(palmas_matches[idx].of_node, 632 + "ti,roof_floor", &prop); 633 + if (!ret) 634 + pdata->reg_init[idx]->roof_floor = prop; 635 + 636 + ret = of_property_read_u32(palmas_matches[idx].of_node, 637 + "ti,mode_sleep", &prop); 638 + if (!ret) 639 + pdata->reg_init[idx]->mode_sleep = prop; 640 + 641 + ret = of_property_read_u32(palmas_matches[idx].of_node, 642 + "ti,warm_reset", &prop); 643 + if (!ret) 644 + pdata->reg_init[idx]->warm_reset = prop; 645 + 646 + ret = of_property_read_u32(palmas_matches[idx].of_node, 647 + "ti,tstep", &prop); 648 + if (!ret) 649 + pdata->reg_init[idx]->tstep = prop; 650 + 651 + ret = of_property_read_u32(palmas_matches[idx].of_node, 652 + "ti,vsel", &prop); 653 + if (!ret) 654 + pdata->reg_init[idx]->vsel = prop; 655 + } 656 + 657 + ret = of_property_read_u32(node, "ti,ldo6_vibrator", &prop); 658 + if (!ret) 659 + pdata->ldo6_vibrator = prop; 660 + } 661 + 662 + 574 663 static __devinit int palmas_probe(struct platform_device *pdev) 575 664 { 576 665 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); 577 666 struct palmas_pmic_platform_data *pdata = pdev->dev.platform_data; 667 + struct device_node *node = pdev->dev.of_node; 578 668 struct regulator_dev *rdev; 579 669 struct regulator_config config = { }; 580 670 struct palmas_pmic *pmic; ··· 675 579 int id = 0, ret; 676 580 unsigned int addr, reg; 677 581 678 - if (!pdata) 679 - return -EINVAL; 680 - if (!pdata->reg_data) 681 - return -EINVAL; 582 + if (node && !pdata) { 583 + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 584 + 585 + if (!pdata) 586 + return -ENOMEM; 587 + 588 + palmas_dt_to_pdata(&pdev->dev, node, pdata); 589 + } 682 590 683 591 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); 684 592 if (!pmic) ··· 761 661 pmic->desc[id].owner = THIS_MODULE; 762 662 763 663 /* Initialise sleep/init values from platform data */ 764 - if (pdata && pdata->reg_init) { 664 + if (pdata) { 765 665 reg_init = pdata->reg_init[id]; 766 666 if (reg_init) { 767 667 ret = palmas_smps_init(palmas, id, reg_init); ··· 785 685 pmic->range[id] = 1; 786 686 } 787 687 788 - if (pdata && pdata->reg_data) 688 + if (pdata) 789 689 config.init_data = pdata->reg_data[id]; 790 690 else 791 691 config.init_data = NULL; 692 + 693 + config.of_node = palmas_matches[id].of_node; 792 694 793 695 rdev = regulator_register(&pmic->desc[id], &config); 794 696 if (IS_ERR(rdev)) { ··· 828 726 palmas_regs_info[id].ctrl_addr); 829 727 pmic->desc[id].enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; 830 728 831 - if (pdata && pdata->reg_data) 729 + if (pdata) 832 730 config.init_data = pdata->reg_data[id]; 833 731 else 834 732 config.init_data = NULL; 733 + 734 + config.of_node = palmas_matches[id].of_node; 835 735 836 736 rdev = regulator_register(&pmic->desc[id], &config); 837 737 if (IS_ERR(rdev)) { ··· 848 744 pmic->rdev[id] = rdev; 849 745 850 746 /* Initialise sleep/init values from platform data */ 851 - if (pdata->reg_init) { 747 + if (pdata) { 852 748 reg_init = pdata->reg_init[id]; 853 749 if (reg_init) { 854 750 ret = palmas_ldo_init(palmas, id, reg_init); ··· 878 774 return 0; 879 775 } 880 776 777 + static struct of_device_id __devinitdata of_palmas_match_tbl[] = { 778 + { .compatible = "ti,palmas-pmic", }, 779 + { /* end */ } 780 + }; 781 + 881 782 static struct platform_driver palmas_driver = { 882 783 .driver = { 883 784 .name = "palmas-pmic", 785 + .of_match_table = of_palmas_match_tbl, 884 786 .owner = THIS_MODULE, 885 787 }, 886 788 .probe = palmas_probe, ··· 909 799 MODULE_DESCRIPTION("Palmas voltage regulator driver"); 910 800 MODULE_LICENSE("GPL"); 911 801 MODULE_ALIAS("platform:palmas-pmic"); 802 + MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
+6 -6
drivers/regulator/wm831x-dcdc.c
··· 475 475 476 476 dcdc->wm831x = wm831x; 477 477 478 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 478 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 479 479 if (res == NULL) { 480 - dev_err(&pdev->dev, "No I/O resource\n"); 480 + dev_err(&pdev->dev, "No REG resource\n"); 481 481 ret = -EINVAL; 482 482 goto err; 483 483 } ··· 650 650 651 651 dcdc->wm831x = wm831x; 652 652 653 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 653 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 654 654 if (res == NULL) { 655 - dev_err(&pdev->dev, "No I/O resource\n"); 655 + dev_err(&pdev->dev, "No REG resource\n"); 656 656 ret = -EINVAL; 657 657 goto err; 658 658 } ··· 794 794 795 795 dcdc->wm831x = wm831x; 796 796 797 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 797 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 798 798 if (res == NULL) { 799 - dev_err(&pdev->dev, "No I/O resource\n"); 799 + dev_err(&pdev->dev, "No REG resource\n"); 800 800 ret = -EINVAL; 801 801 goto err; 802 802 }
+2 -2
drivers/regulator/wm831x-isink.c
··· 172 172 173 173 isink->wm831x = wm831x; 174 174 175 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 175 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 176 176 if (res == NULL) { 177 - dev_err(&pdev->dev, "No I/O resource\n"); 177 + dev_err(&pdev->dev, "No REG resource\n"); 178 178 ret = -EINVAL; 179 179 goto err; 180 180 }
+6 -6
drivers/regulator/wm831x-ldo.c
··· 273 273 274 274 ldo->wm831x = wm831x; 275 275 276 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 276 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 277 277 if (res == NULL) { 278 - dev_err(&pdev->dev, "No I/O resource\n"); 278 + dev_err(&pdev->dev, "No REG resource\n"); 279 279 ret = -EINVAL; 280 280 goto err; 281 281 } ··· 530 530 531 531 ldo->wm831x = wm831x; 532 532 533 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 533 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 534 534 if (res == NULL) { 535 - dev_err(&pdev->dev, "No I/O resource\n"); 535 + dev_err(&pdev->dev, "No REG resource\n"); 536 536 ret = -EINVAL; 537 537 goto err; 538 538 } ··· 687 687 688 688 ldo->wm831x = wm831x; 689 689 690 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 690 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 691 691 if (res == NULL) { 692 - dev_err(&pdev->dev, "No I/O resource\n"); 692 + dev_err(&pdev->dev, "No REG resource\n"); 693 693 ret = -EINVAL; 694 694 goto err; 695 695 }
+34 -9
drivers/rtc/rtc-88pm860x.c
··· 11 11 12 12 #include <linux/kernel.h> 13 13 #include <linux/module.h> 14 + #include <linux/of.h> 14 15 #include <linux/platform_device.h> 15 16 #include <linux/slab.h> 16 17 #include <linux/mutex.h> ··· 285 284 } 286 285 #endif 287 286 287 + #ifdef CONFIG_OF 288 + static int __devinit pm860x_rtc_dt_init(struct platform_device *pdev, 289 + struct pm860x_rtc_info *info) 290 + { 291 + struct device_node *np = pdev->dev.parent->of_node; 292 + int ret; 293 + if (!np) 294 + return -ENODEV; 295 + np = of_find_node_by_name(np, "rtc"); 296 + if (!np) { 297 + dev_err(&pdev->dev, "failed to find rtc node\n"); 298 + return -ENODEV; 299 + } 300 + ret = of_property_read_u32(np, "marvell,88pm860x-vrtc", &info->vrtc); 301 + if (ret) 302 + info->vrtc = 0; 303 + return 0; 304 + } 305 + #else 306 + #define pm860x_rtc_dt_init(x, y) (-1) 307 + #endif 308 + 288 309 static int __devinit pm860x_rtc_probe(struct platform_device *pdev) 289 310 { 290 311 struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent); ··· 317 294 int ret; 318 295 319 296 pdata = pdev->dev.platform_data; 320 - if (pdata == NULL) 321 - dev_warn(&pdev->dev, "No platform data!\n"); 322 297 323 298 info = kzalloc(sizeof(struct pm860x_rtc_info), GFP_KERNEL); 324 299 if (!info) ··· 366 345 } 367 346 } 368 347 rtc_tm_to_time(&tm, &ticks); 369 - if (pdata && pdata->sync) { 370 - pdata->sync(ticks); 371 - info->sync = pdata->sync; 348 + if (pm860x_rtc_dt_init(pdev, info)) { 349 + if (pdata && pdata->sync) { 350 + pdata->sync(ticks); 351 + info->sync = pdata->sync; 352 + } 372 353 } 373 354 374 355 info->rtc_dev = rtc_device_register("88pm860x-rtc", &pdev->dev, ··· 389 366 390 367 #ifdef VRTC_CALIBRATION 391 368 /* <00> -- 2.7V, <01> -- 2.9V, <10> -- 3.1V, <11> -- 3.3V */ 392 - if (pdata && pdata->vrtc) 393 - info->vrtc = pdata->vrtc & 0x3; 394 - else 395 - info->vrtc = 1; 369 + if (pm860x_rtc_dt_init(pdev, info)) { 370 + if (pdata && pdata->vrtc) 371 + info->vrtc = pdata->vrtc & 0x3; 372 + else 373 + info->vrtc = 1; 374 + } 396 375 pm860x_set_bits(info->i2c, PM8607_MEAS_EN2, MEAS2_VRTC, MEAS2_VRTC); 397 376 398 377 /* calibrate VRTC */
+79 -67
drivers/video/backlight/88pm860x_bl.c
··· 11 11 12 12 #include <linux/init.h> 13 13 #include <linux/kernel.h> 14 + #include <linux/of.h> 14 15 #include <linux/platform_device.h> 15 16 #include <linux/slab.h> 16 17 #include <linux/fb.h> ··· 32 31 int port; 33 32 int pwm; 34 33 int iset; 34 + int reg_duty_cycle; 35 + int reg_always_on; 36 + int reg_current; 35 37 }; 36 - 37 - static inline int wled_a(int port) 38 - { 39 - int ret; 40 - 41 - ret = ((port - PM8606_BACKLIGHT1) << 1) + 2; 42 - return ret; 43 - } 44 - 45 - static inline int wled_b(int port) 46 - { 47 - int ret; 48 - 49 - ret = ((port - PM8606_BACKLIGHT1) << 1) + 3; 50 - return ret; 51 - } 52 - 53 - /* WLED2 & WLED3 share the same IDC */ 54 - static inline int wled_idc(int port) 55 - { 56 - int ret; 57 - 58 - switch (port) { 59 - case PM8606_BACKLIGHT1: 60 - case PM8606_BACKLIGHT2: 61 - ret = ((port - PM8606_BACKLIGHT1) << 1) + 3; 62 - break; 63 - case PM8606_BACKLIGHT3: 64 - default: 65 - ret = ((port - PM8606_BACKLIGHT2) << 1) + 3; 66 - break; 67 - } 68 - return ret; 69 - } 70 38 71 39 static int backlight_power_set(struct pm860x_chip *chip, int port, 72 40 int on) ··· 43 73 int ret = -EINVAL; 44 74 45 75 switch (port) { 46 - case PM8606_BACKLIGHT1: 76 + case 0: 47 77 ret = on ? pm8606_osc_enable(chip, WLED1_DUTY) : 48 78 pm8606_osc_disable(chip, WLED1_DUTY); 49 79 break; 50 - case PM8606_BACKLIGHT2: 80 + case 1: 51 81 ret = on ? pm8606_osc_enable(chip, WLED2_DUTY) : 52 82 pm8606_osc_disable(chip, WLED2_DUTY); 53 83 break; 54 - case PM8606_BACKLIGHT3: 84 + case 2: 55 85 ret = on ? pm8606_osc_enable(chip, WLED3_DUTY) : 56 86 pm8606_osc_disable(chip, WLED3_DUTY); 57 87 break; ··· 74 104 if (brightness) 75 105 backlight_power_set(chip, data->port, 1); 76 106 77 - ret = pm860x_reg_write(data->i2c, wled_a(data->port), value); 107 + ret = pm860x_reg_write(data->i2c, data->reg_duty_cycle, value); 78 108 if (ret < 0) 79 109 goto out; 80 110 81 111 if ((data->current_brightness == 0) && brightness) { 82 112 if (data->iset) { 83 - ret = pm860x_set_bits(data->i2c, wled_idc(data->port), 113 + ret = pm860x_set_bits(data->i2c, data->reg_current, 84 114 CURRENT_BITMASK, data->iset); 85 115 if (ret < 0) 86 116 goto out; ··· 93 123 } 94 124 if (brightness == MAX_BRIGHTNESS) { 95 125 /* set WLED_ON bit as 100% */ 96 - ret = pm860x_set_bits(data->i2c, wled_b(data->port), 126 + ret = pm860x_set_bits(data->i2c, data->reg_always_on, 97 127 PM8606_WLED_ON, PM8606_WLED_ON); 98 128 } 99 129 } else { 100 130 if (brightness == MAX_BRIGHTNESS) { 101 131 /* set WLED_ON bit as 100% */ 102 - ret = pm860x_set_bits(data->i2c, wled_b(data->port), 132 + ret = pm860x_set_bits(data->i2c, data->reg_always_on, 103 133 PM8606_WLED_ON, PM8606_WLED_ON); 104 134 } else { 105 135 /* clear WLED_ON bit since it's not 100% */ 106 - ret = pm860x_set_bits(data->i2c, wled_b(data->port), 136 + ret = pm860x_set_bits(data->i2c, data->reg_always_on, 107 137 PM8606_WLED_ON, 0); 108 138 } 109 139 } ··· 144 174 struct pm860x_chip *chip = data->chip; 145 175 int ret; 146 176 147 - ret = pm860x_reg_read(data->i2c, wled_a(data->port)); 177 + ret = pm860x_reg_read(data->i2c, data->reg_duty_cycle); 148 178 if (ret < 0) 149 179 goto out; 150 180 data->current_brightness = ret; ··· 160 190 .get_brightness = pm860x_backlight_get_brightness, 161 191 }; 162 192 193 + #ifdef CONFIG_OF 194 + static int pm860x_backlight_dt_init(struct platform_device *pdev, 195 + struct pm860x_backlight_data *data, 196 + char *name) 197 + { 198 + struct device_node *nproot = pdev->dev.parent->of_node, *np; 199 + int iset = 0; 200 + if (!nproot) 201 + return -ENODEV; 202 + nproot = of_find_node_by_name(nproot, "backlights"); 203 + if (!nproot) { 204 + dev_err(&pdev->dev, "failed to find backlights node\n"); 205 + return -ENODEV; 206 + } 207 + for_each_child_of_node(nproot, np) { 208 + if (!of_node_cmp(np->name, name)) { 209 + of_property_read_u32(np, "marvell,88pm860x-iset", 210 + &iset); 211 + data->iset = PM8606_WLED_CURRENT(iset); 212 + of_property_read_u32(np, "marvell,88pm860x-pwm", 213 + &data->pwm); 214 + break; 215 + } 216 + } 217 + return 0; 218 + } 219 + #else 220 + #define pm860x_backlight_dt_init(x, y, z) (-1) 221 + #endif 222 + 163 223 static int pm860x_backlight_probe(struct platform_device *pdev) 164 224 { 165 225 struct pm860x_chip *chip = dev_get_drvdata(pdev->dev.parent); 166 - struct pm860x_backlight_pdata *pdata = NULL; 226 + struct pm860x_backlight_pdata *pdata = pdev->dev.platform_data; 167 227 struct pm860x_backlight_data *data; 168 228 struct backlight_device *bl; 169 229 struct resource *res; 170 230 struct backlight_properties props; 171 231 char name[MFD_NAME_SIZE]; 172 - int ret; 173 - 174 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 175 - if (res == NULL) { 176 - dev_err(&pdev->dev, "No I/O resource!\n"); 177 - return -EINVAL; 178 - } 179 - 180 - pdata = pdev->dev.platform_data; 181 - if (pdata == NULL) { 182 - dev_err(&pdev->dev, "platform data isn't assigned to " 183 - "backlight\n"); 184 - return -EINVAL; 185 - } 232 + int ret = 0; 186 233 187 234 data = devm_kzalloc(&pdev->dev, sizeof(struct pm860x_backlight_data), 188 235 GFP_KERNEL); 189 236 if (data == NULL) 190 237 return -ENOMEM; 191 - strncpy(name, res->name, MFD_NAME_SIZE); 238 + res = platform_get_resource_byname(pdev, IORESOURCE_REG, "duty cycle"); 239 + if (!res) { 240 + dev_err(&pdev->dev, "No REG resource for duty cycle\n"); 241 + ret = -ENXIO; 242 + goto out; 243 + } 244 + data->reg_duty_cycle = res->start; 245 + res = platform_get_resource_byname(pdev, IORESOURCE_REG, "always on"); 246 + if (!res) { 247 + dev_err(&pdev->dev, "No REG resorce for always on\n"); 248 + ret = -ENXIO; 249 + goto out; 250 + } 251 + data->reg_always_on = res->start; 252 + res = platform_get_resource_byname(pdev, IORESOURCE_REG, "current"); 253 + if (!res) { 254 + dev_err(&pdev->dev, "No REG resource for current\n"); 255 + ret = -ENXIO; 256 + goto out; 257 + } 258 + data->reg_current = res->start; 259 + 260 + memset(name, 0, MFD_NAME_SIZE); 261 + sprintf(name, "backlight-%d", pdev->id); 262 + data->port = pdev->id; 192 263 data->chip = chip; 193 264 data->i2c = (chip->id == CHIP_PM8606) ? chip->client \ 194 265 : chip->companion; 195 266 data->current_brightness = MAX_BRIGHTNESS; 196 - data->pwm = pdata->pwm; 197 - data->iset = pdata->iset; 198 - data->port = pdata->flags; 199 - if (data->port < 0) { 200 - dev_err(&pdev->dev, "wrong platform data is assigned"); 201 - return -EINVAL; 267 + if (pm860x_backlight_dt_init(pdev, data, name)) { 268 + if (pdata) { 269 + data->pwm = pdata->pwm; 270 + data->iset = pdata->iset; 271 + } 202 272 } 203 273 204 274 memset(&props, 0, sizeof(struct backlight_properties)); ··· 257 247 /* read current backlight */ 258 248 ret = pm860x_backlight_get_brightness(bl); 259 249 if (ret < 0) 260 - goto out; 250 + goto out_brt; 261 251 262 252 backlight_update_status(bl); 263 253 return 0; 264 - out: 254 + out_brt: 265 255 backlight_device_unregister(bl); 256 + out: 257 + devm_kfree(&pdev->dev, data); 266 258 return ret; 267 259 } 268 260
+7
drivers/video/backlight/Kconfig
··· 373 373 If you have a Pandora console, say Y to enable the 374 374 backlight driver. 375 375 376 + config BACKLIGHT_TPS65217 377 + tristate "TPS65217 Backlight" 378 + depends on BACKLIGHT_CLASS_DEVICE && MFD_TPS65217 379 + help 380 + If you have a Texas Instruments TPS65217 say Y to enable the 381 + backlight driver. 382 + 376 383 endif # BACKLIGHT_CLASS_DEVICE 377 384 378 385 endif # BACKLIGHT_LCD_SUPPORT
+1
drivers/video/backlight/Makefile
··· 43 43 obj-$(CONFIG_BACKLIGHT_PCF50633) += pcf50633-backlight.o 44 44 obj-$(CONFIG_BACKLIGHT_AAT2870) += aat2870_bl.o 45 45 obj-$(CONFIG_BACKLIGHT_OT200) += ot200_bl.o 46 + obj-$(CONFIG_BACKLIGHT_TPS65217) += tps65217_bl.o
+41 -38
drivers/video/backlight/max8925_bl.c
··· 27 27 struct max8925_backlight_data { 28 28 struct max8925_chip *chip; 29 29 30 - int current_brightness; 30 + int current_brightness; 31 + int reg_mode_cntl; 32 + int reg_cntl; 31 33 }; 32 34 33 35 static int max8925_backlight_set(struct backlight_device *bl, int brightness) ··· 44 42 else 45 43 value = brightness; 46 44 47 - ret = max8925_reg_write(chip->i2c, MAX8925_WLED_CNTL, value); 45 + ret = max8925_reg_write(chip->i2c, data->reg_cntl, value); 48 46 if (ret < 0) 49 47 goto out; 50 48 51 49 if (!data->current_brightness && brightness) 52 50 /* enable WLED output */ 53 - ret = max8925_set_bits(chip->i2c, MAX8925_WLED_MODE_CNTL, 1, 1); 51 + ret = max8925_set_bits(chip->i2c, data->reg_mode_cntl, 1, 1); 54 52 else if (!brightness) 55 53 /* disable WLED output */ 56 - ret = max8925_set_bits(chip->i2c, MAX8925_WLED_MODE_CNTL, 1, 0); 54 + ret = max8925_set_bits(chip->i2c, data->reg_mode_cntl, 1, 0); 57 55 if (ret < 0) 58 56 goto out; 59 57 dev_dbg(chip->dev, "set brightness %d\n", value); ··· 87 85 struct max8925_chip *chip = data->chip; 88 86 int ret; 89 87 90 - ret = max8925_reg_read(chip->i2c, MAX8925_WLED_CNTL); 88 + ret = max8925_reg_read(chip->i2c, data->reg_cntl); 91 89 if (ret < 0) 92 90 return -EINVAL; 93 91 data->current_brightness = ret; ··· 104 102 static int __devinit max8925_backlight_probe(struct platform_device *pdev) 105 103 { 106 104 struct max8925_chip *chip = dev_get_drvdata(pdev->dev.parent); 107 - struct max8925_platform_data *max8925_pdata; 108 - struct max8925_backlight_pdata *pdata = NULL; 105 + struct max8925_backlight_pdata *pdata = pdev->dev.platform_data; 109 106 struct max8925_backlight_data *data; 110 107 struct backlight_device *bl; 111 108 struct backlight_properties props; 112 109 struct resource *res; 113 - char name[MAX8925_NAME_SIZE]; 114 110 unsigned char value; 115 - int ret; 116 - 117 - res = platform_get_resource(pdev, IORESOURCE_IO, 0); 118 - if (res == NULL) { 119 - dev_err(&pdev->dev, "No I/O resource!\n"); 120 - return -EINVAL; 121 - } 122 - 123 - if (pdev->dev.parent->platform_data) { 124 - max8925_pdata = pdev->dev.parent->platform_data; 125 - pdata = max8925_pdata->backlight; 126 - } 127 - 128 - if (!pdata) { 129 - dev_err(&pdev->dev, "platform data isn't assigned to " 130 - "backlight\n"); 131 - return -EINVAL; 132 - } 111 + int ret = 0; 133 112 134 113 data = devm_kzalloc(&pdev->dev, sizeof(struct max8925_backlight_data), 135 114 GFP_KERNEL); 136 115 if (data == NULL) 137 116 return -ENOMEM; 138 - strncpy(name, res->name, MAX8925_NAME_SIZE); 117 + 118 + res = platform_get_resource(pdev, IORESOURCE_REG, 0); 119 + if (!res) { 120 + dev_err(&pdev->dev, "No REG resource for mode control!\n"); 121 + ret = -ENXIO; 122 + goto out; 123 + } 124 + data->reg_mode_cntl = res->start; 125 + res = platform_get_resource(pdev, IORESOURCE_REG, 1); 126 + if (!res) { 127 + dev_err(&pdev->dev, "No REG resource for control!\n"); 128 + ret = -ENXIO; 129 + goto out; 130 + } 131 + data->reg_cntl = res->start; 132 + 139 133 data->chip = chip; 140 134 data->current_brightness = 0; 141 135 142 136 memset(&props, 0, sizeof(struct backlight_properties)); 143 137 props.type = BACKLIGHT_RAW; 144 138 props.max_brightness = MAX_BRIGHTNESS; 145 - bl = backlight_device_register(name, &pdev->dev, data, 139 + bl = backlight_device_register("max8925-backlight", &pdev->dev, data, 146 140 &max8925_backlight_ops, &props); 147 141 if (IS_ERR(bl)) { 148 142 dev_err(&pdev->dev, "failed to register backlight\n"); 149 - return PTR_ERR(bl); 143 + ret = PTR_ERR(bl); 144 + goto out; 150 145 } 151 146 bl->props.brightness = MAX_BRIGHTNESS; 152 147 153 148 platform_set_drvdata(pdev, bl); 154 149 155 150 value = 0; 156 - if (pdata->lxw_scl) 157 - value |= (1 << 7); 158 - if (pdata->lxw_freq) 159 - value |= (LWX_FREQ(pdata->lxw_freq) << 4); 160 - if (pdata->dual_string) 161 - value |= (1 << 1); 162 - ret = max8925_set_bits(chip->i2c, MAX8925_WLED_MODE_CNTL, 0xfe, value); 151 + if (pdata) { 152 + if (pdata->lxw_scl) 153 + value |= (1 << 7); 154 + if (pdata->lxw_freq) 155 + value |= (LWX_FREQ(pdata->lxw_freq) << 4); 156 + if (pdata->dual_string) 157 + value |= (1 << 1); 158 + } 159 + ret = max8925_set_bits(chip->i2c, data->reg_mode_cntl, 0xfe, value); 163 160 if (ret < 0) 164 - goto out; 161 + goto out_brt; 165 162 166 163 backlight_update_status(bl); 167 164 return 0; 168 - out: 165 + out_brt: 169 166 backlight_device_unregister(bl); 167 + out: 168 + devm_kfree(&pdev->dev, data); 170 169 return ret; 171 170 } 172 171
+342
drivers/video/backlight/tps65217_bl.c
··· 1 + /* 2 + * tps65217_bl.c 3 + * 4 + * TPS65217 backlight driver 5 + * 6 + * Copyright (C) 2012 Matthias Kaehlcke 7 + * Author: Matthias Kaehlcke <matthias@kaehlcke.net> 8 + * 9 + * This program is free software; you can redistribute it and/or 10 + * modify it under the terms of the GNU General Public License as 11 + * published by the Free Software Foundation version 2. 12 + * 13 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any 14 + * kind, whether express or implied; without even the implied warranty 15 + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 + * GNU General Public License for more details. 17 + */ 18 + 19 + #include <linux/kernel.h> 20 + #include <linux/backlight.h> 21 + #include <linux/err.h> 22 + #include <linux/fb.h> 23 + #include <linux/mfd/tps65217.h> 24 + #include <linux/module.h> 25 + #include <linux/platform_device.h> 26 + #include <linux/slab.h> 27 + 28 + struct tps65217_bl { 29 + struct tps65217 *tps; 30 + struct device *dev; 31 + struct backlight_device *bl; 32 + bool is_enabled; 33 + }; 34 + 35 + static int tps65217_bl_enable(struct tps65217_bl *tps65217_bl) 36 + { 37 + int rc; 38 + 39 + rc = tps65217_set_bits(tps65217_bl->tps, TPS65217_REG_WLEDCTRL1, 40 + TPS65217_WLEDCTRL1_ISINK_ENABLE, 41 + TPS65217_WLEDCTRL1_ISINK_ENABLE, TPS65217_PROTECT_NONE); 42 + if (rc) { 43 + dev_err(tps65217_bl->dev, 44 + "failed to enable backlight: %d\n", rc); 45 + return rc; 46 + } 47 + 48 + tps65217_bl->is_enabled = true; 49 + 50 + dev_dbg(tps65217_bl->dev, "backlight enabled\n"); 51 + 52 + return 0; 53 + } 54 + 55 + static int tps65217_bl_disable(struct tps65217_bl *tps65217_bl) 56 + { 57 + int rc; 58 + 59 + rc = tps65217_clear_bits(tps65217_bl->tps, 60 + TPS65217_REG_WLEDCTRL1, 61 + TPS65217_WLEDCTRL1_ISINK_ENABLE, 62 + TPS65217_PROTECT_NONE); 63 + if (rc) { 64 + dev_err(tps65217_bl->dev, 65 + "failed to disable backlight: %d\n", rc); 66 + return rc; 67 + } 68 + 69 + tps65217_bl->is_enabled = false; 70 + 71 + dev_dbg(tps65217_bl->dev, "backlight disabled\n"); 72 + 73 + return 0; 74 + } 75 + 76 + static int tps65217_bl_update_status(struct backlight_device *bl) 77 + { 78 + struct tps65217_bl *tps65217_bl = bl_get_data(bl); 79 + int rc; 80 + int brightness = bl->props.brightness; 81 + 82 + if (bl->props.state & BL_CORE_SUSPENDED) 83 + brightness = 0; 84 + 85 + if ((bl->props.power != FB_BLANK_UNBLANK) || 86 + (bl->props.fb_blank != FB_BLANK_UNBLANK)) 87 + /* framebuffer in low power mode or blanking active */ 88 + brightness = 0; 89 + 90 + if (brightness > 0) { 91 + rc = tps65217_reg_write(tps65217_bl->tps, 92 + TPS65217_REG_WLEDCTRL2, 93 + brightness - 1, 94 + TPS65217_PROTECT_NONE); 95 + if (rc) { 96 + dev_err(tps65217_bl->dev, 97 + "failed to set brightness level: %d\n", rc); 98 + return rc; 99 + } 100 + 101 + dev_dbg(tps65217_bl->dev, "brightness set to %d\n", brightness); 102 + 103 + if (!tps65217_bl->is_enabled) 104 + rc = tps65217_bl_enable(tps65217_bl); 105 + } else { 106 + rc = tps65217_bl_disable(tps65217_bl); 107 + } 108 + 109 + return rc; 110 + } 111 + 112 + static int tps65217_bl_get_brightness(struct backlight_device *bl) 113 + { 114 + return bl->props.brightness; 115 + } 116 + 117 + static const struct backlight_ops tps65217_bl_ops = { 118 + .options = BL_CORE_SUSPENDRESUME, 119 + .update_status = tps65217_bl_update_status, 120 + .get_brightness = tps65217_bl_get_brightness 121 + }; 122 + 123 + static int tps65217_bl_hw_init(struct tps65217_bl *tps65217_bl, 124 + struct tps65217_bl_pdata *pdata) 125 + { 126 + int rc; 127 + 128 + rc = tps65217_bl_disable(tps65217_bl); 129 + if (rc) 130 + return rc; 131 + 132 + switch (pdata->isel) { 133 + case TPS65217_BL_ISET1: 134 + /* select ISET_1 current level */ 135 + rc = tps65217_clear_bits(tps65217_bl->tps, 136 + TPS65217_REG_WLEDCTRL1, 137 + TPS65217_WLEDCTRL1_ISEL, 138 + TPS65217_PROTECT_NONE); 139 + if (rc) { 140 + dev_err(tps65217_bl->dev, 141 + "failed to select ISET1 current level: %d)\n", 142 + rc); 143 + return rc; 144 + } 145 + 146 + dev_dbg(tps65217_bl->dev, "selected ISET1 current level\n"); 147 + 148 + break; 149 + 150 + case TPS65217_BL_ISET2: 151 + /* select ISET2 current level */ 152 + rc = tps65217_set_bits(tps65217_bl->tps, TPS65217_REG_WLEDCTRL1, 153 + TPS65217_WLEDCTRL1_ISEL, 154 + TPS65217_WLEDCTRL1_ISEL, TPS65217_PROTECT_NONE); 155 + if (rc) { 156 + dev_err(tps65217_bl->dev, 157 + "failed to select ISET2 current level: %d\n", 158 + rc); 159 + return rc; 160 + } 161 + 162 + dev_dbg(tps65217_bl->dev, "selected ISET2 current level\n"); 163 + 164 + break; 165 + 166 + default: 167 + dev_err(tps65217_bl->dev, 168 + "invalid value for current level: %d\n", pdata->isel); 169 + return -EINVAL; 170 + } 171 + 172 + /* set PWM frequency */ 173 + rc = tps65217_set_bits(tps65217_bl->tps, 174 + TPS65217_REG_WLEDCTRL1, 175 + TPS65217_WLEDCTRL1_FDIM_MASK, 176 + pdata->fdim, 177 + TPS65217_PROTECT_NONE); 178 + if (rc) { 179 + dev_err(tps65217_bl->dev, 180 + "failed to select PWM dimming frequency: %d\n", 181 + rc); 182 + return rc; 183 + } 184 + 185 + return 0; 186 + } 187 + 188 + #ifdef CONFIG_OF 189 + static struct tps65217_bl_pdata * 190 + tps65217_bl_parse_dt(struct platform_device *pdev) 191 + { 192 + struct tps65217 *tps = dev_get_drvdata(pdev->dev.parent); 193 + struct device_node *node = of_node_get(tps->dev->of_node); 194 + struct tps65217_bl_pdata *pdata, *err; 195 + u32 val; 196 + 197 + node = of_find_node_by_name(node, "backlight"); 198 + if (!node) 199 + return ERR_PTR(-ENODEV); 200 + 201 + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 202 + if (!pdata) { 203 + dev_err(&pdev->dev, "failed to allocate platform data\n"); 204 + err = ERR_PTR(-ENOMEM); 205 + goto err; 206 + } 207 + 208 + pdata->isel = TPS65217_BL_ISET1; 209 + if (!of_property_read_u32(node, "isel", &val)) { 210 + if (val < TPS65217_BL_ISET1 || 211 + val > TPS65217_BL_ISET2) { 212 + dev_err(&pdev->dev, 213 + "invalid 'isel' value in the device tree\n"); 214 + err = ERR_PTR(-EINVAL); 215 + goto err; 216 + } 217 + 218 + pdata->isel = val; 219 + } 220 + 221 + pdata->fdim = TPS65217_BL_FDIM_200HZ; 222 + if (!of_property_read_u32(node, "fdim", &val)) { 223 + switch (val) { 224 + case 100: 225 + pdata->fdim = TPS65217_BL_FDIM_100HZ; 226 + break; 227 + 228 + case 200: 229 + pdata->fdim = TPS65217_BL_FDIM_200HZ; 230 + break; 231 + 232 + case 500: 233 + pdata->fdim = TPS65217_BL_FDIM_500HZ; 234 + break; 235 + 236 + case 1000: 237 + pdata->fdim = TPS65217_BL_FDIM_1000HZ; 238 + break; 239 + 240 + default: 241 + dev_err(&pdev->dev, 242 + "invalid 'fdim' value in the device tree\n"); 243 + err = ERR_PTR(-EINVAL); 244 + goto err; 245 + } 246 + } 247 + 248 + of_node_put(node); 249 + 250 + return pdata; 251 + 252 + err: 253 + of_node_put(node); 254 + 255 + return err; 256 + } 257 + #else 258 + static struct tps65217_bl_pdata * 259 + tps65217_bl_parse_dt(struct platform_device *pdev) 260 + { 261 + return NULL; 262 + } 263 + #endif 264 + 265 + static int tps65217_bl_probe(struct platform_device *pdev) 266 + { 267 + int rc; 268 + struct tps65217 *tps = dev_get_drvdata(pdev->dev.parent); 269 + struct tps65217_bl *tps65217_bl; 270 + struct tps65217_bl_pdata *pdata; 271 + struct backlight_properties bl_props; 272 + 273 + if (tps->dev->of_node) { 274 + pdata = tps65217_bl_parse_dt(pdev); 275 + if (IS_ERR(pdata)) 276 + return PTR_ERR(pdata); 277 + } else { 278 + if (!pdev->dev.platform_data) { 279 + dev_err(&pdev->dev, "no platform data provided\n"); 280 + return -EINVAL; 281 + } 282 + 283 + pdata = pdev->dev.platform_data; 284 + } 285 + 286 + tps65217_bl = devm_kzalloc(&pdev->dev, sizeof(*tps65217_bl), 287 + GFP_KERNEL); 288 + if (tps65217_bl == NULL) { 289 + dev_err(&pdev->dev, "allocation of struct tps65217_bl failed\n"); 290 + return -ENOMEM; 291 + } 292 + 293 + tps65217_bl->tps = tps; 294 + tps65217_bl->dev = &pdev->dev; 295 + tps65217_bl->is_enabled = false; 296 + 297 + rc = tps65217_bl_hw_init(tps65217_bl, pdata); 298 + if (rc) 299 + return rc; 300 + 301 + memset(&bl_props, 0, sizeof(struct backlight_properties)); 302 + bl_props.type = BACKLIGHT_RAW; 303 + bl_props.max_brightness = 100; 304 + 305 + tps65217_bl->bl = backlight_device_register(pdev->name, 306 + tps65217_bl->dev, tps65217_bl, 307 + &tps65217_bl_ops, &bl_props); 308 + if (IS_ERR(tps65217_bl->bl)) { 309 + dev_err(tps65217_bl->dev, 310 + "registration of backlight device failed: %d\n", rc); 311 + return PTR_ERR(tps65217_bl->bl); 312 + } 313 + 314 + tps65217_bl->bl->props.brightness = 0; 315 + platform_set_drvdata(pdev, tps65217_bl); 316 + 317 + return 0; 318 + } 319 + 320 + static int tps65217_bl_remove(struct platform_device *pdev) 321 + { 322 + struct tps65217_bl *tps65217_bl = platform_get_drvdata(pdev); 323 + 324 + backlight_device_unregister(tps65217_bl->bl); 325 + 326 + return 0; 327 + } 328 + 329 + static struct platform_driver tps65217_bl_driver = { 330 + .probe = tps65217_bl_probe, 331 + .remove = tps65217_bl_remove, 332 + .driver = { 333 + .owner = THIS_MODULE, 334 + .name = "tps65217-bl", 335 + }, 336 + }; 337 + 338 + module_platform_driver(tps65217_bl_driver); 339 + 340 + MODULE_DESCRIPTION("TPS65217 Backlight driver"); 341 + MODULE_LICENSE("GPL v2"); 342 + MODULE_AUTHOR("Matthias Kaehlcke <matthias@kaehlcke.net>");
+1
drivers/watchdog/iTCO_wdt.c
··· 37 37 * document number TBD : DH89xxCC 38 38 * document number TBD : Panther Point 39 39 * document number TBD : Lynx Point 40 + * document number TBD : Lynx Point-LP 40 41 */ 41 42 42 43 /*
+1
include/linux/i2c/twl.h
··· 188 188 189 189 int twl_get_type(void); 190 190 int twl_get_version(void); 191 + int twl_get_hfclk_rate(void); 191 192 192 193 int twl6030_interrupt_unmask(u8 bit_mask, u8 offset); 193 194 int twl6030_interrupt_mask(u8 bit_mask, u8 offset);
+2 -1
include/linux/ioport.h
··· 29 29 #define IORESOURCE_BITS 0x000000ff /* Bus-specific bits */ 30 30 31 31 #define IORESOURCE_TYPE_BITS 0x00001f00 /* Resource type */ 32 - #define IORESOURCE_IO 0x00000100 32 + #define IORESOURCE_IO 0x00000100 /* PCI/ISA I/O ports */ 33 33 #define IORESOURCE_MEM 0x00000200 34 + #define IORESOURCE_REG 0x00000300 /* Register offsets */ 34 35 #define IORESOURCE_IRQ 0x00000400 35 36 #define IORESOURCE_DMA 0x00000800 36 37 #define IORESOURCE_BUS 0x00001000
+18 -28
include/linux/mfd/88pm860x.h
··· 34 34 PM8606_ID_MAX, 35 35 }; 36 36 37 - enum { 38 - PM8606_BACKLIGHT1 = 0, 39 - PM8606_BACKLIGHT2, 40 - PM8606_BACKLIGHT3, 41 - }; 42 - 43 - enum { 44 - PM8606_LED1_RED = 0, 45 - PM8606_LED1_GREEN, 46 - PM8606_LED1_BLUE, 47 - PM8606_LED2_RED, 48 - PM8606_LED2_GREEN, 49 - PM8606_LED2_BLUE, 50 - PM8607_LED_VIBRATOR, 51 - }; 52 - 53 37 54 38 /* 8606 Registers */ 55 39 #define PM8606_DCM_BOOST (0x00) ··· 306 322 struct regmap *regmap_companion; 307 323 308 324 int buck3_double; /* DVC ramp slope double */ 309 - unsigned short companion_addr; 325 + int companion_addr; 310 326 unsigned short osc_vote; 311 327 int id; 312 328 int irq_mode; ··· 324 340 }; 325 341 326 342 struct pm860x_backlight_pdata { 327 - int id; 328 343 int pwm; 329 344 int iset; 330 - unsigned long flags; 331 345 }; 332 346 333 347 struct pm860x_led_pdata { 334 - int id; 335 348 int iset; 336 - unsigned long flags; 337 349 }; 338 350 339 351 struct pm860x_rtc_pdata { ··· 359 379 struct pm860x_rtc_pdata *rtc; 360 380 struct pm860x_touch_pdata *touch; 361 381 struct pm860x_power_pdata *power; 362 - struct regulator_init_data *regulator; 382 + struct regulator_init_data *buck1; 383 + struct regulator_init_data *buck2; 384 + struct regulator_init_data *buck3; 385 + struct regulator_init_data *ldo1; 386 + struct regulator_init_data *ldo2; 387 + struct regulator_init_data *ldo3; 388 + struct regulator_init_data *ldo4; 389 + struct regulator_init_data *ldo5; 390 + struct regulator_init_data *ldo6; 391 + struct regulator_init_data *ldo7; 392 + struct regulator_init_data *ldo8; 393 + struct regulator_init_data *ldo9; 394 + struct regulator_init_data *ldo10; 395 + struct regulator_init_data *ldo12; 396 + struct regulator_init_data *ldo_vibrator; 397 + struct regulator_init_data *ldo14; 363 398 364 - unsigned short companion_addr; /* I2C address of companion chip */ 399 + int companion_addr; /* I2C address of companion chip */ 365 400 int i2c_port; /* Controlled by GI2C or PI2C */ 366 401 int irq_mode; /* Clear interrupt by read/write(0/1) */ 367 402 int irq_base; /* IRQ base number of 88pm860x */ 368 403 int num_leds; 369 404 int num_backlights; 370 - int num_regulators; 371 405 }; 372 406 373 407 extern int pm8606_osc_enable(struct pm860x_chip *, unsigned short); ··· 401 407 unsigned char *); 402 408 extern int pm860x_page_set_bits(struct i2c_client *, int, unsigned char, 403 409 unsigned char); 404 - 405 - extern int pm860x_device_init(struct pm860x_chip *chip, 406 - struct pm860x_platform_data *pdata) __devinit ; 407 - extern void pm860x_device_exit(struct pm860x_chip *chip) __devexit ; 408 410 409 411 #endif /* __LINUX_MFD_88PM860X_H */
+129
include/linux/mfd/ab3100.h
··· 1 + /* 2 + * Copyright (C) 2007-2009 ST-Ericsson AB 3 + * License terms: GNU General Public License (GPL) version 2 4 + * AB3100 core access functions 5 + * Author: Linus Walleij <linus.walleij@stericsson.com> 6 + * 7 + */ 8 + 9 + #include <linux/regulator/machine.h> 10 + 11 + struct device; 12 + 13 + #ifndef MFD_AB3100_H 14 + #define MFD_AB3100_H 15 + 16 + 17 + #define AB3100_P1A 0xc0 18 + #define AB3100_P1B 0xc1 19 + #define AB3100_P1C 0xc2 20 + #define AB3100_P1D 0xc3 21 + #define AB3100_P1E 0xc4 22 + #define AB3100_P1F 0xc5 23 + #define AB3100_P1G 0xc6 24 + #define AB3100_R2A 0xc7 25 + #define AB3100_R2B 0xc8 26 + 27 + /* 28 + * AB3100, EVENTA1, A2 and A3 event register flags 29 + * these are catenated into a single 32-bit flag in the code 30 + * for event notification broadcasts. 31 + */ 32 + #define AB3100_EVENTA1_ONSWA (0x01<<16) 33 + #define AB3100_EVENTA1_ONSWB (0x02<<16) 34 + #define AB3100_EVENTA1_ONSWC (0x04<<16) 35 + #define AB3100_EVENTA1_DCIO (0x08<<16) 36 + #define AB3100_EVENTA1_OVER_TEMP (0x10<<16) 37 + #define AB3100_EVENTA1_SIM_OFF (0x20<<16) 38 + #define AB3100_EVENTA1_VBUS (0x40<<16) 39 + #define AB3100_EVENTA1_VSET_USB (0x80<<16) 40 + 41 + #define AB3100_EVENTA2_READY_TX (0x01<<8) 42 + #define AB3100_EVENTA2_READY_RX (0x02<<8) 43 + #define AB3100_EVENTA2_OVERRUN_ERROR (0x04<<8) 44 + #define AB3100_EVENTA2_FRAMING_ERROR (0x08<<8) 45 + #define AB3100_EVENTA2_CHARG_OVERCURRENT (0x10<<8) 46 + #define AB3100_EVENTA2_MIDR (0x20<<8) 47 + #define AB3100_EVENTA2_BATTERY_REM (0x40<<8) 48 + #define AB3100_EVENTA2_ALARM (0x80<<8) 49 + 50 + #define AB3100_EVENTA3_ADC_TRIG5 (0x01) 51 + #define AB3100_EVENTA3_ADC_TRIG4 (0x02) 52 + #define AB3100_EVENTA3_ADC_TRIG3 (0x04) 53 + #define AB3100_EVENTA3_ADC_TRIG2 (0x08) 54 + #define AB3100_EVENTA3_ADC_TRIGVBAT (0x10) 55 + #define AB3100_EVENTA3_ADC_TRIGVTX (0x20) 56 + #define AB3100_EVENTA3_ADC_TRIG1 (0x40) 57 + #define AB3100_EVENTA3_ADC_TRIG0 (0x80) 58 + 59 + /* AB3100, STR register flags */ 60 + #define AB3100_STR_ONSWA (0x01) 61 + #define AB3100_STR_ONSWB (0x02) 62 + #define AB3100_STR_ONSWC (0x04) 63 + #define AB3100_STR_DCIO (0x08) 64 + #define AB3100_STR_BOOT_MODE (0x10) 65 + #define AB3100_STR_SIM_OFF (0x20) 66 + #define AB3100_STR_BATT_REMOVAL (0x40) 67 + #define AB3100_STR_VBUS (0x80) 68 + 69 + /* 70 + * AB3100 contains 8 regulators, one external regulator controller 71 + * and a buck converter, further the LDO E and buck converter can 72 + * have separate settings if they are in sleep mode, this is 73 + * modeled as a separate regulator. 74 + */ 75 + #define AB3100_NUM_REGULATORS 10 76 + 77 + /** 78 + * struct ab3100 79 + * @access_mutex: lock out concurrent accesses to the AB3100 registers 80 + * @dev: pointer to the containing device 81 + * @i2c_client: I2C client for this chip 82 + * @testreg_client: secondary client for test registers 83 + * @chip_name: name of this chip variant 84 + * @chip_id: 8 bit chip ID for this chip variant 85 + * @event_subscribers: event subscribers are listed here 86 + * @startup_events: a copy of the first reading of the event registers 87 + * @startup_events_read: whether the first events have been read 88 + * 89 + * This struct is PRIVATE and devices using it should NOT 90 + * access ANY fields. It is used as a token for calling the 91 + * AB3100 functions. 92 + */ 93 + struct ab3100 { 94 + struct mutex access_mutex; 95 + struct device *dev; 96 + struct i2c_client *i2c_client; 97 + struct i2c_client *testreg_client; 98 + char chip_name[32]; 99 + u8 chip_id; 100 + struct blocking_notifier_head event_subscribers; 101 + u8 startup_events[3]; 102 + bool startup_events_read; 103 + }; 104 + 105 + /** 106 + * struct ab3100_platform_data 107 + * Data supplied to initialize board connections to the AB3100 108 + * @reg_constraints: regulator constraints for target board 109 + * the order of these constraints are: LDO A, C, D, E, 110 + * F, G, H, K, EXT and BUCK. 111 + * @reg_initvals: initial values for the regulator registers 112 + * plus two sleep settings for LDO E and the BUCK converter. 113 + * exactly AB3100_NUM_REGULATORS+2 values must be sent in. 114 + * Order: LDO A, C, E, E sleep, F, G, H, K, EXT, BUCK, 115 + * BUCK sleep, LDO D. (LDO D need to be initialized last.) 116 + * @external_voltage: voltage level of the external regulator. 117 + */ 118 + struct ab3100_platform_data { 119 + struct regulator_init_data reg_constraints[AB3100_NUM_REGULATORS]; 120 + u8 reg_initvals[AB3100_NUM_REGULATORS+2]; 121 + int external_voltage; 122 + }; 123 + 124 + int ab3100_event_register(struct ab3100 *ab3100, 125 + struct notifier_block *nb); 126 + int ab3100_event_unregister(struct ab3100 *ab3100, 127 + struct notifier_block *nb); 128 + 129 + #endif /* MFD_AB3100_H */
+1 -116
include/linux/mfd/abx500.h
··· 1 1 /* 2 2 * Copyright (C) 2007-2009 ST-Ericsson AB 3 3 * License terms: GNU General Public License (GPL) version 2 4 - * AB3100 core access functions 5 - * Author: Linus Walleij <linus.walleij@stericsson.com> 6 4 * 7 5 * ABX500 core access functions. 8 - * The abx500 interface is used for the Analog Baseband chip 9 - * ab3100 and ab8500. 6 + * The abx500 interface is used for the Analog Baseband chips. 10 7 * 11 8 * Author: Mattias Wallin <mattias.wallin@stericsson.com> 12 9 * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> ··· 17 20 18 21 #ifndef MFD_ABX500_H 19 22 #define MFD_ABX500_H 20 - 21 - #define AB3100_P1A 0xc0 22 - #define AB3100_P1B 0xc1 23 - #define AB3100_P1C 0xc2 24 - #define AB3100_P1D 0xc3 25 - #define AB3100_P1E 0xc4 26 - #define AB3100_P1F 0xc5 27 - #define AB3100_P1G 0xc6 28 - #define AB3100_R2A 0xc7 29 - #define AB3100_R2B 0xc8 30 - 31 - /* 32 - * AB3100, EVENTA1, A2 and A3 event register flags 33 - * these are catenated into a single 32-bit flag in the code 34 - * for event notification broadcasts. 35 - */ 36 - #define AB3100_EVENTA1_ONSWA (0x01<<16) 37 - #define AB3100_EVENTA1_ONSWB (0x02<<16) 38 - #define AB3100_EVENTA1_ONSWC (0x04<<16) 39 - #define AB3100_EVENTA1_DCIO (0x08<<16) 40 - #define AB3100_EVENTA1_OVER_TEMP (0x10<<16) 41 - #define AB3100_EVENTA1_SIM_OFF (0x20<<16) 42 - #define AB3100_EVENTA1_VBUS (0x40<<16) 43 - #define AB3100_EVENTA1_VSET_USB (0x80<<16) 44 - 45 - #define AB3100_EVENTA2_READY_TX (0x01<<8) 46 - #define AB3100_EVENTA2_READY_RX (0x02<<8) 47 - #define AB3100_EVENTA2_OVERRUN_ERROR (0x04<<8) 48 - #define AB3100_EVENTA2_FRAMING_ERROR (0x08<<8) 49 - #define AB3100_EVENTA2_CHARG_OVERCURRENT (0x10<<8) 50 - #define AB3100_EVENTA2_MIDR (0x20<<8) 51 - #define AB3100_EVENTA2_BATTERY_REM (0x40<<8) 52 - #define AB3100_EVENTA2_ALARM (0x80<<8) 53 - 54 - #define AB3100_EVENTA3_ADC_TRIG5 (0x01) 55 - #define AB3100_EVENTA3_ADC_TRIG4 (0x02) 56 - #define AB3100_EVENTA3_ADC_TRIG3 (0x04) 57 - #define AB3100_EVENTA3_ADC_TRIG2 (0x08) 58 - #define AB3100_EVENTA3_ADC_TRIGVBAT (0x10) 59 - #define AB3100_EVENTA3_ADC_TRIGVTX (0x20) 60 - #define AB3100_EVENTA3_ADC_TRIG1 (0x40) 61 - #define AB3100_EVENTA3_ADC_TRIG0 (0x80) 62 - 63 - /* AB3100, STR register flags */ 64 - #define AB3100_STR_ONSWA (0x01) 65 - #define AB3100_STR_ONSWB (0x02) 66 - #define AB3100_STR_ONSWC (0x04) 67 - #define AB3100_STR_DCIO (0x08) 68 - #define AB3100_STR_BOOT_MODE (0x10) 69 - #define AB3100_STR_SIM_OFF (0x20) 70 - #define AB3100_STR_BATT_REMOVAL (0x40) 71 - #define AB3100_STR_VBUS (0x80) 72 - 73 - /* 74 - * AB3100 contains 8 regulators, one external regulator controller 75 - * and a buck converter, further the LDO E and buck converter can 76 - * have separate settings if they are in sleep mode, this is 77 - * modeled as a separate regulator. 78 - */ 79 - #define AB3100_NUM_REGULATORS 10 80 - 81 - /** 82 - * struct ab3100 83 - * @access_mutex: lock out concurrent accesses to the AB3100 registers 84 - * @dev: pointer to the containing device 85 - * @i2c_client: I2C client for this chip 86 - * @testreg_client: secondary client for test registers 87 - * @chip_name: name of this chip variant 88 - * @chip_id: 8 bit chip ID for this chip variant 89 - * @event_subscribers: event subscribers are listed here 90 - * @startup_events: a copy of the first reading of the event registers 91 - * @startup_events_read: whether the first events have been read 92 - * 93 - * This struct is PRIVATE and devices using it should NOT 94 - * access ANY fields. It is used as a token for calling the 95 - * AB3100 functions. 96 - */ 97 - struct ab3100 { 98 - struct mutex access_mutex; 99 - struct device *dev; 100 - struct i2c_client *i2c_client; 101 - struct i2c_client *testreg_client; 102 - char chip_name[32]; 103 - u8 chip_id; 104 - struct blocking_notifier_head event_subscribers; 105 - u8 startup_events[3]; 106 - bool startup_events_read; 107 - }; 108 - 109 - /** 110 - * struct ab3100_platform_data 111 - * Data supplied to initialize board connections to the AB3100 112 - * @reg_constraints: regulator constraints for target board 113 - * the order of these constraints are: LDO A, C, D, E, 114 - * F, G, H, K, EXT and BUCK. 115 - * @reg_initvals: initial values for the regulator registers 116 - * plus two sleep settings for LDO E and the BUCK converter. 117 - * exactly AB3100_NUM_REGULATORS+2 values must be sent in. 118 - * Order: LDO A, C, E, E sleep, F, G, H, K, EXT, BUCK, 119 - * BUCK sleep, LDO D. (LDO D need to be initialized last.) 120 - * @external_voltage: voltage level of the external regulator. 121 - */ 122 - struct ab3100_platform_data { 123 - struct regulator_init_data reg_constraints[AB3100_NUM_REGULATORS]; 124 - u8 reg_initvals[AB3100_NUM_REGULATORS+2]; 125 - int external_voltage; 126 - }; 127 - 128 - int ab3100_event_register(struct ab3100 *ab3100, 129 - struct notifier_block *nb); 130 - int ab3100_event_unregister(struct ab3100 *ab3100, 131 - struct notifier_block *nb); 132 23 133 24 /** 134 25 * struct abx500_init_setting
-2
include/linux/mfd/abx500/ab8500.h
··· 341 341 return (is_ab8500(ab) && (ab->chip_id == AB8500_CUT2P0)); 342 342 } 343 343 344 - int ab8500_irq_get_virq(struct ab8500 *ab8500, int irq); 345 - 346 344 #endif /* MFD_AB8500_H */
-40
include/linux/mfd/anatop.h
··· 1 - /* 2 - * anatop.h - Anatop MFD driver 3 - * 4 - * Copyright (C) 2012 Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> 5 - * Copyright (C) 2012 Linaro 6 - * 7 - * This program is free software; you can redistribute it and/or modify 8 - * it under the terms of the GNU General Public License as published by 9 - * the Free Software Foundation; either version 2 of the License, or 10 - * (at your option) any later version. 11 - * 12 - * This program is distributed in the hope that it will be useful, 13 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 - * GNU General Public License for more details. 16 - * 17 - * You should have received a copy of the GNU General Public License 18 - * along with this program; if not, write to the Free Software 19 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 - */ 21 - 22 - #ifndef __LINUX_MFD_ANATOP_H 23 - #define __LINUX_MFD_ANATOP_H 24 - 25 - #include <linux/spinlock.h> 26 - 27 - /** 28 - * anatop - MFD data 29 - * @ioreg: ioremap register 30 - * @reglock: spinlock for register read/write 31 - */ 32 - struct anatop { 33 - void *ioreg; 34 - spinlock_t reglock; 35 - }; 36 - 37 - extern u32 anatop_read_reg(struct anatop *, u32); 38 - extern void anatop_write_reg(struct anatop *, u32, u32, u32); 39 - 40 - #endif /* __LINUX_MFD_ANATOP_H */
+94
include/linux/mfd/da9055/core.h
··· 1 + /* 2 + * da9055 declarations for DA9055 PMICs. 3 + * 4 + * Copyright(c) 2012 Dialog Semiconductor Ltd. 5 + * 6 + * Author: David Dajun Chen <dchen@diasemi.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License as published by 10 + * the Free Software Foundation; either version 2 of the License, or 11 + * (at your option) any later version. 12 + * 13 + * This program is distributed in the hope that it will be useful, 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 + * GNU General Public License for more details. 17 + * 18 + * You should have received a copy of the GNU General Public License 19 + * along with this program; if not, write to the Free Software 20 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 + * 22 + */ 23 + 24 + #ifndef __DA9055_CORE_H 25 + #define __DA9055_CORE_H 26 + 27 + #include <linux/interrupt.h> 28 + #include <linux/regmap.h> 29 + 30 + /* 31 + * PMIC IRQ 32 + */ 33 + #define DA9055_IRQ_ALARM 0x01 34 + #define DA9055_IRQ_TICK 0x02 35 + #define DA9055_IRQ_NONKEY 0x00 36 + #define DA9055_IRQ_REGULATOR 0x0B 37 + #define DA9055_IRQ_HWMON 0x03 38 + 39 + struct da9055_pdata; 40 + 41 + struct da9055 { 42 + struct regmap *regmap; 43 + struct regmap_irq_chip_data *irq_data; 44 + struct device *dev; 45 + struct i2c_client *i2c_client; 46 + 47 + int irq_base; 48 + int chip_irq; 49 + }; 50 + 51 + /* Device I/O */ 52 + static inline int da9055_reg_read(struct da9055 *da9055, unsigned char reg) 53 + { 54 + int val, ret; 55 + 56 + ret = regmap_read(da9055->regmap, reg, &val); 57 + if (ret < 0) 58 + return ret; 59 + 60 + return val; 61 + } 62 + 63 + static inline int da9055_reg_write(struct da9055 *da9055, unsigned char reg, 64 + unsigned char val) 65 + { 66 + return regmap_write(da9055->regmap, reg, val); 67 + } 68 + 69 + static inline int da9055_group_read(struct da9055 *da9055, unsigned char reg, 70 + unsigned reg_cnt, unsigned char *val) 71 + { 72 + return regmap_bulk_read(da9055->regmap, reg, val, reg_cnt); 73 + } 74 + 75 + static inline int da9055_group_write(struct da9055 *da9055, unsigned char reg, 76 + unsigned reg_cnt, unsigned char *val) 77 + { 78 + return regmap_raw_write(da9055->regmap, reg, val, reg_cnt); 79 + } 80 + 81 + static inline int da9055_reg_update(struct da9055 *da9055, unsigned char reg, 82 + unsigned char bit_mask, 83 + unsigned char reg_val) 84 + { 85 + return regmap_update_bits(da9055->regmap, reg, bit_mask, reg_val); 86 + } 87 + 88 + /* Generic Device API */ 89 + int da9055_device_init(struct da9055 *da9055); 90 + void da9055_device_exit(struct da9055 *da9055); 91 + 92 + extern struct regmap_config da9055_regmap_config; 93 + 94 + #endif /* __DA9055_CORE_H */
+32
include/linux/mfd/da9055/pdata.h
··· 1 + /* Copyright (C) 2012 Dialog Semiconductor Ltd. 2 + * 3 + * This program is free software; you can redistribute it and/or modify 4 + * it under the terms of the GNU General Public License as published by 5 + * the Free Software Foundation; either version 2 of the License, or 6 + * (at your option) any later version. 7 + * 8 + */ 9 + #ifndef __DA9055_PDATA_H 10 + #define __DA9055_PDATA_H 11 + 12 + #define DA9055_MAX_REGULATORS 8 13 + 14 + struct da9055; 15 + 16 + enum gpio_select { 17 + NO_GPIO = 0, 18 + GPIO_1, 19 + GPIO_2 20 + }; 21 + 22 + struct da9055_pdata { 23 + int (*init) (struct da9055 *da9055); 24 + int irq_base; 25 + int gpio_base; 26 + 27 + struct regulator_init_data *regulators[DA9055_MAX_REGULATORS]; 28 + bool reset_enable; /* Enable RTC in RESET Mode */ 29 + enum gpio_select *gpio_rsel; /* Select regulator set thru GPIO 1/2 */ 30 + enum gpio_select *gpio_ren; /* Enable regulator thru GPIO 1/2 */ 31 + }; 32 + #endif /* __DA9055_PDATA_H */
+699
include/linux/mfd/da9055/reg.h
··· 1 + /* 2 + * DA9055 declarations for DA9055 PMICs. 3 + * 4 + * Copyright(c) 2012 Dialog Semiconductor Ltd. 5 + * 6 + * Author: David Dajun Chen <dchen@diasemi.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License as published by 10 + * the Free Software Foundation; either version 2 of the License, or 11 + * (at your option) any later version. 12 + * 13 + * This program is distributed in the hope that it will be useful, 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 + * GNU General Public License for more details. 17 + * 18 + * You should have received a copy of the GNU General Public License 19 + * along with this program; if not, write to the Free Software 20 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 + * 22 + */ 23 + 24 + #ifndef __DA9055_REG_H 25 + #define __DA9055_REG_H 26 + 27 + /* 28 + * PMIC registers 29 + */ 30 + /* PAGE0 */ 31 + #define DA9055_REG_PAGE_CON 0x00 32 + 33 + /* System Control and Event Registers */ 34 + #define DA9055_REG_STATUS_A 0x01 35 + #define DA9055_REG_STATUS_B 0x02 36 + #define DA9055_REG_FAULT_LOG 0x03 37 + #define DA9055_REG_EVENT_A 0x04 38 + #define DA9055_REG_EVENT_B 0x05 39 + #define DA9055_REG_EVENT_C 0x06 40 + #define DA9055_REG_IRQ_MASK_A 0x07 41 + #define DA9055_REG_IRQ_MASK_B 0x08 42 + #define DA9055_REG_IRQ_MASK_C 0x09 43 + #define DA9055_REG_CONTROL_A 0x0A 44 + #define DA9055_REG_CONTROL_B 0x0B 45 + #define DA9055_REG_CONTROL_C 0x0C 46 + #define DA9055_REG_CONTROL_D 0x0D 47 + #define DA9055_REG_CONTROL_E 0x0E 48 + #define DA9055_REG_PD_DIS 0x0F 49 + 50 + /* GPIO Control Registers */ 51 + #define DA9055_REG_GPIO0_1 0x10 52 + #define DA9055_REG_GPIO2 0x11 53 + #define DA9055_REG_GPIO_MODE0_2 0x12 54 + 55 + /* Regulator Control Registers */ 56 + #define DA9055_REG_BCORE_CONT 0x13 57 + #define DA9055_REG_BMEM_CONT 0x14 58 + #define DA9055_REG_LDO1_CONT 0x15 59 + #define DA9055_REG_LDO2_CONT 0x16 60 + #define DA9055_REG_LDO3_CONT 0x17 61 + #define DA9055_REG_LDO4_CONT 0x18 62 + #define DA9055_REG_LDO5_CONT 0x19 63 + #define DA9055_REG_LDO6_CONT 0x1A 64 + 65 + /* GP-ADC Control Registers */ 66 + #define DA9055_REG_ADC_MAN 0x1B 67 + #define DA9055_REG_ADC_CONT 0x1C 68 + #define DA9055_REG_VSYS_MON 0x1D 69 + #define DA9055_REG_ADC_RES_L 0x1E 70 + #define DA9055_REG_ADC_RES_H 0x1F 71 + #define DA9055_REG_VSYS_RES 0x20 72 + #define DA9055_REG_ADCIN1_RES 0x21 73 + #define DA9055_REG_ADCIN2_RES 0x22 74 + #define DA9055_REG_ADCIN3_RES 0x23 75 + 76 + /* Sequencer Control Registers */ 77 + #define DA9055_REG_EN_32K 0x35 78 + 79 + /* Regulator Setting Registers */ 80 + #define DA9055_REG_BUCK_LIM 0x37 81 + #define DA9055_REG_BCORE_MODE 0x38 82 + #define DA9055_REG_VBCORE_A 0x39 83 + #define DA9055_REG_VBMEM_A 0x3A 84 + #define DA9055_REG_VLDO1_A 0x3B 85 + #define DA9055_REG_VLDO2_A 0x3C 86 + #define DA9055_REG_VLDO3_A 0x3D 87 + #define DA9055_REG_VLDO4_A 0x3E 88 + #define DA9055_REG_VLDO5_A 0x3F 89 + #define DA9055_REG_VLDO6_A 0x40 90 + #define DA9055_REG_VBCORE_B 0x41 91 + #define DA9055_REG_VBMEM_B 0x42 92 + #define DA9055_REG_VLDO1_B 0x43 93 + #define DA9055_REG_VLDO2_B 0x44 94 + #define DA9055_REG_VLDO3_B 0x45 95 + #define DA9055_REG_VLDO4_B 0x46 96 + #define DA9055_REG_VLDO5_B 0x47 97 + #define DA9055_REG_VLDO6_B 0x48 98 + 99 + /* GP-ADC Threshold Registers */ 100 + #define DA9055_REG_AUTO1_HIGH 0x49 101 + #define DA9055_REG_AUTO1_LOW 0x4A 102 + #define DA9055_REG_AUTO2_HIGH 0x4B 103 + #define DA9055_REG_AUTO2_LOW 0x4C 104 + #define DA9055_REG_AUTO3_HIGH 0x4D 105 + #define DA9055_REG_AUTO3_LOW 0x4E 106 + 107 + /* OTP */ 108 + #define DA9055_REG_OPT_COUNT 0x50 109 + #define DA9055_REG_OPT_ADDR 0x51 110 + #define DA9055_REG_OPT_DATA 0x52 111 + 112 + /* RTC Calendar and Alarm Registers */ 113 + #define DA9055_REG_COUNT_S 0x53 114 + #define DA9055_REG_COUNT_MI 0x54 115 + #define DA9055_REG_COUNT_H 0x55 116 + #define DA9055_REG_COUNT_D 0x56 117 + #define DA9055_REG_COUNT_MO 0x57 118 + #define DA9055_REG_COUNT_Y 0x58 119 + #define DA9055_REG_ALARM_MI 0x59 120 + #define DA9055_REG_ALARM_H 0x5A 121 + #define DA9055_REG_ALARM_D 0x5B 122 + #define DA9055_REG_ALARM_MO 0x5C 123 + #define DA9055_REG_ALARM_Y 0x5D 124 + #define DA9055_REG_SECOND_A 0x5E 125 + #define DA9055_REG_SECOND_B 0x5F 126 + #define DA9055_REG_SECOND_C 0x60 127 + #define DA9055_REG_SECOND_D 0x61 128 + 129 + /* Customer Trim and Configuration */ 130 + #define DA9055_REG_T_OFFSET 0x63 131 + #define DA9055_REG_INTERFACE 0x64 132 + #define DA9055_REG_CONFIG_A 0x65 133 + #define DA9055_REG_CONFIG_B 0x66 134 + #define DA9055_REG_CONFIG_C 0x67 135 + #define DA9055_REG_CONFIG_D 0x68 136 + #define DA9055_REG_CONFIG_E 0x69 137 + #define DA9055_REG_TRIM_CLDR 0x6F 138 + 139 + /* General Purpose Registers */ 140 + #define DA9055_REG_GP_ID_0 0x70 141 + #define DA9055_REG_GP_ID_1 0x71 142 + #define DA9055_REG_GP_ID_2 0x72 143 + #define DA9055_REG_GP_ID_3 0x73 144 + #define DA9055_REG_GP_ID_4 0x74 145 + #define DA9055_REG_GP_ID_5 0x75 146 + #define DA9055_REG_GP_ID_6 0x76 147 + #define DA9055_REG_GP_ID_7 0x77 148 + #define DA9055_REG_GP_ID_8 0x78 149 + #define DA9055_REG_GP_ID_9 0x79 150 + #define DA9055_REG_GP_ID_10 0x7A 151 + #define DA9055_REG_GP_ID_11 0x7B 152 + #define DA9055_REG_GP_ID_12 0x7C 153 + #define DA9055_REG_GP_ID_13 0x7D 154 + #define DA9055_REG_GP_ID_14 0x7E 155 + #define DA9055_REG_GP_ID_15 0x7F 156 + #define DA9055_REG_GP_ID_16 0x80 157 + #define DA9055_REG_GP_ID_17 0x81 158 + #define DA9055_REG_GP_ID_18 0x82 159 + #define DA9055_REG_GP_ID_19 0x83 160 + 161 + #define DA9055_MAX_REGISTER_CNT DA9055_REG_GP_ID_19 162 + 163 + /* 164 + * PMIC registers bits 165 + */ 166 + 167 + /* DA9055_REG_PAGE_CON (addr=0x00) */ 168 + #define DA9055_PAGE_WRITE_MODE (0<<6) 169 + #define DA9055_REPEAT_WRITE_MODE (1<<6) 170 + 171 + /* DA9055_REG_STATUS_A (addr=0x01) */ 172 + #define DA9055_NOKEY_STS 0x01 173 + #define DA9055_WAKE_STS 0x02 174 + #define DA9055_DVC_BUSY_STS 0x04 175 + #define DA9055_COMP1V2_STS 0x08 176 + #define DA9055_NJIG_STS 0x10 177 + #define DA9055_LDO5_LIM_STS 0x20 178 + #define DA9055_LDO6_LIM_STS 0x40 179 + 180 + /* DA9055_REG_STATUS_B (addr=0x02) */ 181 + #define DA9055_GPI0_STS 0x01 182 + #define DA9055_GPI1_STS 0x02 183 + #define DA9055_GPI2_STS 0x04 184 + 185 + /* DA9055_REG_FAULT_LOG (addr=0x03) */ 186 + #define DA9055_TWD_ERROR_FLG 0x01 187 + #define DA9055_POR_FLG 0x02 188 + #define DA9055_VDD_FAULT_FLG 0x04 189 + #define DA9055_VDD_START_FLG 0x08 190 + #define DA9055_TEMP_CRIT_FLG 0x10 191 + #define DA9055_KEY_RESET_FLG 0x20 192 + #define DA9055_WAIT_SHUT_FLG 0x80 193 + 194 + /* DA9055_REG_EVENT_A (addr=0x04) */ 195 + #define DA9055_NOKEY_EINT 0x01 196 + #define DA9055_ALARM_EINT 0x02 197 + #define DA9055_TICK_EINT 0x04 198 + #define DA9055_ADC_RDY_EINT 0x08 199 + #define DA9055_SEQ_RDY_EINT 0x10 200 + #define DA9055_EVENTS_B_EINT 0x20 201 + #define DA9055_EVENTS_C_EINT 0x40 202 + 203 + /* DA9055_REG_EVENT_B (addr=0x05) */ 204 + #define DA9055_E_WAKE_EINT 0x01 205 + #define DA9055_E_TEMP_EINT 0x02 206 + #define DA9055_E_COMP1V2_EINT 0x04 207 + #define DA9055_E_LDO_LIM_EINT 0x08 208 + #define DA9055_E_NJIG_EINT 0x20 209 + #define DA9055_E_VDD_MON_EINT 0x40 210 + #define DA9055_E_VDD_WARN_EINT 0x80 211 + 212 + /* DA9055_REG_EVENT_C (addr=0x06) */ 213 + #define DA9055_E_GPI0_EINT 0x01 214 + #define DA9055_E_GPI1_EINT 0x02 215 + #define DA9055_E_GPI2_EINT 0x04 216 + 217 + /* DA9055_REG_IRQ_MASK_A (addr=0x07) */ 218 + #define DA9055_M_NONKEY_EINT 0x01 219 + #define DA9055_M_ALARM_EINT 0x02 220 + #define DA9055_M_TICK_EINT 0x04 221 + #define DA9055_M_ADC_RDY_EINT 0x08 222 + #define DA9055_M_SEQ_RDY_EINT 0x10 223 + 224 + /* DA9055_REG_IRQ_MASK_B (addr=0x08) */ 225 + #define DA9055_M_WAKE_EINT 0x01 226 + #define DA9055_M_TEMP_EINT 0x02 227 + #define DA9055_M_COMP_1V2_EINT 0x04 228 + #define DA9055_M_LDO_LIM_EINT 0x08 229 + #define DA9055_M_NJIG_EINT 0x20 230 + #define DA9055_M_VDD_MON_EINT 0x40 231 + #define DA9055_M_VDD_WARN_EINT 0x80 232 + 233 + /* DA9055_REG_IRQ_MASK_C (addr=0x09) */ 234 + #define DA9055_M_GPI0_EINT 0x01 235 + #define DA9055_M_GPI1_EINT 0x02 236 + #define DA9055_M_GPI2_EINT 0x04 237 + 238 + /* DA9055_REG_CONTROL_A (addr=0xA) */ 239 + #define DA9055_DEBOUNCING_SHIFT 0x00 240 + #define DA9055_DEBOUNCING_MASK 0x07 241 + #define DA9055_NRES_MODE_SHIFT 0x03 242 + #define DA9055_NRES_MODE_MASK 0x08 243 + #define DA9055_SLEW_RATE_SHIFT 0x04 244 + #define DA9055_SLEW_RATE_MASK 0x30 245 + #define DA9055_NOKEY_LOCK_SHIFT 0x06 246 + #define DA9055_NOKEY_LOCK_MASK 0x40 247 + 248 + /* DA9055_REG_CONTROL_B (addr=0xB) */ 249 + #define DA9055_RTC_MODE_PD 0x01 250 + #define DA9055_RTC_MODE_SD_SHIFT 0x01 251 + #define DA9055_RTC_MODE_SD 0x02 252 + #define DA9055_RTC_EN 0x04 253 + #define DA9055_ECO_MODE_SHIFT 0x03 254 + #define DA9055_ECO_MODE_MASK 0x08 255 + #define DA9055_TWDSCALE_SHIFT 4 256 + #define DA9055_TWDSCALE_MASK 0x70 257 + #define DA9055_V_LOCK_SHIFT 0x07 258 + #define DA9055_V_LOCK_MASK 0x80 259 + 260 + /* DA9055_REG_CONTROL_C (addr=0xC) */ 261 + #define DA9055_SYSTEM_EN_SHIFT 0x00 262 + #define DA9055_SYSTEM_EN_MASK 0x01 263 + #define DA9055_POWERN_EN_SHIFT 0x01 264 + #define DA9055_POWERN_EN_MASK 0x02 265 + #define DA9055_POWER1_EN_SHIFT 0x02 266 + #define DA9055_POWER1_EN_MASK 0x04 267 + 268 + /* DA9055_REG_CONTROL_D (addr=0xD) */ 269 + #define DA9055_STANDBY_SHIFT 0x02 270 + #define DA9055_STANDBY_MASK 0x08 271 + #define DA9055_AUTO_BOOT_SHIFT 0x03 272 + #define DA9055_AUTO_BOOT_MASK 0x04 273 + 274 + /* DA9055_REG_CONTROL_E (addr=0xE) */ 275 + #define DA9055_WATCHDOG_SHIFT 0x00 276 + #define DA9055_WATCHDOG_MASK 0x01 277 + #define DA9055_SHUTDOWN_SHIFT 0x01 278 + #define DA9055_SHUTDOWN_MASK 0x02 279 + #define DA9055_WAKE_UP_SHIFT 0x02 280 + #define DA9055_WAKE_UP_MASK 0x04 281 + 282 + /* DA9055_REG_GPIO (addr=0x10/0x11) */ 283 + #define DA9055_GPIO0_PIN_SHIFT 0x00 284 + #define DA9055_GPIO0_PIN_MASK 0x03 285 + #define DA9055_GPIO0_TYPE_SHIFT 0x02 286 + #define DA9055_GPIO0_TYPE_MASK 0x04 287 + #define DA9055_GPIO0_WEN_SHIFT 0x03 288 + #define DA9055_GPIO0_WEN_MASK 0x08 289 + #define DA9055_GPIO1_PIN_SHIFT 0x04 290 + #define DA9055_GPIO1_PIN_MASK 0x30 291 + #define DA9055_GPIO1_TYPE_SHIFT 0x06 292 + #define DA9055_GPIO1_TYPE_MASK 0x40 293 + #define DA9055_GPIO1_WEN_SHIFT 0x07 294 + #define DA9055_GPIO1_WEN_MASK 0x80 295 + #define DA9055_GPIO2_PIN_SHIFT 0x00 296 + #define DA9055_GPIO2_PIN_MASK 0x30 297 + #define DA9055_GPIO2_TYPE_SHIFT 0x02 298 + #define DA9055_GPIO2_TYPE_MASK 0x04 299 + #define DA9055_GPIO2_WEN_SHIFT 0x03 300 + #define DA9055_GPIO2_WEN_MASK 0x08 301 + 302 + /* DA9055_REG_GPIO_MODE (addr=0x12) */ 303 + #define DA9055_GPIO0_MODE_SHIFT 0x00 304 + #define DA9055_GPIO0_MODE_MASK 0x01 305 + #define DA9055_GPIO1_MODE_SHIFT 0x01 306 + #define DA9055_GPIO1_MODE_MASK 0x02 307 + #define DA9055_GPIO2_MODE_SHIFT 0x02 308 + #define DA9055_GPIO2_MODE_MASK 0x04 309 + 310 + /* DA9055_REG_BCORE_CONT (addr=0x13) */ 311 + #define DA9055_BCORE_EN_SHIFT 0x00 312 + #define DA9055_BCORE_EN_MASK 0x01 313 + #define DA9055_BCORE_GPI_SHIFT 0x01 314 + #define DA9055_BCORE_GPI_MASK 0x02 315 + #define DA9055_BCORE_PD_DIS_SHIFT 0x03 316 + #define DA9055_BCORE_PD_DIS_MASK 0x04 317 + #define DA9055_VBCORE_SEL_SHIFT 0x04 318 + #define DA9055_SEL_REG_A 0x0 319 + #define DA9055_SEL_REG_B 0x10 320 + #define DA9055_VBCORE_SEL_MASK 0x10 321 + #define DA9055_V_GPI_MASK 0x60 322 + #define DA9055_V_GPI_SHIFT 0x05 323 + #define DA9055_E_GPI_MASK 0x06 324 + #define DA9055_E_GPI_SHIFT 0x01 325 + #define DA9055_VBCORE_GPI_SHIFT 0x05 326 + #define DA9055_VBCORE_GPI_MASK 0x60 327 + #define DA9055_BCORE_CONF_SHIFT 0x07 328 + #define DA9055_BCORE_CONF_MASK 0x80 329 + 330 + /* DA9055_REG_BMEM_CONT (addr=0x14) */ 331 + #define DA9055_BMEM_EN_SHIFT 0x00 332 + #define DA9055_BMEM_EN_MASK 0x01 333 + #define DA9055_BMEM_GPI_SHIFT 0x01 334 + #define DA9055_BMEM_GPI_MASK 0x06 335 + #define DA9055_BMEM_PD_DIS_SHIFT 0x03 336 + #define DA9055_BMEM_PD_DIS_MASK 0x08 337 + #define DA9055_VBMEM_SEL_SHIT 0x04 338 + #define DA9055_VBMEM_SEL_VBMEM_A (0<<4) 339 + #define DA9055_VBMEM_SEL_VBMEM_B (1<<4) 340 + #define DA9055_VBMEM_SEL_MASK 0x10 341 + #define DA9055_VBMEM_GPI_SHIFT 0x05 342 + #define DA9055_VBMEM_GPI_MASK 0x60 343 + #define DA9055_BMEM_CONF_SHIFT 0x07 344 + #define DA9055_BMEM_CONF_MASK 0x80 345 + 346 + /* DA9055_REG_LDO_CONT (addr=0x15-0x1A) */ 347 + #define DA9055_LDO_EN_SHIFT 0x00 348 + #define DA9055_LDO_EN_MASK 0x01 349 + #define DA9055_LDO_GPI_SHIFT 0x01 350 + #define DA9055_LDO_GPI_MASK 0x06 351 + #define DA9055_LDO_PD_DIS_SHIFT 0x03 352 + #define DA9055_LDO_PD_DIS_MASK 0x08 353 + #define DA9055_VLDO_SEL_SHIFT 0x04 354 + #define DA9055_VLDO_SEL_MASK 0x10 355 + #define DA9055_VLDO_SEL_VLDO_A 0x00 356 + #define DA9055_VLDO_SEL_VLDO_B 0x01 357 + #define DA9055_VLDO_GPI_SHIFT 0x05 358 + #define DA9055_VLDO_GPI_MASK 0x60 359 + #define DA9055_LDO_CONF_SHIFT 0x07 360 + #define DA9055_LDO_CONF_MASK 0x80 361 + #define DA9055_REGUALTOR_SET_A 0x00 362 + #define DA9055_REGUALTOR_SET_B 0x10 363 + 364 + /* DA9055_REG_ADC_MAN (addr=0x1B) */ 365 + #define DA9055_ADC_MUX_SHIFT 0 366 + #define DA9055_ADC_MUX_MASK 0xF 367 + #define DA9055_ADC_MUX_VSYS 0x0 368 + #define DA9055_ADC_MUX_ADCIN1 0x01 369 + #define DA9055_ADC_MUX_ADCIN2 0x02 370 + #define DA9055_ADC_MUX_ADCIN3 0x03 371 + #define DA9055_ADC_MUX_T_SENSE 0x04 372 + #define DA9055_ADC_MAN_SHIFT 0x04 373 + #define DA9055_ADC_MAN_CONV 0x10 374 + #define DA9055_ADC_LSB_MASK 0X03 375 + #define DA9055_ADC_MODE_MASK 0x20 376 + #define DA9055_ADC_MODE_SHIFT 5 377 + #define DA9055_ADC_MODE_1MS (1<<5) 378 + #define DA9055_COMP1V2_EN_SHIFT 7 379 + 380 + /* DA9055_REG_ADC_CONT (addr=0x1C) */ 381 + #define DA9055_ADC_AUTO_VSYS_EN_SHIFT 0 382 + #define DA9055_ADC_AUTO_AD1_EN_SHIFT 1 383 + #define DA9055_ADC_AUTO_AD2_EN_SHIFT 2 384 + #define DA9055_ADC_AUTO_AD3_EN_SHIFT 3 385 + #define DA9055_ADC_ISRC_EN_SHIFT 4 386 + #define DA9055_ADC_ADCIN1_DEB_SHIFT 5 387 + #define DA9055_ADC_ADCIN2_DEB_SHIFT 6 388 + #define DA9055_ADC_ADCIN3_DEB_SHIFT 7 389 + #define DA9055_AD1_ISRC_MASK 0x10 390 + #define DA9055_AD1_ISRC_SHIFT 4 391 + 392 + /* DA9055_REG_VSYS_MON (addr=0x1D) */ 393 + #define DA9055_VSYS_VAL_SHIFT 0 394 + #define DA9055_VSYS_VAL_MASK 0xFF 395 + #define DA9055_VSYS_VAL_BASE 0x00 396 + #define DA9055_VSYS_VAL_MAX DA9055_VSYS_VAL_MASK 397 + #define DA9055_VSYS_VOLT_BASE 2500 398 + #define DA9055_VSYS_VOLT_INC 10 399 + #define DA9055_VSYS_STEPS 255 400 + #define DA9055_VSYS_VOLT_MIN 2500 401 + 402 + /* DA9044_REG_XXX_RES (addr=0x20-0x23) */ 403 + #define DA9055_ADC_VAL_SHIFT 0 404 + #define DA9055_ADC_VAL_MASK 0xFF 405 + #define DA9055_ADC_VAL_BASE 0x00 406 + #define DA9055_ADC_VAL_MAX DA9055_ADC_VAL_MASK 407 + #define DA9055_ADC_VOLT_BASE 0 408 + #define DA9055_ADC_VSYS_VOLT_BASE 2500 409 + #define DA9055_ADC_VOLT_INC 10 410 + #define DA9055_ADC_VSYS_VOLT_INC 12 411 + #define DA9055_ADC_STEPS 255 412 + 413 + /* DA9055_REG_EN_32K (addr=0x35)*/ 414 + #define DA9055_STARTUP_TIME_MASK 0x07 415 + #define DA9055_STARTUP_TIME_0S 0x0 416 + #define DA9055_STARTUP_TIME_0_52S 0x1 417 + #define DA9055_STARTUP_TIME_1S 0x2 418 + #define DA9055_CRYSTAL_EN 0x08 419 + #define DA9055_DELAY_MODE_EN 0x10 420 + #define DA9055_OUT_CLCK_GATED 0x20 421 + #define DA9055_RTC_CLOCK_GATED 0x40 422 + #define DA9055_EN_32KOUT_BUF 0x80 423 + 424 + /* DA9055_REG_RESET (addr=0x36) */ 425 + /* Timer up to 31.744 ms */ 426 + #define DA9055_RESET_TIMER_VAL_SHIFT 0 427 + #define DA9055_RESET_LOW_VAL_MASK 0x3F 428 + #define DA9055_RESET_LOW_VAL_BASE 0 429 + #define DA9055_RESET_LOW_VAL_MAX DA9055_RESET_LOW_VAL_MASK 430 + #define DA9055_RESET_US_LOW_BASE 1024 /* min val in units of us */ 431 + #define DA9055_RESET_US_LOW_INC 1024 /* inc val in units of us */ 432 + #define DA9055_RESET_US_LOW_STEP 30 433 + 434 + /* Timer up to 1048.576ms */ 435 + #define DA9055_RESET_HIGH_VAL_MASK 0x3F 436 + #define DA9055_RESET_HIGH_VAL_BASE 0 437 + #define DA9055_RESET_HIGH_VAL_MAX DA9055_RESET_HIGH_VAL_MASK 438 + #define DA9055_RESET_US_HIGH_BASE 32768 /* min val in units of us */ 439 + #define DA9055_RESET_US_HIGH_INC 32768 /* inv val in units of us */ 440 + #define DA9055_RESET_US_HIGH_STEP 31 441 + 442 + /* DA9055_REG_BUCK_ILIM (addr=0x37)*/ 443 + #define DA9055_BMEM_ILIM_SHIFT 0 444 + #define DA9055_ILIM_MASK 0x3 445 + #define DA9055_ILIM_500MA 0x0 446 + #define DA9055_ILIM_600MA 0x1 447 + #define DA9055_ILIM_700MA 0x2 448 + #define DA9055_ILIM_800MA 0x3 449 + #define DA9055_BCORE_ILIM_SHIFT 2 450 + 451 + /* DA9055_REG_BCORE_MODE (addr=0x38) */ 452 + #define DA9055_BMEM_MODE_SHIFT 0 453 + #define DA9055_MODE_MASK 0x3 454 + #define DA9055_MODE_AB 0x0 455 + #define DA9055_MODE_SLEEP 0x1 456 + #define DA9055_MODE_SYNCHRO 0x2 457 + #define DA9055_MODE_AUTO 0x3 458 + #define DA9055_BCORE_MODE_SHIFT 2 459 + 460 + /* DA9055_REG_VBCORE_A/B (addr=0x39/0x41)*/ 461 + #define DA9055_VBCORE_VAL_SHIFT 0 462 + #define DA9055_VBCORE_VAL_MASK 0x3F 463 + #define DA9055_VBCORE_VAL_BASE 0x09 464 + #define DA9055_VBCORE_VAL_MAX DA9055_VBCORE_VAL_MASK 465 + #define DA9055_VBCORE_VOLT_BASE 750 466 + #define DA9055_VBCORE_VOLT_INC 25 467 + #define DA9055_VBCORE_STEPS 53 468 + #define DA9055_VBCORE_VOLT_MIN DA9055_VBCORE_VOLT_BASE 469 + #define DA9055_BCORE_SL_SYNCHRO (0<<7) 470 + #define DA9055_BCORE_SL_SLEEP (1<<7) 471 + 472 + /* DA9055_REG_VBMEM_A/B (addr=0x3A/0x42)*/ 473 + #define DA9055_VBMEM_VAL_SHIFT 0 474 + #define DA9055_VBMEM_VAL_MASK 0x3F 475 + #define DA9055_VBMEM_VAL_BASE 0x00 476 + #define DA9055_VBMEM_VAL_MAX DA9055_VBMEM_VAL_MASK 477 + #define DA9055_VBMEM_VOLT_BASE 925 478 + #define DA9055_VBMEM_VOLT_INC 25 479 + #define DA9055_VBMEM_STEPS 63 480 + #define DA9055_VBMEM_VOLT_MIN DA9055_VBMEM_VOLT_BASE 481 + #define DA9055_BCMEM_SL_SYNCHRO (0<<7) 482 + #define DA9055_BCMEM_SL_SLEEP (1<<7) 483 + 484 + 485 + /* DA9055_REG_VLDO (addr=0x3B-0x40/0x43-0x48)*/ 486 + #define DA9055_VLDO_VAL_SHIFT 0 487 + #define DA9055_VLDO_VAL_MASK 0x3F 488 + #define DA9055_VLDO6_VAL_MASK 0x7F 489 + #define DA9055_VLDO_VAL_BASE 0x02 490 + #define DA9055_VLDO2_VAL_BASE 0x03 491 + #define DA9055_VLDO6_VAL_BASE 0x00 492 + #define DA9055_VLDO_VAL_MAX DA9055_VLDO_VAL_MASK 493 + #define DA9055_VLDO6_VAL_MAX DA9055_VLDO6_VAL_MASK 494 + #define DA9055_VLDO_VOLT_BASE 900 495 + #define DA9055_VLDO_VOLT_INC 50 496 + #define DA9055_VLDO6_VOLT_INC 20 497 + #define DA9055_VLDO_STEPS 48 498 + #define DA9055_VLDO5_STEPS 37 499 + #define DA9055_VLDO6_STEPS 120 500 + #define DA9055_VLDO_VOLT_MIN DA9055_VLDO_VOLT_BASE 501 + #define DA9055_LDO_MODE_SHIFT 7 502 + #define DA9055_LDO_SL_NORMAL 0 503 + #define DA9055_LDO_SL_SLEEP 1 504 + 505 + /* DA9055_REG_OTP_CONT (addr=0x50) */ 506 + #define DA9055_OTP_TIM_NORMAL (0<<0) 507 + #define DA9055_OTP_TIM_MARGINAL (1<<0) 508 + #define DA9055_OTP_GP_RD_SHIFT 1 509 + #define DA9055_OTP_APPS_RD_SHIFT 2 510 + #define DA9055_PC_DONE_SHIFT 3 511 + #define DA9055_OTP_GP_LOCK_SHIFT 4 512 + #define DA9055_OTP_APPS_LOCK_SHIFT 5 513 + #define DA9055_OTP_CONF_LOCK_SHIFT 6 514 + #define DA9055_OTP_WRITE_DIS_SHIFT 7 515 + 516 + /* DA9055_REG_COUNT_S (addr=0x53) */ 517 + #define DA9055_RTC_SEC 0x3F 518 + #define DA9055_RTC_MONITOR_EN 0x40 519 + #define DA9055_RTC_READ 0x80 520 + 521 + /* DA9055_REG_COUNT_MI (addr=0x54) */ 522 + #define DA9055_RTC_MIN 0x3F 523 + 524 + /* DA9055_REG_COUNT_H (addr=0x55) */ 525 + #define DA9055_RTC_HOUR 0x1F 526 + 527 + /* DA9055_REG_COUNT_D (addr=0x56) */ 528 + #define DA9055_RTC_DAY 0x1F 529 + 530 + /* DA9055_REG_COUNT_MO (addr=0x57) */ 531 + #define DA9055_RTC_MONTH 0x0F 532 + 533 + /* DA9055_REG_COUNT_Y (addr=0x58) */ 534 + #define DA9055_RTC_YEAR 0x3F 535 + #define DA9055_RTC_YEAR_BASE 2000 536 + 537 + /* DA9055_REG_ALARM_MI (addr=0x59) */ 538 + #define DA9055_RTC_ALM_MIN 0x3F 539 + #define DA9055_ALARM_STATUS_SHIFT 6 540 + #define DA9055_ALARM_STATUS_MASK 0x3 541 + #define DA9055_ALARM_STATUS_NO_ALARM 0x0 542 + #define DA9055_ALARM_STATUS_TICK 0x1 543 + #define DA9055_ALARM_STATUS_TIMER_ALARM 0x2 544 + #define DA9055_ALARM_STATUS_BOTH 0x3 545 + 546 + /* DA9055_REG_ALARM_H (addr=0x5A) */ 547 + #define DA9055_RTC_ALM_HOUR 0x1F 548 + 549 + /* DA9055_REG_ALARM_D (addr=0x5B) */ 550 + #define DA9055_RTC_ALM_DAY 0x1F 551 + 552 + /* DA9055_REG_ALARM_MO (addr=0x5C) */ 553 + #define DA9055_RTC_ALM_MONTH 0x0F 554 + #define DA9055_RTC_TICK_WAKE_MASK 0x20 555 + #define DA9055_RTC_TICK_WAKE_SHIFT 5 556 + #define DA9055_RTC_TICK_TYPE 0x10 557 + #define DA9055_RTC_TICK_TYPE_SHIFT 0x4 558 + #define DA9055_RTC_TICK_SEC 0x0 559 + #define DA9055_RTC_TICK_MIN 0x1 560 + #define DA9055_ALARAM_TICK_WAKE 0x20 561 + 562 + /* DA9055_REG_ALARM_Y (addr=0x5D) */ 563 + #define DA9055_RTC_TICK_EN 0x80 564 + #define DA9055_RTC_ALM_EN 0x40 565 + #define DA9055_RTC_TICK_ALM_MASK 0xC0 566 + #define DA9055_RTC_ALM_YEAR 0x3F 567 + 568 + /* DA9055_REG_TRIM_CLDR (addr=0x62) */ 569 + #define DA9055_TRIM_32K_SHIFT 0 570 + #define DA9055_TRIM_32K_MASK 0x7F 571 + #define DA9055_TRIM_DECREMENT (1<<7) 572 + #define DA9055_TRIM_INCREMENT (0<<7) 573 + #define DA9055_TRIM_VAL_BASE 0x0 574 + #define DA9055_TRIM_PPM_BASE 0x0 /* min val in units of 0.1PPM */ 575 + #define DA9055_TRIM_PPM_INC 19 /* min inc in units of 0.1PPM */ 576 + #define DA9055_TRIM_STEPS 127 577 + 578 + /* DA9055_REG_CONFIG_A (addr=0x65) */ 579 + #define DA9055_PM_I_V_VDDCORE (0<<0) 580 + #define DA9055_PM_I_V_VDD_IO (1<<0) 581 + #define DA9055_VDD_FAULT_TYPE_ACT_LOW (0<<1) 582 + #define DA9055_VDD_FAULT_TYPE_ACT_HIGH (1<<1) 583 + #define DA9055_PM_O_TYPE_PUSH_PULL (0<<2) 584 + #define DA9055_PM_O_TYPE_OPEN_DRAIN (1<<2) 585 + #define DA9055_IRQ_TYPE_ACT_LOW (0<<3) 586 + #define DA9055_IRQ_TYPE_ACT_HIGH (1<<3) 587 + #define DA9055_NIRQ_MODE_IMM (0<<4) 588 + #define DA9055_NIRQ_MODE_ACTIVE (1<<4) 589 + #define DA9055_GPI_V_VDDCORE (0<<5) 590 + #define DA9055_GPI_V_VDD_IO (1<<5) 591 + #define DA9055_PM_IF_V_VDDCORE (0<<6) 592 + #define DA9055_PM_IF_V_VDD_IO (1<<6) 593 + 594 + /* DA9055_REG_CONFIG_B (addr=0x66) */ 595 + #define DA9055_VDD_FAULT_VAL_SHIFT 0 596 + #define DA9055_VDD_FAULT_VAL_MASK 0xF 597 + #define DA9055_VDD_FAULT_VAL_BASE 0x0 598 + #define DA9055_VDD_FAULT_VAL_MAX DA9055_VDD_FAULT_VAL_MASK 599 + #define DA9055_VDD_FAULT_VOLT_BASE 2500 600 + #define DA9055_VDD_FAULT_VOLT_INC 50 601 + #define DA9055_VDD_FAULT_STEPS 15 602 + 603 + #define DA9055_VDD_HYST_VAL_SHIFT 4 604 + #define DA9055_VDD_HYST_VAL_MASK 0x7 605 + #define DA9055_VDD_HYST_VAL_BASE 0x0 606 + #define DA9055_VDD_HYST_VAL_MAX DA9055_VDD_HYST_VAL_MASK 607 + #define DA9055_VDD_HYST_VOLT_BASE 100 608 + #define DA9055_VDD_HYST_VOLT_INC 50 609 + #define DA9055_VDD_HYST_STEPS 7 610 + #define DA9055_VDD_HYST_VOLT_MIN DA9055_VDD_HYST_VOLT_BASE 611 + 612 + #define DA9055_VDD_FAULT_EN_SHIFT 7 613 + 614 + /* DA9055_REG_CONFIG_C (addr=0x67) */ 615 + #define DA9055_BCORE_CLK_INV_SHIFT 0 616 + #define DA9055_BMEM_CLK_INV_SHIFT 1 617 + #define DA9055_NFAULT_CONF_SHIFT 2 618 + #define DA9055_LDO_SD_SHIFT 4 619 + #define DA9055_LDO5_BYP_SHIFT 6 620 + #define DA9055_LDO6_BYP_SHIFT 7 621 + 622 + /* DA9055_REG_CONFIG_D (addr=0x68) */ 623 + #define DA9055_NONKEY_PIN_SHIFT 0 624 + #define DA9055_NONKEY_PIN_MASK 0x3 625 + #define DA9055_NONKEY_PIN_PORT_MODE 0x0 626 + #define DA9055_NONKEY_PIN_KEY_MODE 0x1 627 + #define DA9055_NONKEY_PIN_MULTI_FUNC 0x2 628 + #define DA9055_NONKEY_PIN_DEDICT 0x3 629 + #define DA9055_NONKEY_SD_SHIFT 2 630 + #define DA9055_KEY_DELAY_SHIFT 3 631 + #define DA9055_KEY_DELAY_MASK 0x3 632 + #define DA9055_KEY_DELAY_4S 0x0 633 + #define DA9055_KEY_DELAY_6S 0x1 634 + #define DA9055_KEY_DELAY_8S 0x2 635 + #define DA9055_KEY_DELAY_10S 0x3 636 + 637 + /* DA9055_REG_CONFIG_E (addr=0x69) */ 638 + #define DA9055_GPIO_PUPD_PULL_UP 0x0 639 + #define DA9055_GPIO_PUPD_OPEN_DRAIN 0x1 640 + #define DA9055_GPIO0_PUPD_SHIFT 0 641 + #define DA9055_GPIO1_PUPD_SHIFT 1 642 + #define DA9055_GPIO2_PUPD_SHIFT 2 643 + #define DA9055_UVOV_DELAY_SHIFT 4 644 + #define DA9055_UVOV_DELAY_MASK 0x3 645 + #define DA9055_RESET_DURATION_SHIFT 6 646 + #define DA9055_RESET_DURATION_MASK 0x3 647 + #define DA9055_RESET_DURATION_0MS 0x0 648 + #define DA9055_RESET_DURATION_100MS 0x1 649 + #define DA9055_RESET_DURATION_500MS 0x2 650 + #define DA9055_RESET_DURATION_1000MS 0x3 651 + 652 + /* DA9055_REG_MON_REG_1 (addr=0x6A) */ 653 + #define DA9055_MON_THRES_SHIFT 0 654 + #define DA9055_MON_THRES_MASK 0x3 655 + #define DA9055_MON_RES_SHIFT 2 656 + #define DA9055_MON_DEB_SHIFT 3 657 + #define DA9055_MON_MODE_SHIFT 4 658 + #define DA9055_MON_MODE_MASK 0x3 659 + #define DA9055_START_MAX_SHIFT 6 660 + #define DA9055_START_MAX_MASK 0x3 661 + 662 + /* DA9055_REG_MON_REG_2 (addr=0x6B) */ 663 + #define DA9055_LDO1_MON_EN_SHIFT 0 664 + #define DA9055_LDO2_MON_EN_SHIFT 1 665 + #define DA9055_LDO3_MON_EN_SHIFT 2 666 + #define DA9055_LDO4_MON_EN_SHIFT 3 667 + #define DA9055_LDO5_MON_EN_SHIFT 4 668 + #define DA9055_LDO6_MON_EN_SHIFT 5 669 + #define DA9055_BCORE_MON_EN_SHIFT 6 670 + #define DA9055_BMEM_MON_EN_SHIFT 7 671 + 672 + /* DA9055_REG_CONFIG_F (addr=0x6C) */ 673 + #define DA9055_LDO1_DEF_SHIFT 0 674 + #define DA9055_LDO2_DEF_SHIFT 1 675 + #define DA9055_LDO3_DEF_SHIFT 2 676 + #define DA9055_LDO4_DEF_SHIFT 3 677 + #define DA9055_LDO5_DEF_SHIFT 4 678 + #define DA9055_LDO6_DEF_SHIFT 5 679 + #define DA9055_BCORE_DEF_SHIFT 6 680 + #define DA9055_BMEM_DEF_SHIFT 7 681 + 682 + /* DA9055_REG_MON_REG_4 (addr=0x6D) */ 683 + #define DA9055_MON_A8_IDX_SHIFT 0 684 + #define DA9055_MON_A89_IDX_MASK 0x3 685 + #define DA9055_MON_A89_IDX_NONE 0x0 686 + #define DA9055_MON_A89_IDX_BUCKCORE 0x1 687 + #define DA9055_MON_A89_IDX_LDO3 0x2 688 + #define DA9055_MON_A9_IDX_SHIFT 5 689 + 690 + /* DA9055_REG_MON_REG_5 (addr=0x6E) */ 691 + #define DA9055_MON_A10_IDX_SHIFT 0 692 + #define DA9055_MON_A10_IDX_MASK 0x3 693 + #define DA9055_MON_A10_IDX_NONE 0x0 694 + #define DA9055_MON_A10_IDX_LDO1 0x1 695 + #define DA9055_MON_A10_IDX_LDO2 0x2 696 + #define DA9055_MON_A10_IDX_LDO5 0x3 697 + #define DA9055_MON_A10_IDX_LDO6 0x4 698 + 699 + #endif /* __DA9055_REG_H */
+52
include/linux/mfd/lp8788-isink.h
··· 1 + /* 2 + * TI LP8788 MFD - common definitions for current sinks 3 + * 4 + * Copyright 2012 Texas Instruments 5 + * 6 + * Author: Milo(Woogyom) Kim <milo.kim@ti.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License version 2 as 10 + * published by the Free Software Foundation. 11 + * 12 + */ 13 + 14 + #ifndef __ISINK_LP8788_H__ 15 + #define __ISINK_LP8788_H__ 16 + 17 + /* register address */ 18 + #define LP8788_ISINK_CTRL 0x99 19 + #define LP8788_ISINK12_IOUT 0x9A 20 + #define LP8788_ISINK3_IOUT 0x9B 21 + #define LP8788_ISINK1_PWM 0x9C 22 + #define LP8788_ISINK2_PWM 0x9D 23 + #define LP8788_ISINK3_PWM 0x9E 24 + 25 + /* mask bits */ 26 + #define LP8788_ISINK1_IOUT_M 0x0F /* Addr 9Ah */ 27 + #define LP8788_ISINK2_IOUT_M 0xF0 28 + #define LP8788_ISINK3_IOUT_M 0x0F /* Addr 9Bh */ 29 + 30 + /* 6 bits used for PWM code : Addr 9C ~ 9Eh */ 31 + #define LP8788_ISINK_MAX_PWM 63 32 + #define LP8788_ISINK_SCALE_OFFSET 3 33 + 34 + static const u8 lp8788_iout_addr[] = { 35 + LP8788_ISINK12_IOUT, 36 + LP8788_ISINK12_IOUT, 37 + LP8788_ISINK3_IOUT, 38 + }; 39 + 40 + static const u8 lp8788_iout_mask[] = { 41 + LP8788_ISINK1_IOUT_M, 42 + LP8788_ISINK2_IOUT_M, 43 + LP8788_ISINK3_IOUT_M, 44 + }; 45 + 46 + static const u8 lp8788_pwm_addr[] = { 47 + LP8788_ISINK1_PWM, 48 + LP8788_ISINK2_PWM, 49 + LP8788_ISINK3_PWM, 50 + }; 51 + 52 + #endif
+364
include/linux/mfd/lp8788.h
··· 1 + /* 2 + * TI LP8788 MFD Device 3 + * 4 + * Copyright 2012 Texas Instruments 5 + * 6 + * Author: Milo(Woogyom) Kim <milo.kim@ti.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License version 2 as 10 + * published by the Free Software Foundation. 11 + * 12 + */ 13 + 14 + #ifndef __MFD_LP8788_H__ 15 + #define __MFD_LP8788_H__ 16 + 17 + #include <linux/gpio.h> 18 + #include <linux/irqdomain.h> 19 + #include <linux/regmap.h> 20 + 21 + #define LP8788_DEV_BUCK "lp8788-buck" 22 + #define LP8788_DEV_DLDO "lp8788-dldo" 23 + #define LP8788_DEV_ALDO "lp8788-aldo" 24 + #define LP8788_DEV_CHARGER "lp8788-charger" 25 + #define LP8788_DEV_RTC "lp8788-rtc" 26 + #define LP8788_DEV_BACKLIGHT "lp8788-backlight" 27 + #define LP8788_DEV_VIBRATOR "lp8788-vibrator" 28 + #define LP8788_DEV_KEYLED "lp8788-keyled" 29 + #define LP8788_DEV_ADC "lp8788-adc" 30 + 31 + #define LP8788_NUM_BUCKS 4 32 + #define LP8788_NUM_DLDOS 12 33 + #define LP8788_NUM_ALDOS 10 34 + #define LP8788_NUM_BUCK2_DVS 2 35 + 36 + #define LP8788_CHG_IRQ "CHG_IRQ" 37 + #define LP8788_PRSW_IRQ "PRSW_IRQ" 38 + #define LP8788_BATT_IRQ "BATT_IRQ" 39 + #define LP8788_ALM_IRQ "ALARM_IRQ" 40 + 41 + enum lp8788_int_id { 42 + /* interrup register 1 : Addr 00h */ 43 + LP8788_INT_TSDL, 44 + LP8788_INT_TSDH, 45 + LP8788_INT_UVLO, 46 + LP8788_INT_FLAGMON, 47 + LP8788_INT_PWRON_TIME, 48 + LP8788_INT_PWRON, 49 + LP8788_INT_COMP1, 50 + LP8788_INT_COMP2, 51 + 52 + /* interrupt register 2 : Addr 01h */ 53 + LP8788_INT_CHG_INPUT_STATE, 54 + LP8788_INT_CHG_STATE, 55 + LP8788_INT_EOC, 56 + LP8788_INT_CHG_RESTART, 57 + LP8788_INT_RESTART_TIMEOUT, 58 + LP8788_INT_FULLCHG_TIMEOUT, 59 + LP8788_INT_PRECHG_TIMEOUT, 60 + 61 + /* interrupt register 3 : Addr 02h */ 62 + LP8788_INT_RTC_ALARM1 = 17, 63 + LP8788_INT_RTC_ALARM2, 64 + LP8788_INT_ENTER_SYS_SUPPORT, 65 + LP8788_INT_EXIT_SYS_SUPPORT, 66 + LP8788_INT_BATT_LOW, 67 + LP8788_INT_NO_BATT, 68 + 69 + LP8788_INT_MAX = 24, 70 + }; 71 + 72 + enum lp8788_dvs_sel { 73 + DVS_SEL_V0, 74 + DVS_SEL_V1, 75 + DVS_SEL_V2, 76 + DVS_SEL_V3, 77 + }; 78 + 79 + enum lp8788_ext_ldo_en_id { 80 + EN_ALDO1, 81 + EN_ALDO234, 82 + EN_ALDO5, 83 + EN_ALDO7, 84 + EN_DLDO7, 85 + EN_DLDO911, 86 + EN_LDOS_MAX, 87 + }; 88 + 89 + enum lp8788_charger_event { 90 + NO_CHARGER, 91 + CHARGER_DETECTED, 92 + }; 93 + 94 + enum lp8788_bl_ctrl_mode { 95 + LP8788_BL_REGISTER_ONLY, 96 + LP8788_BL_COMB_PWM_BASED, /* PWM + I2C, changed by PWM input */ 97 + LP8788_BL_COMB_REGISTER_BASED, /* PWM + I2C, changed by I2C */ 98 + }; 99 + 100 + enum lp8788_bl_dim_mode { 101 + LP8788_DIM_EXPONENTIAL, 102 + LP8788_DIM_LINEAR, 103 + }; 104 + 105 + enum lp8788_bl_full_scale_current { 106 + LP8788_FULLSCALE_5000uA, 107 + LP8788_FULLSCALE_8500uA, 108 + LP8788_FULLSCALE_1200uA, 109 + LP8788_FULLSCALE_1550uA, 110 + LP8788_FULLSCALE_1900uA, 111 + LP8788_FULLSCALE_2250uA, 112 + LP8788_FULLSCALE_2600uA, 113 + LP8788_FULLSCALE_2950uA, 114 + }; 115 + 116 + enum lp8788_bl_ramp_step { 117 + LP8788_RAMP_8us, 118 + LP8788_RAMP_1024us, 119 + LP8788_RAMP_2048us, 120 + LP8788_RAMP_4096us, 121 + LP8788_RAMP_8192us, 122 + LP8788_RAMP_16384us, 123 + LP8788_RAMP_32768us, 124 + LP8788_RAMP_65538us, 125 + }; 126 + 127 + enum lp8788_bl_pwm_polarity { 128 + LP8788_PWM_ACTIVE_HIGH, 129 + LP8788_PWM_ACTIVE_LOW, 130 + }; 131 + 132 + enum lp8788_isink_scale { 133 + LP8788_ISINK_SCALE_100mA, 134 + LP8788_ISINK_SCALE_120mA, 135 + }; 136 + 137 + enum lp8788_isink_number { 138 + LP8788_ISINK_1, 139 + LP8788_ISINK_2, 140 + LP8788_ISINK_3, 141 + }; 142 + 143 + enum lp8788_alarm_sel { 144 + LP8788_ALARM_1, 145 + LP8788_ALARM_2, 146 + LP8788_ALARM_MAX, 147 + }; 148 + 149 + enum lp8788_adc_id { 150 + LPADC_VBATT_5P5, 151 + LPADC_VIN_CHG, 152 + LPADC_IBATT, 153 + LPADC_IC_TEMP, 154 + LPADC_VBATT_6P0, 155 + LPADC_VBATT_5P0, 156 + LPADC_ADC1, 157 + LPADC_ADC2, 158 + LPADC_VDD, 159 + LPADC_VCOIN, 160 + LPADC_VDD_LDO, 161 + LPADC_ADC3, 162 + LPADC_ADC4, 163 + LPADC_MAX, 164 + }; 165 + 166 + struct lp8788; 167 + 168 + /* 169 + * lp8788_buck1_dvs 170 + * @gpio : gpio pin number for dvs control 171 + * @vsel : dvs selector for buck v1 register 172 + */ 173 + struct lp8788_buck1_dvs { 174 + int gpio; 175 + enum lp8788_dvs_sel vsel; 176 + }; 177 + 178 + /* 179 + * lp8788_buck2_dvs 180 + * @gpio : two gpio pin numbers are used for dvs 181 + * @vsel : dvs selector for buck v2 register 182 + */ 183 + struct lp8788_buck2_dvs { 184 + int gpio[LP8788_NUM_BUCK2_DVS]; 185 + enum lp8788_dvs_sel vsel; 186 + }; 187 + 188 + /* 189 + * struct lp8788_ldo_enable_pin 190 + * 191 + * Basically, all LDOs are enabled through the I2C commands. 192 + * But ALDO 1 ~ 5, 7, DLDO 7, 9, 11 can be enabled by external gpio pins. 193 + * 194 + * @gpio : gpio number which is used for enabling ldos 195 + * @init_state : initial gpio state (ex. GPIOF_OUT_INIT_LOW) 196 + */ 197 + struct lp8788_ldo_enable_pin { 198 + int gpio; 199 + int init_state; 200 + }; 201 + 202 + /* 203 + * struct lp8788_chg_param 204 + * @addr : charging control register address (range : 0x11 ~ 0x1C) 205 + * @val : charging parameter value 206 + */ 207 + struct lp8788_chg_param { 208 + u8 addr; 209 + u8 val; 210 + }; 211 + 212 + /* 213 + * struct lp8788_charger_platform_data 214 + * @vbatt_adc : adc selection id for battery voltage 215 + * @batt_temp_adc : adc selection id for battery temperature 216 + * @max_vbatt_mv : used for calculating battery capacity 217 + * @chg_params : initial charging parameters 218 + * @num_chg_params : numbers of charging parameters 219 + * @charger_event : the charger event can be reported to the platform side 220 + */ 221 + struct lp8788_charger_platform_data { 222 + enum lp8788_adc_id vbatt_adc; 223 + enum lp8788_adc_id batt_temp_adc; 224 + unsigned int max_vbatt_mv; 225 + struct lp8788_chg_param *chg_params; 226 + int num_chg_params; 227 + void (*charger_event) (struct lp8788 *lp, 228 + enum lp8788_charger_event event); 229 + }; 230 + 231 + /* 232 + * struct lp8788_bl_pwm_data 233 + * @pwm_set_intensity : set duty of pwm 234 + * @pwm_get_intensity : get current duty of pwm 235 + */ 236 + struct lp8788_bl_pwm_data { 237 + void (*pwm_set_intensity) (int brightness, int max_brightness); 238 + int (*pwm_get_intensity) (int max_brightness); 239 + }; 240 + 241 + /* 242 + * struct lp8788_backlight_platform_data 243 + * @name : backlight driver name. (default: "lcd-backlight") 244 + * @initial_brightness : initial value of backlight brightness 245 + * @bl_mode : brightness control by pwm or lp8788 register 246 + * @dim_mode : dimming mode selection 247 + * @full_scale : full scale current setting 248 + * @rise_time : brightness ramp up step time 249 + * @fall_time : brightness ramp down step time 250 + * @pwm_pol : pwm polarity setting when bl_mode is pwm based 251 + * @pwm_data : platform specific pwm generation functions 252 + * only valid when bl_mode is pwm based 253 + */ 254 + struct lp8788_backlight_platform_data { 255 + char *name; 256 + int initial_brightness; 257 + enum lp8788_bl_ctrl_mode bl_mode; 258 + enum lp8788_bl_dim_mode dim_mode; 259 + enum lp8788_bl_full_scale_current full_scale; 260 + enum lp8788_bl_ramp_step rise_time; 261 + enum lp8788_bl_ramp_step fall_time; 262 + enum lp8788_bl_pwm_polarity pwm_pol; 263 + struct lp8788_bl_pwm_data pwm_data; 264 + }; 265 + 266 + /* 267 + * struct lp8788_led_platform_data 268 + * @name : led driver name. (default: "keyboard-backlight") 269 + * @scale : current scale 270 + * @num : current sink number 271 + * @iout_code : current output value (Addr 9Ah ~ 9Bh) 272 + */ 273 + struct lp8788_led_platform_data { 274 + char *name; 275 + enum lp8788_isink_scale scale; 276 + enum lp8788_isink_number num; 277 + int iout_code; 278 + }; 279 + 280 + /* 281 + * struct lp8788_vib_platform_data 282 + * @name : vibrator driver name 283 + * @scale : current scale 284 + * @num : current sink number 285 + * @iout_code : current output value (Addr 9Ah ~ 9Bh) 286 + * @pwm_code : PWM code value (Addr 9Ch ~ 9Eh) 287 + */ 288 + struct lp8788_vib_platform_data { 289 + char *name; 290 + enum lp8788_isink_scale scale; 291 + enum lp8788_isink_number num; 292 + int iout_code; 293 + int pwm_code; 294 + }; 295 + 296 + /* 297 + * struct lp8788_platform_data 298 + * @init_func : used for initializing registers 299 + * before mfd driver is registered 300 + * @buck_data : regulator initial data for buck 301 + * @dldo_data : regulator initial data for digital ldo 302 + * @aldo_data : regulator initial data for analog ldo 303 + * @buck1_dvs : gpio configurations for buck1 dvs 304 + * @buck2_dvs : gpio configurations for buck2 dvs 305 + * @ldo_pin : gpio configurations for enabling LDOs 306 + * @chg_pdata : platform data for charger driver 307 + * @alarm_sel : rtc alarm selection (1 or 2) 308 + * @bl_pdata : configurable data for backlight driver 309 + * @led_pdata : configurable data for led driver 310 + * @vib_pdata : configurable data for vibrator driver 311 + * @adc_pdata : iio map data for adc driver 312 + */ 313 + struct lp8788_platform_data { 314 + /* general system information */ 315 + int (*init_func) (struct lp8788 *lp); 316 + 317 + /* regulators */ 318 + struct regulator_init_data *buck_data[LP8788_NUM_BUCKS]; 319 + struct regulator_init_data *dldo_data[LP8788_NUM_DLDOS]; 320 + struct regulator_init_data *aldo_data[LP8788_NUM_ALDOS]; 321 + struct lp8788_buck1_dvs *buck1_dvs; 322 + struct lp8788_buck2_dvs *buck2_dvs; 323 + struct lp8788_ldo_enable_pin *ldo_pin[EN_LDOS_MAX]; 324 + 325 + /* charger */ 326 + struct lp8788_charger_platform_data *chg_pdata; 327 + 328 + /* rtc alarm */ 329 + enum lp8788_alarm_sel alarm_sel; 330 + 331 + /* backlight */ 332 + struct lp8788_backlight_platform_data *bl_pdata; 333 + 334 + /* current sinks */ 335 + struct lp8788_led_platform_data *led_pdata; 336 + struct lp8788_vib_platform_data *vib_pdata; 337 + 338 + /* adc iio map data */ 339 + struct iio_map *adc_pdata; 340 + }; 341 + 342 + /* 343 + * struct lp8788 344 + * @dev : parent device pointer 345 + * @regmap : used for i2c communcation on accessing registers 346 + * @irqdm : interrupt domain for handling nested interrupt 347 + * @irq : pin number of IRQ_N 348 + * @pdata : lp8788 platform specific data 349 + */ 350 + struct lp8788 { 351 + struct device *dev; 352 + struct regmap *regmap; 353 + struct irq_domain *irqdm; 354 + int irq; 355 + struct lp8788_platform_data *pdata; 356 + }; 357 + 358 + int lp8788_irq_init(struct lp8788 *lp, int chip_irq); 359 + void lp8788_irq_exit(struct lp8788 *lp); 360 + int lp8788_read_byte(struct lp8788 *lp, u8 reg, u8 *data); 361 + int lp8788_read_multi_bytes(struct lp8788 *lp, u8 reg, u8 *data, size_t count); 362 + int lp8788_write_byte(struct lp8788 *lp, u8 reg, u8 data); 363 + int lp8788_update_bits(struct lp8788 *lp, u8 reg, u8 mask, u8 data); 364 + #endif
+1
include/linux/mfd/lpc_ich.h
··· 43 43 char name[32]; 44 44 unsigned int iTCO_version; 45 45 unsigned int gpio_version; 46 + u8 use_gpio; 46 47 }; 47 48 48 49 #endif
+252
include/linux/mfd/max8907.h
··· 1 + /* 2 + * Functions to access MAX8907 power management chip. 3 + * 4 + * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com> 5 + * Copyright (C) 2012, NVIDIA CORPORATION. All rights reserved. 6 + * 7 + * This program is free software; you can redistribute it and/or modify 8 + * it under the terms of the GNU General Public License version 2 as 9 + * published by the Free Software Foundation. 10 + */ 11 + 12 + #ifndef __LINUX_MFD_MAX8907_H 13 + #define __LINUX_MFD_MAX8907_H 14 + 15 + #include <linux/mutex.h> 16 + #include <linux/pm.h> 17 + 18 + #define MAX8907_GEN_I2C_ADDR (0x78 >> 1) 19 + #define MAX8907_ADC_I2C_ADDR (0x8e >> 1) 20 + #define MAX8907_RTC_I2C_ADDR (0xd0 >> 1) 21 + 22 + /* MAX8907 register map */ 23 + #define MAX8907_REG_SYSENSEL 0x00 24 + #define MAX8907_REG_ON_OFF_IRQ1 0x01 25 + #define MAX8907_REG_ON_OFF_IRQ1_MASK 0x02 26 + #define MAX8907_REG_ON_OFF_STAT 0x03 27 + #define MAX8907_REG_SDCTL1 0x04 28 + #define MAX8907_REG_SDSEQCNT1 0x05 29 + #define MAX8907_REG_SDV1 0x06 30 + #define MAX8907_REG_SDCTL2 0x07 31 + #define MAX8907_REG_SDSEQCNT2 0x08 32 + #define MAX8907_REG_SDV2 0x09 33 + #define MAX8907_REG_SDCTL3 0x0A 34 + #define MAX8907_REG_SDSEQCNT3 0x0B 35 + #define MAX8907_REG_SDV3 0x0C 36 + #define MAX8907_REG_ON_OFF_IRQ2 0x0D 37 + #define MAX8907_REG_ON_OFF_IRQ2_MASK 0x0E 38 + #define MAX8907_REG_RESET_CNFG 0x0F 39 + #define MAX8907_REG_LDOCTL16 0x10 40 + #define MAX8907_REG_LDOSEQCNT16 0x11 41 + #define MAX8907_REG_LDO16VOUT 0x12 42 + #define MAX8907_REG_SDBYSEQCNT 0x13 43 + #define MAX8907_REG_LDOCTL17 0x14 44 + #define MAX8907_REG_LDOSEQCNT17 0x15 45 + #define MAX8907_REG_LDO17VOUT 0x16 46 + #define MAX8907_REG_LDOCTL1 0x18 47 + #define MAX8907_REG_LDOSEQCNT1 0x19 48 + #define MAX8907_REG_LDO1VOUT 0x1A 49 + #define MAX8907_REG_LDOCTL2 0x1C 50 + #define MAX8907_REG_LDOSEQCNT2 0x1D 51 + #define MAX8907_REG_LDO2VOUT 0x1E 52 + #define MAX8907_REG_LDOCTL3 0x20 53 + #define MAX8907_REG_LDOSEQCNT3 0x21 54 + #define MAX8907_REG_LDO3VOUT 0x22 55 + #define MAX8907_REG_LDOCTL4 0x24 56 + #define MAX8907_REG_LDOSEQCNT4 0x25 57 + #define MAX8907_REG_LDO4VOUT 0x26 58 + #define MAX8907_REG_LDOCTL5 0x28 59 + #define MAX8907_REG_LDOSEQCNT5 0x29 60 + #define MAX8907_REG_LDO5VOUT 0x2A 61 + #define MAX8907_REG_LDOCTL6 0x2C 62 + #define MAX8907_REG_LDOSEQCNT6 0x2D 63 + #define MAX8907_REG_LDO6VOUT 0x2E 64 + #define MAX8907_REG_LDOCTL7 0x30 65 + #define MAX8907_REG_LDOSEQCNT7 0x31 66 + #define MAX8907_REG_LDO7VOUT 0x32 67 + #define MAX8907_REG_LDOCTL8 0x34 68 + #define MAX8907_REG_LDOSEQCNT8 0x35 69 + #define MAX8907_REG_LDO8VOUT 0x36 70 + #define MAX8907_REG_LDOCTL9 0x38 71 + #define MAX8907_REG_LDOSEQCNT9 0x39 72 + #define MAX8907_REG_LDO9VOUT 0x3A 73 + #define MAX8907_REG_LDOCTL10 0x3C 74 + #define MAX8907_REG_LDOSEQCNT10 0x3D 75 + #define MAX8907_REG_LDO10VOUT 0x3E 76 + #define MAX8907_REG_LDOCTL11 0x40 77 + #define MAX8907_REG_LDOSEQCNT11 0x41 78 + #define MAX8907_REG_LDO11VOUT 0x42 79 + #define MAX8907_REG_LDOCTL12 0x44 80 + #define MAX8907_REG_LDOSEQCNT12 0x45 81 + #define MAX8907_REG_LDO12VOUT 0x46 82 + #define MAX8907_REG_LDOCTL13 0x48 83 + #define MAX8907_REG_LDOSEQCNT13 0x49 84 + #define MAX8907_REG_LDO13VOUT 0x4A 85 + #define MAX8907_REG_LDOCTL14 0x4C 86 + #define MAX8907_REG_LDOSEQCNT14 0x4D 87 + #define MAX8907_REG_LDO14VOUT 0x4E 88 + #define MAX8907_REG_LDOCTL15 0x50 89 + #define MAX8907_REG_LDOSEQCNT15 0x51 90 + #define MAX8907_REG_LDO15VOUT 0x52 91 + #define MAX8907_REG_OUT5VEN 0x54 92 + #define MAX8907_REG_OUT5VSEQ 0x55 93 + #define MAX8907_REG_OUT33VEN 0x58 94 + #define MAX8907_REG_OUT33VSEQ 0x59 95 + #define MAX8907_REG_LDOCTL19 0x5C 96 + #define MAX8907_REG_LDOSEQCNT19 0x5D 97 + #define MAX8907_REG_LDO19VOUT 0x5E 98 + #define MAX8907_REG_LBCNFG 0x60 99 + #define MAX8907_REG_SEQ1CNFG 0x64 100 + #define MAX8907_REG_SEQ2CNFG 0x65 101 + #define MAX8907_REG_SEQ3CNFG 0x66 102 + #define MAX8907_REG_SEQ4CNFG 0x67 103 + #define MAX8907_REG_SEQ5CNFG 0x68 104 + #define MAX8907_REG_SEQ6CNFG 0x69 105 + #define MAX8907_REG_SEQ7CNFG 0x6A 106 + #define MAX8907_REG_LDOCTL18 0x72 107 + #define MAX8907_REG_LDOSEQCNT18 0x73 108 + #define MAX8907_REG_LDO18VOUT 0x74 109 + #define MAX8907_REG_BBAT_CNFG 0x78 110 + #define MAX8907_REG_CHG_CNTL1 0x7C 111 + #define MAX8907_REG_CHG_CNTL2 0x7D 112 + #define MAX8907_REG_CHG_IRQ1 0x7E 113 + #define MAX8907_REG_CHG_IRQ2 0x7F 114 + #define MAX8907_REG_CHG_IRQ1_MASK 0x80 115 + #define MAX8907_REG_CHG_IRQ2_MASK 0x81 116 + #define MAX8907_REG_CHG_STAT 0x82 117 + #define MAX8907_REG_WLED_MODE_CNTL 0x84 118 + #define MAX8907_REG_ILED_CNTL 0x84 119 + #define MAX8907_REG_II1RR 0x8E 120 + #define MAX8907_REG_II2RR 0x8F 121 + #define MAX8907_REG_LDOCTL20 0x9C 122 + #define MAX8907_REG_LDOSEQCNT20 0x9D 123 + #define MAX8907_REG_LDO20VOUT 0x9E 124 + 125 + /* RTC register map */ 126 + #define MAX8907_REG_RTC_SEC 0x00 127 + #define MAX8907_REG_RTC_MIN 0x01 128 + #define MAX8907_REG_RTC_HOURS 0x02 129 + #define MAX8907_REG_RTC_WEEKDAY 0x03 130 + #define MAX8907_REG_RTC_DATE 0x04 131 + #define MAX8907_REG_RTC_MONTH 0x05 132 + #define MAX8907_REG_RTC_YEAR1 0x06 133 + #define MAX8907_REG_RTC_YEAR2 0x07 134 + #define MAX8907_REG_ALARM0_SEC 0x08 135 + #define MAX8907_REG_ALARM0_MIN 0x09 136 + #define MAX8907_REG_ALARM0_HOURS 0x0A 137 + #define MAX8907_REG_ALARM0_WEEKDAY 0x0B 138 + #define MAX8907_REG_ALARM0_DATE 0x0C 139 + #define MAX8907_REG_ALARM0_MONTH 0x0D 140 + #define MAX8907_REG_ALARM0_YEAR1 0x0E 141 + #define MAX8907_REG_ALARM0_YEAR2 0x0F 142 + #define MAX8907_REG_ALARM1_SEC 0x10 143 + #define MAX8907_REG_ALARM1_MIN 0x11 144 + #define MAX8907_REG_ALARM1_HOURS 0x12 145 + #define MAX8907_REG_ALARM1_WEEKDAY 0x13 146 + #define MAX8907_REG_ALARM1_DATE 0x14 147 + #define MAX8907_REG_ALARM1_MONTH 0x15 148 + #define MAX8907_REG_ALARM1_YEAR1 0x16 149 + #define MAX8907_REG_ALARM1_YEAR2 0x17 150 + #define MAX8907_REG_ALARM0_CNTL 0x18 151 + #define MAX8907_REG_ALARM1_CNTL 0x19 152 + #define MAX8907_REG_RTC_STATUS 0x1A 153 + #define MAX8907_REG_RTC_CNTL 0x1B 154 + #define MAX8907_REG_RTC_IRQ 0x1C 155 + #define MAX8907_REG_RTC_IRQ_MASK 0x1D 156 + #define MAX8907_REG_MPL_CNTL 0x1E 157 + 158 + /* ADC and Touch Screen Controller register map */ 159 + #define MAX8907_CTL 0 160 + #define MAX8907_SEQCNT 1 161 + #define MAX8907_VOUT 2 162 + 163 + /* mask bit fields */ 164 + #define MAX8907_MASK_LDO_SEQ 0x1C 165 + #define MAX8907_MASK_LDO_EN 0x01 166 + #define MAX8907_MASK_VBBATTCV 0x03 167 + #define MAX8907_MASK_OUT5V_VINEN 0x10 168 + #define MAX8907_MASK_OUT5V_ENSRC 0x0E 169 + #define MAX8907_MASK_OUT5V_EN 0x01 170 + #define MAX8907_MASK_POWER_OFF 0x40 171 + 172 + /* Regulator IDs */ 173 + #define MAX8907_MBATT 0 174 + #define MAX8907_SD1 1 175 + #define MAX8907_SD2 2 176 + #define MAX8907_SD3 3 177 + #define MAX8907_LDO1 4 178 + #define MAX8907_LDO2 5 179 + #define MAX8907_LDO3 6 180 + #define MAX8907_LDO4 7 181 + #define MAX8907_LDO5 8 182 + #define MAX8907_LDO6 9 183 + #define MAX8907_LDO7 10 184 + #define MAX8907_LDO8 11 185 + #define MAX8907_LDO9 12 186 + #define MAX8907_LDO10 13 187 + #define MAX8907_LDO11 14 188 + #define MAX8907_LDO12 15 189 + #define MAX8907_LDO13 16 190 + #define MAX8907_LDO14 17 191 + #define MAX8907_LDO15 18 192 + #define MAX8907_LDO16 19 193 + #define MAX8907_LDO17 20 194 + #define MAX8907_LDO18 21 195 + #define MAX8907_LDO19 22 196 + #define MAX8907_LDO20 23 197 + #define MAX8907_OUT5V 24 198 + #define MAX8907_OUT33V 25 199 + #define MAX8907_BBAT 26 200 + #define MAX8907_SDBY 27 201 + #define MAX8907_VRTC 28 202 + #define MAX8907_NUM_REGULATORS (MAX8907_VRTC + 1) 203 + 204 + /* IRQ definitions */ 205 + enum { 206 + MAX8907_IRQ_VCHG_DC_OVP = 0, 207 + MAX8907_IRQ_VCHG_DC_F, 208 + MAX8907_IRQ_VCHG_DC_R, 209 + MAX8907_IRQ_VCHG_THM_OK_R, 210 + MAX8907_IRQ_VCHG_THM_OK_F, 211 + MAX8907_IRQ_VCHG_MBATTLOW_F, 212 + MAX8907_IRQ_VCHG_MBATTLOW_R, 213 + MAX8907_IRQ_VCHG_RST, 214 + MAX8907_IRQ_VCHG_DONE, 215 + MAX8907_IRQ_VCHG_TOPOFF, 216 + MAX8907_IRQ_VCHG_TMR_FAULT, 217 + 218 + MAX8907_IRQ_GPM_RSTIN = 0, 219 + MAX8907_IRQ_GPM_MPL, 220 + MAX8907_IRQ_GPM_SW_3SEC, 221 + MAX8907_IRQ_GPM_EXTON_F, 222 + MAX8907_IRQ_GPM_EXTON_R, 223 + MAX8907_IRQ_GPM_SW_1SEC, 224 + MAX8907_IRQ_GPM_SW_F, 225 + MAX8907_IRQ_GPM_SW_R, 226 + MAX8907_IRQ_GPM_SYSCKEN_F, 227 + MAX8907_IRQ_GPM_SYSCKEN_R, 228 + 229 + MAX8907_IRQ_RTC_ALARM1 = 0, 230 + MAX8907_IRQ_RTC_ALARM0, 231 + }; 232 + 233 + struct max8907_platform_data { 234 + struct regulator_init_data *init_data[MAX8907_NUM_REGULATORS]; 235 + bool pm_off; 236 + }; 237 + 238 + struct regmap_irq_chips_data; 239 + 240 + struct max8907 { 241 + struct device *dev; 242 + struct mutex irq_lock; 243 + struct i2c_client *i2c_gen; 244 + struct i2c_client *i2c_rtc; 245 + struct regmap *regmap_gen; 246 + struct regmap *regmap_rtc; 247 + struct regmap_irq_chip_data *irqc_chg; 248 + struct regmap_irq_chip_data *irqc_on_off; 249 + struct regmap_irq_chip_data *irqc_rtc; 250 + }; 251 + 252 + #endif
+23 -3
include/linux/mfd/max8925.h
··· 158 158 #define TSC_IRQ_MASK (0x03) 159 159 #define RTC_IRQ_MASK (0x0c) 160 160 161 - #define MAX8925_MAX_REGULATOR (23) 162 - 163 161 #define MAX8925_NAME_SIZE (32) 164 162 165 163 /* IRQ definitions */ ··· 234 236 struct max8925_backlight_pdata *backlight; 235 237 struct max8925_touch_pdata *touch; 236 238 struct max8925_power_pdata *power; 237 - struct regulator_init_data *regulator[MAX8925_MAX_REGULATOR]; 239 + struct regulator_init_data *sd1; 240 + struct regulator_init_data *sd2; 241 + struct regulator_init_data *sd3; 242 + struct regulator_init_data *ldo1; 243 + struct regulator_init_data *ldo2; 244 + struct regulator_init_data *ldo3; 245 + struct regulator_init_data *ldo4; 246 + struct regulator_init_data *ldo5; 247 + struct regulator_init_data *ldo6; 248 + struct regulator_init_data *ldo7; 249 + struct regulator_init_data *ldo8; 250 + struct regulator_init_data *ldo9; 251 + struct regulator_init_data *ldo10; 252 + struct regulator_init_data *ldo11; 253 + struct regulator_init_data *ldo12; 254 + struct regulator_init_data *ldo13; 255 + struct regulator_init_data *ldo14; 256 + struct regulator_init_data *ldo15; 257 + struct regulator_init_data *ldo16; 258 + struct regulator_init_data *ldo17; 259 + struct regulator_init_data *ldo18; 260 + struct regulator_init_data *ldo19; 261 + struct regulator_init_data *ldo20; 238 262 239 263 int irq_base; 240 264 int tsc_irq;
+202 -30
include/linux/mfd/palmas.h
··· 23 23 #define PALMAS_NUM_CLIENTS 3 24 24 25 25 struct palmas_pmic; 26 + struct palmas_gpadc; 27 + struct palmas_resource; 28 + struct palmas_usb; 26 29 27 30 struct palmas { 28 31 struct device *dev; ··· 44 41 45 42 /* Child Devices */ 46 43 struct palmas_pmic *pmic; 44 + struct palmas_gpadc *gpadc; 45 + struct palmas_resource *resource; 46 + struct palmas_usb *usb; 47 47 48 48 /* GPIO MUXing */ 49 49 u8 gpio_muxed; 50 50 u8 led_muxed; 51 51 u8 pwm_muxed; 52 + }; 53 + 54 + struct palmas_gpadc_platform_data { 55 + /* Channel 3 current source is only enabled during conversion */ 56 + int ch3_current; 57 + 58 + /* Channel 0 current source can be used for battery detection. 59 + * If used for battery detection this will cause a permanent current 60 + * consumption depending on current level set here. 61 + */ 62 + int ch0_current; 63 + 64 + /* default BAT_REMOVAL_DAT setting on device probe */ 65 + int bat_removal; 66 + 67 + /* Sets the START_POLARITY bit in the RT_CTRL register */ 68 + int start_polarity; 52 69 }; 53 70 54 71 struct palmas_reg_init { ··· 130 107 131 108 }; 132 109 110 + enum palmas_regulators { 111 + /* SMPS regulators */ 112 + PALMAS_REG_SMPS12, 113 + PALMAS_REG_SMPS123, 114 + PALMAS_REG_SMPS3, 115 + PALMAS_REG_SMPS45, 116 + PALMAS_REG_SMPS457, 117 + PALMAS_REG_SMPS6, 118 + PALMAS_REG_SMPS7, 119 + PALMAS_REG_SMPS8, 120 + PALMAS_REG_SMPS9, 121 + PALMAS_REG_SMPS10, 122 + /* LDO regulators */ 123 + PALMAS_REG_LDO1, 124 + PALMAS_REG_LDO2, 125 + PALMAS_REG_LDO3, 126 + PALMAS_REG_LDO4, 127 + PALMAS_REG_LDO5, 128 + PALMAS_REG_LDO6, 129 + PALMAS_REG_LDO7, 130 + PALMAS_REG_LDO8, 131 + PALMAS_REG_LDO9, 132 + PALMAS_REG_LDOLN, 133 + PALMAS_REG_LDOUSB, 134 + /* Total number of regulators */ 135 + PALMAS_NUM_REGS, 136 + }; 137 + 133 138 struct palmas_pmic_platform_data { 134 139 /* An array of pointers to regulator init data indexed by regulator 135 140 * ID 136 141 */ 137 - struct regulator_init_data **reg_data; 142 + struct regulator_init_data *reg_data[PALMAS_NUM_REGS]; 138 143 139 144 /* An array of pointers to structures containing sleep mode and DVS 140 145 * configuration for regulators indexed by ID 141 146 */ 142 - struct palmas_reg_init **reg_init; 147 + struct palmas_reg_init *reg_init[PALMAS_NUM_REGS]; 143 148 144 149 /* use LDO6 for vibrator control */ 145 150 int ldo6_vibrator; 151 + }; 146 152 153 + struct palmas_usb_platform_data { 154 + /* Set this if platform wishes its own vbus control */ 155 + int no_control_vbus; 147 156 157 + /* Do we enable the wakeup comparator on probe */ 158 + int wakeup; 159 + }; 160 + 161 + struct palmas_resource_platform_data { 162 + int regen1_mode_sleep; 163 + int regen2_mode_sleep; 164 + int sysen1_mode_sleep; 165 + int sysen2_mode_sleep; 166 + 167 + /* bitfield to be loaded to NSLEEP_RES_ASSIGN */ 168 + u8 nsleep_res; 169 + /* bitfield to be loaded to NSLEEP_SMPS_ASSIGN */ 170 + u8 nsleep_smps; 171 + /* bitfield to be loaded to NSLEEP_LDO_ASSIGN1 */ 172 + u8 nsleep_ldo1; 173 + /* bitfield to be loaded to NSLEEP_LDO_ASSIGN2 */ 174 + u8 nsleep_ldo2; 175 + 176 + /* bitfield to be loaded to ENABLE1_RES_ASSIGN */ 177 + u8 enable1_res; 178 + /* bitfield to be loaded to ENABLE1_SMPS_ASSIGN */ 179 + u8 enable1_smps; 180 + /* bitfield to be loaded to ENABLE1_LDO_ASSIGN1 */ 181 + u8 enable1_ldo1; 182 + /* bitfield to be loaded to ENABLE1_LDO_ASSIGN2 */ 183 + u8 enable1_ldo2; 184 + 185 + /* bitfield to be loaded to ENABLE2_RES_ASSIGN */ 186 + u8 enable2_res; 187 + /* bitfield to be loaded to ENABLE2_SMPS_ASSIGN */ 188 + u8 enable2_smps; 189 + /* bitfield to be loaded to ENABLE2_LDO_ASSIGN1 */ 190 + u8 enable2_ldo1; 191 + /* bitfield to be loaded to ENABLE2_LDO_ASSIGN2 */ 192 + u8 enable2_ldo2; 193 + }; 194 + 195 + struct palmas_clk_platform_data { 196 + int clk32kg_mode_sleep; 197 + int clk32kgaudio_mode_sleep; 148 198 }; 149 199 150 200 struct palmas_platform_data { ··· 234 138 u8 pad1, pad2; 235 139 236 140 struct palmas_pmic_platform_data *pmic_pdata; 141 + struct palmas_gpadc_platform_data *gpadc_pdata; 142 + struct palmas_usb_platform_data *usb_pdata; 143 + struct palmas_resource_platform_data *resource_pdata; 144 + struct palmas_clk_platform_data *clk_pdata; 237 145 }; 146 + 147 + struct palmas_gpadc_calibration { 148 + s32 gain; 149 + s32 gain_error; 150 + s32 offset_error; 151 + }; 152 + 153 + struct palmas_gpadc { 154 + struct device *dev; 155 + struct palmas *palmas; 156 + 157 + int ch3_current; 158 + int ch0_current; 159 + 160 + int gpadc_force; 161 + 162 + int bat_removal; 163 + 164 + struct mutex reading_lock; 165 + struct completion irq_complete; 166 + 167 + int eoc_sw_irq; 168 + 169 + struct palmas_gpadc_calibration *palmas_cal_tbl; 170 + 171 + int conv0_channel; 172 + int conv1_channel; 173 + int rt_channel; 174 + }; 175 + 176 + struct palmas_gpadc_result { 177 + s32 raw_code; 178 + s32 corrected_code; 179 + s32 result; 180 + }; 181 + 182 + #define PALMAS_MAX_CHANNELS 16 238 183 239 184 /* Define the palmas IRQ numbers */ 240 185 enum palmas_irqs { ··· 319 182 PALMAS_NUM_IRQ, 320 183 }; 321 184 322 - enum palmas_regulators { 323 - /* SMPS regulators */ 324 - PALMAS_REG_SMPS12, 325 - PALMAS_REG_SMPS123, 326 - PALMAS_REG_SMPS3, 327 - PALMAS_REG_SMPS45, 328 - PALMAS_REG_SMPS457, 329 - PALMAS_REG_SMPS6, 330 - PALMAS_REG_SMPS7, 331 - PALMAS_REG_SMPS8, 332 - PALMAS_REG_SMPS9, 333 - PALMAS_REG_SMPS10, 334 - /* LDO regulators */ 335 - PALMAS_REG_LDO1, 336 - PALMAS_REG_LDO2, 337 - PALMAS_REG_LDO3, 338 - PALMAS_REG_LDO4, 339 - PALMAS_REG_LDO5, 340 - PALMAS_REG_LDO6, 341 - PALMAS_REG_LDO7, 342 - PALMAS_REG_LDO8, 343 - PALMAS_REG_LDO9, 344 - PALMAS_REG_LDOLN, 345 - PALMAS_REG_LDOUSB, 346 - /* Total number of regulators */ 347 - PALMAS_NUM_REGS, 348 - }; 349 - 350 185 struct palmas_pmic { 351 186 struct palmas *palmas; 352 187 struct device *dev; ··· 330 221 int smps457; 331 222 332 223 int range[PALMAS_REG_SMPS10]; 224 + }; 225 + 226 + struct palmas_resource { 227 + struct palmas *palmas; 228 + struct device *dev; 229 + }; 230 + 231 + struct palmas_usb { 232 + struct palmas *palmas; 233 + struct device *dev; 234 + 235 + /* for vbus reporting with irqs disabled */ 236 + spinlock_t lock; 237 + 238 + struct regulator *vbus_reg; 239 + 240 + /* used to set vbus, in atomic path */ 241 + struct work_struct set_vbus_work; 242 + 243 + int irq1; 244 + int irq2; 245 + int irq3; 246 + int irq4; 247 + 248 + int vbus_enable; 249 + 250 + u8 linkstat; 251 + }; 252 + 253 + #define comparator_to_palmas(x) container_of((x), struct palmas_usb, comparator) 254 + 255 + enum usb_irq_events { 256 + /* Wakeup events from INT3 */ 257 + PALMAS_USB_ID_WAKEPUP, 258 + PALMAS_USB_VBUS_WAKEUP, 259 + 260 + /* ID_OTG_EVENTS */ 261 + PALMAS_USB_ID_GND, 262 + N_PALMAS_USB_ID_GND, 263 + PALMAS_USB_ID_C, 264 + N_PALMAS_USB_ID_C, 265 + PALMAS_USB_ID_B, 266 + N_PALMAS_USB_ID_B, 267 + PALMAS_USB_ID_A, 268 + N_PALMAS_USB_ID_A, 269 + PALMAS_USB_ID_FLOAT, 270 + N_PALMAS_USB_ID_FLOAT, 271 + 272 + /* VBUS_OTG_EVENTS */ 273 + PALMAS_USB_VB_SESS_END, 274 + N_PALMAS_USB_VB_SESS_END, 275 + PALMAS_USB_VB_SESS_VLD, 276 + N_PALMAS_USB_VB_SESS_VLD, 277 + PALMAS_USB_VA_SESS_VLD, 278 + N_PALMAS_USB_VA_SESS_VLD, 279 + PALMAS_USB_VA_VBUS_VLD, 280 + N_PALMAS_USB_VA_VBUS_VLD, 281 + PALMAS_USB_VADP_SNS, 282 + N_PALMAS_USB_VADP_SNS, 283 + PALMAS_USB_VADP_PRB, 284 + N_PALMAS_USB_VADP_PRB, 285 + PALMAS_USB_VOTG_SESS_VLD, 286 + N_PALMAS_USB_VOTG_SESS_VLD, 333 287 }; 334 288 335 289 /* defines so we can store the mux settings */
+109
include/linux/mfd/smsc.h
··· 1 + /* 2 + * SMSC ECE1099 3 + * 4 + * Copyright 2012 Texas Instruments Inc. 5 + * 6 + * Author: Sourav Poddar <sourav.poddar@ti.com> 7 + * 8 + * This program is free software; you can redistribute it and/or modify it 9 + * under the terms of the GNU General Public License as published by the 10 + * Free Software Foundation; either version 2 of the License, or (at your 11 + * option) any later version. 12 + * 13 + */ 14 + 15 + #ifndef __LINUX_MFD_SMSC_H 16 + #define __LINUX_MFD_SMSC_H 17 + 18 + #include <linux/regmap.h> 19 + 20 + #define SMSC_ID_ECE1099 1 21 + #define SMSC_NUM_CLIENTS 2 22 + 23 + #define SMSC_BASE_ADDR 0x38 24 + #define OMAP_GPIO_SMSC_IRQ 151 25 + 26 + #define SMSC_MAXGPIO 32 27 + #define SMSC_BANK(offs) ((offs) >> 3) 28 + #define SMSC_BIT(offs) (1u << ((offs) & 0x7)) 29 + 30 + struct smsc { 31 + struct device *dev; 32 + struct i2c_client *i2c_clients[SMSC_NUM_CLIENTS]; 33 + struct regmap *regmap; 34 + int clk; 35 + /* Stored chip id */ 36 + int id; 37 + }; 38 + 39 + struct smsc_gpio; 40 + struct smsc_keypad; 41 + 42 + static inline int smsc_read(struct device *child, unsigned int reg, 43 + unsigned int *dest) 44 + { 45 + struct smsc *smsc = dev_get_drvdata(child->parent); 46 + 47 + return regmap_read(smsc->regmap, reg, dest); 48 + } 49 + 50 + static inline int smsc_write(struct device *child, unsigned int reg, 51 + unsigned int value) 52 + { 53 + struct smsc *smsc = dev_get_drvdata(child->parent); 54 + 55 + return regmap_write(smsc->regmap, reg, value); 56 + } 57 + 58 + /* Registers for SMSC */ 59 + #define SMSC_RESET 0xF5 60 + #define SMSC_GRP_INT 0xF9 61 + #define SMSC_CLK_CTRL 0xFA 62 + #define SMSC_WKUP_CTRL 0xFB 63 + #define SMSC_DEV_ID 0xFC 64 + #define SMSC_DEV_REV 0xFD 65 + #define SMSC_VEN_ID_L 0xFE 66 + #define SMSC_VEN_ID_H 0xFF 67 + 68 + /* CLK VALUE */ 69 + #define SMSC_CLK_VALUE 0x13 70 + 71 + /* Registers for function GPIO INPUT */ 72 + #define SMSC_GPIO_DATA_IN_START 0x00 73 + 74 + /* Registers for function GPIO OUPUT */ 75 + #define SMSC_GPIO_DATA_OUT_START 0x05 76 + 77 + /* Definitions for SMSC GPIO CONFIGURATION REGISTER*/ 78 + #define SMSC_GPIO_INPUT_LOW 0x01 79 + #define SMSC_GPIO_INPUT_RISING 0x09 80 + #define SMSC_GPIO_INPUT_FALLING 0x11 81 + #define SMSC_GPIO_INPUT_BOTH_EDGE 0x19 82 + #define SMSC_GPIO_OUTPUT_PP 0x21 83 + #define SMSC_GPIO_OUTPUT_OP 0x31 84 + 85 + #define GRP_INT_STAT 0xf9 86 + #define SMSC_GPI_INT 0x0f 87 + #define SMSC_CFG_START 0x0A 88 + 89 + /* Registers for SMSC GPIO INTERRUPT STATUS REGISTER*/ 90 + #define SMSC_GPIO_INT_STAT_START 0x32 91 + 92 + /* Registers for SMSC GPIO INTERRUPT MASK REGISTER*/ 93 + #define SMSC_GPIO_INT_MASK_START 0x37 94 + 95 + /* Registers for SMSC function KEYPAD*/ 96 + #define SMSC_KP_OUT 0x40 97 + #define SMSC_KP_IN 0x41 98 + #define SMSC_KP_INT_STAT 0x42 99 + #define SMSC_KP_INT_MASK 0x43 100 + 101 + /* Definitions for keypad */ 102 + #define SMSC_KP_KSO 0x70 103 + #define SMSC_KP_KSI 0x51 104 + #define SMSC_KSO_ALL_LOW 0x20 105 + #define SMSC_KP_SET_LOW_PWR 0x0B 106 + #define SMSC_KP_SET_HIGH 0xFF 107 + #define SMSC_KSO_EVAL 0x00 108 + 109 + #endif /* __LINUX_MFD_SMSC_H */
+23
include/linux/mfd/syscon.h
··· 1 + /* 2 + * System Control Driver 3 + * 4 + * Copyright (C) 2012 Freescale Semiconductor, Inc. 5 + * Copyright (C) 2012 Linaro Ltd. 6 + * 7 + * Author: Dong Aisheng <dong.aisheng@linaro.org> 8 + * 9 + * This program is free software; you can redistribute it and/or modify 10 + * it under the terms of the GNU General Public License as published by 11 + * the Free Software Foundation; either version 2 of the License, or 12 + * (at your option) any later version. 13 + */ 14 + 15 + #ifndef __LINUX_MFD_SYSCON_H__ 16 + #define __LINUX_MFD_SYSCON_H__ 17 + 18 + extern struct regmap *syscon_node_to_regmap(struct device_node *np); 19 + extern struct regmap *syscon_regmap_lookup_by_compatible(const char *s); 20 + extern struct regmap *syscon_regmap_lookup_by_phandle( 21 + struct device_node *np, 22 + const char *property); 23 + #endif /* __LINUX_MFD_SYSCON_H__ */
+319
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
··· 1 + /* 2 + * Copyright (C) 2012 Freescale Semiconductor, Inc. 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License version 2 as 6 + * published by the Free Software Foundation. 7 + */ 8 + 9 + #ifndef __LINUX_IMX6Q_IOMUXC_GPR_H 10 + #define __LINUX_IMX6Q_IOMUXC_GPR_H 11 + 12 + #include <linux/bitops.h> 13 + 14 + #define IOMUXC_GPR0 0x00 15 + #define IOMUXC_GPR1 0x04 16 + #define IOMUXC_GPR2 0x08 17 + #define IOMUXC_GPR3 0x0c 18 + #define IOMUXC_GPR4 0x10 19 + #define IOMUXC_GPR5 0x14 20 + #define IOMUXC_GPR6 0x18 21 + #define IOMUXC_GPR7 0x1c 22 + #define IOMUXC_GPR8 0x20 23 + #define IOMUXC_GPR9 0x24 24 + #define IOMUXC_GPR10 0x28 25 + #define IOMUXC_GPR11 0x2c 26 + #define IOMUXC_GPR12 0x30 27 + #define IOMUXC_GPR13 0x34 28 + 29 + #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_MASK (0x3 << 30) 30 + #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_AUDMUX_RXCLK_P7_MUXED (0x0 << 30) 31 + #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_AUDMUX_RXCLK_P7 (0x1 << 30) 32 + #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_SSI3_SSI_SRCK (0x2 << 30) 33 + #define IMX6Q_GPR0_CLOCK_8_MUX_SEL_SSI3_RX_BIT_CLK (0x3 << 30) 34 + #define IMX6Q_GPR0_CLOCK_0_MUX_SEL_MASK (0x3 << 28) 35 + #define IMX6Q_GPR0_CLOCK_0_MUX_SEL_ESAI1_IPP_IND_SCKR_MUXED (0x0 << 28) 36 + #define IMX6Q_GPR0_CLOCK_0_MUX_SEL_ESAI1_IPP_IND_SCKR (0x1 << 28) 37 + #define IMX6Q_GPR0_CLOCK_0_MUX_SEL_ESAI1_IPP_DO_SCKR (0x2 << 28) 38 + #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_MASK (0x3 << 26) 39 + #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_AUDMUX_TXCLK_P7_MUXED (0x0 << 26) 40 + #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_AUDMUX_TXCLK_P7 (0x1 << 26) 41 + #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_SSI3_SSI_STCK (0x2 << 26) 42 + #define IMX6Q_GPR0_CLOCK_B_MUX_SEL_SSI3_TX_BIT_CLK (0x3 << 26) 43 + #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_MASK (0x3 << 24) 44 + #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_AUDMUX_RXCLK_P7_MUXED (0x3 << 24) 45 + #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_AUDMUX_RXCLK_P7 (0x3 << 24) 46 + #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_SSI3_SSI_SRCK (0x3 << 24) 47 + #define IMX6Q_GPR0_CLOCK_3_MUX_SEL_SSI3_RX_BIT_CLK (0x3 << 24) 48 + #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_MASK (0x3 << 22) 49 + #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_AUDMUX_TXCLK_P2_MUXED (0x0 << 22) 50 + #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_AUDMUX_TXCLK_P2 (0x1 << 22) 51 + #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_SSI2_SSI_STCK (0x2 << 22) 52 + #define IMX6Q_GPR0_CLOCK_A_MUX_SEL_SSI2_TX_BIT_CLK (0x3 << 22) 53 + #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_MASK (0x3 << 20) 54 + #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_AUDMUX_RXCLK_P2_MUXED (0x0 << 20) 55 + #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_AUDMUX_RXCLK_P2 (0x1 << 20) 56 + #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_SSI2_SSI_SRCK (0x2 << 20) 57 + #define IMX6Q_GPR0_CLOCK_2_MUX_SEL_SSI2_RX_BIT_CLK (0x3 << 20) 58 + #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_MASK (0x3 << 18) 59 + #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_AUDMUX_TXCLK_P1_MUXED (0x0 << 18) 60 + #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_AUDMUX_TXCLK_P1 (0x1 << 18) 61 + #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_SSI1_SSI_STCK (0x2 << 18) 62 + #define IMX6Q_GPR0_CLOCK_9_MUX_SEL_SSI1_SSI_TX_BIT_CLK (0x3 << 18) 63 + #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_MASK (0x3 << 16) 64 + #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_AUDMUX_RXCLK_P1_MUXED (0x0 << 16) 65 + #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_AUDMUX_RXCLK_P1 (0x1 << 16) 66 + #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_SSI1_SSI_SRCK (0x2 << 16) 67 + #define IMX6Q_GPR0_CLOCK_1_MUX_SEL_SSI1_SSI_RX_BIT_CLK (0x3 << 16) 68 + #define IMX6Q_GPR0_TX_CLK2_MUX_SEL_MASK (0x3 << 14) 69 + #define IMX6Q_GPR0_TX_CLK2_MUX_SEL_ASRCK_CLK1 (0x0 << 14) 70 + #define IMX6Q_GPR0_TX_CLK2_MUX_SEL_ASRCK_CLK2 (0x1 << 14) 71 + #define IMX6Q_GPR0_TX_CLK2_MUX_SEL_ASRCK_CLK3 (0x2 << 14) 72 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL7_MASK BIT(7) 73 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL7_SPDIF 0x0 74 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL7_IOMUX BIT(7) 75 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL6_MASK BIT(6) 76 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL6_ESAI 0x0 77 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL6_I2C3 BIT(6) 78 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL5_MASK BIT(5) 79 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL5_ECSPI4 0x0 80 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL5_EPIT2 BIT(5) 81 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_MASK BIT(4) 82 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_ECSPI4 0x0 83 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL4_I2C1 BIT(4) 84 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL3_MASK BIT(3) 85 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL3_ECSPI2 0x0 86 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL3_I2C1 BIT(3) 87 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL2_MASK BIT(2) 88 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL2_ECSPI1 0x0 89 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL2_I2C2 BIT(2) 90 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL1_MASK BIT(1) 91 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL1_ECSPI1 0x0 92 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL1_I2C3 BIT(1) 93 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_MASK BIT(0) 94 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_IPU1 0x0 95 + #define IMX6Q_GPR0_DMAREQ_MUX_SEL0_IOMUX BIT(0) 96 + 97 + #define IMX6Q_GPR1_PCIE_REQ_MASK (0x3 << 30) 98 + #define IMX6Q_GPR1_PCIE_EXIT_L1 BIT(28) 99 + #define IMX6Q_GPR1_PCIE_RDY_L23 BIT(27) 100 + #define IMX6Q_GPR1_PCIE_ENTER_L1 BIT(26) 101 + #define IMX6Q_GPR1_MIPI_COLOR_SW BIT(25) 102 + #define IMX6Q_GPR1_DPI_OFF BIT(24) 103 + #define IMX6Q_GPR1_EXC_MON_MASK BIT(22) 104 + #define IMX6Q_GPR1_EXC_MON_OKAY 0x0 105 + #define IMX6Q_GPR1_EXC_MON_SLVE BIT(22) 106 + #define IMX6Q_GPR1_MIPI_IPU2_SEL_MASK BIT(21) 107 + #define IMX6Q_GPR1_MIPI_IPU2_SEL_GASKET 0x0 108 + #define IMX6Q_GPR1_MIPI_IPU2_SEL_IOMUX BIT(21) 109 + #define IMX6Q_GPR1_MIPI_IPU1_MUX_MASK BIT(20) 110 + #define IMX6Q_GPR1_MIPI_IPU1_MUX_GASKET 0x0 111 + #define IMX6Q_GPR1_MIPI_IPU1_MUX_IOMUX BIT(20) 112 + #define IMX6Q_GPR1_MIPI_IPU2_MUX_MASK BIT(19) 113 + #define IMX6Q_GPR1_MIPI_IPU2_MUX_GASKET 0x0 114 + #define IMX6Q_GPR1_MIPI_IPU2_MUX_IOMUX BIT(19) 115 + #define IMX6Q_GPR1_PCIE_TEST_PD BIT(18) 116 + #define IMX6Q_GPR1_IPU_VPU_MUX_MASK BIT(17) 117 + #define IMX6Q_GPR1_IPU_VPU_MUX_IPU1 0x0 118 + #define IMX6Q_GPR1_IPU_VPU_MUX_IPU2 BIT(17) 119 + #define IMX6Q_GPR1_PCIE_REF_CLK_EN BIT(16) 120 + #define IMX6Q_GPR1_USB_EXP_MODE BIT(15) 121 + #define IMX6Q_GPR1_PCIE_INT BIT(14) 122 + #define IMX6Q_GPR1_USB_OTG_ID_SEL_MASK BIT(13) 123 + #define IMX6Q_GPR1_USB_OTG_ID_SEL_ENET_RX_ER 0x0 124 + #define IMX6Q_GPR1_USB_OTG_ID_SEL_GPIO_1 BIT(13) 125 + #define IMX6Q_GPR1_GINT BIT(12) 126 + #define IMX6Q_GPR1_ADDRS3_MASK (0x3 << 10) 127 + #define IMX6Q_GPR1_ADDRS3_32MB (0x0 << 10) 128 + #define IMX6Q_GPR1_ADDRS3_64MB (0x1 << 10) 129 + #define IMX6Q_GPR1_ADDRS3_128MB (0x2 << 10) 130 + #define IMX6Q_GPR1_ACT_CS3 BIT(9) 131 + #define IMX6Q_GPR1_ADDRS2_MASK (0x3 << 7) 132 + #define IMX6Q_GPR1_ACT_CS2 BIT(6) 133 + #define IMX6Q_GPR1_ADDRS1_MASK (0x3 << 4) 134 + #define IMX6Q_GPR1_ACT_CS1 BIT(3) 135 + #define IMX6Q_GPR1_ADDRS0_MASK (0x3 << 1) 136 + #define IMX6Q_GPR1_ACT_CS0 BIT(0) 137 + 138 + #define IMX6Q_GPR2_COUNTER_RESET_VAL_MASK (0x3 << 20) 139 + #define IMX6Q_GPR2_COUNTER_RESET_VAL_5 (0x0 << 20) 140 + #define IMX6Q_GPR2_COUNTER_RESET_VAL_3 (0x1 << 20) 141 + #define IMX6Q_GPR2_COUNTER_RESET_VAL_4 (0x2 << 20) 142 + #define IMX6Q_GPR2_COUNTER_RESET_VAL_6 (0x3 << 20) 143 + #define IMX6Q_GPR2_LVDS_CLK_SHIFT_MASK (0x7 << 16) 144 + #define IMX6Q_GPR2_LVDS_CLK_SHIFT_0 (0x0 << 16) 145 + #define IMX6Q_GPR2_LVDS_CLK_SHIFT_1 (0x1 << 16) 146 + #define IMX6Q_GPR2_LVDS_CLK_SHIFT_2 (0x2 << 16) 147 + #define IMX6Q_GPR2_LVDS_CLK_SHIFT_3 (0x3 << 16) 148 + #define IMX6Q_GPR2_LVDS_CLK_SHIFT_4 (0x4 << 16) 149 + #define IMX6Q_GPR2_LVDS_CLK_SHIFT_5 (0x5 << 16) 150 + #define IMX6Q_GPR2_LVDS_CLK_SHIFT_6 (0x6 << 16) 151 + #define IMX6Q_GPR2_LVDS_CLK_SHIFT_7 (0x7 << 16) 152 + #define IMX6Q_GPR2_BGREF_RRMODE_MASK BIT(15) 153 + #define IMX6Q_GPR2_BGREF_RRMODE_EXT_RESISTOR 0x0 154 + #define IMX6Q_GPR2_BGREF_RRMODE_INT_RESISTOR BIT(15) 155 + #define IMX6Q_GPR2_DI1_VS_POLARITY_MASK BIT(10) 156 + #define IMX6Q_GPR2_DI1_VS_POLARITY_ACTIVE_H 0x0 157 + #define IMX6Q_GPR2_DI1_VS_POLARITY_ACTIVE_L BIT(10) 158 + #define IMX6Q_GPR2_DI0_VS_POLARITY_MASK BIT(9) 159 + #define IMX6Q_GPR2_DI0_VS_POLARITY_ACTIVE_H 0x0 160 + #define IMX6Q_GPR2_DI0_VS_POLARITY_ACTIVE_L BIT(9) 161 + #define IMX6Q_GPR2_BIT_MAPPING_CH1_MASK BIT(8) 162 + #define IMX6Q_GPR2_BIT_MAPPING_CH1_SPWG 0x0 163 + #define IMX6Q_GPR2_BIT_MAPPING_CH1_JEIDA BIT(8) 164 + #define IMX6Q_GPR2_DATA_WIDTH_CH1_MASK BIT(7) 165 + #define IMX6Q_GPR2_DATA_WIDTH_CH1_18BIT 0x0 166 + #define IMX6Q_GPR2_DATA_WIDTH_CH1_24BIT BIT(7) 167 + #define IMX6Q_GPR2_BIT_MAPPING_CH0_MASK BIT(6) 168 + #define IMX6Q_GPR2_BIT_MAPPING_CH0_SPWG 0x0 169 + #define IMX6Q_GPR2_BIT_MAPPING_CH0_JEIDA BIT(6) 170 + #define IMX6Q_GPR2_DATA_WIDTH_CH0_MASK BIT(5) 171 + #define IMX6Q_GPR2_DATA_WIDTH_CH0_18BIT 0x0 172 + #define IMX6Q_GPR2_DATA_WIDTH_CH0_24BIT BIT(5) 173 + #define IMX6Q_GPR2_SPLIT_MODE_EN BIT(4) 174 + #define IMX6Q_GPR2_CH1_MODE_MASK (0x3 << 2) 175 + #define IMX6Q_GPR2_CH1_MODE_DISABLE (0x0 << 2) 176 + #define IMX6Q_GPR2_CH1_MODE_EN_ROUTE_DI0 (0x1 << 2) 177 + #define IMX6Q_GPR2_CH1_MODE_EN_ROUTE_DI1 (0x3 << 2) 178 + #define IMX6Q_GPR2_CH0_MODE_MASK (0x3 << 0) 179 + #define IMX6Q_GPR2_CH0_MODE_DISABLE (0x0 << 0) 180 + #define IMX6Q_GPR2_CH0_MODE_EN_ROUTE_DI0 (0x1 << 0) 181 + #define IMX6Q_GPR2_CH0_MODE_EN_ROUTE_DI1 (0x3 << 0) 182 + 183 + #define IMX6Q_GPR3_GPU_DBG_MASK (0x3 << 29) 184 + #define IMX6Q_GPR3_GPU_DBG_GPU3D (0x0 << 29) 185 + #define IMX6Q_GPR3_GPU_DBG_GPU2D (0x1 << 29) 186 + #define IMX6Q_GPR3_GPU_DBG_OPENVG (0x2 << 29) 187 + #define IMX6Q_GPR3_BCH_WR_CACHE_CTL BIT(28) 188 + #define IMX6Q_GPR3_BCH_RD_CACHE_CTL BIT(27) 189 + #define IMX6Q_GPR3_USDHCX_WR_CACHE_CTL BIT(26) 190 + #define IMX6Q_GPR3_USDHCX_RD_CACHE_CTL BIT(25) 191 + #define IMX6Q_GPR3_OCRAM_CTL_MASK (0xf << 21) 192 + #define IMX6Q_GPR3_OCRAM_STATUS_MASK (0xf << 17) 193 + #define IMX6Q_GPR3_CORE3_DBG_ACK_EN BIT(16) 194 + #define IMX6Q_GPR3_CORE2_DBG_ACK_EN BIT(15) 195 + #define IMX6Q_GPR3_CORE1_DBG_ACK_EN BIT(14) 196 + #define IMX6Q_GPR3_CORE0_DBG_ACK_EN BIT(13) 197 + #define IMX6Q_GPR3_TZASC2_BOOT_LOCK BIT(12) 198 + #define IMX6Q_GPR3_TZASC1_BOOT_LOCK BIT(11) 199 + #define IMX6Q_GPR3_IPU_DIAG_MASK BIT(10) 200 + #define IMX6Q_GPR3_LVDS1_MUX_CTL_MASK (0x3 << 8) 201 + #define IMX6Q_GPR3_LVDS1_MUX_CTL_IPU1_DI0 (0x0 << 8) 202 + #define IMX6Q_GPR3_LVDS1_MUX_CTL_IPU1_DI1 (0x1 << 8) 203 + #define IMX6Q_GPR3_LVDS1_MUX_CTL_IPU2_DI0 (0x2 << 8) 204 + #define IMX6Q_GPR3_LVDS1_MUX_CTL_IPU2_DI1 (0x3 << 8) 205 + #define IMX6Q_GPR3_LVDS0_MUX_CTL_MASK (0x3 << 6) 206 + #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU1_DI0 (0x0 << 6) 207 + #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU1_DI1 (0x1 << 6) 208 + #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI0 (0x2 << 6) 209 + #define IMX6Q_GPR3_LVDS0_MUX_CTL_IPU2_DI1 (0x3 << 6) 210 + #define IMX6Q_GPR3_MIPI_MUX_CTL_MASK (0x3 << 4) 211 + #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI0 (0x0 << 4) 212 + #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU1_DI1 (0x1 << 4) 213 + #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI0 (0x2 << 4) 214 + #define IMX6Q_GPR3_MIPI_MUX_CTL_IPU2_DI1 (0x3 << 4) 215 + #define IMX6Q_GPR3_HDMI_MUX_CTL_MASK (0x3 << 2) 216 + #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI0 (0x0 << 2) 217 + #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU1_DI1 (0x1 << 2) 218 + #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU2_DI0 (0x2 << 2) 219 + #define IMX6Q_GPR3_HDMI_MUX_CTL_IPU2_DI1 (0x3 << 2) 220 + 221 + #define IMX6Q_GPR4_VDOA_WR_CACHE_SEL BIT(31) 222 + #define IMX6Q_GPR4_VDOA_RD_CACHE_SEL BIT(30) 223 + #define IMX6Q_GPR4_VDOA_WR_CACHE_VAL BIT(29) 224 + #define IMX6Q_GPR4_VDOA_RD_CACHE_VAL BIT(28) 225 + #define IMX6Q_GPR4_PCIE_WR_CACHE_SEL BIT(27) 226 + #define IMX6Q_GPR4_PCIE_RD_CACHE_SEL BIT(26) 227 + #define IMX6Q_GPR4_PCIE_WR_CACHE_VAL BIT(25) 228 + #define IMX6Q_GPR4_PCIE_RD_CACHE_VAL BIT(24) 229 + #define IMX6Q_GPR4_SDMA_STOP_ACK BIT(19) 230 + #define IMX6Q_GPR4_CAN2_STOP_ACK BIT(18) 231 + #define IMX6Q_GPR4_CAN1_STOP_ACK BIT(17) 232 + #define IMX6Q_GPR4_ENET_STOP_ACK BIT(16) 233 + #define IMX6Q_GPR4_SOC_VERSION_MASK (0xff << 8) 234 + #define IMX6Q_GPR4_SOC_VERSION_OFF 0x8 235 + #define IMX6Q_GPR4_VPU_WR_CACHE_SEL BIT(7) 236 + #define IMX6Q_GPR4_VPU_RD_CACHE_SEL BIT(6) 237 + #define IMX6Q_GPR4_VPU_P_WR_CACHE_VAL BIT(3) 238 + #define IMX6Q_GPR4_VPU_P_RD_CACHE_VAL_MASK BIT(2) 239 + #define IMX6Q_GPR4_IPU_WR_CACHE_CTL BIT(1) 240 + #define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0) 241 + 242 + #define IMX6Q_GPR5_L2_CLK_STOP BIT(8) 243 + 244 + #define IMX6Q_GPR9_TZASC2_BYP BIT(1) 245 + #define IMX6Q_GPR9_TZASC1_BYP BIT(0) 246 + 247 + #define IMX6Q_GPR10_LOCK_DBG_EN BIT(29) 248 + #define IMX6Q_GPR10_LOCK_DBG_CLK_EN BIT(28) 249 + #define IMX6Q_GPR10_LOCK_SEC_ERR_RESP BIT(27) 250 + #define IMX6Q_GPR10_LOCK_OCRAM_TZ_ADDR (0x3f << 21) 251 + #define IMX6Q_GPR10_LOCK_OCRAM_TZ_EN BIT(20) 252 + #define IMX6Q_GPR10_LOCK_DCIC2_MUX_MASK (0x3 << 18) 253 + #define IMX6Q_GPR10_LOCK_DCIC1_MUX_MASK (0x3 << 16) 254 + #define IMX6Q_GPR10_DBG_EN BIT(13) 255 + #define IMX6Q_GPR10_DBG_CLK_EN BIT(12) 256 + #define IMX6Q_GPR10_SEC_ERR_RESP_MASK BIT(11) 257 + #define IMX6Q_GPR10_SEC_ERR_RESP_OKEY 0x0 258 + #define IMX6Q_GPR10_SEC_ERR_RESP_SLVE BIT(11) 259 + #define IMX6Q_GPR10_OCRAM_TZ_ADDR_MASK (0x3f << 5) 260 + #define IMX6Q_GPR10_OCRAM_TZ_EN_MASK BIT(4) 261 + #define IMX6Q_GPR10_DCIC2_MUX_CTL_MASK (0x3 << 2) 262 + #define IMX6Q_GPR10_DCIC2_MUX_CTL_IPU1_DI0 (0x0 << 2) 263 + #define IMX6Q_GPR10_DCIC2_MUX_CTL_IPU1_DI1 (0x1 << 2) 264 + #define IMX6Q_GPR10_DCIC2_MUX_CTL_IPU2_DI0 (0x2 << 2) 265 + #define IMX6Q_GPR10_DCIC2_MUX_CTL_IPU2_DI1 (0x3 << 2) 266 + #define IMX6Q_GPR10_DCIC1_MUX_CTL_MASK (0x3 << 0) 267 + #define IMX6Q_GPR10_DCIC1_MUX_CTL_IPU1_DI0 (0x0 << 0) 268 + #define IMX6Q_GPR10_DCIC1_MUX_CTL_IPU1_DI1 (0x1 << 0) 269 + #define IMX6Q_GPR10_DCIC1_MUX_CTL_IPU2_DI0 (0x2 << 0) 270 + #define IMX6Q_GPR10_DCIC1_MUX_CTL_IPU2_DI1 (0x3 << 0) 271 + 272 + #define IMX6Q_GPR12_ARMP_IPG_CLK_EN BIT(27) 273 + #define IMX6Q_GPR12_ARMP_AHB_CLK_EN BIT(26) 274 + #define IMX6Q_GPR12_ARMP_ATB_CLK_EN BIT(25) 275 + #define IMX6Q_GPR12_ARMP_APB_CLK_EN BIT(24) 276 + #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) 277 + 278 + #define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30) 279 + #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29) 280 + #define IMX6Q_GPR13_CAN1_STOP_REQ BIT(28) 281 + #define IMX6Q_GPR13_ENET_STOP_REQ BIT(27) 282 + #define IMX6Q_GPR13_SATA_PHY_8_MASK (0x7 << 24) 283 + #define IMX6Q_GPR13_SATA_PHY_8_0_5_DB (0x0 << 24) 284 + #define IMX6Q_GPR13_SATA_PHY_8_1_0_DB (0x1 << 24) 285 + #define IMX6Q_GPR13_SATA_PHY_8_1_5_DB (0x2 << 24) 286 + #define IMX6Q_GPR13_SATA_PHY_8_2_0_DB (0x3 << 24) 287 + #define IMX6Q_GPR13_SATA_PHY_8_2_5_DB (0x4 << 24) 288 + #define IMX6Q_GPR13_SATA_PHY_8_3_0_DB (0x5 << 24) 289 + #define IMX6Q_GPR13_SATA_PHY_8_3_5_DB (0x6 << 24) 290 + #define IMX6Q_GPR13_SATA_PHY_8_4_0_DB (0x7 << 24) 291 + #define IMX6Q_GPR13_SATA_PHY_7_MASK (0x1f << 19) 292 + #define IMX6Q_GPR13_SATA_PHY_7_SATA1I (0x10 << 19) 293 + #define IMX6Q_GPR13_SATA_PHY_7_SATA1M (0x10 << 19) 294 + #define IMX6Q_GPR13_SATA_PHY_7_SATA1X (0x1a << 19) 295 + #define IMX6Q_GPR13_SATA_PHY_7_SATA2I (0x12 << 19) 296 + #define IMX6Q_GPR13_SATA_PHY_7_SATA2M (0x12 << 19) 297 + #define IMX6Q_GPR13_SATA_PHY_7_SATA2X (0x1a << 19) 298 + #define IMX6Q_GPR13_SATA_PHY_6_MASK (0x7 << 16) 299 + #define IMX6Q_GPR13_SATA_SPEED_MASK BIT(15) 300 + #define IMX6Q_GPR13_SATA_SPEED_1P5G 0x0 301 + #define IMX6Q_GPR13_SATA_SPEED_3P0G BIT(15) 302 + #define IMX6Q_GPR13_SATA_PHY_5 BIT(14) 303 + #define IMX6Q_GPR13_SATA_PHY_4_MASK (0x7 << 11) 304 + #define IMX6Q_GPR13_SATA_PHY_4_16_16 (0x0 << 11) 305 + #define IMX6Q_GPR13_SATA_PHY_4_14_16 (0x1 << 11) 306 + #define IMX6Q_GPR13_SATA_PHY_4_12_16 (0x2 << 11) 307 + #define IMX6Q_GPR13_SATA_PHY_4_10_16 (0x3 << 11) 308 + #define IMX6Q_GPR13_SATA_PHY_4_9_16 (0x4 << 11) 309 + #define IMX6Q_GPR13_SATA_PHY_4_8_16 (0x5 << 11) 310 + #define IMX6Q_GPR13_SATA_PHY_3_MASK (0xf << 7) 311 + #define IMX6Q_GPR13_SATA_PHY_3_OFF 0x7 312 + #define IMX6Q_GPR13_SATA_PHY_2_MASK (0x1f << 2) 313 + #define IMX6Q_GPR13_SATA_PHY_2_OFF 0x2 314 + #define IMX6Q_GPR13_SATA_PHY_1_MASK (0x3 << 0) 315 + #define IMX6Q_GPR13_SATA_PHY_1_FAST (0x0 << 0) 316 + #define IMX6Q_GPR13_SATA_PHY_1_MED (0x1 << 0) 317 + #define IMX6Q_GPR13_SATA_PHY_1_SLOW (0x2 << 0) 318 + 319 + #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */
+1
include/linux/mfd/tc3589x.h
··· 117 117 struct mutex lock; 118 118 struct device *dev; 119 119 struct i2c_client *i2c; 120 + struct irq_domain *domain; 120 121 121 122 int irq_base; 122 123 int num_gpio;
+18
include/linux/mfd/tps65217.h
··· 213 213 /* Number of total regulators available */ 214 214 #define TPS65217_NUM_REGULATOR (TPS65217_NUM_DCDC + TPS65217_NUM_LDO) 215 215 216 + enum tps65217_bl_isel { 217 + TPS65217_BL_ISET1 = 1, 218 + TPS65217_BL_ISET2, 219 + }; 220 + 221 + enum tps65217_bl_fdim { 222 + TPS65217_BL_FDIM_100HZ, 223 + TPS65217_BL_FDIM_200HZ, 224 + TPS65217_BL_FDIM_500HZ, 225 + TPS65217_BL_FDIM_1000HZ, 226 + }; 227 + 228 + struct tps65217_bl_pdata { 229 + enum tps65217_bl_isel isel; 230 + enum tps65217_bl_fdim fdim; 231 + }; 232 + 216 233 /** 217 234 * struct tps65217_board - packages regulator init data 218 235 * @tps65217_regulator_data: regulator initialization values ··· 239 222 struct tps65217_board { 240 223 struct regulator_init_data *tps65217_init_data[TPS65217_NUM_REGULATOR]; 241 224 struct device_node *of_node[TPS65217_NUM_REGULATOR]; 225 + struct tps65217_bl_pdata *bl_pdata; 242 226 }; 243 227 244 228 /**
+1
include/linux/mfd/tps6586x.h
··· 78 78 79 79 int gpio_base; 80 80 int irq_base; 81 + bool pm_off; 81 82 }; 82 83 83 84 /*
+3
include/linux/mfd/tps65910.h
··· 366 366 367 367 368 368 /*Register DEVCTRL (0x80) register.RegisterDescription */ 369 + #define DEVCTRL_PWR_OFF_MASK 0x80 370 + #define DEVCTRL_PWR_OFF_SHIFT 7 369 371 #define DEVCTRL_RTC_PWDN_MASK 0x40 370 372 #define DEVCTRL_RTC_PWDN_SHIFT 6 371 373 #define DEVCTRL_CK32K_CTRL_MASK 0x20 ··· 811 809 int vmbch2_threshold; 812 810 bool en_ck32k_xtal; 813 811 bool en_dev_slp; 812 + bool pm_off; 814 813 struct tps65910_sleep_keepon_data *slp_keepon; 815 814 bool en_gpio_sleep[TPS6591X_MAX_NUM_GPIO]; 816 815 unsigned long regulator_ext_sleep_control[TPS65910_NUM_REGS];
+9 -2
include/linux/mfd/twl6040.h
··· 143 143 144 144 #define TWL6040_GPO1 0x01 145 145 #define TWL6040_GPO2 0x02 146 - #define TWL6040_GPO3 0x03 146 + #define TWL6040_GPO3 0x04 147 147 148 148 /* ACCCTL (0x2D) fields */ 149 149 ··· 158 158 #define TWL6040_VIBROCDET 0x20 159 159 #define TWL6040_TSHUTDET 0x40 160 160 161 - #define TWL6040_CELLS 2 161 + #define TWL6040_CELLS 3 162 162 163 163 #define TWL6040_REV_ES1_0 0x00 164 164 #define TWL6040_REV_ES1_1 0x01 /* Rev ES1.1 and ES1.2 */ ··· 176 176 #define TWL6040_SYSCLK_SEL_LPPLL 0 177 177 #define TWL6040_SYSCLK_SEL_HPPLL 1 178 178 179 + #define TWL6040_GPO_MAX 3 180 + 179 181 struct twl6040_codec_data { 180 182 u16 hs_left_step; 181 183 u16 hs_right_step; ··· 194 192 int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */ 195 193 }; 196 194 195 + struct twl6040_gpo_data { 196 + int gpio_base; 197 + }; 198 + 197 199 struct twl6040_platform_data { 198 200 int audpwron_gpio; /* audio power-on gpio */ 199 201 200 202 struct twl6040_codec_data *codec; 201 203 struct twl6040_vibra_data *vibra; 204 + struct twl6040_gpo_data *gpo; 202 205 }; 203 206 204 207 struct regmap;
+6
include/linux/of.h
··· 317 317 return "<no-node>"; 318 318 } 319 319 320 + static inline struct device_node *of_find_node_by_name(struct device_node *from, 321 + const char *name) 322 + { 323 + return NULL; 324 + } 325 + 320 326 static inline bool of_have_populated_dt(void) 321 327 { 322 328 return false;