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ARM: dts: Improve omap l4per idling with wlcore edge sensitive interrupt

The wl1835mod.pdf data sheet says this pretty clearly for WL_IRQ line:

"WLAN SDIO out-of-band interrupt line. Set to rising edge (active high)
by default."

And it seems this interrupt can be optionally configured to use falling
edge too since commit bd763482c82e ("wl18xx: wlan_irq: support platform
dependent interrupt types").

On omap4, if the wlcore interrupt is configured as level instead of edge,
L4PER will stop doing hardware based idling after ifconfig wlan0 down is
done and the WL_EN line is pulled down.

The symptoms show up with L4PER status registers no longer showing the
IDLEST bits as 2 but as 0 for all the active GPIO banks and for
L4PER_CLKCTRL. Also the l4per_pwrdm RET count stops increasing in
the /sys/kernel/debug/pm_debug/count.

While there is also probably a GPIO related issue that needs to be
still fixed, this change gets us to the point where we can have L4PER
idling.

I'm guessing wlcore was at some point configured to use level interrupts
because of edge handling issues in gpio-omap. However, with the recent
fixes to gpio-omap the edge interrupts seem to be working just fine.

Let's change it for all omap boards with wlcore interrupt set as level.

Cc: Dave Gerlach <d-gerlach@ti.com>
Cc: Eyal Reizer <eyalr@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Kalle Valo <kvalo@codeaurora.org>
Cc: Nishanth Menon <nm@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
[tony@atomide.com updated comments a bit for gpio issue]
Signed-off-by: Tony Lindgren <tony@atomide.com>

Tony Lindgren 572cf7d7 382ceeaa

+17 -17
+1 -1
arch/arm/boot/dts/am335x-baltos.dtsi
··· 396 396 compatible = "ti,wl1835"; 397 397 reg = <2>; 398 398 interrupt-parent = <&gpio3>; 399 - interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 399 + interrupts = <7 IRQ_TYPE_EDGE_RISING>; 400 400 }; 401 401 }; 402 402
+1 -1
arch/arm/boot/dts/am335x-evm.dts
··· 778 778 compatible = "ti,wl1835"; 779 779 reg = <2>; 780 780 interrupt-parent = <&gpio3>; 781 - interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; 781 + interrupts = <17 IRQ_TYPE_EDGE_RISING>; 782 782 }; 783 783 }; 784 784
+1 -1
arch/arm/boot/dts/am335x-evmsk.dts
··· 690 690 compatible = "ti,wl1271"; 691 691 reg = <2>; 692 692 interrupt-parent = <&gpio0>; 693 - interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */ 693 + interrupts = <31 IRQ_TYPE_EDGE_RISING>; /* gpio 31 */ 694 694 ref-clock-frequency = <38400000>; 695 695 }; 696 696 };
+1 -1
arch/arm/boot/dts/am437x-gp-evm.dts
··· 790 790 compatible = "ti,wl1835"; 791 791 reg = <2>; 792 792 interrupt-parent = <&gpio1>; 793 - interrupts = <23 IRQ_TYPE_LEVEL_HIGH>; 793 + interrupts = <23 IRQ_TYPE_EDGE_RISING>; 794 794 }; 795 795 }; 796 796
+1 -1
arch/arm/boot/dts/logicpd-som-lv.dtsi
··· 142 142 compatible = "ti,wl1273"; 143 143 reg = <2>; 144 144 interrupt-parent = <&gpio1>; 145 - interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */ 145 + interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */ 146 146 ref-clock-frequency = <26000000>; 147 147 }; 148 148 };
+1 -1
arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
··· 48 48 compatible = "ti,wl1283"; 49 49 reg = <2>; 50 50 interrupt-parent = <&gpio5>; 51 - interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */ 51 + interrupts = <24 IRQ_TYPE_EDGE_RISING>; /* gpio 152 */ 52 52 ref-clock-frequency = <26000000>; 53 53 tcxo-clock-frequency = <26000000>; 54 54 };
+1 -1
arch/arm/boot/dts/omap3-cm-t3517.dts
··· 141 141 compatible = "ti,wl1271"; 142 142 reg = <2>; 143 143 interrupt-parent = <&gpio5>; 144 - interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; /* gpio 145 */ 144 + interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 145 */ 145 145 ref-clock-frequency = <38400000>; 146 146 }; 147 147 };
+1 -1
arch/arm/boot/dts/omap3-cm-t3730.dts
··· 81 81 compatible = "ti,wl1271"; 82 82 reg = <2>; 83 83 interrupt-parent = <&gpio5>; 84 - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; /* gpio 136 */ 84 + interrupts = <8 IRQ_TYPE_EDGE_RISING>; /* gpio 136 */ 85 85 ref-clock-frequency = <38400000>; 86 86 }; 87 87 };
+1 -1
arch/arm/boot/dts/omap3-evm-common.dtsi
··· 133 133 compatible = "ti,wl1271"; 134 134 reg = <2>; 135 135 interrupt-parent = <&gpio5>; 136 - interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 149 */ 136 + interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 149 */ 137 137 ref-clock-frequency = <38400000>; 138 138 }; 139 139 };
+1 -1
arch/arm/boot/dts/omap3-igep0020-rev-f.dts
··· 49 49 compatible = "ti,wl1835"; 50 50 reg = <2>; 51 51 interrupt-parent = <&gpio6>; 52 - interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; /* gpio 177 */ 52 + interrupts = <17 IRQ_TYPE_EDGE_RISING>; /* gpio 177 */ 53 53 }; 54 54 };
+1 -1
arch/arm/boot/dts/omap3-igep0030-rev-g.dts
··· 71 71 compatible = "ti,wl1835"; 72 72 reg = <2>; 73 73 interrupt-parent = <&gpio5>; 74 - interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; /* gpio 136 */ 74 + interrupts = <8 IRQ_TYPE_EDGE_RISING>; /* gpio 136 */ 75 75 }; 76 76 };
+1 -1
arch/arm/boot/dts/omap3-zoom3.dts
··· 202 202 compatible = "ti,wl1271"; 203 203 reg = <2>; 204 204 interrupt-parent = <&gpio6>; 205 - interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 162 */ 205 + interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 162 */ 206 206 ref-clock-frequency = <26000000>; 207 207 }; 208 208 };
+1 -1
arch/arm/boot/dts/omap4-droid4-xt894.dts
··· 372 372 compatible = "ti,wl1285", "ti,wl1283"; 373 373 reg = <2>; 374 374 interrupt-parent = <&gpio4>; 375 - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; /* gpio100 */ 375 + interrupts = <4 IRQ_TYPE_EDGE_RISING>; /* gpio100 */ 376 376 ref-clock-frequency = <26000000>; 377 377 tcxo-clock-frequency = <26000000>; 378 378 };
+1 -1
arch/arm/boot/dts/omap4-panda-common.dtsi
··· 464 464 compatible = "ti,wl1271"; 465 465 reg = <2>; 466 466 interrupt-parent = <&gpio2>; 467 - interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */ 467 + interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 53 */ 468 468 ref-clock-frequency = <38400000>; 469 469 }; 470 470 };
+1 -1
arch/arm/boot/dts/omap4-sdp.dts
··· 493 493 compatible = "ti,wl1281"; 494 494 reg = <2>; 495 495 interrupt-parent = <&gpio1>; 496 - interrupts = <21 IRQ_TYPE_LEVEL_HIGH>; /* gpio 53 */ 496 + interrupts = <21 IRQ_TYPE_EDGE_RISING>; /* gpio 53 */ 497 497 ref-clock-frequency = <26000000>; 498 498 tcxo-clock-frequency = <26000000>; 499 499 };
+1 -1
arch/arm/boot/dts/omap4-var-som-om44-wlan.dtsi
··· 72 72 compatible = "ti,wl1271"; 73 73 reg = <2>; 74 74 interrupt-parent = <&gpio2>; 75 - interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; /* gpio 41 */ 75 + interrupts = <9 IRQ_TYPE_EDGE_RISING>; /* gpio 41 */ 76 76 ref-clock-frequency = <38400000>; 77 77 }; 78 78 };
+1 -1
arch/arm/boot/dts/omap5-board-common.dtsi
··· 364 364 pinctrl-names = "default"; 365 365 pinctrl-0 = <&wlcore_irq_pin>; 366 366 interrupt-parent = <&gpio1>; 367 - interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; /* gpio 14 */ 367 + interrupts = <14 IRQ_TYPE_EDGE_RISING>; /* gpio 14 */ 368 368 ref-clock-frequency = <26000000>; 369 369 }; 370 370 };