Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'omapdrm-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next

omapdrm changes for 5.3

- Add support for DSI command mode displays

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a709f57d-6909-8550-3932-d84e0b5bc3ef@ti.com

+228 -38
+6 -12
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
··· 410 410 static ssize_t dsicm_num_errors_show(struct device *dev, 411 411 struct device_attribute *attr, char *buf) 412 412 { 413 - struct platform_device *pdev = to_platform_device(dev); 414 - struct panel_drv_data *ddata = platform_get_drvdata(pdev); 413 + struct panel_drv_data *ddata = dev_get_drvdata(dev); 415 414 struct omap_dss_device *src = ddata->src; 416 415 u8 errors = 0; 417 416 int r; ··· 441 442 static ssize_t dsicm_hw_revision_show(struct device *dev, 442 443 struct device_attribute *attr, char *buf) 443 444 { 444 - struct platform_device *pdev = to_platform_device(dev); 445 - struct panel_drv_data *ddata = platform_get_drvdata(pdev); 445 + struct panel_drv_data *ddata = dev_get_drvdata(dev); 446 446 struct omap_dss_device *src = ddata->src; 447 447 u8 id1, id2, id3; 448 448 int r; ··· 472 474 struct device_attribute *attr, 473 475 const char *buf, size_t count) 474 476 { 475 - struct platform_device *pdev = to_platform_device(dev); 476 - struct panel_drv_data *ddata = platform_get_drvdata(pdev); 477 + struct panel_drv_data *ddata = dev_get_drvdata(dev); 477 478 struct omap_dss_device *src = ddata->src; 478 479 unsigned long t; 479 480 int r; ··· 506 509 struct device_attribute *attr, 507 510 char *buf) 508 511 { 509 - struct platform_device *pdev = to_platform_device(dev); 510 - struct panel_drv_data *ddata = platform_get_drvdata(pdev); 512 + struct panel_drv_data *ddata = dev_get_drvdata(dev); 511 513 unsigned int t; 512 514 513 515 mutex_lock(&ddata->lock); ··· 520 524 struct device_attribute *attr, 521 525 const char *buf, size_t count) 522 526 { 523 - struct platform_device *pdev = to_platform_device(dev); 524 - struct panel_drv_data *ddata = platform_get_drvdata(pdev); 527 + struct panel_drv_data *ddata = dev_get_drvdata(dev); 525 528 struct omap_dss_device *src = ddata->src; 526 529 unsigned long t; 527 530 int r; ··· 551 556 struct device_attribute *attr, 552 557 char *buf) 553 558 { 554 - struct platform_device *pdev = to_platform_device(dev); 555 - struct panel_drv_data *ddata = platform_get_drvdata(pdev); 559 + struct panel_drv_data *ddata = dev_get_drvdata(dev); 556 560 unsigned int t; 557 561 558 562 mutex_lock(&ddata->lock);
+1
drivers/gpu/drm/omapdrm/dss/omapdss-boot-init.c
··· 198 198 { .compatible = "toppoly,td028ttec1" }, 199 199 { .compatible = "tpo,td028ttec1" }, 200 200 { .compatible = "tpo,td043mtea1" }, 201 + {}, 201 202 }; 202 203 203 204 static int __init omapdss_boot_init(void)
+171 -9
drivers/gpu/drm/omapdrm/omap_crtc.c
··· 32 32 /* Shadow values for legacy userspace support. */ 33 33 unsigned int rotation; 34 34 unsigned int zpos; 35 + bool manually_updated; 35 36 }; 36 37 37 38 #define to_omap_crtc(x) container_of(x, struct omap_crtc, base) ··· 52 51 bool pending; 53 52 wait_queue_head_t pending_wait; 54 53 struct drm_pending_vblank_event *event; 54 + struct delayed_work update_work; 55 + 56 + void (*framedone_handler)(void *); 57 + void *framedone_handler_data; 55 58 }; 56 59 57 60 /* ----------------------------------------------------------------------------- ··· 107 102 /* 108 103 * Manager-ops, callbacks from output when they need to configure 109 104 * the upstream part of the video pipe. 110 - * 111 - * Most of these we can ignore until we add support for command-mode 112 - * panels.. for video-mode the crtc-helpers already do an adequate 113 - * job of sequencing the setup of the video pipe in the proper order 114 105 */ 115 106 116 - /* we can probably ignore these until we support command-mode panels: */ 117 107 static void omap_crtc_dss_start_update(struct omap_drm_private *priv, 118 108 enum omap_channel channel) 119 109 { 110 + priv->dispc_ops->mgr_enable(priv->dispc, channel, true); 120 111 } 121 112 122 113 /* Called only from the encoder enable/disable and suspend/resume handlers. */ 123 114 static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) 124 115 { 116 + struct omap_crtc_state *omap_state = to_omap_crtc_state(crtc->state); 125 117 struct drm_device *dev = crtc->dev; 126 118 struct omap_drm_private *priv = dev->dev_private; 127 119 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); ··· 129 127 130 128 if (WARN_ON(omap_crtc->enabled == enable)) 131 129 return; 130 + 131 + if (omap_state->manually_updated) { 132 + omap_irq_enable_framedone(crtc, enable); 133 + omap_crtc->enabled = enable; 134 + return; 135 + } 132 136 133 137 if (omap_crtc->pipe->output->type == OMAP_DISPLAY_TYPE_HDMI) { 134 138 priv->dispc_ops->mgr_enable(priv->dispc, channel, enable); ··· 238 230 struct omap_drm_private *priv, enum omap_channel channel, 239 231 void (*handler)(void *), void *data) 240 232 { 233 + struct drm_crtc *crtc = priv->channels[channel]->crtc; 234 + struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 235 + struct drm_device *dev = omap_crtc->base.dev; 236 + 237 + if (omap_crtc->framedone_handler) 238 + return -EBUSY; 239 + 240 + dev_dbg(dev->dev, "register framedone %s", omap_crtc->name); 241 + 242 + omap_crtc->framedone_handler = handler; 243 + omap_crtc->framedone_handler_data = data; 244 + 241 245 return 0; 242 246 } 243 247 ··· 257 237 struct omap_drm_private *priv, enum omap_channel channel, 258 238 void (*handler)(void *), void *data) 259 239 { 240 + struct drm_crtc *crtc = priv->channels[channel]->crtc; 241 + struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 242 + struct drm_device *dev = omap_crtc->base.dev; 243 + 244 + dev_dbg(dev->dev, "unregister framedone %s", omap_crtc->name); 245 + 246 + WARN_ON(omap_crtc->framedone_handler != handler); 247 + WARN_ON(omap_crtc->framedone_handler_data != data); 248 + 249 + omap_crtc->framedone_handler = NULL; 250 + omap_crtc->framedone_handler_data = NULL; 260 251 } 261 252 262 253 static const struct dss_mgr_ops mgr_ops = { ··· 333 302 DBG("%s: apply done", omap_crtc->name); 334 303 } 335 304 305 + void omap_crtc_framedone_irq(struct drm_crtc *crtc, uint32_t irqstatus) 306 + { 307 + struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 308 + 309 + if (!omap_crtc->framedone_handler) 310 + return; 311 + 312 + omap_crtc->framedone_handler(omap_crtc->framedone_handler_data); 313 + 314 + spin_lock(&crtc->dev->event_lock); 315 + /* Send the vblank event if one has been requested. */ 316 + if (omap_crtc->event) { 317 + drm_crtc_send_vblank_event(crtc, omap_crtc->event); 318 + omap_crtc->event = NULL; 319 + } 320 + omap_crtc->pending = false; 321 + spin_unlock(&crtc->dev->event_lock); 322 + 323 + /* Wake up omap_atomic_complete. */ 324 + wake_up(&omap_crtc->pending_wait); 325 + } 326 + 327 + void omap_crtc_flush(struct drm_crtc *crtc) 328 + { 329 + struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 330 + struct omap_crtc_state *omap_state = to_omap_crtc_state(crtc->state); 331 + 332 + if (!omap_state->manually_updated) 333 + return; 334 + 335 + if (!delayed_work_pending(&omap_crtc->update_work)) 336 + schedule_delayed_work(&omap_crtc->update_work, 0); 337 + } 338 + 339 + static void omap_crtc_manual_display_update(struct work_struct *data) 340 + { 341 + struct omap_crtc *omap_crtc = 342 + container_of(data, struct omap_crtc, update_work.work); 343 + struct drm_display_mode *mode = &omap_crtc->pipe->crtc->mode; 344 + struct omap_dss_device *dssdev = omap_crtc->pipe->output->next; 345 + struct drm_device *dev = omap_crtc->base.dev; 346 + const struct omap_dss_driver *dssdrv; 347 + int ret; 348 + 349 + if (!dssdev) { 350 + dev_err_once(dev->dev, "missing display dssdev!"); 351 + return; 352 + } 353 + 354 + dssdrv = dssdev->driver; 355 + if (!dssdrv || !dssdrv->update) { 356 + dev_err_once(dev->dev, "missing or incorrect dssdrv!"); 357 + return; 358 + } 359 + 360 + if (dssdrv->sync) 361 + dssdrv->sync(dssdev); 362 + 363 + ret = dssdrv->update(dssdev, 0, 0, mode->hdisplay, mode->vdisplay); 364 + if (ret < 0) { 365 + spin_lock_irq(&dev->event_lock); 366 + omap_crtc->pending = false; 367 + spin_unlock_irq(&dev->event_lock); 368 + wake_up(&omap_crtc->pending_wait); 369 + } 370 + } 371 + 336 372 static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) 337 373 { 338 374 struct omap_drm_private *priv = crtc->dev->dev_private; ··· 449 351 { 450 352 struct omap_drm_private *priv = crtc->dev->dev_private; 451 353 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 354 + struct omap_crtc_state *omap_state = to_omap_crtc_state(crtc->state); 452 355 int ret; 453 356 454 357 DBG("%s", omap_crtc->name); 455 358 456 359 priv->dispc_ops->runtime_get(priv->dispc); 360 + 361 + /* manual updated display will not trigger vsync irq */ 362 + if (omap_state->manually_updated) 363 + return; 457 364 458 365 spin_lock_irq(&crtc->dev->event_lock); 459 366 drm_crtc_vblank_on(crtc); ··· 474 371 { 475 372 struct omap_drm_private *priv = crtc->dev->dev_private; 476 373 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 374 + struct drm_device *dev = crtc->dev; 477 375 478 376 DBG("%s", omap_crtc->name); 479 377 ··· 484 380 crtc->state->event = NULL; 485 381 } 486 382 spin_unlock_irq(&crtc->dev->event_lock); 383 + 384 + cancel_delayed_work(&omap_crtc->update_work); 385 + 386 + if (!omap_crtc_wait_pending(crtc)) 387 + dev_warn(dev->dev, "manual display update did not finish!"); 487 388 488 389 drm_crtc_vblank_off(crtc); 489 390 ··· 504 395 int r; 505 396 506 397 drm_display_mode_to_videomode(mode, &vm); 507 - r = priv->dispc_ops->mgr_check_timings(priv->dispc, omap_crtc->channel, 508 - &vm); 509 - if (r) 510 - return r; 398 + 399 + /* 400 + * DSI might not call this, since the supplied mode is not a 401 + * valid DISPC mode. DSI will calculate and configure the 402 + * proper DISPC mode later. 403 + */ 404 + if (omap_crtc->pipe->output->next == NULL || 405 + omap_crtc->pipe->output->next->type != OMAP_DISPLAY_TYPE_DSI) { 406 + r = priv->dispc_ops->mgr_check_timings(priv->dispc, 407 + omap_crtc->channel, 408 + &vm); 409 + if (r) 410 + return r; 411 + } 511 412 512 413 /* Check for bandwidth limit */ 513 414 if (priv->max_bandwidth) { ··· 560 441 drm_display_mode_to_videomode(mode, &omap_crtc->vm); 561 442 } 562 443 444 + static bool omap_crtc_is_manually_updated(struct drm_crtc *crtc) 445 + { 446 + struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 447 + struct omap_dss_device *display = omap_crtc->pipe->output->next; 448 + 449 + if (!display) 450 + return false; 451 + 452 + if (display->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { 453 + DBG("detected manually updated display!"); 454 + return true; 455 + } 456 + 457 + return false; 458 + } 459 + 563 460 static int omap_crtc_atomic_check(struct drm_crtc *crtc, 564 461 struct drm_crtc_state *state) 565 462 { ··· 597 462 /* Mirror new values for zpos and rotation in omap_crtc_state */ 598 463 omap_crtc_state->zpos = pri_state->zpos; 599 464 omap_crtc_state->rotation = pri_state->rotation; 465 + 466 + /* Check if this CRTC is for a manually updated display */ 467 + omap_crtc_state->manually_updated = omap_crtc_is_manually_updated(crtc); 600 468 } 601 469 602 470 return 0; ··· 615 477 { 616 478 struct omap_drm_private *priv = crtc->dev->dev_private; 617 479 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 480 + struct omap_crtc_state *omap_crtc_state = to_omap_crtc_state(crtc->state); 618 481 int ret; 619 482 620 483 if (crtc->state->color_mgmt_changed) { ··· 639 500 return; 640 501 641 502 DBG("%s: GO", omap_crtc->name); 503 + 504 + if (omap_crtc_state->manually_updated) { 505 + /* send new image for page flips and modeset changes */ 506 + spin_lock_irq(&crtc->dev->event_lock); 507 + omap_crtc_flush(crtc); 508 + omap_crtc_arm_event(crtc); 509 + spin_unlock_irq(&crtc->dev->event_lock); 510 + return; 511 + } 642 512 643 513 ret = drm_crtc_vblank_get(crtc); 644 514 WARN_ON(ret != 0); ··· 734 586 735 587 state->zpos = current_state->zpos; 736 588 state->rotation = current_state->rotation; 589 + state->manually_updated = current_state->manually_updated; 737 590 738 591 return &state->base; 739 592 } ··· 810 661 omap_crtc->pipe = pipe; 811 662 omap_crtc->channel = channel; 812 663 omap_crtc->name = channel_names[channel]; 664 + 665 + /* 666 + * We want to refresh manually updated displays from dirty callback, 667 + * which is called quite often (e.g. for each drawn line). This will 668 + * be used to do the display update asynchronously to avoid blocking 669 + * the rendering process and merges multiple dirty calls into one 670 + * update if they arrive very fast. We also call this function for 671 + * atomic display updates (e.g. for page flips), which means we do 672 + * not need extra locking. Atomic updates should be synchronous, but 673 + * need to wait for the framedone interrupt anyways. 674 + */ 675 + INIT_DELAYED_WORK(&omap_crtc->update_work, 676 + omap_crtc_manual_display_update); 813 677 814 678 ret = drm_crtc_init_with_planes(dev, crtc, plane, NULL, 815 679 &omap_crtc_funcs, NULL);
+2
drivers/gpu/drm/omapdrm/omap_crtc.h
··· 41 41 int omap_crtc_wait_pending(struct drm_crtc *crtc); 42 42 void omap_crtc_error_irq(struct drm_crtc *crtc, u32 irqstatus); 43 43 void omap_crtc_vblank_irq(struct drm_crtc *crtc); 44 + void omap_crtc_framedone_irq(struct drm_crtc *crtc, uint32_t irqstatus); 45 + void omap_crtc_flush(struct drm_crtc *crtc); 44 46 45 47 #endif /* __OMAPDRM_CRTC_H__ */
+1 -15
drivers/gpu/drm/omapdrm/omap_drv.c
··· 439 439 return 0; 440 440 } 441 441 442 - static int ioctl_set_param(struct drm_device *dev, void *data, 443 - struct drm_file *file_priv) 444 - { 445 - struct drm_omap_param *args = data; 446 - 447 - switch (args->param) { 448 - default: 449 - DBG("unknown parameter %lld", args->param); 450 - return -EINVAL; 451 - } 452 - 453 - return 0; 454 - } 455 - 456 442 #define OMAP_BO_USER_MASK 0x00ffffff /* flags settable by userspace */ 457 443 458 444 static int ioctl_gem_new(struct drm_device *dev, void *data, ··· 478 492 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = { 479 493 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, 480 494 DRM_AUTH | DRM_RENDER_ALLOW), 481 - DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, 495 + DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, drm_invalid_op, 482 496 DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY), 483 497 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, 484 498 DRM_AUTH | DRM_RENDER_ALLOW),
+2 -2
drivers/gpu/drm/omapdrm/omap_drv.h
··· 37 37 #include "omap_irq.h" 38 38 #include "omap_plane.h" 39 39 40 - #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__) 41 - #define VERB(fmt, ...) if (0) DRM_DEBUG(fmt, ##__VA_ARGS__) /* verbose debug */ 40 + #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__) 41 + #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt, ##__VA_ARGS__) /* verbose debug */ 42 42 43 43 #define MODULE_NAME "omapdrm" 44 44
+19
drivers/gpu/drm/omapdrm/omap_fb.c
··· 66 66 struct mutex lock; 67 67 }; 68 68 69 + static int omap_framebuffer_dirty(struct drm_framebuffer *fb, 70 + struct drm_file *file_priv, 71 + unsigned flags, unsigned color, 72 + struct drm_clip_rect *clips, 73 + unsigned num_clips) 74 + { 75 + struct drm_crtc *crtc; 76 + 77 + drm_modeset_lock_all(fb->dev); 78 + 79 + drm_for_each_crtc(crtc, fb->dev) 80 + omap_crtc_flush(crtc); 81 + 82 + drm_modeset_unlock_all(fb->dev); 83 + 84 + return 0; 85 + } 86 + 69 87 static const struct drm_framebuffer_funcs omap_framebuffer_funcs = { 70 88 .create_handle = drm_gem_fb_create_handle, 89 + .dirty = omap_framebuffer_dirty, 71 90 .destroy = drm_gem_fb_destroy, 72 91 }; 73 92
+25
drivers/gpu/drm/omapdrm/omap_irq.c
··· 85 85 return ret == 0 ? -1 : 0; 86 86 } 87 87 88 + int omap_irq_enable_framedone(struct drm_crtc *crtc, bool enable) 89 + { 90 + struct drm_device *dev = crtc->dev; 91 + struct omap_drm_private *priv = dev->dev_private; 92 + unsigned long flags; 93 + enum omap_channel channel = omap_crtc_channel(crtc); 94 + int framedone_irq = 95 + priv->dispc_ops->mgr_get_framedone_irq(priv->dispc, channel); 96 + 97 + DBG("dev=%p, crtc=%u, enable=%d", dev, channel, enable); 98 + 99 + spin_lock_irqsave(&priv->wait_lock, flags); 100 + if (enable) 101 + priv->irq_mask |= framedone_irq; 102 + else 103 + priv->irq_mask &= ~framedone_irq; 104 + omap_irq_update(dev); 105 + spin_unlock_irqrestore(&priv->wait_lock, flags); 106 + 107 + return 0; 108 + } 109 + 88 110 /** 89 111 * enable_vblank - enable vblank interrupt events 90 112 * @dev: DRM device ··· 239 217 240 218 if (irqstatus & priv->dispc_ops->mgr_get_sync_lost_irq(priv->dispc, channel)) 241 219 omap_crtc_error_irq(crtc, irqstatus); 220 + 221 + if (irqstatus & priv->dispc_ops->mgr_get_framedone_irq(priv->dispc, channel)) 222 + omap_crtc_framedone_irq(crtc, irqstatus); 242 223 } 243 224 244 225 omap_irq_ocp_error_handler(dev, irqstatus);
+1
drivers/gpu/drm/omapdrm/omap_irq.h
··· 27 27 struct omap_irq_wait; 28 28 29 29 int omap_irq_enable_vblank(struct drm_crtc *crtc); 30 + int omap_irq_enable_framedone(struct drm_crtc *crtc, bool enable); 30 31 void omap_irq_disable_vblank(struct drm_crtc *crtc); 31 32 void omap_drm_irq_uninstall(struct drm_device *dev); 32 33 int omap_drm_irq_install(struct drm_device *dev);