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kernel os linux

dt-bindings: reset: Add bindings for SP7021 reset driver

Add documentation to describe Sunplus SP7021 reset driver bindings.

Signed-off-by: Qin Jian <qinjian@cqplus1.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

authored by

Qin Jian and committed by
Arnd Bergmann
55bfc376 8bbb1dd5

+127
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Documentation/devicetree/bindings/reset/sunplus,reset.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + # Copyright (C) Sunplus Co., Ltd. 2021 3 + %YAML 1.2 4 + --- 5 + $id: "http://devicetree.org/schemas/reset/sunplus,reset.yaml#" 6 + $schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 + 8 + title: Sunplus SoC Reset Controller 9 + 10 + maintainers: 11 + - Qin Jian <qinjian@cqplus1.com> 12 + 13 + properties: 14 + compatible: 15 + const: sunplus,sp7021-reset 16 + 17 + reg: 18 + maxItems: 1 19 + 20 + "#reset-cells": 21 + const: 1 22 + 23 + required: 24 + - compatible 25 + - reg 26 + - "#reset-cells" 27 + 28 + additionalProperties: false 29 + 30 + examples: 31 + - | 32 + rstc: reset@9c000054 { 33 + compatible = "sunplus,sp7021-reset"; 34 + reg = <0x9c000054 0x28>; 35 + #reset-cells = <1>; 36 + }; 37 + 38 + ...
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MAINTAINERS
··· 2831 2831 S: Maintained 2832 2832 W: https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview 2833 2833 F: Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml 2834 + F: Documentation/devicetree/bindings/reset/sunplus,reset.yaml 2835 + F: include/dt-bindings/reset/sunplus,sp7021-reset.h 2834 2836 2835 2837 ARM/Synaptics SoC support 2836 2838 M: Jisheng Zhang <jszhang@kernel.org>
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include/dt-bindings/reset/sunplus,sp7021-reset.h
··· 1 + /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 + /* 3 + * Copyright (C) Sunplus Technology Co., Ltd. 4 + * All rights reserved. 5 + */ 6 + #ifndef _DT_BINDINGS_RST_SUNPLUS_SP7021_H 7 + #define _DT_BINDINGS_RST_SUNPLUS_SP7021_H 8 + 9 + #define RST_SYSTEM 0 10 + #define RST_RTC 1 11 + #define RST_IOCTL 2 12 + #define RST_IOP 3 13 + #define RST_OTPRX 4 14 + #define RST_NOC 5 15 + #define RST_BR 6 16 + #define RST_RBUS_L00 7 17 + #define RST_SPIFL 8 18 + #define RST_SDCTRL0 9 19 + #define RST_PERI0 10 20 + #define RST_A926 11 21 + #define RST_UMCTL2 12 22 + #define RST_PERI1 13 23 + #define RST_DDR_PHY0 14 24 + #define RST_ACHIP 15 25 + #define RST_STC0 16 26 + #define RST_STC_AV0 17 27 + #define RST_STC_AV1 18 28 + #define RST_STC_AV2 19 29 + #define RST_UA0 20 30 + #define RST_UA1 21 31 + #define RST_UA2 22 32 + #define RST_UA3 23 33 + #define RST_UA4 24 34 + #define RST_HWUA 25 35 + #define RST_DDC0 26 36 + #define RST_UADMA 27 37 + #define RST_CBDMA0 28 38 + #define RST_CBDMA1 29 39 + #define RST_SPI_COMBO_0 30 40 + #define RST_SPI_COMBO_1 31 41 + #define RST_SPI_COMBO_2 32 42 + #define RST_SPI_COMBO_3 33 43 + #define RST_AUD 34 44 + #define RST_USBC0 35 45 + #define RST_USBC1 36 46 + #define RST_UPHY0 37 47 + #define RST_UPHY1 38 48 + #define RST_I2CM0 39 49 + #define RST_I2CM1 40 50 + #define RST_I2CM2 41 51 + #define RST_I2CM3 42 52 + #define RST_PMC 43 53 + #define RST_CARD_CTL0 44 54 + #define RST_CARD_CTL1 45 55 + #define RST_CARD_CTL4 46 56 + #define RST_BCH 47 57 + #define RST_DDFCH 48 58 + #define RST_CSIIW0 49 59 + #define RST_CSIIW1 50 60 + #define RST_MIPICSI0 51 61 + #define RST_MIPICSI1 52 62 + #define RST_HDMI_TX 53 63 + #define RST_VPOST 54 64 + #define RST_TGEN 55 65 + #define RST_DMIX 56 66 + #define RST_TCON 57 67 + #define RST_INTERRUPT 58 68 + #define RST_RGST 59 69 + #define RST_GPIO 60 70 + #define RST_RBUS_TOP 61 71 + #define RST_MAILBOX 62 72 + #define RST_SPIND 63 73 + #define RST_I2C2CBUS 64 74 + #define RST_SEC 65 75 + #define RST_DVE 66 76 + #define RST_GPOST0 67 77 + #define RST_OSD0 68 78 + #define RST_DISP_PWM 69 79 + #define RST_UADBG 70 80 + #define RST_DUMMY_MASTER 71 81 + #define RST_FIO_CTL 72 82 + #define RST_FPGA 73 83 + #define RST_L2SW 74 84 + #define RST_ICM 75 85 + #define RST_AXI_GLOBAL 76 86 + 87 + #endif