drm/omap: remove dss_feat_get_clk_source_name()

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

We have two functions to return a name for clock sources for debugging
purposes: dss_feat_get_clk_source_name() and
dss_get_generic_clk_source_name().

The former is supposed to return a DSS IP version specific name for the
clock source, and the latter is supposed to return a more generic name.

All this seems a bit pointless, so let's remove the former one.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

Tomi Valkeinen 10 years ago 557a1544 dc0352d1

+11 -59

5 changed files

expand all

drivers

gpu

drm

omapdrm

dss

dispc.c

dsi.c

dss.c

dss_features.c

dss_features.h

+4 -6

drivers/gpu/drm/omapdrm/dss/dispc.c

··· 3432 3432 3433 3433 lcd_clk_src = dss_get_lcd_clk_source(channel); 3434 3434 3435 - seq_printf(s, "%s clk source = %s (%s)\n", mgr_desc[channel].name, 3436 - dss_get_generic_clk_source_name(lcd_clk_src), 3437 - dss_feat_get_clk_source_name(lcd_clk_src)); 3435 + seq_printf(s, "%s clk source = %s\n", mgr_desc[channel].name, 3436 + dss_get_generic_clk_source_name(lcd_clk_src)); 3438 3437 3439 3438 dispc_mgr_get_lcd_divisor(channel, &lcd, &pcd); 3440 3439 ··· 3454 3455 3455 3456 seq_printf(s, "- DISPC -\n"); 3456 3457 3457 - seq_printf(s, "dispc fclk source = %s (%s)\n", 3458 - dss_get_generic_clk_source_name(dispc_clk_src), 3459 - dss_feat_get_clk_source_name(dispc_clk_src)); 3458 + seq_printf(s, "dispc fclk source = %s\n", 3459 + dss_get_generic_clk_source_name(dispc_clk_src)); 3460 3460 3461 3461 seq_printf(s, "fck\t\t%-16lu\n", dispc_fclk_rate()); 3462 3462

+4 -5

drivers/gpu/drm/omapdrm/dss/dsi.c

··· 1504 1504 cinfo->clkdco, cinfo->m); 1505 1505 1506 1506 seq_printf(s, "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n", 1507 - dss_feat_get_clk_source_name(dsi_module == 0 ? 1507 + dss_get_generic_clk_source_name(dsi_module == 0 ? 1508 1508 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC : 1509 1509 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC), 1510 1510 cinfo->clkout[HSDIV_DISPC], ··· 1513 1513 "off" : "on"); 1514 1514 1515 1515 seq_printf(s, "DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n", 1516 - dss_feat_get_clk_source_name(dsi_module == 0 ? 1516 + dss_get_generic_clk_source_name(dsi_module == 0 ? 1517 1517 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI : 1518 1518 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI), 1519 1519 cinfo->clkout[HSDIV_DSI], ··· 1523 1523 1524 1524 seq_printf(s, "- DSI%d -\n", dsi_module + 1); 1525 1525 1526 - seq_printf(s, "dsi fclk source = %s (%s)\n", 1527 - dss_get_generic_clk_source_name(dsi_clk_src), 1528 - dss_feat_get_clk_source_name(dsi_clk_src)); 1526 + seq_printf(s, "dsi fclk source = %s\n", 1527 + dss_get_generic_clk_source_name(dsi_clk_src)); 1529 1528 1530 1529 seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate(dsidev)); 1531 1530

+3 -4

drivers/gpu/drm/omapdrm/dss/dss.c

··· 360 360 361 361 void dss_dump_clocks(struct seq_file *s) 362 362 { 363 - const char *fclk_name, *fclk_real_name; 363 + const char *fclk_name; 364 364 unsigned long fclk_rate; 365 365 366 366 if (dss_runtime_get()) ··· 369 369 seq_printf(s, "- DSS -\n"); 370 370 371 371 fclk_name = dss_get_generic_clk_source_name(OMAP_DSS_CLK_SRC_FCK); 372 - fclk_real_name = dss_feat_get_clk_source_name(OMAP_DSS_CLK_SRC_FCK); 373 372 fclk_rate = clk_get_rate(dss.dss_clk); 374 373 375 - seq_printf(s, "%s (%s) = %lu\n", 376 - fclk_name, fclk_real_name, 374 + seq_printf(s, "%s = %lu\n", 375 + fclk_name, 377 376 fclk_rate); 378 377 379 378 dss_runtime_put();

-43

drivers/gpu/drm/omapdrm/dss/dss_features.c

··· 50 50 const enum omap_dss_output_id *supported_outputs; 51 51 const enum omap_color_mode *supported_color_modes; 52 52 const enum omap_overlay_caps *overlay_caps; 53 - const char * const *clksrc_names; 54 53 const struct dss_param_range *dss_params; 55 54 56 55 const enum omap_dss_rotation_type supported_rotation_types; ··· 388 389 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION, 389 390 }; 390 391 391 - static const char * const omap2_dss_clk_source_names[] = { 392 - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A", 393 - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A", 394 - [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1", 395 - }; 396 - 397 - static const char * const omap3_dss_clk_source_names[] = { 398 - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK", 399 - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK", 400 - [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK", 401 - }; 402 - 403 - static const char * const omap4_dss_clk_source_names[] = { 404 - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1", 405 - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2", 406 - [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK", 407 - [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1", 408 - [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2", 409 - }; 410 - 411 - static const char * const omap5_dss_clk_source_names[] = { 412 - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DPLL_DSI1_A_CLK1", 413 - [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DPLL_DSI1_A_CLK2", 414 - [OMAP_DSS_CLK_SRC_FCK] = "DSS_CLK", 415 - [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "DPLL_DSI1_C_CLK1", 416 - [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "DPLL_DSI1_C_CLK2", 417 - }; 418 - 419 392 static const struct dss_param_range omap2_dss_param_range[] = { 420 393 [FEAT_PARAM_DSS_FCK] = { 0, 133000000 }, 421 394 [FEAT_PARAM_DSS_PCD] = { 2, 255 }, ··· 602 631 .supported_outputs = omap2_dss_supported_outputs, 603 632 .supported_color_modes = omap2_dss_supported_color_modes, 604 633 .overlay_caps = omap2_dss_overlay_caps, 605 - .clksrc_names = omap2_dss_clk_source_names, 606 634 .dss_params = omap2_dss_param_range, 607 635 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, 608 636 .buffer_size_unit = 1, ··· 622 652 .supported_outputs = omap3430_dss_supported_outputs, 623 653 .supported_color_modes = omap3_dss_supported_color_modes, 624 654 .overlay_caps = omap3430_dss_overlay_caps, 625 - .clksrc_names = omap3_dss_clk_source_names, 626 655 .dss_params = omap3_dss_param_range, 627 656 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, 628 657 .buffer_size_unit = 1, ··· 645 676 .supported_outputs = omap3430_dss_supported_outputs, 646 677 .supported_color_modes = omap3_dss_supported_color_modes, 647 678 .overlay_caps = omap3430_dss_overlay_caps, 648 - .clksrc_names = omap3_dss_clk_source_names, 649 679 .dss_params = omap3_dss_param_range, 650 680 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, 651 681 .buffer_size_unit = 1, ··· 664 696 .supported_outputs = am43xx_dss_supported_outputs, 665 697 .supported_color_modes = omap3_dss_supported_color_modes, 666 698 .overlay_caps = omap3430_dss_overlay_caps, 667 - .clksrc_names = omap2_dss_clk_source_names, 668 699 .dss_params = am43xx_dss_param_range, 669 700 .supported_rotation_types = OMAP_DSS_ROT_DMA, 670 701 .buffer_size_unit = 1, ··· 683 716 .supported_outputs = omap3630_dss_supported_outputs, 684 717 .supported_color_modes = omap3_dss_supported_color_modes, 685 718 .overlay_caps = omap3630_dss_overlay_caps, 686 - .clksrc_names = omap3_dss_clk_source_names, 687 719 .dss_params = omap3_dss_param_range, 688 720 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB, 689 721 .buffer_size_unit = 1, ··· 704 738 .supported_outputs = omap4_dss_supported_outputs, 705 739 .supported_color_modes = omap4_dss_supported_color_modes, 706 740 .overlay_caps = omap4_dss_overlay_caps, 707 - .clksrc_names = omap4_dss_clk_source_names, 708 741 .dss_params = omap4_dss_param_range, 709 742 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, 710 743 .buffer_size_unit = 16, ··· 724 759 .supported_outputs = omap4_dss_supported_outputs, 725 760 .supported_color_modes = omap4_dss_supported_color_modes, 726 761 .overlay_caps = omap4_dss_overlay_caps, 727 - .clksrc_names = omap4_dss_clk_source_names, 728 762 .dss_params = omap4_dss_param_range, 729 763 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, 730 764 .buffer_size_unit = 16, ··· 744 780 .supported_outputs = omap4_dss_supported_outputs, 745 781 .supported_color_modes = omap4_dss_supported_color_modes, 746 782 .overlay_caps = omap4_dss_overlay_caps, 747 - .clksrc_names = omap4_dss_clk_source_names, 748 783 .dss_params = omap4_dss_param_range, 749 784 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, 750 785 .buffer_size_unit = 16, ··· 764 801 .supported_outputs = omap5_dss_supported_outputs, 765 802 .supported_color_modes = omap4_dss_supported_color_modes, 766 803 .overlay_caps = omap4_dss_overlay_caps, 767 - .clksrc_names = omap5_dss_clk_source_names, 768 804 .dss_params = omap5_dss_param_range, 769 805 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER, 770 806 .buffer_size_unit = 16, ··· 819 857 { 820 858 return omap_current_dss_features->supported_color_modes[plane] & 821 859 color_mode; 822 - } 823 - 824 - const char *dss_feat_get_clk_source_name(enum dss_clk_source id) 825 - { 826 - return omap_current_dss_features->clksrc_names[id]; 827 860 } 828 861 829 862 u32 dss_feat_get_buffer_size_unit(void)

-1

drivers/gpu/drm/omapdrm/dss/dss_features.h

··· 91 91 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane); 92 92 bool dss_feat_color_mode_supported(enum omap_plane plane, 93 93 enum omap_color_mode color_mode); 94 - const char *dss_feat_get_clk_source_name(enum dss_clk_source id); 95 94 96 95 u32 dss_feat_get_buffer_size_unit(void); /* in bytes */ 97 96 u32 dss_feat_get_burst_size_unit(void); /* in bytes */