Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu/atom: add SetDCEClock helper

New cmd table for ELM/BAF for setting the dispclock or
dprefclock.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>

+46 -1
+44 -1
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c
··· 467 467 * required disp clk. 468 468 */ 469 469 void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, 470 - u32 dispclk) 470 + u32 dispclk) 471 471 { 472 472 u8 frev, crev; 473 473 int index; ··· 508 508 return; 509 509 } 510 510 amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); 511 + } 512 + 513 + union set_dce_clock { 514 + SET_DCE_CLOCK_PS_ALLOCATION_V1_1 v1_1; 515 + SET_DCE_CLOCK_PS_ALLOCATION_V2_1 v2_1; 516 + }; 517 + 518 + u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev, 519 + u32 freq, u8 clk_type, u8 clk_src) 520 + { 521 + u8 frev, crev; 522 + int index; 523 + union set_dce_clock args; 524 + u32 ret_freq = 0; 525 + 526 + memset(&args, 0, sizeof(args)); 527 + 528 + index = GetIndexIntoMasterTable(COMMAND, SetDCEClock); 529 + if (!amdgpu_atom_parse_cmd_header(adev->mode_info.atom_context, index, &frev, 530 + &crev)) 531 + return 0; 532 + 533 + switch (frev) { 534 + case 2: 535 + switch (crev) { 536 + case 1: 537 + args.v2_1.asParam.ulDCEClkFreq = cpu_to_le32(freq); /* 10kHz units */ 538 + args.v2_1.asParam.ucDCEClkType = clk_type; 539 + args.v2_1.asParam.ucDCEClkSrc = clk_src; 540 + amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args); 541 + ret_freq = le32_to_cpu(args.v2_1.asParam.ulDCEClkFreq) * 10; 542 + break; 543 + default: 544 + DRM_ERROR("Unknown table version %d %d\n", frev, crev); 545 + return 0; 546 + } 547 + break; 548 + default: 549 + DRM_ERROR("Unknown table version %d %d\n", frev, crev); 550 + return 0; 551 + } 552 + 553 + return ret_freq; 511 554 } 512 555 513 556 static bool is_pixel_clock_source_from_pll(u32 encoder_mode, int pll_id)
+2
drivers/gpu/drm/amd/amdgpu/atombios_crtc.h
··· 37 37 struct drm_display_mode *mode); 38 38 void amdgpu_atombios_crtc_set_disp_eng_pll(struct amdgpu_device *adev, 39 39 u32 dispclk); 40 + u32 amdgpu_atombios_crtc_set_dce_clock(struct amdgpu_device *adev, 41 + u32 freq, u8 clk_type, u8 clk_src); 40 42 void amdgpu_atombios_crtc_program_pll(struct drm_crtc *crtc, 41 43 u32 crtc_id, 42 44 int pll_id,