Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: skip writing eeprom when PMFW manages RAS data

Only update bad page number in legacy eeprom write path.

v2: add null pointer check for con.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Tao Zhou and committed by
Alex Deucher
54141406 62320fb8

+22 -1
+19 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
··· 871 871 return res; 872 872 } 873 873 874 + int amdgpu_ras_eeprom_update_record_num(struct amdgpu_ras_eeprom_control *control) 875 + { 876 + struct amdgpu_device *adev = to_amdgpu_device(control); 877 + 878 + if (!amdgpu_ras_smu_eeprom_supported(adev)) 879 + return 0; 880 + 881 + control->ras_num_recs_old = control->ras_num_recs; 882 + return amdgpu_ras_smu_get_badpage_count(adev, 883 + &(control->ras_num_recs), 12); 884 + } 885 + 874 886 /** 875 887 * amdgpu_ras_eeprom_append -- append records to the EEPROM RAS table 876 888 * @control: pointer to control structure ··· 901 889 const u32 num) 902 890 { 903 891 struct amdgpu_device *adev = to_amdgpu_device(control); 892 + struct amdgpu_ras *con = amdgpu_ras_get_context(adev); 904 893 int res, i; 905 894 uint64_t nps = AMDGPU_NPS1_PARTITION_MODE; 906 895 907 - if (!__is_ras_eeprom_supported(adev)) 896 + if (!__is_ras_eeprom_supported(adev) || !con) 908 897 return 0; 898 + 899 + if (amdgpu_ras_smu_eeprom_supported(adev)) { 900 + control->ras_num_bad_pages = con->bad_page_num; 901 + return 0; 902 + } 909 903 910 904 if (num == 0) { 911 905 dev_err(adev->dev, "will not append 0 records\n");
+3
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.h
··· 82 82 /* Number of records in the table. 83 83 */ 84 84 u32 ras_num_recs; 85 + u32 ras_num_recs_old; 85 86 86 87 /* the bad page number is ras_num_recs or 87 88 * ras_num_recs * umc.retire_unit ··· 190 189 int amdgpu_ras_eeprom_read_idx(struct amdgpu_ras_eeprom_control *control, 191 190 struct eeprom_table_record *record, u32 rec_idx, 192 191 const u32 num); 192 + 193 + int amdgpu_ras_eeprom_update_record_num(struct amdgpu_ras_eeprom_control *control); 193 194 194 195 extern const struct file_operations amdgpu_ras_debugfs_eeprom_size_ops; 195 196 extern const struct file_operations amdgpu_ras_debugfs_eeprom_table_ops;