Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'tty-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial updates from Greg KH:
"Here is the "big" tty and serial driver patches for 5.5-rc1.

It's a bit later in the merge window than normal as I wanted to make
sure some last-minute patches applied to it were all sane. They seem
to be :)

There's a lot of little stuff in here, for the tty core, and for lots
of serial drivers:

- reverts of uartlite serial driver patches that were wrong

- msm-serial driver fixes

- serial core updates and fixes

- tty core fixes

- serial driver dma mapping api changes

- lots of other tiny fixes and updates for serial drivers

All of these have been in linux-next for a while with no reported
issues"

* tag 'tty-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (58 commits)
Revert "serial/8250: Add support for NI-Serial PXI/PXIe+485 devices"
vcs: prevent write access to vcsu devices
tty: vt: keyboard: reject invalid keycodes
tty: don't crash in tty_init_dev when missing tty_port
serial: stm32: fix clearing interrupt error flags
tty: Fix Kconfig indentation, continued
serial: serial_core: Perform NULL checks for break_ctl ops
tty: remove unused argument from tty_open_by_driver()
tty: Fix Kconfig indentation
{tty: serial, nand: onenand}: samsung: rename to fix build warning
serial: ifx6x60: add missed pm_runtime_disable
serial: pl011: Fix DMA ->flush_buffer()
Revert "serial-uartlite: Move the uart register"
Revert "serial-uartlite: Add get serial id if not provided"
Revert "serial-uartlite: Do not use static struct uart_driver out of probe()"
Revert "serial-uartlite: Add runtime support"
Revert "serial-uartlite: Change logic how console_port is setup"
Revert "serial-uartlite: Use allocated structure instead of static ones"
tty: serial: msm_serial: Use dma_request_chan() directly for channel request
tty: serial: tegra: Use dma_request_chan() directly for channel request
...

+665 -715
+10 -1
Documentation/ABI/stable/sysfs-driver-aspeed-vuart
··· 6 6 Users: OpenBMC. Proposed changes should be mailed to 7 7 openbmc@lists.ozlabs.org 8 8 9 - What: /sys/bus/platform/drivers/aspeed-vuart*/sirq 9 + What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq 10 10 Date: April 2017 11 11 Contact: Jeremy Kerr <jk@ozlabs.org> 12 12 Description: Configures which interrupt number the host side of 13 13 the UART will appear on the host <-> BMC LPC bus. 14 + Users: OpenBMC. Proposed changes should be mailed to 15 + openbmc@lists.ozlabs.org 16 + 17 + What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity 18 + Date: July 2019 19 + Contact: Oskar Senft <osk@google.com> 20 + Description: Configures the polarity of the serial interrupt to the 21 + host via the BMC LPC bus. 22 + Set to 0 for active-low or 1 for active-high. 14 23 Users: OpenBMC. Proposed changes should be mailed to 15 24 openbmc@lists.ozlabs.org
+1 -1
Documentation/admin-guide/kernel-parameters.txt
··· 1097 1097 mapped with the correct attributes. 1098 1098 1099 1099 linflex,<addr> 1100 - Use early console provided by Freescale LinFlex UART 1100 + Use early console provided by Freescale LINFlexD UART 1101 1101 serial driver for NXP S32V234 SoCs. A valid base 1102 1102 address must be provided, and the serial port must 1103 1103 already be setup and configured.
+5
Documentation/devicetree/bindings/serial/8250.txt
··· 56 56 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD 57 57 line respectively. It will use specified GPIO instead of the peripheral 58 58 function pin for the UART feature. If unsure, don't specify this property. 59 + - aspeed,sirq-polarity-sense: Only applicable to aspeed,ast2500-vuart. 60 + phandle to aspeed,ast2500-scu compatible syscon alongside register offset 61 + and bit number to identify how the SIRQ polarity should be configured. 62 + One possible data source is the LPC/eSPI mode bit. 63 + Example: aspeed,sirq-polarity-sense = <&syscon 0x70 25> 59 64 60 65 Note: 61 66 * fsl,ns16550:
+1 -2
Documentation/devicetree/bindings/serial/fsl-lpuart.txt
··· 21 21 Optional properties: 22 22 - dmas: A list of two dma specifiers, one for each entry in dma-names. 23 23 - dma-names: should contain "tx" and "rx". 24 - - rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx, 25 - linux,rs485-enabled-at-boot-time: see rs485.txt 24 + - rs485-rts-active-low, linux,rs485-enabled-at-boot-time: see rs485.txt 26 25 27 26 Note: Optional properties for DMA support. Write them both or both not. 28 27
+4 -2
Documentation/devicetree/bindings/serial/renesas,sci-serial.txt
··· 54 54 - "renesas,hscif-r8a7794" for R8A7794 (R-Car E2) HSCIF compatible UART. 55 55 - "renesas,scif-r8a7795" for R8A7795 (R-Car H3) SCIF compatible UART. 56 56 - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART. 57 - - "renesas,scif-r8a7796" for R8A7796 (R-Car M3-W) SCIF compatible UART. 58 - - "renesas,hscif-r8a7796" for R8A7796 (R-Car M3-W) HSCIF compatible UART. 57 + - "renesas,scif-r8a7796" for R8A77960 (R-Car M3-W) SCIF compatible UART. 58 + - "renesas,hscif-r8a7796" for R8A77960 (R-Car M3-W) HSCIF compatible UART. 59 + - "renesas,scif-r8a77961" for R8A77961 (R-Car M3-W+) SCIF compatible UART. 60 + - "renesas,hscif-r8a77961" for R8A77961 (R-Car M3-W+) HSCIF compatible UART. 59 61 - "renesas,scif-r8a77965" for R8A77965 (R-Car M3-N) SCIF compatible UART. 60 62 - "renesas,hscif-r8a77965" for R8A77965 (R-Car M3-N) HSCIF compatible UART. 61 63 - "renesas,scif-r8a77970" for R8A77970 (R-Car V3M) SCIF compatible UART.
-1
Documentation/process/magic-number.rst
··· 81 81 ISICOM_MAGIC 0x4d54 isi_port ``include/linux/isicom.h`` 82 82 PTY_MAGIC 0x5001 ``drivers/char/pty.c`` 83 83 PPP_MAGIC 0x5002 ppp ``include/linux/if_pppvar.h`` 84 - SERIAL_MAGIC 0x5301 async_struct ``include/linux/serial.h`` 85 84 SSTATE_MAGIC 0x5302 serial_state ``include/linux/serial.h`` 86 85 SLIP_MAGIC 0x5302 slip ``drivers/net/slip.h`` 87 86 STRIP_MAGIC 0x5303 strip ``drivers/net/strip.c``
-1
Documentation/translations/it_IT/process/magic-number.rst
··· 87 87 ISICOM_MAGIC 0x4d54 isi_port ``include/linux/isicom.h`` 88 88 PTY_MAGIC 0x5001 ``drivers/char/pty.c`` 89 89 PPP_MAGIC 0x5002 ppp ``include/linux/if_pppvar.h`` 90 - SERIAL_MAGIC 0x5301 async_struct ``include/linux/serial.h`` 91 90 SSTATE_MAGIC 0x5302 serial_state ``include/linux/serial.h`` 92 91 SLIP_MAGIC 0x5302 slip ``drivers/net/slip.h`` 93 92 STRIP_MAGIC 0x5303 strip ``drivers/net/strip.c``
-1
Documentation/translations/zh_CN/process/magic-number.rst
··· 70 70 ISICOM_MAGIC 0x4d54 isi_port ``include/linux/isicom.h`` 71 71 PTY_MAGIC 0x5001 ``drivers/char/pty.c`` 72 72 PPP_MAGIC 0x5002 ppp ``include/linux/if_pppvar.h`` 73 - SERIAL_MAGIC 0x5301 async_struct ``include/linux/serial.h`` 74 73 SSTATE_MAGIC 0x5302 serial_state ``include/linux/serial.h`` 75 74 SLIP_MAGIC 0x5302 slip ``drivers/net/slip.h`` 76 75 STRIP_MAGIC 0x5303 strip ``drivers/net/strip.c``
+1
arch/arm/boot/dts/aspeed-g5.dtsi
··· 379 379 interrupts = <8>; 380 380 clocks = <&syscon ASPEED_CLK_APB>; 381 381 no-loopback-test; 382 + aspeed,sirq-polarity-sense = <&syscon 0x70 25>; 382 383 status = "disabled"; 383 384 }; 384 385
+1 -1
drivers/mtd/nand/onenand/Makefile
··· 9 9 # Board specific. 10 10 obj-$(CONFIG_MTD_ONENAND_GENERIC) += generic.o 11 11 obj-$(CONFIG_MTD_ONENAND_OMAP2) += omap2.o 12 - obj-$(CONFIG_MTD_ONENAND_SAMSUNG) += samsung.o 12 + obj-$(CONFIG_MTD_ONENAND_SAMSUNG) += samsung_mtd.o 13 13 14 14 onenand-objs = onenand_base.o onenand_bbt.o
drivers/mtd/nand/onenand/samsung.c drivers/mtd/nand/onenand/samsung_mtd.c
-2
drivers/net/wan/z85230.h
··· 421 421 * Asynchronous Interfacing 422 422 */ 423 423 424 - #define SERIAL_MAGIC 0x5301 425 - 426 424 /* 427 425 * The size of the serial xmit buffer is 1 page, or 4096 bytes 428 426 */
+19 -19
drivers/tty/Kconfig
··· 82 82 default y 83 83 84 84 config VT_HW_CONSOLE_BINDING 85 - bool "Support for binding and unbinding console drivers" 86 - depends on HW_CONSOLE 87 - ---help--- 88 - The virtual terminal is the device that interacts with the physical 89 - terminal through console drivers. On these systems, at least one 90 - console driver is loaded. In other configurations, additional console 91 - drivers may be enabled, such as the framebuffer console. If more than 92 - 1 console driver is enabled, setting this to 'y' will allow you to 93 - select the console driver that will serve as the backend for the 94 - virtual terminals. 85 + bool "Support for binding and unbinding console drivers" 86 + depends on HW_CONSOLE 87 + ---help--- 88 + The virtual terminal is the device that interacts with the physical 89 + terminal through console drivers. On these systems, at least one 90 + console driver is loaded. In other configurations, additional console 91 + drivers may be enabled, such as the framebuffer console. If more than 92 + 1 console driver is enabled, setting this to 'y' will allow you to 93 + select the console driver that will serve as the backend for the 94 + virtual terminals. 95 95 96 - See <file:Documentation/driver-api/console.rst> for more 97 - information. For framebuffer console users, please refer to 98 - <file:Documentation/fb/fbcon.rst>. 96 + See <file:Documentation/driver-api/console.rst> for more 97 + information. For framebuffer console users, please refer to 98 + <file:Documentation/fb/fbcon.rst>. 99 99 100 100 config UNIX98_PTYS 101 101 bool "Unix98 PTY support" if EXPERT ··· 173 173 depends on SERIAL_NONSTANDARD && (ISA || EISA || PCI) 174 174 help 175 175 This driver supports Comtrol RocketPort and RocketModem PCI boards. 176 - These boards provide 2, 4, 8, 16, or 32 high-speed serial ports or 177 - modems. For information about the RocketPort/RocketModem boards 178 - and this driver read <file:Documentation/driver-api/serial/rocket.rst>. 176 + These boards provide 2, 4, 8, 16, or 32 high-speed serial ports or 177 + modems. For information about the RocketPort/RocketModem boards 178 + and this driver read <file:Documentation/driver-api/serial/rocket.rst>. 179 179 180 180 To compile this driver as a module, choose M here: the 181 181 module will be called rocket. 182 182 183 183 If you want to compile this driver into the kernel, say Y here. If 184 - you don't have a Comtrol RocketPort/RocketModem card installed, say N. 184 + you don't have a Comtrol RocketPort/RocketModem card installed, say N. 185 185 186 186 config CYCLADES 187 187 tristate "Cyclades async mux support" ··· 437 437 depends on MIPS_EJTAG_FDC_TTY && KGDB 438 438 default y 439 439 help 440 - This enables the use of KGDB over an FDC channel, allowing KGDB to be 441 - used remotely or when a serial port isn't available. 440 + This enables the use of KGDB over an FDC channel, allowing KGDB to be 441 + used remotely or when a serial port isn't available. 442 442 443 443 config MIPS_EJTAG_FDC_KGDB_CHAN 444 444 int "KGDB FDC channel"
-84
drivers/tty/amiserial.c
··· 22 22 * 23 23 */ 24 24 25 - /* 26 - * Serial driver configuration section. Here are the various options: 27 - * 28 - * SERIAL_PARANOIA_CHECK 29 - * Check the magic number for the async_structure where 30 - * ever possible. 31 - */ 32 - 33 25 #include <linux/delay.h> 34 - 35 - #undef SERIAL_PARANOIA_CHECK 36 26 37 27 /* Set of debugging defines */ 38 28 ··· 122 132 123 133 #define serial_isroot() (capable(CAP_SYS_ADMIN)) 124 134 125 - 126 - static inline int serial_paranoia_check(struct serial_state *info, 127 - char *name, const char *routine) 128 - { 129 - #ifdef SERIAL_PARANOIA_CHECK 130 - static const char *badmagic = 131 - "Warning: bad magic number for serial struct (%s) in %s\n"; 132 - static const char *badinfo = 133 - "Warning: null async_struct for (%s) in %s\n"; 134 - 135 - if (!info) { 136 - printk(badinfo, name, routine); 137 - return 1; 138 - } 139 - if (info->magic != SERIAL_MAGIC) { 140 - printk(badmagic, name, routine); 141 - return 1; 142 - } 143 - #endif 144 - return 0; 145 - } 146 - 147 135 /* some serial hardware definitions */ 148 136 #define SDR_OVRUN (1<<15) 149 137 #define SDR_RBF (1<<14) ··· 157 189 struct serial_state *info = tty->driver_data; 158 190 unsigned long flags; 159 191 160 - if (serial_paranoia_check(info, tty->name, "rs_stop")) 161 - return; 162 - 163 192 local_irq_save(flags); 164 193 if (info->IER & UART_IER_THRI) { 165 194 info->IER &= ~UART_IER_THRI; ··· 173 208 { 174 209 struct serial_state *info = tty->driver_data; 175 210 unsigned long flags; 176 - 177 - if (serial_paranoia_check(info, tty->name, "rs_start")) 178 - return; 179 211 180 212 local_irq_save(flags); 181 213 if (info->xmit.head != info->xmit.tail ··· 745 783 746 784 info = tty->driver_data; 747 785 748 - if (serial_paranoia_check(info, tty->name, "rs_put_char")) 749 - return 0; 750 - 751 786 if (!info->xmit.buf) 752 787 return 0; 753 788 ··· 767 808 struct serial_state *info = tty->driver_data; 768 809 unsigned long flags; 769 810 770 - if (serial_paranoia_check(info, tty->name, "rs_flush_chars")) 771 - return; 772 - 773 811 if (info->xmit.head == info->xmit.tail 774 812 || tty->stopped 775 813 || tty->hw_stopped ··· 788 832 int c, ret = 0; 789 833 struct serial_state *info = tty->driver_data; 790 834 unsigned long flags; 791 - 792 - if (serial_paranoia_check(info, tty->name, "rs_write")) 793 - return 0; 794 835 795 836 if (!info->xmit.buf) 796 837 return 0; ··· 831 878 { 832 879 struct serial_state *info = tty->driver_data; 833 880 834 - if (serial_paranoia_check(info, tty->name, "rs_write_room")) 835 - return 0; 836 881 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); 837 882 } 838 883 ··· 838 887 { 839 888 struct serial_state *info = tty->driver_data; 840 889 841 - if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer")) 842 - return 0; 843 890 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE); 844 891 } 845 892 ··· 846 897 struct serial_state *info = tty->driver_data; 847 898 unsigned long flags; 848 899 849 - if (serial_paranoia_check(info, tty->name, "rs_flush_buffer")) 850 - return; 851 900 local_irq_save(flags); 852 901 info->xmit.head = info->xmit.tail = 0; 853 902 local_irq_restore(flags); ··· 860 913 { 861 914 struct serial_state *info = tty->driver_data; 862 915 unsigned long flags; 863 - 864 - if (serial_paranoia_check(info, tty->name, "rs_send_xchar")) 865 - return; 866 916 867 917 info->x_char = ch; 868 918 if (ch) { ··· 896 952 printk("throttle %s ....\n", tty_name(tty)); 897 953 #endif 898 954 899 - if (serial_paranoia_check(info, tty->name, "rs_throttle")) 900 - return; 901 - 902 955 if (I_IXOFF(tty)) 903 956 rs_send_xchar(tty, STOP_CHAR(tty)); 904 957 ··· 914 973 #ifdef SERIAL_DEBUG_THROTTLE 915 974 printk("unthrottle %s ....\n", tty_name(tty)); 916 975 #endif 917 - 918 - if (serial_paranoia_check(info, tty->name, "rs_unthrottle")) 919 - return; 920 976 921 977 if (I_IXOFF(tty)) { 922 978 if (info->x_char) ··· 1047 1109 unsigned char control, status; 1048 1110 unsigned long flags; 1049 1111 1050 - if (serial_paranoia_check(info, tty->name, "rs_ioctl")) 1051 - return -ENODEV; 1052 1112 if (tty_io_error(tty)) 1053 1113 return -EIO; 1054 1114 ··· 1067 1131 struct serial_state *info = tty->driver_data; 1068 1132 unsigned long flags; 1069 1133 1070 - if (serial_paranoia_check(info, tty->name, "rs_ioctl")) 1071 - return -ENODEV; 1072 1134 if (tty_io_error(tty)) 1073 1135 return -EIO; 1074 1136 ··· 1089 1155 */ 1090 1156 static int rs_break(struct tty_struct *tty, int break_state) 1091 1157 { 1092 - struct serial_state *info = tty->driver_data; 1093 1158 unsigned long flags; 1094 - 1095 - if (serial_paranoia_check(info, tty->name, "rs_break")) 1096 - return -EINVAL; 1097 1159 1098 1160 local_irq_save(flags); 1099 1161 if (break_state == -1) ··· 1141 1211 unsigned long flags; 1142 1212 DEFINE_WAIT(wait); 1143 1213 int ret; 1144 - 1145 - if (serial_paranoia_check(info, tty->name, "rs_ioctl")) 1146 - return -ENODEV; 1147 1214 1148 1215 if ((cmd != TIOCSERCONFIG) && 1149 1216 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) { ··· 1260 1333 struct serial_state *state = tty->driver_data; 1261 1334 struct tty_port *port = &state->tport; 1262 1335 1263 - if (serial_paranoia_check(state, tty->name, "rs_close")) 1264 - return; 1265 - 1266 1336 if (tty_port_close_start(port, tty, filp) == 0) 1267 1337 return; 1268 1338 ··· 1302 1378 struct serial_state *info = tty->driver_data; 1303 1379 unsigned long orig_jiffies, char_time; 1304 1380 int lsr; 1305 - 1306 - if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent")) 1307 - return; 1308 1381 1309 1382 if (info->xmit_fifo_size == 0) 1310 1383 return; /* Just in case.... */ ··· 1361 1440 { 1362 1441 struct serial_state *info = tty->driver_data; 1363 1442 1364 - if (serial_paranoia_check(info, tty->name, "rs_hangup")) 1365 - return; 1366 - 1367 1443 rs_flush_buffer(tty); 1368 1444 shutdown(tty, info); 1369 1445 info->tport.count = 0; ··· 1385 1467 port->tty = tty; 1386 1468 tty->driver_data = info; 1387 1469 tty->port = port; 1388 - if (serial_paranoia_check(info, tty->name, "rs_open")) 1389 - return -ENODEV; 1390 1470 1391 1471 port->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 1392 1472
+14 -14
drivers/tty/hvc/Kconfig
··· 70 70 Xen driver for secondary virtual consoles 71 71 72 72 config HVC_UDBG 73 - bool "udbg based fake hypervisor console" 74 - depends on PPC 75 - select HVC_DRIVER 76 - help 77 - This is meant to be used during HW bring up or debugging when 78 - no other console mechanism exist but udbg, to get you a quick 79 - console for userspace. Do NOT enable in production kernels. 73 + bool "udbg based fake hypervisor console" 74 + depends on PPC 75 + select HVC_DRIVER 76 + help 77 + This is meant to be used during HW bring up or debugging when 78 + no other console mechanism exist but udbg, to get you a quick 79 + console for userspace. Do NOT enable in production kernels. 80 80 81 81 config HVC_DCC 82 - bool "ARM JTAG DCC console" 83 - depends on ARM || ARM64 84 - select HVC_DRIVER 85 - help 86 - This console uses the JTAG DCC on ARM to create a console under the HVC 87 - driver. This console is used through a JTAG only on ARM. If you don't have 88 - a JTAG then you probably don't want this option. 82 + bool "ARM JTAG DCC console" 83 + depends on ARM || ARM64 84 + select HVC_DRIVER 85 + help 86 + This console uses the JTAG DCC on ARM to create a console under the HVC 87 + driver. This console is used through a JTAG only on ARM. If you don't have 88 + a JTAG then you probably don't want this option. 89 89 90 90 config HVC_RISCV_SBI 91 91 bool "RISC-V SBI console support"
+28
drivers/tty/hvc/hvc_dcc.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 /* Copyright (c) 2010, 2014 The Linux Foundation. All rights reserved. */ 3 3 4 + #include <linux/console.h> 4 5 #include <linux/init.h> 6 + #include <linux/serial.h> 7 + #include <linux/serial_core.h> 5 8 6 9 #include <asm/dcc.h> 7 10 #include <asm/processor.h> ··· 14 11 /* DCC Status Bits */ 15 12 #define DCC_STATUS_RX (1 << 30) 16 13 #define DCC_STATUS_TX (1 << 29) 14 + 15 + static void dcc_uart_console_putchar(struct uart_port *port, int ch) 16 + { 17 + while (__dcc_getstatus() & DCC_STATUS_TX) 18 + cpu_relax(); 19 + 20 + __dcc_putchar(ch); 21 + } 22 + 23 + static void dcc_early_write(struct console *con, const char *s, unsigned n) 24 + { 25 + struct earlycon_device *dev = con->data; 26 + 27 + uart_console_write(&dev->port, s, n, dcc_uart_console_putchar); 28 + } 29 + 30 + static int __init dcc_early_console_setup(struct earlycon_device *device, 31 + const char *opt) 32 + { 33 + device->con->write = dcc_early_write; 34 + 35 + return 0; 36 + } 37 + 38 + EARLYCON_DECLARE(dcc, dcc_early_console_setup); 17 39 18 40 static int hvc_dcc_put_chars(uint32_t vt, const char *buf, int count) 19 41 {
+18 -12
drivers/tty/rocket.c
··· 1222 1222 */ 1223 1223 static int get_ports(struct r_port *info, struct rocket_ports __user *retports) 1224 1224 { 1225 - struct rocket_ports tmp; 1226 - int board; 1225 + struct rocket_ports *tmp; 1226 + int board, ret = 0; 1227 1227 1228 - memset(&tmp, 0, sizeof (tmp)); 1229 - tmp.tty_major = rocket_driver->major; 1228 + tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 1229 + if (!tmp) 1230 + return -ENOMEM; 1231 + 1232 + tmp->tty_major = rocket_driver->major; 1230 1233 1231 1234 for (board = 0; board < 4; board++) { 1232 - tmp.rocketModel[board].model = rocketModel[board].model; 1233 - strcpy(tmp.rocketModel[board].modelString, rocketModel[board].modelString); 1234 - tmp.rocketModel[board].numPorts = rocketModel[board].numPorts; 1235 - tmp.rocketModel[board].loadrm2 = rocketModel[board].loadrm2; 1236 - tmp.rocketModel[board].startingPortNumber = rocketModel[board].startingPortNumber; 1235 + tmp->rocketModel[board].model = rocketModel[board].model; 1236 + strcpy(tmp->rocketModel[board].modelString, 1237 + rocketModel[board].modelString); 1238 + tmp->rocketModel[board].numPorts = rocketModel[board].numPorts; 1239 + tmp->rocketModel[board].loadrm2 = rocketModel[board].loadrm2; 1240 + tmp->rocketModel[board].startingPortNumber = 1241 + rocketModel[board].startingPortNumber; 1237 1242 } 1238 - if (copy_to_user(retports, &tmp, sizeof (*retports))) 1239 - return -EFAULT; 1240 - return 0; 1243 + if (copy_to_user(retports, tmp, sizeof(*retports))) 1244 + ret = -EFAULT; 1245 + kfree(tmp); 1246 + return ret; 1241 1247 } 1242 1248 1243 1249 static int reset_rm2(struct r_port *info, void __user *arg)
+101 -14
drivers/tty/serdev/core.c
··· 552 552 } 553 553 554 554 #ifdef CONFIG_ACPI 555 - static acpi_status acpi_serdev_register_device(struct serdev_controller *ctrl, 556 - struct acpi_device *adev) 557 - { 558 - struct serdev_device *serdev = NULL; 559 - int err; 560 555 561 - if (acpi_bus_get_status(adev) || !adev->status.present || 562 - acpi_device_enumerated(adev)) 563 - return AE_OK; 556 + #define SERDEV_ACPI_MAX_SCAN_DEPTH 32 557 + 558 + struct acpi_serdev_lookup { 559 + acpi_handle device_handle; 560 + acpi_handle controller_handle; 561 + int n; 562 + int index; 563 + }; 564 + 565 + static int acpi_serdev_parse_resource(struct acpi_resource *ares, void *data) 566 + { 567 + struct acpi_serdev_lookup *lookup = data; 568 + struct acpi_resource_uart_serialbus *sb; 569 + acpi_status status; 570 + 571 + if (ares->type != ACPI_RESOURCE_TYPE_SERIAL_BUS) 572 + return 1; 573 + 574 + if (ares->data.common_serial_bus.type != ACPI_RESOURCE_SERIAL_TYPE_UART) 575 + return 1; 576 + 577 + if (lookup->index != -1 && lookup->n++ != lookup->index) 578 + return 1; 579 + 580 + sb = &ares->data.uart_serial_bus; 581 + 582 + status = acpi_get_handle(lookup->device_handle, 583 + sb->resource_source.string_ptr, 584 + &lookup->controller_handle); 585 + if (ACPI_FAILURE(status)) 586 + return 1; 587 + 588 + /* 589 + * NOTE: Ideally, we would also want to retreive other properties here, 590 + * once setting them before opening the device is supported by serdev. 591 + */ 592 + 593 + return 1; 594 + } 595 + 596 + static int acpi_serdev_do_lookup(struct acpi_device *adev, 597 + struct acpi_serdev_lookup *lookup) 598 + { 599 + struct list_head resource_list; 600 + int ret; 601 + 602 + lookup->device_handle = acpi_device_handle(adev); 603 + lookup->controller_handle = NULL; 604 + lookup->n = 0; 605 + 606 + INIT_LIST_HEAD(&resource_list); 607 + ret = acpi_dev_get_resources(adev, &resource_list, 608 + acpi_serdev_parse_resource, lookup); 609 + acpi_dev_free_resource_list(&resource_list); 610 + 611 + if (ret < 0) 612 + return -EINVAL; 613 + 614 + return 0; 615 + } 616 + 617 + static int acpi_serdev_check_resources(struct serdev_controller *ctrl, 618 + struct acpi_device *adev) 619 + { 620 + struct acpi_serdev_lookup lookup; 621 + int ret; 622 + 623 + if (acpi_bus_get_status(adev) || !adev->status.present) 624 + return -EINVAL; 625 + 626 + /* Look for UARTSerialBusV2 resource */ 627 + lookup.index = -1; // we only care for the last device 628 + 629 + ret = acpi_serdev_do_lookup(adev, &lookup); 630 + if (ret) 631 + return ret; 632 + 633 + /* Make sure controller and ResourceSource handle match */ 634 + if (ACPI_HANDLE(ctrl->dev.parent) != lookup.controller_handle) 635 + return -ENODEV; 636 + 637 + return 0; 638 + } 639 + 640 + static acpi_status acpi_serdev_register_device(struct serdev_controller *ctrl, 641 + struct acpi_device *adev) 642 + { 643 + struct serdev_device *serdev; 644 + int err; 564 645 565 646 serdev = serdev_device_alloc(ctrl); 566 647 if (!serdev) { ··· 664 583 } 665 584 666 585 static acpi_status acpi_serdev_add_device(acpi_handle handle, u32 level, 667 - void *data, void **return_value) 586 + void *data, void **return_value) 668 587 { 669 588 struct serdev_controller *ctrl = data; 670 589 struct acpi_device *adev; ··· 672 591 if (acpi_bus_get_device(handle, &adev)) 673 592 return AE_OK; 674 593 594 + if (acpi_device_enumerated(adev)) 595 + return AE_OK; 596 + 597 + if (acpi_serdev_check_resources(ctrl, adev)) 598 + return AE_OK; 599 + 675 600 return acpi_serdev_register_device(ctrl, adev); 676 601 } 602 + 677 603 678 604 static int acpi_serdev_register_devices(struct serdev_controller *ctrl) 679 605 { 680 606 acpi_status status; 681 - acpi_handle handle; 682 607 683 - handle = ACPI_HANDLE(ctrl->dev.parent); 684 - if (!handle) 608 + if (!has_acpi_companion(ctrl->dev.parent)) 685 609 return -ENODEV; 686 610 687 - status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, 611 + status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, 612 + SERDEV_ACPI_MAX_SCAN_DEPTH, 688 613 acpi_serdev_add_device, NULL, ctrl, NULL); 689 614 if (ACPI_FAILURE(status)) 690 - dev_dbg(&ctrl->dev, "failed to enumerate serdev slaves\n"); 615 + dev_warn(&ctrl->dev, "failed to enumerate serdev slaves\n"); 691 616 692 617 if (!ctrl->serdev) 693 618 return -ENODEV;
+84
drivers/tty/serial/8250/8250_aspeed_vuart.c
··· 14 14 #include <linux/of_address.h> 15 15 #include <linux/of_irq.h> 16 16 #include <linux/of_platform.h> 17 + #include <linux/regmap.h> 18 + #include <linux/mfd/syscon.h> 17 19 #include <linux/tty.h> 18 20 #include <linux/tty_flip.h> 19 21 #include <linux/clk.h> ··· 24 22 25 23 #define ASPEED_VUART_GCRA 0x20 26 24 #define ASPEED_VUART_GCRA_VUART_EN BIT(0) 25 + #define ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY BIT(1) 27 26 #define ASPEED_VUART_GCRA_DISABLE_HOST_TX_DISCARD BIT(5) 28 27 #define ASPEED_VUART_GCRB 0x24 29 28 #define ASPEED_VUART_GCRB_HOST_SIRQ_MASK GENMASK(7, 4) ··· 134 131 135 132 static DEVICE_ATTR_RW(sirq); 136 133 134 + static ssize_t sirq_polarity_show(struct device *dev, 135 + struct device_attribute *attr, char *buf) 136 + { 137 + struct aspeed_vuart *vuart = dev_get_drvdata(dev); 138 + u8 reg; 139 + 140 + reg = readb(vuart->regs + ASPEED_VUART_GCRA); 141 + reg &= ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY; 142 + 143 + return snprintf(buf, PAGE_SIZE - 1, "%u\n", reg ? 1 : 0); 144 + } 145 + 146 + static void aspeed_vuart_set_sirq_polarity(struct aspeed_vuart *vuart, 147 + bool polarity) 148 + { 149 + u8 reg = readb(vuart->regs + ASPEED_VUART_GCRA); 150 + 151 + if (polarity) 152 + reg |= ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY; 153 + else 154 + reg &= ~ASPEED_VUART_GCRA_HOST_SIRQ_POLARITY; 155 + 156 + writeb(reg, vuart->regs + ASPEED_VUART_GCRA); 157 + } 158 + 159 + static ssize_t sirq_polarity_store(struct device *dev, 160 + struct device_attribute *attr, 161 + const char *buf, size_t count) 162 + { 163 + struct aspeed_vuart *vuart = dev_get_drvdata(dev); 164 + unsigned long val; 165 + int err; 166 + 167 + err = kstrtoul(buf, 0, &val); 168 + if (err) 169 + return err; 170 + 171 + aspeed_vuart_set_sirq_polarity(vuart, val != 0); 172 + 173 + return count; 174 + } 175 + 176 + static DEVICE_ATTR_RW(sirq_polarity); 177 + 137 178 static struct attribute *aspeed_vuart_attrs[] = { 138 179 &dev_attr_sirq.attr, 180 + &dev_attr_sirq_polarity.attr, 139 181 &dev_attr_lpc_address.attr, 140 182 NULL, 141 183 }; ··· 350 302 return 1; 351 303 } 352 304 305 + static void aspeed_vuart_auto_configure_sirq_polarity( 306 + struct aspeed_vuart *vuart, struct device_node *syscon_np, 307 + u32 reg_offset, u32 reg_mask) 308 + { 309 + struct regmap *regmap; 310 + u32 value; 311 + 312 + regmap = syscon_node_to_regmap(syscon_np); 313 + if (IS_ERR(regmap)) { 314 + dev_warn(vuart->dev, 315 + "could not get regmap for aspeed,sirq-polarity-sense\n"); 316 + return; 317 + } 318 + if (regmap_read(regmap, reg_offset, &value)) { 319 + dev_warn(vuart->dev, "could not read hw strap table\n"); 320 + return; 321 + } 322 + 323 + aspeed_vuart_set_sirq_polarity(vuart, (value & reg_mask) == 0); 324 + } 325 + 353 326 static int aspeed_vuart_probe(struct platform_device *pdev) 354 327 { 328 + struct of_phandle_args sirq_polarity_sense_args; 355 329 struct uart_8250_port port; 356 330 struct aspeed_vuart *vuart; 357 331 struct device_node *np; ··· 471 401 goto err_clk_disable; 472 402 473 403 vuart->line = rc; 404 + 405 + rc = of_parse_phandle_with_fixed_args( 406 + np, "aspeed,sirq-polarity-sense", 2, 0, 407 + &sirq_polarity_sense_args); 408 + if (rc < 0) { 409 + dev_dbg(&pdev->dev, 410 + "aspeed,sirq-polarity-sense property not found\n"); 411 + } else { 412 + aspeed_vuart_auto_configure_sirq_polarity( 413 + vuart, sirq_polarity_sense_args.np, 414 + sirq_polarity_sense_args.args[0], 415 + BIT(sirq_polarity_sense_args.args[1])); 416 + of_node_put(sirq_polarity_sense_args.np); 417 + } 474 418 475 419 aspeed_vuart_set_enabled(vuart, true); 476 420 aspeed_vuart_set_host_tx_discard(vuart, true);
+35 -48
drivers/tty/serial/8250/8250_dw.c
··· 280 280 long rate; 281 281 int ret; 282 282 283 - if (IS_ERR(d->clk)) 284 - goto out; 285 - 286 283 clk_disable_unprepare(d->clk); 287 284 rate = clk_round_rate(d->clk, baud * 16); 288 285 if (rate < 0) ··· 290 293 ret = clk_set_rate(d->clk, rate); 291 294 clk_prepare_enable(d->clk); 292 295 293 - if (!ret) 294 - p->uartclk = rate; 296 + if (ret) 297 + goto out; 298 + 299 + p->uartclk = rate; 295 300 296 301 out: 297 302 p->status &= ~UPSTAT_AUTOCTS; ··· 385 386 { 386 387 struct uart_8250_port uart = {}, *up = &uart; 387 388 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 388 - int irq = platform_get_irq(pdev, 0); 389 389 struct uart_port *p = &up->port; 390 390 struct device *dev = &pdev->dev; 391 391 struct dw8250_data *data; 392 + int irq; 392 393 int err; 393 394 u32 val; 394 395 ··· 397 398 return -EINVAL; 398 399 } 399 400 400 - if (irq < 0) { 401 - if (irq != -EPROBE_DEFER) 402 - dev_err(dev, "cannot get irq\n"); 401 + irq = platform_get_irq(pdev, 0); 402 + if (irq < 0) 403 403 return irq; 404 - } 405 404 406 405 spin_lock_init(&p->lock); 407 406 p->mapbase = regs->start; ··· 469 472 device_property_read_u32(dev, "clock-frequency", &p->uartclk); 470 473 471 474 /* If there is separate baudclk, get the rate from it. */ 472 - data->clk = devm_clk_get(dev, "baudclk"); 473 - if (IS_ERR(data->clk) && PTR_ERR(data->clk) != -EPROBE_DEFER) 474 - data->clk = devm_clk_get(dev, NULL); 475 - if (IS_ERR(data->clk) && PTR_ERR(data->clk) == -EPROBE_DEFER) 476 - return -EPROBE_DEFER; 477 - if (!IS_ERR_OR_NULL(data->clk)) { 478 - err = clk_prepare_enable(data->clk); 479 - if (err) 480 - dev_warn(dev, "could not enable optional baudclk: %d\n", 481 - err); 482 - else 483 - p->uartclk = clk_get_rate(data->clk); 484 - } 475 + data->clk = devm_clk_get_optional(dev, "baudclk"); 476 + if (data->clk == NULL) 477 + data->clk = devm_clk_get_optional(dev, NULL); 478 + if (IS_ERR(data->clk)) 479 + return PTR_ERR(data->clk); 480 + 481 + err = clk_prepare_enable(data->clk); 482 + if (err) 483 + dev_warn(dev, "could not enable optional baudclk: %d\n", err); 484 + 485 + if (data->clk) 486 + p->uartclk = clk_get_rate(data->clk); 485 487 486 488 /* If no clock rate is defined, fail. */ 487 489 if (!p->uartclk) { ··· 489 493 goto err_clk; 490 494 } 491 495 492 - data->pclk = devm_clk_get(dev, "apb_pclk"); 493 - if (IS_ERR(data->pclk) && PTR_ERR(data->pclk) == -EPROBE_DEFER) { 494 - err = -EPROBE_DEFER; 496 + data->pclk = devm_clk_get_optional(dev, "apb_pclk"); 497 + if (IS_ERR(data->pclk)) { 498 + err = PTR_ERR(data->pclk); 495 499 goto err_clk; 496 500 } 497 - if (!IS_ERR(data->pclk)) { 498 - err = clk_prepare_enable(data->pclk); 499 - if (err) { 500 - dev_err(dev, "could not enable apb_pclk\n"); 501 - goto err_clk; 502 - } 501 + 502 + err = clk_prepare_enable(data->pclk); 503 + if (err) { 504 + dev_err(dev, "could not enable apb_pclk\n"); 505 + goto err_clk; 503 506 } 504 507 505 508 data->rst = devm_reset_control_get_optional_exclusive(dev, NULL); ··· 541 546 reset_control_assert(data->rst); 542 547 543 548 err_pclk: 544 - if (!IS_ERR(data->pclk)) 545 - clk_disable_unprepare(data->pclk); 549 + clk_disable_unprepare(data->pclk); 546 550 547 551 err_clk: 548 - if (!IS_ERR(data->clk)) 549 - clk_disable_unprepare(data->clk); 552 + clk_disable_unprepare(data->clk); 550 553 551 554 return err; 552 555 } ··· 560 567 561 568 reset_control_assert(data->rst); 562 569 563 - if (!IS_ERR(data->pclk)) 564 - clk_disable_unprepare(data->pclk); 570 + clk_disable_unprepare(data->pclk); 565 571 566 - if (!IS_ERR(data->clk)) 567 - clk_disable_unprepare(data->clk); 572 + clk_disable_unprepare(data->clk); 568 573 569 574 pm_runtime_disable(dev); 570 575 pm_runtime_put_noidle(dev); ··· 595 604 { 596 605 struct dw8250_data *data = dev_get_drvdata(dev); 597 606 598 - if (!IS_ERR(data->clk)) 599 - clk_disable_unprepare(data->clk); 607 + clk_disable_unprepare(data->clk); 600 608 601 - if (!IS_ERR(data->pclk)) 602 - clk_disable_unprepare(data->pclk); 609 + clk_disable_unprepare(data->pclk); 603 610 604 611 return 0; 605 612 } ··· 606 617 { 607 618 struct dw8250_data *data = dev_get_drvdata(dev); 608 619 609 - if (!IS_ERR(data->pclk)) 610 - clk_prepare_enable(data->pclk); 620 + clk_prepare_enable(data->pclk); 611 621 612 - if (!IS_ERR(data->clk)) 613 - clk_prepare_enable(data->clk); 622 + clk_prepare_enable(data->clk); 614 623 615 624 return 0; 616 625 }
+19
drivers/tty/serial/8250/8250_exar.c
··· 166 166 serial_port_out(p, 0x2, quot_frac); 167 167 } 168 168 169 + static int xr17v35x_startup(struct uart_port *port) 170 + { 171 + /* 172 + * First enable access to IER [7:5], ISR [5:4], FCR [5:4], 173 + * MCR [7:5] and MSR [7:0] 174 + */ 175 + serial_port_out(port, UART_XR_EFR, UART_EFR_ECB); 176 + 177 + /* 178 + * Make sure all interrups are masked until initialization is 179 + * complete and the FIFOs are cleared 180 + */ 181 + serial_port_out(port, UART_IER, 0); 182 + 183 + return serial8250_do_startup(port); 184 + } 185 + 169 186 static void exar_shutdown(struct uart_port *port) 170 187 { 171 188 unsigned char lsr; ··· 229 212 230 213 port->port.get_divisor = xr17v35x_get_divisor; 231 214 port->port.set_divisor = xr17v35x_set_divisor; 215 + 216 + port->port.startup = xr17v35x_startup; 232 217 } else { 233 218 port->port.type = PORT_XR17D15X; 234 219 }
+9 -12
drivers/tty/serial/8250/8250_lpss.c
··· 221 221 222 222 static int qrk_serial_setup(struct lpss8250 *lpss, struct uart_port *port) 223 223 { 224 - struct pci_dev *pdev = to_pci_dev(port->dev); 225 - int ret; 226 - 227 - pci_set_master(pdev); 228 - 229 - ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 230 - if (ret < 0) 231 - return ret; 232 - 233 - port->irq = pci_irq_vector(pdev, 0); 234 - 235 224 qrk_serial_setup_dma(lpss, port); 236 225 return 0; 237 226 } ··· 282 293 if (ret) 283 294 return ret; 284 295 296 + pci_set_master(pdev); 297 + 285 298 lpss = devm_kzalloc(&pdev->dev, sizeof(*lpss), GFP_KERNEL); 286 299 if (!lpss) 287 300 return -ENOMEM; 301 + 302 + ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 303 + if (ret < 0) 304 + return ret; 288 305 289 306 lpss->board = (struct lpss8250_board *)id->driver_data; 290 307 291 308 memset(&uart, 0, sizeof(struct uart_8250_port)); 292 309 293 310 uart.port.dev = &pdev->dev; 294 - uart.port.irq = pdev->irq; 311 + uart.port.irq = pci_irq_vector(pdev, 0); 295 312 uart.port.private_data = &lpss->data; 296 313 uart.port.type = PORT_16550A; 297 314 uart.port.iotype = UPIO_MEM; ··· 332 337 err_exit: 333 338 if (lpss->board->exit) 334 339 lpss->board->exit(lpss); 340 + pci_free_irq_vectors(pdev); 335 341 return ret; 336 342 } 337 343 ··· 344 348 345 349 if (lpss->board->exit) 346 350 lpss->board->exit(lpss); 351 + pci_free_irq_vectors(pdev); 347 352 } 348 353 349 354 static const struct lpss8250_board byt_board = {
+1 -1
drivers/tty/serial/8250/8250_mtk.c
··· 544 544 pm_runtime_set_active(&pdev->dev); 545 545 pm_runtime_enable(&pdev->dev); 546 546 547 - data->rx_wakeup_irq = platform_get_irq(pdev, 1); 547 + data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1); 548 548 549 549 return 0; 550 550 }
+31
drivers/tty/serial/8250/8250_of.c
··· 48 48 } 49 49 #endif 50 50 51 + static int of_8250_rs485_config(struct uart_port *port, 52 + struct serial_rs485 *rs485) 53 + { 54 + struct uart_8250_port *up = up_to_u8250p(port); 55 + 56 + /* Clamp the delays to [0, 100ms] */ 57 + rs485->delay_rts_before_send = min(rs485->delay_rts_before_send, 100U); 58 + rs485->delay_rts_after_send = min(rs485->delay_rts_after_send, 100U); 59 + 60 + port->rs485 = *rs485; 61 + 62 + /* 63 + * Both serial8250_em485_init and serial8250_em485_destroy 64 + * are idempotent 65 + */ 66 + if (rs485->flags & SER_RS485_ENABLED) { 67 + int ret = serial8250_em485_init(up); 68 + 69 + if (ret) { 70 + rs485->flags &= ~SER_RS485_ENABLED; 71 + port->rs485.flags &= ~SER_RS485_ENABLED; 72 + } 73 + return ret; 74 + } 75 + 76 + serial8250_em485_destroy(up); 77 + 78 + return 0; 79 + } 80 + 51 81 /* 52 82 * Fill a struct uart_port for a given device node 53 83 */ ··· 208 178 port->flags |= UPF_SKIP_TEST; 209 179 210 180 port->dev = &ofdev->dev; 181 + port->rs485_config = of_8250_rs485_config; 211 182 212 183 switch (type) { 213 184 case PORT_TEGRA:
+4 -288
drivers/tty/serial/8250/8250_pci.c
··· 743 743 } 744 744 745 745 /* UART Port Control Register */ 746 - #define NI16550_PCR_OFFSET 0x0f 747 - #define NI16550_PCR_RS422 0x00 748 - #define NI16550_PCR_ECHO_RS485 0x01 749 - #define NI16550_PCR_DTR_RS485 0x02 750 - #define NI16550_PCR_AUTO_RS485 0x03 751 - #define NI16550_PCR_WIRE_MODE_MASK 0x03 752 - #define NI16550_PCR_TXVR_ENABLE_BIT BIT(3) 753 - #define NI16550_PCR_RS485_TERMINATION_BIT BIT(6) 754 - #define NI16550_ACR_DTR_AUTO_DTR (0x2 << 3) 755 - #define NI16550_ACR_DTR_MANUAL_DTR (0x0 << 3) 746 + #define NI8430_PORTCON 0x0f 747 + #define NI8430_PORTCON_TXVR_ENABLE (1 << 3) 756 748 757 749 static int 758 750 pci_ni8430_setup(struct serial_private *priv, ··· 766 774 return -ENOMEM; 767 775 768 776 /* enable the transceiver */ 769 - writeb(readb(p + offset + NI16550_PCR_OFFSET) | NI16550_PCR_TXVR_ENABLE_BIT, 770 - p + offset + NI16550_PCR_OFFSET); 777 + writeb(readb(p + offset + NI8430_PORTCON) | NI8430_PORTCON_TXVR_ENABLE, 778 + p + offset + NI8430_PORTCON); 771 779 772 780 iounmap(p); 773 781 774 782 return setup_port(priv, port, bar, offset, board->reg_shift); 775 - } 776 - 777 - static int pci_ni8431_config_rs485(struct uart_port *port, 778 - struct serial_rs485 *rs485) 779 - { 780 - u8 pcr, acr; 781 - struct uart_8250_port *up; 782 - 783 - up = container_of(port, struct uart_8250_port, port); 784 - acr = up->acr; 785 - pcr = port->serial_in(port, NI16550_PCR_OFFSET); 786 - pcr &= ~NI16550_PCR_WIRE_MODE_MASK; 787 - 788 - if (rs485->flags & SER_RS485_ENABLED) { 789 - /* RS-485 */ 790 - if ((rs485->flags & SER_RS485_RX_DURING_TX) && 791 - (rs485->flags & SER_RS485_RTS_ON_SEND)) { 792 - dev_dbg(port->dev, "Invalid 2-wire mode\n"); 793 - return -EINVAL; 794 - } 795 - 796 - if (rs485->flags & SER_RS485_RX_DURING_TX) { 797 - /* Echo */ 798 - dev_vdbg(port->dev, "2-wire DTR with echo\n"); 799 - pcr |= NI16550_PCR_ECHO_RS485; 800 - acr |= NI16550_ACR_DTR_MANUAL_DTR; 801 - } else { 802 - /* Auto or DTR */ 803 - if (rs485->flags & SER_RS485_RTS_ON_SEND) { 804 - /* Auto */ 805 - dev_vdbg(port->dev, "2-wire Auto\n"); 806 - pcr |= NI16550_PCR_AUTO_RS485; 807 - acr |= NI16550_ACR_DTR_AUTO_DTR; 808 - } else { 809 - /* DTR-controlled */ 810 - /* No Echo */ 811 - dev_vdbg(port->dev, "2-wire DTR no echo\n"); 812 - pcr |= NI16550_PCR_DTR_RS485; 813 - acr |= NI16550_ACR_DTR_MANUAL_DTR; 814 - } 815 - } 816 - } else { 817 - /* RS-422 */ 818 - dev_vdbg(port->dev, "4-wire\n"); 819 - pcr |= NI16550_PCR_RS422; 820 - acr |= NI16550_ACR_DTR_MANUAL_DTR; 821 - } 822 - 823 - dev_dbg(port->dev, "write pcr: 0x%08x\n", pcr); 824 - port->serial_out(port, NI16550_PCR_OFFSET, pcr); 825 - 826 - up->acr = acr; 827 - port->serial_out(port, UART_SCR, UART_ACR); 828 - port->serial_out(port, UART_ICR, up->acr); 829 - 830 - /* Update the cache. */ 831 - port->rs485 = *rs485; 832 - 833 - return 0; 834 - } 835 - 836 - static int pci_ni8431_setup(struct serial_private *priv, 837 - const struct pciserial_board *board, 838 - struct uart_8250_port *uart, int idx) 839 - { 840 - u8 pcr, acr; 841 - struct pci_dev *dev = priv->dev; 842 - void __iomem *addr; 843 - unsigned int bar, offset = board->first_offset; 844 - 845 - if (idx >= board->num_ports) 846 - return 1; 847 - 848 - bar = FL_GET_BASE(board->flags); 849 - offset += idx * board->uart_offset; 850 - 851 - addr = pci_ioremap_bar(dev, bar); 852 - if (!addr) 853 - return -ENOMEM; 854 - 855 - /* enable the transceiver */ 856 - writeb(readb(addr + NI16550_PCR_OFFSET) | NI16550_PCR_TXVR_ENABLE_BIT, 857 - addr + NI16550_PCR_OFFSET); 858 - 859 - pcr = readb(addr + NI16550_PCR_OFFSET); 860 - pcr &= ~NI16550_PCR_WIRE_MODE_MASK; 861 - 862 - /* set wire mode to default RS-422 */ 863 - pcr |= NI16550_PCR_RS422; 864 - acr = NI16550_ACR_DTR_MANUAL_DTR; 865 - 866 - /* write port configuration to register */ 867 - writeb(pcr, addr + NI16550_PCR_OFFSET); 868 - 869 - /* access and write to UART acr register */ 870 - writeb(UART_ACR, addr + UART_SCR); 871 - writeb(acr, addr + UART_ICR); 872 - 873 - uart->port.rs485_config = &pci_ni8431_config_rs485; 874 - 875 - iounmap(addr); 876 - 877 - return setup_port(priv, uart, bar, offset, board->reg_shift); 878 783 } 879 784 880 785 static int pci_netmos_9900_setup(struct serial_private *priv, ··· 1910 2021 #define PCI_DEVICE_ID_ACCESIO_PCIE_COM_8SM 0x10E9 1911 2022 #define PCI_DEVICE_ID_ACCESIO_PCIE_ICM_4SM 0x11D8 1912 2023 1913 - #define PCIE_DEVICE_ID_NI_PXIE8430_2328 0x74C2 1914 - #define PCIE_DEVICE_ID_NI_PXIE8430_23216 0x74C1 1915 - #define PCI_DEVICE_ID_NI_PXI8431_4852 0x7081 1916 - #define PCI_DEVICE_ID_NI_PXI8431_4854 0x70DE 1917 - #define PCI_DEVICE_ID_NI_PXI8431_4858 0x70E3 1918 - #define PCI_DEVICE_ID_NI_PXI8433_4852 0x70E9 1919 - #define PCI_DEVICE_ID_NI_PXI8433_4854 0x70ED 1920 - #define PCIE_DEVICE_ID_NI_PXIE8431_4858 0x74C4 1921 - #define PCIE_DEVICE_ID_NI_PXIE8431_48516 0x74C3 1922 2024 1923 2025 #define PCI_DEVICE_ID_MOXA_CP102E 0x1024 1924 2026 #define PCI_DEVICE_ID_MOXA_CP102EL 0x1025 ··· 2145 2265 .subdevice = PCI_ANY_ID, 2146 2266 .init = pci_ni8430_init, 2147 2267 .setup = pci_ni8430_setup, 2148 - .exit = pci_ni8430_exit, 2149 - }, 2150 - { 2151 - .vendor = PCI_VENDOR_ID_NI, 2152 - .device = PCIE_DEVICE_ID_NI_PXIE8430_2328, 2153 - .subvendor = PCI_ANY_ID, 2154 - .subdevice = PCI_ANY_ID, 2155 - .init = pci_ni8430_init, 2156 - .setup = pci_ni8430_setup, 2157 - .exit = pci_ni8430_exit, 2158 - }, 2159 - { 2160 - .vendor = PCI_VENDOR_ID_NI, 2161 - .device = PCIE_DEVICE_ID_NI_PXIE8430_23216, 2162 - .subvendor = PCI_ANY_ID, 2163 - .subdevice = PCI_ANY_ID, 2164 - .init = pci_ni8430_init, 2165 - .setup = pci_ni8430_setup, 2166 - .exit = pci_ni8430_exit, 2167 - }, 2168 - { 2169 - .vendor = PCI_VENDOR_ID_NI, 2170 - .device = PCI_DEVICE_ID_NI_PXI8431_4852, 2171 - .subvendor = PCI_ANY_ID, 2172 - .subdevice = PCI_ANY_ID, 2173 - .init = pci_ni8430_init, 2174 - .setup = pci_ni8431_setup, 2175 - .exit = pci_ni8430_exit, 2176 - }, 2177 - { 2178 - .vendor = PCI_VENDOR_ID_NI, 2179 - .device = PCI_DEVICE_ID_NI_PXI8431_4854, 2180 - .subvendor = PCI_ANY_ID, 2181 - .subdevice = PCI_ANY_ID, 2182 - .init = pci_ni8430_init, 2183 - .setup = pci_ni8431_setup, 2184 - .exit = pci_ni8430_exit, 2185 - }, 2186 - { 2187 - .vendor = PCI_VENDOR_ID_NI, 2188 - .device = PCI_DEVICE_ID_NI_PXI8431_4858, 2189 - .subvendor = PCI_ANY_ID, 2190 - .subdevice = PCI_ANY_ID, 2191 - .init = pci_ni8430_init, 2192 - .setup = pci_ni8431_setup, 2193 - .exit = pci_ni8430_exit, 2194 - }, 2195 - { 2196 - .vendor = PCI_VENDOR_ID_NI, 2197 - .device = PCI_DEVICE_ID_NI_PXI8433_4852, 2198 - .subvendor = PCI_ANY_ID, 2199 - .subdevice = PCI_ANY_ID, 2200 - .init = pci_ni8430_init, 2201 - .setup = pci_ni8431_setup, 2202 - .exit = pci_ni8430_exit, 2203 - }, 2204 - { 2205 - .vendor = PCI_VENDOR_ID_NI, 2206 - .device = PCI_DEVICE_ID_NI_PXI8433_4854, 2207 - .subvendor = PCI_ANY_ID, 2208 - .subdevice = PCI_ANY_ID, 2209 - .init = pci_ni8430_init, 2210 - .setup = pci_ni8431_setup, 2211 - .exit = pci_ni8430_exit, 2212 - }, 2213 - { 2214 - .vendor = PCI_VENDOR_ID_NI, 2215 - .device = PCIE_DEVICE_ID_NI_PXIE8431_4858, 2216 - .subvendor = PCI_ANY_ID, 2217 - .subdevice = PCI_ANY_ID, 2218 - .init = pci_ni8430_init, 2219 - .setup = pci_ni8431_setup, 2220 - .exit = pci_ni8430_exit, 2221 - }, 2222 - { 2223 - .vendor = PCI_VENDOR_ID_NI, 2224 - .device = PCIE_DEVICE_ID_NI_PXIE8431_48516, 2225 - .subvendor = PCI_ANY_ID, 2226 - .subdevice = PCI_ANY_ID, 2227 - .init = pci_ni8430_init, 2228 - .setup = pci_ni8431_setup, 2229 2268 .exit = pci_ni8430_exit, 2230 2269 }, 2231 2270 /* Quatech */ ··· 2903 3104 pbn_ni8430_4, 2904 3105 pbn_ni8430_8, 2905 3106 pbn_ni8430_16, 2906 - pbn_ni8430_pxie_8, 2907 - pbn_ni8430_pxie_16, 2908 - pbn_ni8431_2, 2909 - pbn_ni8431_4, 2910 - pbn_ni8431_8, 2911 - pbn_ni8431_pxie_8, 2912 - pbn_ni8431_pxie_16, 2913 3107 pbn_ADDIDATA_PCIe_1_3906250, 2914 3108 pbn_ADDIDATA_PCIe_2_3906250, 2915 3109 pbn_ADDIDATA_PCIe_4_3906250, ··· 3552 3760 .flags = FL_BASE0, 3553 3761 .num_ports = 2, 3554 3762 .base_baud = 3686400, 3555 - .uart_offset = 0x10, 3556 - .first_offset = 0x800, 3557 - }, 3558 - [pbn_ni8430_pxie_16] = { 3559 - .flags = FL_BASE0, 3560 - .num_ports = 16, 3561 - .base_baud = 3125000, 3562 - .uart_offset = 0x10, 3563 - .first_offset = 0x800, 3564 - }, 3565 - [pbn_ni8430_pxie_8] = { 3566 - .flags = FL_BASE0, 3567 - .num_ports = 8, 3568 - .base_baud = 3125000, 3569 - .uart_offset = 0x10, 3570 - .first_offset = 0x800, 3571 - }, 3572 - [pbn_ni8431_8] = { 3573 - .flags = FL_BASE0, 3574 - .num_ports = 8, 3575 - .base_baud = 3686400, 3576 - .uart_offset = 0x10, 3577 - .first_offset = 0x800, 3578 - }, 3579 - [pbn_ni8431_4] = { 3580 - .flags = FL_BASE0, 3581 - .num_ports = 4, 3582 - .base_baud = 3686400, 3583 - .uart_offset = 0x10, 3584 - .first_offset = 0x800, 3585 - }, 3586 - [pbn_ni8431_2] = { 3587 - .flags = FL_BASE0, 3588 - .num_ports = 2, 3589 - .base_baud = 3686400, 3590 - .uart_offset = 0x10, 3591 - .first_offset = 0x800, 3592 - }, 3593 - [pbn_ni8431_pxie_16] = { 3594 - .flags = FL_BASE0, 3595 - .num_ports = 16, 3596 - .base_baud = 3125000, 3597 - .uart_offset = 0x10, 3598 - .first_offset = 0x800, 3599 - }, 3600 - [pbn_ni8431_pxie_8] = { 3601 - .flags = FL_BASE0, 3602 - .num_ports = 8, 3603 - .base_baud = 3125000, 3604 3763 .uart_offset = 0x10, 3605 3764 .first_offset = 0x800, 3606 3765 }, ··· 5308 5565 { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PCI8432_2324, 5309 5566 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5310 5567 pbn_ni8430_4 }, 5311 - { PCI_VENDOR_ID_NI, PCIE_DEVICE_ID_NI_PXIE8430_2328, 5312 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5313 - pbn_ni8430_pxie_8 }, 5314 - { PCI_VENDOR_ID_NI, PCIE_DEVICE_ID_NI_PXIE8430_23216, 5315 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5316 - pbn_ni8430_pxie_16 }, 5317 - { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8431_4852, 5318 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5319 - pbn_ni8431_2 }, 5320 - { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8431_4854, 5321 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5322 - pbn_ni8431_4 }, 5323 - { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8431_4858, 5324 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5325 - pbn_ni8431_8 }, 5326 - { PCI_VENDOR_ID_NI, PCIE_DEVICE_ID_NI_PXIE8431_4858, 5327 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5328 - pbn_ni8431_pxie_8 }, 5329 - { PCI_VENDOR_ID_NI, PCIE_DEVICE_ID_NI_PXIE8431_48516, 5330 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5331 - pbn_ni8431_pxie_16 }, 5332 - { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8433_4852, 5333 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5334 - pbn_ni8431_2 }, 5335 - { PCI_VENDOR_ID_NI, PCI_DEVICE_ID_NI_PXI8433_4854, 5336 - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5337 - pbn_ni8431_4 }, 5338 5568 5339 5569 /* 5340 5570 * MOXA
-14
drivers/tty/serial/8250/8250_port.c
··· 2114 2114 enable_rsa(up); 2115 2115 #endif 2116 2116 2117 - if (port->type == PORT_XR17V35X) { 2118 - /* 2119 - * First enable access to IER [7:5], ISR [5:4], FCR [5:4], 2120 - * MCR [7:5] and MSR [7:0] 2121 - */ 2122 - serial_port_out(port, UART_XR_EFR, UART_EFR_ECB); 2123 - 2124 - /* 2125 - * Make sure all interrups are masked until initialization is 2126 - * complete and the FIFOs are cleared 2127 - */ 2128 - serial_port_out(port, UART_IER, 0); 2129 - } 2130 - 2131 2117 /* 2132 2118 * Clear the FIFO buffers and disable them. 2133 2119 * (they will be reenabled in set_termios())
+2 -1
drivers/tty/serial/8250/Kconfig
··· 243 243 tristate "Aspeed Virtual UART" 244 244 depends on SERIAL_8250 245 245 depends on OF 246 + depends on REGMAP && MFD_SYSCON 246 247 help 247 248 If you want to use the virtual UART (VUART) device on Aspeed 248 249 BMC platforms, enable this option. This enables the 16550A- ··· 335 334 336 335 Features and limitations of the UART are 337 336 Registers are similar to 16650 registers, 338 - set bits in the control registers that are unsupported 337 + set bits in the control registers that are unsupported 339 338 are ignored and read back as 0 340 339 7/8 bit operation with 1 start and 1 stop bit 341 340 8 symbols deep fifo for rx and tx
+52 -52
drivers/tty/serial/Kconfig
··· 287 287 boot time.) 288 288 289 289 config SERIAL_SIRFSOC 290 - tristate "SiRF SoC Platform Serial port support" 291 - depends on ARCH_SIRF 292 - select SERIAL_CORE 293 - help 294 - Support for the on-chip UART on the CSR SiRFprimaII series, 295 - providing /dev/ttySiRF0, 1 and 2 (note, some machines may not 296 - provide all of these ports, depending on how the serial port 297 - pins are configured). 290 + tristate "SiRF SoC Platform Serial port support" 291 + depends on ARCH_SIRF 292 + select SERIAL_CORE 293 + help 294 + Support for the on-chip UART on the CSR SiRFprimaII series, 295 + providing /dev/ttySiRF0, 1 and 2 (note, some machines may not 296 + provide all of these ports, depending on how the serial port 297 + pins are configured). 298 298 299 299 config SERIAL_SIRFSOC_CONSOLE 300 - bool "Support for console on SiRF SoC serial port" 301 - depends on SERIAL_SIRFSOC=y 302 - select SERIAL_CORE_CONSOLE 303 - help 304 - Even if you say Y here, the currently visible virtual console 305 - (/dev/tty0) will still be used as the system console by default, but 306 - you can alter that using a kernel command line option such as 307 - "console=ttySiRFx". (Try "man bootparam" or see the documentation of 308 - your boot loader about how to pass options to the kernel at 309 - boot time.) 300 + bool "Support for console on SiRF SoC serial port" 301 + depends on SERIAL_SIRFSOC=y 302 + select SERIAL_CORE_CONSOLE 303 + help 304 + Even if you say Y here, the currently visible virtual console 305 + (/dev/tty0) will still be used as the system console by default, but 306 + you can alter that using a kernel command line option such as 307 + "console=ttySiRFx". (Try "man bootparam" or see the documentation of 308 + your boot loader about how to pass options to the kernel at 309 + boot time.) 310 310 311 311 config SERIAL_TEGRA 312 312 tristate "NVIDIA Tegra20/30 SoC serial controller" ··· 1078 1078 Support for console on SCCNXP serial ports. 1079 1079 1080 1080 config SERIAL_SC16IS7XX_CORE 1081 - tristate 1081 + tristate 1082 1082 1083 1083 config SERIAL_SC16IS7XX 1084 - tristate "SC16IS7xx serial support" 1085 - select SERIAL_CORE 1086 - depends on (SPI_MASTER && !I2C) || I2C 1087 - help 1088 - This selects support for SC16IS7xx serial ports. 1089 - Supported ICs are SC16IS740, SC16IS741, SC16IS750, SC16IS752, 1090 - SC16IS760 and SC16IS762. Select supported buses using options below. 1084 + tristate "SC16IS7xx serial support" 1085 + select SERIAL_CORE 1086 + depends on (SPI_MASTER && !I2C) || I2C 1087 + help 1088 + This selects support for SC16IS7xx serial ports. 1089 + Supported ICs are SC16IS740, SC16IS741, SC16IS750, SC16IS752, 1090 + SC16IS760 and SC16IS762. Select supported buses using options below. 1091 1091 1092 1092 config SERIAL_SC16IS7XX_I2C 1093 - bool "SC16IS7xx for I2C interface" 1094 - depends on SERIAL_SC16IS7XX 1095 - depends on I2C 1096 - select SERIAL_SC16IS7XX_CORE if SERIAL_SC16IS7XX 1097 - select REGMAP_I2C if I2C 1098 - default y 1099 - help 1100 - Enable SC16IS7xx driver on I2C bus, 1101 - If required say y, and say n to i2c if not required, 1102 - Enabled by default to support oldconfig. 1103 - You must select at least one bus for the driver to be built. 1093 + bool "SC16IS7xx for I2C interface" 1094 + depends on SERIAL_SC16IS7XX 1095 + depends on I2C 1096 + select SERIAL_SC16IS7XX_CORE if SERIAL_SC16IS7XX 1097 + select REGMAP_I2C if I2C 1098 + default y 1099 + help 1100 + Enable SC16IS7xx driver on I2C bus, 1101 + If required say y, and say n to i2c if not required, 1102 + Enabled by default to support oldconfig. 1103 + You must select at least one bus for the driver to be built. 1104 1104 1105 1105 config SERIAL_SC16IS7XX_SPI 1106 - bool "SC16IS7xx for spi interface" 1107 - depends on SERIAL_SC16IS7XX 1108 - depends on SPI_MASTER 1109 - select SERIAL_SC16IS7XX_CORE if SERIAL_SC16IS7XX 1110 - select REGMAP_SPI if SPI_MASTER 1111 - help 1112 - Enable SC16IS7xx driver on SPI bus, 1113 - If required say y, and say n to spi if not required, 1114 - This is additional support to exsisting driver. 1115 - You must select at least one bus for the driver to be built. 1106 + bool "SC16IS7xx for spi interface" 1107 + depends on SERIAL_SC16IS7XX 1108 + depends on SPI_MASTER 1109 + select SERIAL_SC16IS7XX_CORE if SERIAL_SC16IS7XX 1110 + select REGMAP_SPI if SPI_MASTER 1111 + help 1112 + Enable SC16IS7xx driver on SPI bus, 1113 + If required say y, and say n to spi if not required, 1114 + This is additional support to exsisting driver. 1115 + You must select at least one bus for the driver to be built. 1116 1116 1117 1117 config SERIAL_TIMBERDALE 1118 1118 tristate "Support for timberdale UART" ··· 1212 1212 Enable a Altera UART port to be the system console. 1213 1213 1214 1214 config SERIAL_IFX6X60 1215 - tristate "SPI protocol driver for Infineon 6x60 modem (EXPERIMENTAL)" 1215 + tristate "SPI protocol driver for Infineon 6x60 modem (EXPERIMENTAL)" 1216 1216 depends on GPIOLIB || COMPILE_TEST 1217 1217 depends on SPI && HAS_DMA 1218 1218 help ··· 1392 1392 you can make it the console by answering Y to this option. 1393 1393 1394 1394 config SERIAL_FSL_LINFLEXUART 1395 - tristate "Freescale linflexuart serial port support" 1395 + tristate "Freescale LINFlexD UART serial port support" 1396 1396 depends on PRINTK 1397 1397 select SERIAL_CORE 1398 1398 help 1399 - Support for the on-chip linflexuart on some Freescale SOCs. 1399 + Support for the on-chip LINFlexD UART on some Freescale SOCs. 1400 1400 1401 1401 config SERIAL_FSL_LINFLEXUART_CONSOLE 1402 - bool "Console on Freescale linflexuart serial port" 1402 + bool "Console on Freescale LINFlexD UART serial port" 1403 1403 depends on SERIAL_FSL_LINFLEXUART=y 1404 1404 select SERIAL_CORE_CONSOLE 1405 1405 select SERIAL_EARLYCON 1406 1406 help 1407 - If you have enabled the linflexuart serial port on the Freescale 1407 + If you have enabled the LINFlexD UART serial port on the Freescale 1408 1408 SoCs, you can make it the console by answering Y to this option. 1409 1409 1410 1410 config SERIAL_CONEXANT_DIGICOLOR
+1 -1
drivers/tty/serial/Makefile
··· 30 30 obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o 31 31 obj-$(CONFIG_SERIAL_SA1100) += sa1100.o 32 32 obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o 33 - obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o 33 + obj-$(CONFIG_SERIAL_SAMSUNG) += samsung_tty.o 34 34 obj-$(CONFIG_SERIAL_MAX3100) += max3100.o 35 35 obj-$(CONFIG_SERIAL_MAX310X) += max310x.o 36 36 obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
+3 -9
drivers/tty/serial/amba-pl011.c
··· 414 414 dma_cap_mask_t mask; 415 415 416 416 uap->dma_probed = true; 417 - chan = dma_request_slave_channel_reason(dev, "tx"); 417 + chan = dma_request_chan(dev, "tx"); 418 418 if (IS_ERR(chan)) { 419 419 if (PTR_ERR(chan) == -EPROBE_DEFER) { 420 420 uap->dma_probed = false; ··· 813 813 if (!uap->using_tx_dma) 814 814 return; 815 815 816 - /* Avoid deadlock with the DMA engine callback */ 817 - spin_unlock(&uap->port.lock); 818 - dmaengine_terminate_all(uap->dmatx.chan); 819 - spin_lock(&uap->port.lock); 816 + dmaengine_terminate_async(uap->dmatx.chan); 817 + 820 818 if (uap->dmatx.queued) { 821 819 dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, 822 820 DMA_TO_DEVICE); ··· 1234 1236 1235 1237 #else 1236 1238 /* Blank functions if the DMA engine is not available */ 1237 - static inline void pl011_dma_probe(struct uart_amba_port *uap) 1238 - { 1239 - } 1240 - 1241 1239 static inline void pl011_dma_remove(struct uart_amba_port *uap) 1242 1240 { 1243 1241 }
+2 -2
drivers/tty/serial/fsl_linflexuart.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 2 /* 3 - * Freescale linflexuart serial port driver 3 + * Freescale LINFlexD UART serial port driver 4 4 * 5 5 * Copyright 2012-2016 Freescale Semiconductor, Inc. 6 6 * Copyright 2017-2019 NXP ··· 940 940 module_init(linflex_serial_init); 941 941 module_exit(linflex_serial_exit); 942 942 943 - MODULE_DESCRIPTION("Freescale linflex serial port driver"); 943 + MODULE_DESCRIPTION("Freescale LINFlexD serial port driver"); 944 944 MODULE_LICENSE("GPL v2");
+67 -17
drivers/tty/serial/fsl_lpuart.c
··· 437 437 } 438 438 439 439 sport->dma_tx_desc = dmaengine_prep_slave_sg(sport->dma_tx_chan, sgl, 440 - sport->dma_tx_nents, 441 - DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT); 440 + ret, DMA_MEM_TO_DEV, 441 + DMA_PREP_INTERRUPT); 442 442 if (!sport->dma_tx_desc) { 443 443 dma_unmap_sg(dev, sgl, sport->dma_tx_nents, DMA_TO_DEVICE); 444 444 dev_err(dev, "Cannot prepare TX slave DMA!\n"); ··· 1280 1280 return 0; 1281 1281 } 1282 1282 1283 + static int lpuart32_config_rs485(struct uart_port *port, 1284 + struct serial_rs485 *rs485) 1285 + { 1286 + struct lpuart_port *sport = container_of(port, 1287 + struct lpuart_port, port); 1288 + 1289 + unsigned long modem = lpuart32_read(&sport->port, UARTMODIR) 1290 + & ~(UARTMODEM_TXRTSPOL | UARTMODEM_TXRTSE); 1291 + lpuart32_write(&sport->port, modem, UARTMODIR); 1292 + 1293 + /* clear unsupported configurations */ 1294 + rs485->delay_rts_before_send = 0; 1295 + rs485->delay_rts_after_send = 0; 1296 + rs485->flags &= ~SER_RS485_RX_DURING_TX; 1297 + 1298 + if (rs485->flags & SER_RS485_ENABLED) { 1299 + /* Enable auto RS-485 RTS mode */ 1300 + modem |= UARTMODEM_TXRTSE; 1301 + 1302 + /* 1303 + * RTS needs to be logic HIGH either during transer _or_ after 1304 + * transfer, other variants are not supported by the hardware. 1305 + */ 1306 + 1307 + if (!(rs485->flags & (SER_RS485_RTS_ON_SEND | 1308 + SER_RS485_RTS_AFTER_SEND))) 1309 + rs485->flags |= SER_RS485_RTS_ON_SEND; 1310 + 1311 + if (rs485->flags & SER_RS485_RTS_ON_SEND && 1312 + rs485->flags & SER_RS485_RTS_AFTER_SEND) 1313 + rs485->flags &= ~SER_RS485_RTS_AFTER_SEND; 1314 + 1315 + /* 1316 + * The hardware defaults to RTS logic HIGH while transfer. 1317 + * Switch polarity in case RTS shall be logic HIGH 1318 + * after transfer. 1319 + * Note: UART is assumed to be active high. 1320 + */ 1321 + if (rs485->flags & SER_RS485_RTS_ON_SEND) 1322 + modem &= ~UARTMODEM_TXRTSPOL; 1323 + else if (rs485->flags & SER_RS485_RTS_AFTER_SEND) 1324 + modem |= UARTMODEM_TXRTSPOL; 1325 + } 1326 + 1327 + /* Store the new configuration */ 1328 + sport->port.rs485 = *rs485; 1329 + 1330 + lpuart32_write(&sport->port, modem, UARTMODIR); 1331 + return 0; 1332 + } 1333 + 1283 1334 static unsigned int lpuart_get_mctrl(struct uart_port *port) 1284 1335 { 1285 1336 unsigned int temp = 0; ··· 1384 1333 1385 1334 static void lpuart32_set_mctrl(struct uart_port *port, unsigned int mctrl) 1386 1335 { 1387 - unsigned long temp; 1388 1336 1389 - temp = lpuart32_read(port, UARTMODIR) & 1390 - ~(UARTMODIR_RXRTSE | UARTMODIR_TXCTSE); 1391 - 1392 - if (mctrl & TIOCM_RTS) 1393 - temp |= UARTMODIR_RXRTSE; 1394 - 1395 - if (mctrl & TIOCM_CTS) 1396 - temp |= UARTMODIR_TXCTSE; 1397 - 1398 - lpuart32_write(port, temp, UARTMODIR); 1399 1337 } 1400 1338 1401 1339 static void lpuart_break_ctl(struct uart_port *port, int break_state) ··· 1929 1889 ctrl |= UARTCTRL_M; 1930 1890 } 1931 1891 1892 + /* 1893 + * When auto RS-485 RTS mode is enabled, 1894 + * hardware flow control need to be disabled. 1895 + */ 1896 + if (sport->port.rs485.flags & SER_RS485_ENABLED) 1897 + termios->c_cflag &= ~CRTSCTS; 1898 + 1932 1899 if (termios->c_cflag & CRTSCTS) { 1933 - modem |= UARTMODEM_RXRTSE | UARTMODEM_TXCTSE; 1900 + modem |= (UARTMODIR_RXRTSE | UARTMODIR_TXCTSE); 1934 1901 } else { 1935 1902 termios->c_cflag &= ~CRTSCTS; 1936 - modem &= ~(UARTMODEM_RXRTSE | UARTMODEM_TXCTSE); 1903 + modem &= ~(UARTMODIR_RXRTSE | UARTMODIR_TXCTSE); 1937 1904 } 1938 1905 1939 1906 if (termios->c_cflag & CSTOPB) ··· 2463 2416 sport->port.ops = &lpuart_pops; 2464 2417 sport->port.flags = UPF_BOOT_AUTOCONF; 2465 2418 2466 - sport->port.rs485_config = lpuart_config_rs485; 2419 + if (lpuart_is_32(sport)) 2420 + sport->port.rs485_config = lpuart32_config_rs485; 2421 + else 2422 + sport->port.rs485_config = lpuart_config_rs485; 2467 2423 2468 2424 sport->ipg_clk = devm_clk_get(&pdev->dev, "ipg"); 2469 2425 if (IS_ERR(sport->ipg_clk)) { ··· 2520 2470 sport->port.rs485.delay_rts_after_send) 2521 2471 dev_err(&pdev->dev, "driver doesn't support RTS delays\n"); 2522 2472 2523 - lpuart_config_rs485(&sport->port, &sport->port.rs485); 2473 + sport->port.rs485_config(&sport->port, &sport->port.rs485); 2524 2474 2525 2475 sport->dma_tx_chan = dma_request_slave_channel(sport->port.dev, "tx"); 2526 2476 if (!sport->dma_tx_chan)
+3
drivers/tty/serial/ifx6x60.c
··· 1230 1230 struct ifx_spi_device *ifx_dev = spi_get_drvdata(spi); 1231 1231 /* stop activity */ 1232 1232 tasklet_kill(&ifx_dev->io_work_tasklet); 1233 + 1234 + pm_runtime_disable(&spi->dev); 1235 + 1233 1236 /* free irq */ 1234 1237 free_irq(gpio_to_irq(ifx_dev->gpio.reset_out), ifx_dev); 1235 1238 free_irq(gpio_to_irq(ifx_dev->gpio.srdy), ifx_dev);
+3 -4
drivers/tty/serial/imx.c
··· 619 619 dev_err(dev, "DMA mapping error for TX.\n"); 620 620 return; 621 621 } 622 - desc = dmaengine_prep_slave_sg(chan, sgl, sport->dma_tx_nents, 622 + desc = dmaengine_prep_slave_sg(chan, sgl, ret, 623 623 DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT); 624 624 if (!desc) { 625 625 dma_unmap_sg(dev, sgl, sport->dma_tx_nents, ··· 1034 1034 } 1035 1035 } 1036 1036 1037 - #define RX_BUF_SIZE (PAGE_SIZE) 1038 - 1039 1037 /* 1040 1038 * There are two kinds of RX DMA interrupts(such as in the MX6Q): 1041 1039 * [1] the RX DMA buffer is full. ··· 1116 1118 } 1117 1119 1118 1120 /* RX DMA buffer periods */ 1119 - #define RX_DMA_PERIODS 4 1121 + #define RX_DMA_PERIODS 16 1122 + #define RX_BUF_SIZE (RX_DMA_PERIODS * PAGE_SIZE / 4) 1120 1123 1121 1124 static int imx_uart_start_rx_dma(struct imx_port *sport) 1122 1125 {
+7 -3
drivers/tty/serial/msm_serial.c
··· 301 301 dma = &msm_port->tx_dma; 302 302 303 303 /* allocate DMA resources, if available */ 304 - dma->chan = dma_request_slave_channel_reason(dev, "tx"); 304 + dma->chan = dma_request_chan(dev, "tx"); 305 305 if (IS_ERR(dma->chan)) 306 306 goto no_tx; 307 307 ··· 344 344 dma = &msm_port->rx_dma; 345 345 346 346 /* allocate DMA resources, if available */ 347 - dma->chan = dma_request_slave_channel_reason(dev, "rx"); 347 + dma->chan = dma_request_chan(dev, "rx"); 348 348 if (IS_ERR(dma->chan)) 349 349 goto no_rx; 350 350 ··· 980 980 static void msm_reset(struct uart_port *port) 981 981 { 982 982 struct msm_port *msm_port = UART_TO_MSM(port); 983 + unsigned int mr; 983 984 984 985 /* reset everything */ 985 986 msm_write(port, UART_CR_CMD_RESET_RX, UART_CR); ··· 988 987 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); 989 988 msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR); 990 989 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); 991 - msm_write(port, UART_CR_CMD_SET_RFR, UART_CR); 990 + msm_write(port, UART_CR_CMD_RESET_RFR, UART_CR); 991 + mr = msm_read(port, UART_MR1); 992 + mr &= ~UART_MR1_RX_RDY_CTL; 993 + msm_write(port, mr, UART_MR1); 992 994 993 995 /* Disable DM modes */ 994 996 if (msm_port->is_uartdm)
+4 -1
drivers/tty/serial/pch_uart.c
··· 233 233 struct dma_chan *chan_rx; 234 234 struct scatterlist *sg_tx_p; 235 235 int nent; 236 + int orig_nent; 236 237 struct scatterlist sg_rx; 237 238 int tx_dma_use; 238 239 void *rx_buf_virt; ··· 788 787 } 789 788 xmit->tail &= UART_XMIT_SIZE - 1; 790 789 async_tx_ack(priv->desc_tx); 791 - dma_unmap_sg(port->dev, sg, priv->nent, DMA_TO_DEVICE); 790 + dma_unmap_sg(port->dev, sg, priv->orig_nent, DMA_TO_DEVICE); 792 791 priv->tx_dma_use = 0; 793 792 priv->nent = 0; 793 + priv->orig_nent = 0; 794 794 kfree(priv->sg_tx_p); 795 795 pch_uart_hal_enable_interrupt(priv, PCH_UART_HAL_TX_INT); 796 796 } ··· 1012 1010 dev_err(priv->port.dev, "%s:dma_map_sg Failed\n", __func__); 1013 1011 return 0; 1014 1012 } 1013 + priv->orig_nent = num; 1015 1014 priv->nent = nent; 1016 1015 1017 1016 for (i = 0; i < nent; i++, sg++) {
+57 -11
drivers/tty/serial/qcom_geni_serial.c
··· 9 9 #include <linux/console.h> 10 10 #include <linux/io.h> 11 11 #include <linux/iopoll.h> 12 + #include <linux/irq.h> 12 13 #include <linux/module.h> 13 14 #include <linux/of.h> 14 15 #include <linux/of_device.h> 15 16 #include <linux/platform_device.h> 17 + #include <linux/pm_wakeirq.h> 16 18 #include <linux/qcom-geni-se.h> 17 19 #include <linux/serial.h> 18 20 #include <linux/serial_core.h> ··· 117 115 bool brk; 118 116 119 117 unsigned int tx_remaining; 118 + int wakeup_irq; 120 119 }; 121 120 122 121 static const struct uart_ops qcom_geni_console_pops; ··· 757 754 uart_write_wakeup(uport); 758 755 } 759 756 757 + static irqreturn_t qcom_geni_serial_wakeup_isr(int isr, void *dev) 758 + { 759 + struct uart_port *uport = dev; 760 + 761 + pm_wakeup_event(uport->dev, 2000); 762 + 763 + return IRQ_HANDLED; 764 + } 765 + 760 766 static irqreturn_t qcom_geni_serial_isr(int isr, void *dev) 761 767 { 762 768 u32 m_irq_en; ··· 842 830 if (uart_console(uport)) 843 831 console_stop(uport->cons); 844 832 845 - free_irq(uport->irq, uport); 833 + disable_irq(uport->irq); 846 834 spin_lock_irqsave(&uport->lock, flags); 847 835 qcom_geni_serial_stop_tx(uport); 848 836 qcom_geni_serial_stop_rx(uport); ··· 902 890 int ret; 903 891 struct qcom_geni_serial_port *port = to_dev_port(uport, uport); 904 892 905 - scnprintf(port->name, sizeof(port->name), 906 - "qcom_serial_%s%d", 907 - (uart_console(uport) ? "console" : "uart"), uport->line); 908 - 909 893 if (!port->setup) { 910 894 ret = qcom_geni_serial_port_setup(uport); 911 895 if (ret) 912 896 return ret; 913 897 } 898 + enable_irq(uport->irq); 914 899 915 - ret = request_irq(uport->irq, qcom_geni_serial_isr, IRQF_TRIGGER_HIGH, 916 - port->name, uport); 917 - if (ret) 918 - dev_err(uport->dev, "Failed to get IRQ ret %d\n", ret); 919 - return ret; 900 + return 0; 920 901 } 921 902 922 903 static unsigned long get_clk_cfg(unsigned long clk_freq) ··· 1302 1297 port->rx_fifo_depth = DEF_FIFO_DEPTH_WORDS; 1303 1298 port->tx_fifo_width = DEF_FIFO_WIDTH_BITS; 1304 1299 1300 + scnprintf(port->name, sizeof(port->name), "qcom_geni_serial_%s%d", 1301 + (uart_console(uport) ? "console" : "uart"), uport->line); 1305 1302 irq = platform_get_irq(pdev, 0); 1306 1303 if (irq < 0) 1307 1304 return irq; 1308 1305 uport->irq = irq; 1309 1306 1307 + irq_set_status_flags(uport->irq, IRQ_NOAUTOEN); 1308 + ret = devm_request_irq(uport->dev, uport->irq, qcom_geni_serial_isr, 1309 + IRQF_TRIGGER_HIGH, port->name, uport); 1310 + if (ret) { 1311 + dev_err(uport->dev, "Failed to get IRQ ret %d\n", ret); 1312 + return ret; 1313 + } 1314 + 1315 + if (!console) { 1316 + port->wakeup_irq = platform_get_irq(pdev, 1); 1317 + if (port->wakeup_irq < 0) { 1318 + dev_err(&pdev->dev, "Failed to get wakeup IRQ %d\n", 1319 + port->wakeup_irq); 1320 + } else { 1321 + irq_set_status_flags(port->wakeup_irq, IRQ_NOAUTOEN); 1322 + ret = devm_request_irq(uport->dev, port->wakeup_irq, 1323 + qcom_geni_serial_wakeup_isr, 1324 + IRQF_TRIGGER_FALLING, "uart_wakeup", uport); 1325 + if (ret) { 1326 + dev_err(uport->dev, "Failed to register wakeup IRQ ret %d\n", 1327 + ret); 1328 + return ret; 1329 + } 1330 + 1331 + device_init_wakeup(&pdev->dev, true); 1332 + ret = dev_pm_set_wake_irq(&pdev->dev, port->wakeup_irq); 1333 + if (unlikely(ret)) 1334 + dev_err(uport->dev, "%s:Failed to set IRQ wake:%d\n", 1335 + __func__, ret); 1336 + } 1337 + } 1310 1338 uport->private_data = drv; 1311 1339 platform_set_drvdata(pdev, port); 1312 1340 port->handle_rx = console ? handle_rx_console : handle_rx_uart; ··· 1362 1324 struct qcom_geni_serial_port *port = dev_get_drvdata(dev); 1363 1325 struct uart_port *uport = &port->uport; 1364 1326 1365 - return uart_suspend_port(uport->private_data, uport); 1327 + uart_suspend_port(uport->private_data, uport); 1328 + 1329 + if (port->wakeup_irq > 0) 1330 + enable_irq(port->wakeup_irq); 1331 + 1332 + return 0; 1366 1333 } 1367 1334 1368 1335 static int __maybe_unused qcom_geni_serial_sys_resume(struct device *dev) 1369 1336 { 1370 1337 struct qcom_geni_serial_port *port = dev_get_drvdata(dev); 1371 1338 struct uart_port *uport = &port->uport; 1339 + 1340 + if (port->wakeup_irq > 0) 1341 + disable_irq(port->wakeup_irq); 1372 1342 1373 1343 return uart_resume_port(uport->private_data, uport); 1374 1344 }
drivers/tty/serial/samsung.c drivers/tty/serial/samsung_tty.c
+1 -2
drivers/tty/serial/serial-tegra.c
··· 1122 1122 int ret; 1123 1123 struct dma_slave_config dma_sconfig; 1124 1124 1125 - dma_chan = dma_request_slave_channel_reason(tup->uport.dev, 1126 - dma_to_memory ? "rx" : "tx"); 1125 + dma_chan = dma_request_chan(tup->uport.dev, dma_to_memory ? "rx" : "tx"); 1127 1126 if (IS_ERR(dma_chan)) { 1128 1127 ret = PTR_ERR(dma_chan); 1129 1128 dev_err(tup->uport.dev,
+1 -1
drivers/tty/serial/serial_core.c
··· 1111 1111 if (!uport) 1112 1112 goto out; 1113 1113 1114 - if (uport->type != PORT_UNKNOWN) 1114 + if (uport->type != PORT_UNKNOWN && uport->ops->break_ctl) 1115 1115 uport->ops->break_ctl(uport, break_state); 1116 1116 ret = 0; 1117 1117 out:
+3 -2
drivers/tty/serial/sirfsoc_uart.h
··· 120 120 empty_bit = ilog2(port->fifosize) + 1; 121 121 return (1 << empty_bit); 122 122 } 123 - struct sirfsoc_uart_register sirfsoc_usp = { 123 + 124 + static struct sirfsoc_uart_register sirfsoc_usp = { 124 125 .uart_reg = { 125 126 .sirfsoc_mode1 = 0x0000, 126 127 .sirfsoc_mode2 = 0x0004, ··· 187 186 }, 188 187 }; 189 188 190 - struct sirfsoc_uart_register sirfsoc_uart = { 189 + static struct sirfsoc_uart_register sirfsoc_uart = { 191 190 .uart_reg = { 192 191 .sirfsoc_line_ctrl = 0x0040, 193 192 .sirfsoc_tx_rx_en = 0x004c,
+33
drivers/tty/serial/sprd_serial.c
··· 919 919 } 920 920 } 921 921 922 + #ifdef CONFIG_CONSOLE_POLL 923 + static int sprd_poll_init(struct uart_port *port) 924 + { 925 + if (port->state->pm_state != UART_PM_STATE_ON) { 926 + sprd_pm(port, UART_PM_STATE_ON, 0); 927 + port->state->pm_state = UART_PM_STATE_ON; 928 + } 929 + 930 + return 0; 931 + } 932 + 933 + static int sprd_poll_get_char(struct uart_port *port) 934 + { 935 + while (!(serial_in(port, SPRD_STS1) & SPRD_RX_FIFO_CNT_MASK)) 936 + cpu_relax(); 937 + 938 + return serial_in(port, SPRD_RXD); 939 + } 940 + 941 + static void sprd_poll_put_char(struct uart_port *port, unsigned char ch) 942 + { 943 + while (serial_in(port, SPRD_STS1) & SPRD_TX_FIFO_CNT_MASK) 944 + cpu_relax(); 945 + 946 + serial_out(port, SPRD_TXD, ch); 947 + } 948 + #endif 949 + 922 950 static const struct uart_ops serial_sprd_ops = { 923 951 .tx_empty = sprd_tx_empty, 924 952 .get_mctrl = sprd_get_mctrl, ··· 964 936 .config_port = sprd_config_port, 965 937 .verify_port = sprd_verify_port, 966 938 .pm = sprd_pm, 939 + #ifdef CONFIG_CONSOLE_POLL 940 + .poll_init = sprd_poll_init, 941 + .poll_get_char = sprd_poll_get_char, 942 + .poll_put_char = sprd_poll_put_char, 943 + #endif 967 944 }; 968 945 969 946 #ifdef CONFIG_SERIAL_SPRD_CONSOLE
+3 -3
drivers/tty/serial/stm32-usart.c
··· 240 240 * cleared by the sequence [read SR - read DR]. 241 241 */ 242 242 if ((sr & USART_SR_ERR_MASK) && ofs->icr != UNDEF_REG) 243 - stm32_clr_bits(port, ofs->icr, USART_ICR_ORECF | 244 - USART_ICR_PECF | USART_ICR_FECF); 243 + writel_relaxed(sr & USART_SR_ERR_MASK, 244 + port->membase + ofs->icr); 245 245 246 246 c = stm32_get_char(port, &sr, &stm32_port->last_res); 247 247 port->icount.rx++; ··· 435 435 if (ofs->icr == UNDEF_REG) 436 436 stm32_clr_bits(port, ofs->isr, USART_SR_TC); 437 437 else 438 - stm32_set_bits(port, ofs->icr, USART_ICR_TCCF); 438 + writel_relaxed(USART_ICR_TCCF, port->membase + ofs->icr); 439 439 440 440 if (stm32_port->tx_ch) 441 441 stm32_transmit_chars_dma(port);
+23 -74
drivers/tty/serial/uartlite.c
··· 22 22 #include <linux/of_device.h> 23 23 #include <linux/of_platform.h> 24 24 #include <linux/clk.h> 25 - #include <linux/pm_runtime.h> 26 25 27 26 #define ULITE_NAME "ttyUL" 28 27 #define ULITE_MAJOR 204 ··· 54 55 #define ULITE_CONTROL_RST_TX 0x01 55 56 #define ULITE_CONTROL_RST_RX 0x02 56 57 #define ULITE_CONTROL_IE 0x10 57 - #define UART_AUTOSUSPEND_TIMEOUT 3000 58 58 59 59 /* Static pointer to console port */ 60 60 #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE ··· 63 65 struct uartlite_data { 64 66 const struct uartlite_reg_ops *reg_ops; 65 67 struct clk *clk; 66 - struct uart_driver *ulite_uart_driver; 67 68 }; 68 69 69 70 struct uartlite_reg_ops { ··· 390 393 static void ulite_pm(struct uart_port *port, unsigned int state, 391 394 unsigned int oldstate) 392 395 { 393 - if (!state) { 394 - pm_runtime_get_sync(port->dev); 395 - } else { 396 - pm_runtime_mark_last_busy(port->dev); 397 - pm_runtime_put_autosuspend(port->dev); 398 - } 396 + struct uartlite_data *pdata = port->private_data; 397 + 398 + if (!state) 399 + clk_enable(pdata->clk); 400 + else 401 + clk_disable(pdata->clk); 399 402 } 400 403 401 404 #ifdef CONFIG_CONSOLE_POLL ··· 694 697 int rc = 0; 695 698 696 699 if (port) { 697 - struct uartlite_data *pdata = port->private_data; 698 - 699 - rc = uart_remove_one_port(pdata->ulite_uart_driver, port); 700 + rc = uart_remove_one_port(&ulite_uart_driver, port); 700 701 dev_set_drvdata(dev, NULL); 701 702 port->mapbase = 0; 702 703 } ··· 712 717 { 713 718 struct uart_port *port = dev_get_drvdata(dev); 714 719 715 - if (port) { 716 - struct uartlite_data *pdata = port->private_data; 717 - 718 - uart_suspend_port(pdata->ulite_uart_driver, port); 719 - } 720 + if (port) 721 + uart_suspend_port(&ulite_uart_driver, port); 720 722 721 723 return 0; 722 724 } ··· 728 736 { 729 737 struct uart_port *port = dev_get_drvdata(dev); 730 738 731 - if (port) { 732 - struct uartlite_data *pdata = port->private_data; 733 - 734 - uart_resume_port(pdata->ulite_uart_driver, port); 735 - } 739 + if (port) 740 + uart_resume_port(&ulite_uart_driver, port); 736 741 737 742 return 0; 738 743 } 739 744 740 - static int __maybe_unused ulite_runtime_suspend(struct device *dev) 741 - { 742 - struct uart_port *port = dev_get_drvdata(dev); 743 - struct uartlite_data *pdata = port->private_data; 744 - 745 - clk_disable(pdata->clk); 746 - return 0; 747 - }; 748 - 749 - static int __maybe_unused ulite_runtime_resume(struct device *dev) 750 - { 751 - struct uart_port *port = dev_get_drvdata(dev); 752 - struct uartlite_data *pdata = port->private_data; 753 - 754 - clk_enable(pdata->clk); 755 - return 0; 756 - } 757 745 /* --------------------------------------------------------------------- 758 746 * Platform bus binding 759 747 */ 760 748 761 - static const struct dev_pm_ops ulite_pm_ops = { 762 - SET_SYSTEM_SLEEP_PM_OPS(ulite_suspend, ulite_resume) 763 - SET_RUNTIME_PM_OPS(ulite_runtime_suspend, 764 - ulite_runtime_resume, NULL) 765 - }; 749 + static SIMPLE_DEV_PM_OPS(ulite_pm_ops, ulite_suspend, ulite_resume); 766 750 767 751 #if defined(CONFIG_OF) 768 752 /* Match table for of_platform binding */ ··· 763 795 if (prop) 764 796 id = be32_to_cpup(prop); 765 797 #endif 766 - if (id < 0) { 767 - /* Look for a serialN alias */ 768 - id = of_alias_get_id(pdev->dev.of_node, "serial"); 769 - if (id < 0) 770 - id = 0; 771 - } 772 - 773 - if (!ulite_uart_driver.state) { 774 - dev_dbg(&pdev->dev, "uartlite: calling uart_register_driver()\n"); 775 - ret = uart_register_driver(&ulite_uart_driver); 776 - if (ret < 0) { 777 - dev_err(&pdev->dev, "Failed to register driver\n"); 778 - return ret; 779 - } 780 - } 781 - 782 798 pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data), 783 799 GFP_KERNEL); 784 800 if (!pdata) ··· 788 836 pdata->clk = NULL; 789 837 } 790 838 791 - pdata->ulite_uart_driver = &ulite_uart_driver; 792 839 ret = clk_prepare_enable(pdata->clk); 793 840 if (ret) { 794 841 dev_err(&pdev->dev, "Failed to prepare clock\n"); 795 842 return ret; 796 843 } 797 844 798 - pm_runtime_use_autosuspend(&pdev->dev); 799 - pm_runtime_set_autosuspend_delay(&pdev->dev, UART_AUTOSUSPEND_TIMEOUT); 800 - pm_runtime_set_active(&pdev->dev); 801 - pm_runtime_enable(&pdev->dev); 845 + if (!ulite_uart_driver.state) { 846 + dev_dbg(&pdev->dev, "uartlite: calling uart_register_driver()\n"); 847 + ret = uart_register_driver(&ulite_uart_driver); 848 + if (ret < 0) { 849 + dev_err(&pdev->dev, "Failed to register driver\n"); 850 + return ret; 851 + } 852 + } 802 853 803 854 ret = ulite_assign(&pdev->dev, id, res->start, irq, pdata); 804 855 805 - pm_runtime_mark_last_busy(&pdev->dev); 806 - pm_runtime_put_autosuspend(&pdev->dev); 856 + clk_disable(pdata->clk); 807 857 808 858 return ret; 809 859 } ··· 814 860 { 815 861 struct uart_port *port = dev_get_drvdata(&pdev->dev); 816 862 struct uartlite_data *pdata = port->private_data; 817 - int rc; 818 863 819 - clk_unprepare(pdata->clk); 820 - rc = ulite_release(&pdev->dev); 821 - pm_runtime_disable(&pdev->dev); 822 - pm_runtime_set_suspended(&pdev->dev); 823 - pm_runtime_dont_use_autosuspend(&pdev->dev); 824 - return rc; 864 + clk_disable_unprepare(pdata->clk); 865 + return ulite_release(&pdev->dev); 825 866 } 826 867 827 868 /* work with hotplug and coldplug */
+8 -6
drivers/tty/tty_io.c
··· 1345 1345 if (!tty->port) 1346 1346 tty->port = driver->ports[idx]; 1347 1347 1348 - WARN_RATELIMIT(!tty->port, 1349 - "%s: %s driver does not set tty->port. This will crash the kernel later. Fix the driver!\n", 1350 - __func__, tty->driver->name); 1348 + if (WARN_RATELIMIT(!tty->port, 1349 + "%s: %s driver does not set tty->port. This would crash the kernel. Fix the driver!\n", 1350 + __func__, tty->driver->name)) { 1351 + retval = -EINVAL; 1352 + goto err_release_lock; 1353 + } 1351 1354 1352 1355 retval = tty_ldisc_lock(tty, 5 * HZ); 1353 1356 if (retval) ··· 1928 1925 /** 1929 1926 * tty_open_by_driver - open a tty device 1930 1927 * @device: dev_t of device to open 1931 - * @inode: inode of device file 1932 1928 * @filp: file pointer to tty 1933 1929 * 1934 1930 * Performs the driver lookup, checks for a reopen, or otherwise ··· 1940 1938 * - concurrent tty driver removal w/ lookup 1941 1939 * - concurrent tty removal from driver table 1942 1940 */ 1943 - static struct tty_struct *tty_open_by_driver(dev_t device, struct inode *inode, 1941 + static struct tty_struct *tty_open_by_driver(dev_t device, 1944 1942 struct file *filp) 1945 1943 { 1946 1944 struct tty_struct *tty; ··· 2032 2030 2033 2031 tty = tty_open_current_tty(device, filp); 2034 2032 if (!tty) 2035 - tty = tty_open_by_driver(device, inode, filp); 2033 + tty = tty_open_by_driver(device, filp); 2036 2034 2037 2035 if (IS_ERR(tty)) { 2038 2036 tty_free_file(filp);
+1 -6
drivers/tty/tty_ldisc.c
··· 156 156 * takes tty_ldiscs_lock to guard against ldisc races 157 157 */ 158 158 159 - #if defined(CONFIG_LDISC_AUTOLOAD) 160 - #define INITIAL_AUTOLOAD_STATE 1 161 - #else 162 - #define INITIAL_AUTOLOAD_STATE 0 163 - #endif 164 - static int tty_ldisc_autoload = INITIAL_AUTOLOAD_STATE; 159 + static int tty_ldisc_autoload = IS_BUILTIN(CONFIG_LDISC_AUTOLOAD); 165 160 166 161 static struct tty_ldisc *tty_ldisc_get(struct tty_struct *tty, int disc) 167 162 {
+1 -1
drivers/tty/vt/keyboard.c
··· 1491 1491 1492 1492 if (event_type == EV_MSC && event_code == MSC_RAW && HW_RAW(handle->dev)) 1493 1493 kbd_rawcode(value); 1494 - if (event_type == EV_KEY) 1494 + if (event_type == EV_KEY && event_code <= KEY_MAX) 1495 1495 kbd_keycode(event_code, value, HW_RAW(handle->dev)); 1496 1496 1497 1497 spin_unlock(&kbd_event_lock);
+3
drivers/tty/vt/vc_screen.c
··· 456 456 size_t ret; 457 457 char *con_buf; 458 458 459 + if (use_unicode(inode)) 460 + return -EOPNOTSUPP; 461 + 459 462 con_buf = (char *) __get_free_page(GFP_KERNEL); 460 463 if (!con_buf) 461 464 return -ENOMEM;
+1 -1
include/uapi/linux/serial_core.h
··· 290 290 /* Sunix UART */ 291 291 #define PORT_SUNIX 121 292 292 293 - /* Freescale Linflex UART */ 293 + /* Freescale LINFlexD UART */ 294 294 #define PORT_LINFLEXUART 122 295 295 296 296 #endif /* _UAPILINUX_SERIAL_CORE_H */