Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs

Add support for the Meson GX SoCs to the meson-ee-pwrc driver.

The power domains on the GX SoCs are very similar to G12A. The only
known differences so far are:
- The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
VPU power-domain)
- The GX SoCs have an additional reset line called "dvin"

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200515204709.1505498-5-martin.blumenstingl@googlemail.com

authored by

Martin Blumenstingl and committed by
Kevin Hilman
53773f2d 34217df2

+24 -2
+24 -2
drivers/soc/amlogic/meson-ee-pwrc.c
··· 16 16 #include <linux/clk.h> 17 17 #include <dt-bindings/power/meson8-power.h> 18 18 #include <dt-bindings/power/meson-g12a-power.h> 19 + #include <dt-bindings/power/meson-gxbb-power.h> 19 20 #include <dt-bindings/power/meson-sm1-power.h> 20 21 21 22 /* AO Offsets */ ··· 76 75 77 76 /* TOP Power Domains */ 78 77 79 - static struct meson_ee_pwrc_top_domain g12a_pwrc_vpu = { 78 + static struct meson_ee_pwrc_top_domain gx_pwrc_vpu = { 80 79 .sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0, 81 80 .sleep_mask = BIT(8), 82 81 .iso_reg = GX_AO_RTI_GEN_PWR_SLEEP0, ··· 138 137 VPU_MEMPD(HHI_VPU_MEM_PD_REG0), 139 138 VPU_MEMPD(HHI_VPU_MEM_PD_REG1), 140 139 VPU_MEMPD(HHI_VPU_MEM_PD_REG2), 140 + VPU_HHI_MEMPD(HHI_MEM_PD_REG0), 141 + }; 142 + 143 + static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = { 144 + VPU_MEMPD(HHI_VPU_MEM_PD_REG0), 145 + VPU_MEMPD(HHI_VPU_MEM_PD_REG1), 141 146 VPU_HHI_MEMPD(HHI_MEM_PD_REG0), 142 147 }; 143 148 ··· 232 225 static bool pwrc_ee_get_power(struct meson_ee_pwrc_domain *pwrc_domain); 233 226 234 227 static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = { 235 - [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &g12a_pwrc_vpu, g12a_pwrc_mem_vpu, 228 + [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu, 236 229 pwrc_ee_get_power, 11, 2), 237 230 [PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth), 231 + }; 232 + 233 + static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = { 234 + [PWRC_GXBB_VPU_ID] = VPU_PD("VPU", &gx_pwrc_vpu, gxbb_pwrc_mem_vpu, 235 + pwrc_ee_get_power, 12, 2), 236 + [PWRC_GXBB_ETHERNET_MEM_ID] = MEM_PD("ETH", meson_pwrc_mem_eth), 238 237 }; 239 238 240 239 static struct meson_ee_pwrc_domain_desc meson8_pwrc_domains[] = { ··· 529 516 .domains = g12a_pwrc_domains, 530 517 }; 531 518 519 + static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = { 520 + .count = ARRAY_SIZE(gxbb_pwrc_domains), 521 + .domains = gxbb_pwrc_domains, 522 + }; 523 + 532 524 static struct meson_ee_pwrc_domain_data meson_ee_m8_pwrc_data = { 533 525 .count = ARRAY_SIZE(meson8_pwrc_domains), 534 526 .domains = meson8_pwrc_domains, ··· 561 543 { 562 544 .compatible = "amlogic,meson8m2-pwrc", 563 545 .data = &meson_ee_m8b_pwrc_data, 546 + }, 547 + { 548 + .compatible = "amlogic,meson-gxbb-pwrc", 549 + .data = &meson_ee_gxbb_pwrc_data, 564 550 }, 565 551 { 566 552 .compatible = "amlogic,meson-g12a-pwrc",