tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm64: Floating point and SIMD
This patch adds support for FP/ASIMD register bank saving and restoring
during context switch and FP exception handling to generate SIGFPE.
There are 32 128-bit registers and the context switching is currently
done non-lazily. Benchmarks on real hardware are required before
implementing lazy FP state saving/restoring.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
+250
+64
arch/arm64/include/asm/fpsimd.h
+64
arch/arm64/include/asm/fpsimd.h
···
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/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_FP_H
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#define __ASM_FP_H
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#include <asm/ptrace.h>
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#ifndef __ASSEMBLY__
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/*
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* FP/SIMD storage area has:
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* - FPSR and FPCR
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* - 32 128-bit data registers
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*
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* Note that user_fp forms a prefix of this structure, which is relied
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* upon in the ptrace FP/SIMD accessors. struct user_fpsimd_state must
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* form a prefix of struct fpsimd_state.
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*/
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struct fpsimd_state {
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union {
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struct user_fpsimd_state user_fpsimd;
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struct {
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__uint128_t vregs[32];
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u32 fpsr;
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u32 fpcr;
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};
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};
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};
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#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
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/* Masks for extracting the FPSR and FPCR from the FPSCR */
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#define VFP_FPSCR_STAT_MASK 0xf800009f
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#define VFP_FPSCR_CTRL_MASK 0x07f79f00
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/*
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* The VFP state has 32x64-bit registers and a single 32-bit
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* control/status register.
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*/
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#define VFP_STATE_SIZE ((32 * 8) + 4)
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#endif
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struct task_struct;
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extern void fpsimd_save_state(struct fpsimd_state *state);
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extern void fpsimd_load_state(struct fpsimd_state *state);
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extern void fpsimd_thread_switch(struct task_struct *next);
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extern void fpsimd_flush_thread(void);
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#endif
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#endif
+80
arch/arm64/kernel/entry-fpsimd.S
+80
arch/arm64/kernel/entry-fpsimd.S
···
1
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/*
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* FP/SIMD state saving and restoring
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
8
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* it under the terms of the GNU General Public License version 2 as
9
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
12
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
13
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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/*
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* Save the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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ENTRY(fpsimd_save_state)
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stp q0, q1, [x0, #16 * 0]
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stp q2, q3, [x0, #16 * 2]
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stp q4, q5, [x0, #16 * 4]
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stp q6, q7, [x0, #16 * 6]
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stp q8, q9, [x0, #16 * 8]
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stp q10, q11, [x0, #16 * 10]
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stp q12, q13, [x0, #16 * 12]
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stp q14, q15, [x0, #16 * 14]
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stp q16, q17, [x0, #16 * 16]
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stp q18, q19, [x0, #16 * 18]
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stp q20, q21, [x0, #16 * 20]
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stp q22, q23, [x0, #16 * 22]
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stp q24, q25, [x0, #16 * 24]
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stp q26, q27, [x0, #16 * 26]
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stp q28, q29, [x0, #16 * 28]
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stp q30, q31, [x0, #16 * 30]!
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mrs x8, fpsr
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str w8, [x0, #16 * 2]
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mrs x8, fpcr
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str w8, [x0, #16 * 2 + 4]
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ret
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ENDPROC(fpsimd_save_state)
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/*
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* Load the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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ENTRY(fpsimd_load_state)
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ldp q0, q1, [x0, #16 * 0]
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ldp q2, q3, [x0, #16 * 2]
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ldp q4, q5, [x0, #16 * 4]
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ldp q6, q7, [x0, #16 * 6]
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ldp q8, q9, [x0, #16 * 8]
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ldp q10, q11, [x0, #16 * 10]
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ldp q12, q13, [x0, #16 * 12]
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ldp q14, q15, [x0, #16 * 14]
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ldp q16, q17, [x0, #16 * 16]
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ldp q18, q19, [x0, #16 * 18]
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ldp q20, q21, [x0, #16 * 20]
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ldp q22, q23, [x0, #16 * 22]
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ldp q24, q25, [x0, #16 * 24]
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ldp q26, q27, [x0, #16 * 26]
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ldp q28, q29, [x0, #16 * 28]
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ldp q30, q31, [x0, #16 * 30]!
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ldr w8, [x0, #16 * 2]
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ldr w9, [x0, #16 * 2 + 4]
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msr fpsr, x8
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msr fpcr, x9
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ret
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ENDPROC(fpsimd_load_state)
+106
arch/arm64/kernel/fpsimd.c
+106
arch/arm64/kernel/fpsimd.c
···
1
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/*
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* FP/SIMD context switching and fault handling
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
9
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* published by the Free Software Foundation.
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*
11
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* This program is distributed in the hope that it will be useful,
12
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
13
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14
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* GNU General Public License for more details.
15
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*
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* You should have received a copy of the GNU General Public License
17
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/signal.h>
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#include <asm/fpsimd.h>
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#include <asm/cputype.h>
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#define FPEXC_IOF (1 << 0)
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#define FPEXC_DZF (1 << 1)
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#define FPEXC_OFF (1 << 2)
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#define FPEXC_UFF (1 << 3)
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#define FPEXC_IXF (1 << 4)
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#define FPEXC_IDF (1 << 7)
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/*
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* Trapped FP/ASIMD access.
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*/
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void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs)
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{
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/* TODO: implement lazy context saving/restoring */
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WARN_ON(1);
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}
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/*
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* Raise a SIGFPE for the current process.
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*/
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void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs)
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{
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siginfo_t info;
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unsigned int si_code = 0;
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+
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if (esr & FPEXC_IOF)
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si_code = FPE_FLTINV;
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else if (esr & FPEXC_DZF)
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si_code = FPE_FLTDIV;
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else if (esr & FPEXC_OFF)
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si_code = FPE_FLTOVF;
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else if (esr & FPEXC_UFF)
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si_code = FPE_FLTUND;
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else if (esr & FPEXC_IXF)
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si_code = FPE_FLTRES;
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memset(&info, 0, sizeof(info));
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info.si_signo = SIGFPE;
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info.si_code = si_code;
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info.si_addr = (void __user *)instruction_pointer(regs);
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send_sig_info(SIGFPE, &info, current);
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}
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void fpsimd_thread_switch(struct task_struct *next)
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{
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/* check if not kernel threads */
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if (current->mm)
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fpsimd_save_state(¤t->thread.fpsimd_state);
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if (next->mm)
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fpsimd_load_state(&next->thread.fpsimd_state);
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}
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void fpsimd_flush_thread(void)
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{
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memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state));
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fpsimd_load_state(¤t->thread.fpsimd_state);
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}
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/*
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* FP/SIMD support code initialisation.
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*/
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static int __init fpsimd_init(void)
90
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{
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u64 pfr = read_cpuid(ID_AA64PFR0_EL1);
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+
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if (pfr & (0xf << 16)) {
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pr_notice("Floating-point is not implemented\n");
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return 0;
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}
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elf_hwcap |= HWCAP_FP;
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+
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if (pfr & (0xf << 20))
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pr_notice("Advanced SIMD is not implemented\n");
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else
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elf_hwcap |= HWCAP_ASIMD;
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return 0;
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}
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late_initcall(fpsimd_init);