tjh.dev / kernel
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staging: vt6655: Rename MACvRegBitsOff

Fix name of a macro that uses CamelCase which is not
accepted by checkpatch.pl

Signed-off-by: Philipp Hortmann <philipp.g.hortmann@gmail.com>
Link: https://lore.kernel.org/r/e6bea6707f20a53d0631dd1f477ce72d36cd6f3e.1657657918.git.philipp.g.hortmann@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Philipp Hortmann and committed by
Greg Kroah-Hartman 5327d71d ee67fe63

+22 -22
+1 -1
drivers/staging/vt6655/card.c
··· 367 367 break; 368 368 } 369 369 370 - MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON); 370 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON); 371 371 372 372 bb_set_deep_sleep(priv, priv->local_id); 373 373
+12 -12
drivers/staging/vt6655/device_main.c
··· 1322 1322 case NL80211_IFTYPE_STATION: 1323 1323 break; 1324 1324 case NL80211_IFTYPE_ADHOC: 1325 - MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST); 1325 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_RCR, RCR_UNICAST); 1326 1326 1327 1327 vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1328 1328 1329 1329 break; 1330 1330 case NL80211_IFTYPE_AP: 1331 - MACvRegBitsOff(priv->port_offset, MAC_REG_RCR, RCR_UNICAST); 1331 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_RCR, RCR_UNICAST); 1332 1332 1333 1333 vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP); 1334 1334 ··· 1351 1351 case NL80211_IFTYPE_STATION: 1352 1352 break; 1353 1353 case NL80211_IFTYPE_ADHOC: 1354 - MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX); 1355 - MACvRegBitsOff(priv->port_offset, 1356 - MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1357 - MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1354 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX); 1355 + vt6655_mac_reg_bits_off(priv->port_offset, 1356 + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1357 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_ADHOC); 1358 1358 break; 1359 1359 case NL80211_IFTYPE_AP: 1360 - MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX); 1361 - MACvRegBitsOff(priv->port_offset, 1362 - MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1363 - MACvRegBitsOff(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP); 1360 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX); 1361 + vt6655_mac_reg_bits_off(priv->port_offset, 1362 + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); 1363 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_AP); 1364 1364 break; 1365 1365 default: 1366 1366 break; ··· 1478 1478 1479 1479 vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TCR, TCR_AUTOBCNTX); 1480 1480 } else { 1481 - MACvRegBitsOff(priv->port_offset, MAC_REG_TCR, 1482 - TCR_AUTOBCNTX); 1481 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TCR, 1482 + TCR_AUTOBCNTX); 1483 1483 } 1484 1484 } 1485 1485
+5 -5
drivers/staging/vt6655/mac.c
··· 337 337 } 338 338 339 339 /* try to safe shutdown RX */ 340 - MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_RXON); 340 + vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_RXON); 341 341 /* W_MAX_TIMEOUT is the timeout period */ 342 342 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { 343 343 if (!(ioread8(io_base + MAC_REG_HOSTCR) & HOSTCR_RXONST)) ··· 392 392 } 393 393 394 394 /* try to safe shutdown TX */ 395 - MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_TXON); 395 + vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_TXON); 396 396 397 397 /* W_MAX_TIMEOUT is the timeout period */ 398 398 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { ··· 423 423 { 424 424 void __iomem *io_base = priv->port_offset; 425 425 426 - MACvRegBitsOff(io_base, MAC_REG_TCR, TCR_AUTOBCNTX); 426 + vt6655_mac_reg_bits_off(io_base, MAC_REG_TCR, TCR_AUTOBCNTX); 427 427 428 428 if (!MACbSafeRxOff(priv)) { 429 429 pr_debug(" MACbSafeRxOff == false)\n"); ··· 436 436 return false; 437 437 } 438 438 439 - MACvRegBitsOff(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN); 439 + vt6655_mac_reg_bits_off(io_base, MAC_REG_HOSTCR, HOSTCR_MACEN); 440 440 441 441 return true; 442 442 } ··· 730 730 return true; 731 731 732 732 /* Disable PS */ 733 - MACvRegBitsOff(io_base, MAC_REG_PSCTL, PSCTL_PSEN); 733 + vt6655_mac_reg_bits_off(io_base, MAC_REG_PSCTL, PSCTL_PSEN); 734 734 735 735 /* Check if SyncFlushOK */ 736 736 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
+1 -1
drivers/staging/vt6655/mac.h
··· 551 551 iowrite16(reg_value | (bit_mask), iobase + reg_offset); \ 552 552 } while (0) 553 553 554 - #define MACvRegBitsOff(iobase, reg_offset, bit_mask) \ 554 + #define vt6655_mac_reg_bits_off(iobase, reg_offset, bit_mask) \ 555 555 do { \ 556 556 unsigned char reg_value; \ 557 557 reg_value = ioread8(iobase + reg_offset); \
+3 -3
drivers/staging/vt6655/power.c
··· 66 66 67 67 if (wListenInterval >= 2) { 68 68 /* clear always listen beacon */ 69 - MACvRegBitsOff(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN); 69 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN); 70 70 /* first time set listen next beacon */ 71 71 vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_LNBCN); 72 72 } else { ··· 98 98 MACbPSWakeup(priv); 99 99 100 100 /* clear AutoSleep */ 101 - MACvRegBitsOff(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP); 101 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_PSCFG, PSCFG_AUTOSLEEP); 102 102 103 103 /* clear HWUTSF */ 104 - MACvRegBitsOff(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF); 104 + vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_HWUTSF); 105 105 106 106 /* set always listen beacon */ 107 107 vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_PSCTL, PSCTL_ALBCN);