Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm

Pull late ARM updates from Russell King:
"Here is the late set of ARM updates for this merge window; in here is:

- The ARM parts of the broadcast timer support, core parts merged
through tglx's tree. This was left over from the previous merge to
allow the dependency on tglx's tree to be resolved.

- A fix to the VFP code which shows up on Raspberry Pi's, as well as
fixing the fallout from a previous commit in this area.

- A number of smaller fixes scattered throughout the ARM tree"

* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm:
ARM: Fix broken commit 0cc41e4a21d43 corrupting kernel messages
ARM: fix scheduling while atomic warning in alignment handling code
ARM: VFP: fix emulation of second VFP instruction
ARM: 7656/1: uImage: Error out on build of multiplatform without LOADADDR
ARM: 7640/1: memory: tegra_ahb_enable_smmu() depends on TEGRA_IOMMU_SMMU
ARM: 7654/1: Preserve L_PTE_VALID in pte_modify()
ARM: 7653/2: do not scale loops_per_jiffy when using a constant delay clock
ARM: 7651/1: remove unused smp_timer_broadcast #define

+36 -29
+2 -2
arch/arm/boot/Makefile
··· 68 endif 69 70 check_for_multiple_loadaddr = \ 71 - if [ $(words $(UIMAGE_LOADADDR)) -gt 1 ]; then \ 72 - echo 'multiple load addresses: $(UIMAGE_LOADADDR)'; \ 73 echo 'This is incompatible with uImages'; \ 74 echo 'Specify LOADADDR on the commandline to build an uImage'; \ 75 false; \
··· 68 endif 69 70 check_for_multiple_loadaddr = \ 71 + if [ $(words $(UIMAGE_LOADADDR)) -ne 1 ]; then \ 72 + echo 'multiple (or no) load addresses: $(UIMAGE_LOADADDR)'; \ 73 echo 'This is incompatible with uImages'; \ 74 echo 'Specify LOADADDR on the commandline to build an uImage'; \ 75 false; \
+1
arch/arm/include/asm/delay.h
··· 24 void (*delay)(unsigned long); 25 void (*const_udelay)(unsigned long); 26 void (*udelay)(unsigned long); 27 } arm_delay_ops; 28 29 #define __delay(n) arm_delay_ops.delay(n)
··· 24 void (*delay)(unsigned long); 25 void (*const_udelay)(unsigned long); 26 void (*udelay)(unsigned long); 27 + bool const_clock; 28 } arm_delay_ops; 29 30 #define __delay(n) arm_delay_ops.delay(n)
+2 -1
arch/arm/include/asm/pgtable.h
··· 247 248 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 249 { 250 - const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER | L_PTE_NONE; 251 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 252 return pte; 253 }
··· 247 248 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 249 { 250 + const pteval_t mask = L_PTE_XN | L_PTE_RDONLY | L_PTE_USER | 251 + L_PTE_NONE | L_PTE_VALID; 252 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 253 return pte; 254 }
+3 -2
arch/arm/kernel/smp.c
··· 466 { 467 smp_cross_call(mask, IPI_TIMER); 468 } 469 - #else 470 - #define smp_timer_broadcast NULL 471 #endif 472 473 static void broadcast_timer_set_mode(enum clock_event_mode mode, ··· 670 int cpu = freq->cpu; 671 672 if (freq->flags & CPUFREQ_CONST_LOOPS) 673 return NOTIFY_OK; 674 675 if (!per_cpu(l_p_j_ref, cpu)) {
··· 466 { 467 smp_cross_call(mask, IPI_TIMER); 468 } 469 #endif 470 471 static void broadcast_timer_set_mode(enum clock_event_mode mode, ··· 672 int cpu = freq->cpu; 673 674 if (freq->flags & CPUFREQ_CONST_LOOPS) 675 + return NOTIFY_OK; 676 + 677 + if (arm_delay_ops.const_clock) 678 return NOTIFY_OK; 679 680 if (!per_cpu(l_p_j_ref, cpu)) {
+1
arch/arm/lib/delay.c
··· 77 arm_delay_ops.delay = __timer_delay; 78 arm_delay_ops.const_udelay = __timer_const_udelay; 79 arm_delay_ops.udelay = __timer_udelay; 80 delay_calibrated = true; 81 } else { 82 pr_info("Ignoring duplicate/late registration of read_current_timer delay\n");
··· 77 arm_delay_ops.delay = __timer_delay; 78 arm_delay_ops.const_udelay = __timer_const_udelay; 79 arm_delay_ops.udelay = __timer_udelay; 80 + arm_delay_ops.const_clock = true; 81 delay_calibrated = true; 82 } else { 83 pr_info("Ignoring duplicate/late registration of read_current_timer delay\n");
+4 -7
arch/arm/mm/alignment.c
··· 749 unsigned long instr = 0, instrptr; 750 int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); 751 unsigned int type; 752 - mm_segment_t fs; 753 unsigned int fault; 754 u16 tinstr = 0; 755 int isize = 4; ··· 759 760 instrptr = instruction_pointer(regs); 761 762 - fs = get_fs(); 763 - set_fs(KERNEL_DS); 764 if (thumb_mode(regs)) { 765 - fault = __get_user(tinstr, (u16 *)(instrptr & ~1)); 766 if (!fault) { 767 if (cpu_architecture() >= CPU_ARCH_ARMv7 && 768 IS_T32(tinstr)) { 769 /* Thumb-2 32-bit */ 770 u16 tinst2 = 0; 771 - fault = __get_user(tinst2, (u16 *)(instrptr+2)); 772 instr = (tinstr << 16) | tinst2; 773 thumb2_32b = 1; 774 } else { ··· 776 } 777 } 778 } else 779 - fault = __get_user(instr, (u32 *)instrptr); 780 - set_fs(fs); 781 782 if (fault) { 783 type = TYPE_FAULT;
··· 749 unsigned long instr = 0, instrptr; 750 int (*handler)(unsigned long addr, unsigned long instr, struct pt_regs *regs); 751 unsigned int type; 752 unsigned int fault; 753 u16 tinstr = 0; 754 int isize = 4; ··· 760 761 instrptr = instruction_pointer(regs); 762 763 if (thumb_mode(regs)) { 764 + u16 *ptr = (u16 *)(instrptr & ~1); 765 + fault = probe_kernel_address(ptr, tinstr); 766 if (!fault) { 767 if (cpu_architecture() >= CPU_ARCH_ARMv7 && 768 IS_T32(tinstr)) { 769 /* Thumb-2 32-bit */ 770 u16 tinst2 = 0; 771 + fault = probe_kernel_address(ptr + 1, tinst2); 772 instr = (tinstr << 16) | tinst2; 773 thumb2_32b = 1; 774 } else { ··· 778 } 779 } 780 } else 781 + fault = probe_kernel_address(instrptr, instr); 782 783 if (fault) { 784 type = TYPE_FAULT;
+21 -15
arch/arm/vfp/vfphw.S
··· 22 .macro DBGSTR, str 23 #ifdef DEBUG 24 stmfd sp!, {r0-r3, ip, lr} 25 - add r0, pc, #4 26 bl printk 27 - b 1f 28 - .asciz KERN_DEBUG "VFP: \str\n" 29 - .balign 4 30 - 1: ldmfd sp!, {r0-r3, ip, lr} 31 #endif 32 .endm 33 ··· 37 #ifdef DEBUG 38 stmfd sp!, {r0-r3, ip, lr} 39 mov r1, \arg 40 - add r0, pc, #4 41 bl printk 42 - b 1f 43 - .asciz KERN_DEBUG "VFP: \str\n" 44 - .balign 4 45 - 1: ldmfd sp!, {r0-r3, ip, lr} 46 #endif 47 .endm 48 ··· 54 mov r3, \arg3 55 mov r2, \arg2 56 mov r1, \arg1 57 - add r0, pc, #4 58 bl printk 59 - b 1f 60 - .asciz KERN_DEBUG "VFP: \str\n" 61 - .balign 4 62 - 1: ldmfd sp!, {r0-r3, ip, lr} 63 #endif 64 .endm 65
··· 22 .macro DBGSTR, str 23 #ifdef DEBUG 24 stmfd sp!, {r0-r3, ip, lr} 25 + ldr r0, =1f 26 bl printk 27 + ldmfd sp!, {r0-r3, ip, lr} 28 + 29 + .pushsection .rodata, "a" 30 + 1: .ascii KERN_DEBUG "VFP: \str\n" 31 + .byte 0 32 + .previous 33 #endif 34 .endm 35 ··· 35 #ifdef DEBUG 36 stmfd sp!, {r0-r3, ip, lr} 37 mov r1, \arg 38 + ldr r0, =1f 39 bl printk 40 + ldmfd sp!, {r0-r3, ip, lr} 41 + 42 + .pushsection .rodata, "a" 43 + 1: .ascii KERN_DEBUG "VFP: \str\n" 44 + .byte 0 45 + .previous 46 #endif 47 .endm 48 ··· 50 mov r3, \arg3 51 mov r2, \arg2 52 mov r1, \arg1 53 + ldr r0, =1f 54 bl printk 55 + ldmfd sp!, {r0-r3, ip, lr} 56 + 57 + .pushsection .rodata, "a" 58 + 1: .ascii KERN_DEBUG "VFP: \str\n" 59 + .byte 0 60 + .previous 61 #endif 62 .endm 63
+1 -1
arch/arm/vfp/vfpmodule.c
··· 413 * If there isn't a second FP instruction, exit now. Note that 414 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. 415 */ 416 - if (fpexc ^ (FPEXC_EX | FPEXC_FP2V)) 417 goto exit; 418 419 /*
··· 413 * If there isn't a second FP instruction, exit now. Note that 414 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. 415 */ 416 + if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V)) 417 goto exit; 418 419 /*
+1 -1
drivers/amba/tegra-ahb.c
··· 130 writel(value, ahb->regs + offset); 131 } 132 133 - #ifdef CONFIG_ARCH_TEGRA_3x_SOC 134 static int tegra_ahb_match_by_smmu(struct device *dev, void *data) 135 { 136 struct tegra_ahb *ahb = dev_get_drvdata(dev);
··· 130 writel(value, ahb->regs + offset); 131 } 132 133 + #ifdef CONFIG_TEGRA_IOMMU_SMMU 134 static int tegra_ahb_match_by_smmu(struct device *dev, void *data) 135 { 136 struct tegra_ahb *ahb = dev_get_drvdata(dev);