ARM: 9260/1: lib/xor: use r10 rather than r7 in xor_arm4regs_{2|3}

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

kbuild test robot reports:
In file included from crypto/xor.c:17:
./arch/arm/include/asm/xor.h:61:3: error: write to reserved register 'R7'
GET_BLOCK_4(p1);
^
./arch/arm/include/asm/xor.h:20:10: note: expanded from macro 'GET_BLOCK_4'
__asm__("ldmia %0, {%1, %2, %3, %4}"
^
./arch/arm/include/asm/xor.h:63:3: error: write to reserved register 'R7'
PUT_BLOCK_4(p1);
^
./arch/arm/include/asm/xor.h:42:23: note: expanded from macro 'PUT_BLOCK_4'
__asm__ __volatile__("stmia %0!, {%2, %3, %4, %5}"
^
./arch/arm/include/asm/xor.h:83:3: error: write to reserved register 'R7'
GET_BLOCK_4(p1);
^
./arch/arm/include/asm/xor.h:20:10: note: expanded from macro 'GET_BLOCK_4'
__asm__("ldmia %0, {%1, %2, %3, %4}"
^
./arch/arm/include/asm/xor.h:86:3: error: write to reserved register 'R7'
PUT_BLOCK_4(p1);
^
./arch/arm/include/asm/xor.h:42:23: note: expanded from macro 'PUT_BLOCK_4'
__asm__ __volatile__("stmia %0!, {%2, %3, %4, %5}"
^
Thumb2 uses r7 rather than r11 as the frame pointer. Let's use r10
rather than r7 for these temporaries.

Link: https://github.com/ClangBuiltLinux/linux/issues/1732
Link: https://lore.kernel.org/llvm/202210072120.V1O2SuKY-lkp@intel.com/

Reported-by: kernel test robot <lkp@intel.com>
Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

authored by

Nick Desaulniers and committed by

Russell King (Oracle) 3 years ago 527d0863 8fc0b333

+2 -2

1 changed file

expand all

arch

arm

include

asm

xor.h

+2 -2

arch/arm/include/asm/xor.h

··· 51 51 register unsigned int a1 __asm__("r4"); 52 52 register unsigned int a2 __asm__("r5"); 53 53 register unsigned int a3 __asm__("r6"); 54 - register unsigned int a4 __asm__("r7"); 54 + register unsigned int a4 __asm__("r10"); 55 55 register unsigned int b1 __asm__("r8"); 56 56 register unsigned int b2 __asm__("r9"); 57 57 register unsigned int b3 __asm__("ip"); ··· 73 73 register unsigned int a1 __asm__("r4"); 74 74 register unsigned int a2 __asm__("r5"); 75 75 register unsigned int a3 __asm__("r6"); 76 - register unsigned int a4 __asm__("r7"); 76 + register unsigned int a4 __asm__("r10"); 77 77 register unsigned int b1 __asm__("r8"); 78 78 register unsigned int b2 __asm__("r9"); 79 79 register unsigned int b3 __asm__("ip");