tjh.dev / kernel
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rpmh-regulators: Update rpmh-regulator driver and

Merge series from Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>:

This series contains patches to update rpmh-regulator driver and
dt-bindings for supporting the PMIC voltage regulators present on the
boards with Qualcomm's next gen compute SoC - Glymur.

Device tree changes aren't part of this series and will be posted
separately after the official announcement of the Glymur SoC.

Mark Brown 5263cd81 fb25114c

+812 -550
+38 -1
Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml
··· 51 51 For PM8450, smps1 - smps6, ldo1 - ldo4 52 52 For PM8550, smps1 - smps6, ldo1 - ldo17, bob1 - bob2 53 53 For PM8998, smps1 - smps13, ldo1 - ldo28, lvs1 - lvs2 54 + For PMH0101, ldo1 - ldo18, bob1 - bob2 55 + For PMH0104, smps1 - smps4 56 + For PMH0110, smps1 - smps10, ldo1 - ldo4 54 57 For PMI8998, bob 55 58 For PMC8380, smps1 - smps8, ldo1 - lodo3 59 + For PMCX0102, smps1 - smps10, ldo1 - ldo4 56 60 For PMR735A, smps1 - smps3, ldo1 - ldo7 57 61 For PMR735B, ldo1 - ldo12 58 62 For PMX55, smps1 - smps7, ldo1 - ldo16 ··· 89 85 - qcom,pmc8180-rpmh-regulators 90 86 - qcom,pmc8180c-rpmh-regulators 91 87 - qcom,pmc8380-rpmh-regulators 88 + - qcom,pmcx0102-rpmh-regulators 92 89 - qcom,pmg1110-rpmh-regulators 90 + - qcom,pmh0101-rpmh-regulators 91 + - qcom,pmh0104-rpmh-regulators 92 + - qcom,pmh0110-rpmh-regulators 93 93 - qcom,pmi8998-rpmh-regulators 94 94 - qcom,pmm8155au-rpmh-regulators 95 95 - qcom,pmm8654au-rpmh-regulators ··· 108 100 RPMh resource name suffix used for the regulators found 109 101 on this PMIC. 110 102 $ref: /schemas/types.yaml#/definitions/string 111 - enum: [a, b, c, d, e, f, g, h, i, j, k, l, m, n] 103 + pattern: "^[a-n]|[A-N]_E[0-3]+$" 112 104 113 105 qcom,always-wait-for-ack: 114 106 description: | ··· 254 246 compatible: 255 247 enum: 256 248 - qcom,pm8005-rpmh-regulators 249 + - qcom,pmh0104-rpmh-regulators 257 250 then: 258 251 patternProperties: 259 252 "^vdd-s[1-4]-supply$": true ··· 430 421 then: 431 422 properties: 432 423 vdd-s1-supply: true 424 + 425 + - if: 426 + properties: 427 + compatible: 428 + enum: 429 + - qcom,pmh0101-rpmh-regulators 430 + then: 431 + properties: 432 + vdd-l1-l4-l10-supply: true 433 + vdd-l2-l13-l14-supply: true 434 + vdd-l3-l11-supply: true 435 + vdd-l5-l16-supply: true 436 + vdd-l6-l7-supply: true 437 + vdd-l8-l9-supply: true 438 + patternProperties: 439 + "^vdd-l(1[2578])-supply$": true 440 + "^vdd-bob[1-2]-supply$": true 441 + 442 + - if: 443 + properties: 444 + compatible: 445 + enum: 446 + - qcom,pmcx0102-rpmh-regulators 447 + - qcom,pmh0110-rpmh-regulators 448 + then: 449 + patternProperties: 450 + "^vdd-l[1-4]-supply$": true 451 + "^vdd-s([1-9]|10)-supply$": true 433 452 434 453 - if: 435 454 properties:
+774 -549
drivers/regulator/qcom-rpmh-regulator.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 // Copyright (c) 2018-2021, The Linux Foundation. All rights reserved. 3 - // Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 + // Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 4 5 5 #define pr_fmt(fmt) "%s: " fmt, __func__ 6 6 ··· 30 30 enum rpmh_regulator_type { 31 31 VRM, 32 32 XOB, 33 + }; 34 + 35 + /** 36 + * enum regulator_hw_type - supported regulator types 37 + * @SMPS: Switch mode power supply. 38 + * @LDO: Linear Dropout regulator. 39 + * @BOB: Buck/Boost type regulator. 40 + * @VS: Simple voltage ON/OFF switch. 41 + * @NUM_REGULATOR_TYPES: Number of regulator types. 42 + */ 43 + enum regulator_hw_type { 44 + SMPS, 45 + LDO, 46 + BOB, 47 + VS, 48 + NUM_REGULATOR_TYPES, 49 + }; 50 + 51 + struct resource_name_formats { 52 + const char *rsc_name_fmt; 53 + const char *rsc_name_fmt1; 54 + }; 55 + 56 + static const struct resource_name_formats vreg_rsc_name_lookup[NUM_REGULATOR_TYPES] = { 57 + [SMPS] = {"S%d%s", "smp%s%d"}, 58 + [LDO] = {"L%d%s", "ldo%s%d"}, 59 + [BOB] = {"B%d%s", "bob%s%d"}, 60 + [VS] = {"VS%d%s", "vs%s%d"}, 33 61 }; 34 62 35 63 #define RPMH_REGULATOR_REG_VRM_VOLTAGE 0x0 ··· 92 64 #define PMIC5_BOB_MODE_AUTO 6 93 65 #define PMIC5_BOB_MODE_PWM 7 94 66 67 + #define PMIC530_LDO_MODE_RETENTION 3 68 + #define PMIC530_LDO_MODE_LPM 4 69 + #define PMIC530_LDO_MODE_OPM 5 70 + #define PMIC530_LDO_MODE_HPM 7 71 + 72 + #define PMIC_ID_LEN 4 95 73 /** 96 74 * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations 97 75 * @regulator_type: RPMh accelerator type used to manage this ··· 170 136 * struct rpmh_vreg_init_data - initialization data for an RPMh regulator 171 137 * @name: Name for the regulator which also corresponds 172 138 * to the device tree subnode name of the regulator 173 - * @resource_name: RPMh regulator resource name format string. 174 - * This must include exactly one field: '%s' which 175 - * is filled at run-time with the PMIC ID provided 176 - * by device tree property qcom,pmic-id. Example: 177 - * "ldo%s1" for RPMh resource "ldoa1". 139 + * @index: This is the index number of the regulator present 140 + * on the PMIC. 141 + * @vreg_hw_type: Regulator HW type enum, this must be BOB, SMPS, 142 + * LDO, VS, based on the regulator HW type. 178 143 * @supply_name: Parent supply regulator name 179 144 * @hw_data: Configuration data for this PMIC regulator type 180 145 */ 181 146 struct rpmh_vreg_init_data { 182 147 const char *name; 183 - const char *resource_name; 148 + enum regulator_hw_type vreg_hw_type; 149 + int index; 184 150 const char *supply_name; 185 151 const struct rpmh_vreg_hw_data *hw_data; 186 152 }; ··· 451 417 { 452 418 struct regulator_config reg_config = {}; 453 419 char rpmh_resource_name[20] = ""; 420 + const char *rsc_name; 454 421 const struct rpmh_vreg_init_data *rpmh_data; 455 422 struct regulator_init_data *init_data; 456 423 struct regulator_dev *rdev; ··· 468 433 return -EINVAL; 469 434 } 470 435 471 - scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name), 472 - rpmh_data->resource_name, pmic_id); 436 + if (strnlen(pmic_id, PMIC_ID_LEN) > 1 && strnstr(pmic_id, "_E", PMIC_ID_LEN)) { 437 + rsc_name = vreg_rsc_name_lookup[rpmh_data->vreg_hw_type].rsc_name_fmt; 438 + scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name), 439 + rsc_name, rpmh_data->index, pmic_id); 440 + 441 + } else { 442 + rsc_name = vreg_rsc_name_lookup[rpmh_data->vreg_hw_type].rsc_name_fmt1; 443 + scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name), 444 + rsc_name, pmic_id, rpmh_data->index); 445 + } 473 446 474 447 vreg->addr = cmd_db_read_addr(rpmh_resource_name); 475 448 if (!vreg->addr) { ··· 562 519 [REGULATOR_MODE_FAST] = -EINVAL, 563 520 }; 564 521 522 + static const int pmic_mode_map_pmic530_ldo[REGULATOR_MODE_STANDBY + 1] = { 523 + [REGULATOR_MODE_INVALID] = -EINVAL, 524 + [REGULATOR_MODE_STANDBY] = PMIC530_LDO_MODE_RETENTION, 525 + [REGULATOR_MODE_IDLE] = PMIC530_LDO_MODE_LPM, 526 + [REGULATOR_MODE_NORMAL] = PMIC530_LDO_MODE_OPM, 527 + [REGULATOR_MODE_FAST] = PMIC530_LDO_MODE_HPM, 528 + }; 529 + 565 530 static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode) 566 531 { 567 532 unsigned int mode; ··· 589 538 break; 590 539 } 591 540 541 + return mode; 542 + } 543 + 544 + static unsigned int rpmh_regulator_pmic530_ldo_of_map_mode(unsigned int rpmh_mode) 545 + { 546 + unsigned int mode; 547 + 548 + switch (rpmh_mode) { 549 + case RPMH_REGULATOR_MODE_HPM: 550 + mode = REGULATOR_MODE_FAST; 551 + break; 552 + case RPMH_REGULATOR_MODE_AUTO: 553 + mode = REGULATOR_MODE_NORMAL; 554 + break; 555 + case RPMH_REGULATOR_MODE_LPM: 556 + mode = REGULATOR_MODE_IDLE; 557 + break; 558 + case RPMH_REGULATOR_MODE_RET: 559 + mode = REGULATOR_MODE_STANDBY; 560 + break; 561 + default: 562 + mode = REGULATOR_MODE_INVALID; 563 + break; 564 + } 592 565 return mode; 593 566 } 594 567 ··· 979 904 .of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode, 980 905 }; 981 906 982 - #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \ 907 + static const struct rpmh_vreg_hw_data pmic5_nldo530 = { 908 + .regulator_type = VRM, 909 + .ops = &rpmh_regulator_vrm_drms_ops, 910 + .voltage_ranges = (struct linear_range[]) { 911 + REGULATOR_LINEAR_RANGE(320000, 0, 210, 8000), 912 + }, 913 + .n_linear_ranges = 1, 914 + .n_voltages = 211, 915 + .hpm_min_load_uA = 30000, 916 + .pmic_mode_map = pmic_mode_map_pmic530_ldo, 917 + .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode, 918 + }; 919 + 920 + static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp150 = { 921 + .regulator_type = VRM, 922 + .ops = &rpmh_regulator_vrm_drms_ops, 923 + .voltage_ranges = (struct linear_range[]) { 924 + REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), 925 + }, 926 + .n_linear_ranges = 1, 927 + .n_voltages = 256, 928 + .hpm_min_load_uA = 10000, 929 + .pmic_mode_map = pmic_mode_map_pmic530_ldo, 930 + .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode, 931 + }; 932 + 933 + static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp300 = { 934 + .regulator_type = VRM, 935 + .ops = &rpmh_regulator_vrm_drms_ops, 936 + .voltage_ranges = (struct linear_range[]) { 937 + REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), 938 + }, 939 + .n_linear_ranges = 1, 940 + .n_voltages = 256, 941 + .hpm_min_load_uA = 20000, 942 + .pmic_mode_map = pmic_mode_map_pmic530_ldo, 943 + .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode, 944 + }; 945 + 946 + static const struct rpmh_vreg_hw_data pmic5_pldo530_mvp600 = { 947 + .regulator_type = VRM, 948 + .ops = &rpmh_regulator_vrm_drms_ops, 949 + .voltage_ranges = (struct linear_range[]) { 950 + REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), 951 + }, 952 + .n_linear_ranges = 1, 953 + .n_voltages = 256, 954 + .hpm_min_load_uA = 40000, 955 + .pmic_mode_map = pmic_mode_map_pmic530_ldo, 956 + .of_map_mode = rpmh_regulator_pmic530_ldo_of_map_mode, 957 + }; 958 + 959 + static const struct rpmh_vreg_hw_data pmic5_ftsmps530 = { 960 + .regulator_type = VRM, 961 + .ops = &rpmh_regulator_vrm_ops, 962 + .voltage_ranges = (struct linear_range[]) { 963 + REGULATOR_LINEAR_RANGE(252000, 0, 305, 4000), 964 + REGULATOR_LINEAR_RANGE(1480000, 306, 464, 8000), 965 + }, 966 + .n_linear_ranges = 2, 967 + .n_voltages = 465, 968 + .pmic_mode_map = pmic_mode_map_pmic5_smps, 969 + .of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode, 970 + }; 971 + 972 + #define RPMH_VREG(_name, _vreg_hw_type, _index, _hw_data, _supply_name) \ 983 973 { \ 984 974 .name = _name, \ 985 - .resource_name = _resource_name, \ 975 + .vreg_hw_type = _vreg_hw_type, \ 976 + .index = _index, \ 986 977 .hw_data = _hw_data, \ 987 978 .supply_name = _supply_name, \ 988 979 } 989 980 990 981 static const struct rpmh_vreg_init_data pm8998_vreg_data[] = { 991 - RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 992 - RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 993 - RPMH_VREG("smps3", "smp%s3", &pmic4_hfsmps3, "vdd-s3"), 994 - RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"), 995 - RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"), 996 - RPMH_VREG("smps6", "smp%s6", &pmic4_ftsmps426, "vdd-s6"), 997 - RPMH_VREG("smps7", "smp%s7", &pmic4_ftsmps426, "vdd-s7"), 998 - RPMH_VREG("smps8", "smp%s8", &pmic4_ftsmps426, "vdd-s8"), 999 - RPMH_VREG("smps9", "smp%s9", &pmic4_ftsmps426, "vdd-s9"), 1000 - RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"), 1001 - RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"), 1002 - RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"), 1003 - RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"), 1004 - RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l27"), 1005 - RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l8-l17"), 1006 - RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l3-l11"), 1007 - RPMH_VREG("ldo4", "ldo%s4", &pmic4_nldo, "vdd-l4-l5"), 1008 - RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l4-l5"), 1009 - RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l6"), 1010 - RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 1011 - RPMH_VREG("ldo8", "ldo%s8", &pmic4_nldo, "vdd-l2-l8-l17"), 1012 - RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo, "vdd-l9"), 1013 - RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo, "vdd-l10-l23-l25"), 1014 - RPMH_VREG("ldo11", "ldo%s11", &pmic4_nldo, "vdd-l3-l11"), 1015 - RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 1016 - RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo, "vdd-l13-l19-l21"), 1017 - RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 1018 - RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 1019 - RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l16-l28"), 1020 - RPMH_VREG("ldo17", "ldo%s17", &pmic4_nldo, "vdd-l2-l8-l17"), 1021 - RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l18-l22"), 1022 - RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l13-l19-l21"), 1023 - RPMH_VREG("ldo20", "ldo%s20", &pmic4_pldo, "vdd-l20-l24"), 1024 - RPMH_VREG("ldo21", "ldo%s21", &pmic4_pldo, "vdd-l13-l19-l21"), 1025 - RPMH_VREG("ldo22", "ldo%s22", &pmic4_pldo, "vdd-l18-l22"), 1026 - RPMH_VREG("ldo23", "ldo%s23", &pmic4_pldo, "vdd-l10-l23-l25"), 1027 - RPMH_VREG("ldo24", "ldo%s24", &pmic4_pldo, "vdd-l20-l24"), 1028 - RPMH_VREG("ldo25", "ldo%s25", &pmic4_pldo, "vdd-l10-l23-l25"), 1029 - RPMH_VREG("ldo26", "ldo%s26", &pmic4_nldo, "vdd-l26"), 1030 - RPMH_VREG("ldo27", "ldo%s27", &pmic4_nldo, "vdd-l1-l27"), 1031 - RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"), 1032 - RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"), 1033 - RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"), 982 + RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"), 983 + RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"), 984 + RPMH_VREG("smps3", SMPS, 3, &pmic4_hfsmps3, "vdd-s3"), 985 + RPMH_VREG("smps4", SMPS, 4, &pmic4_hfsmps3, "vdd-s4"), 986 + RPMH_VREG("smps5", SMPS, 5, &pmic4_hfsmps3, "vdd-s5"), 987 + RPMH_VREG("smps6", SMPS, 6, &pmic4_ftsmps426, "vdd-s6"), 988 + RPMH_VREG("smps7", SMPS, 7, &pmic4_ftsmps426, "vdd-s7"), 989 + RPMH_VREG("smps8", SMPS, 8, &pmic4_ftsmps426, "vdd-s8"), 990 + RPMH_VREG("smps9", SMPS, 9, &pmic4_ftsmps426, "vdd-s9"), 991 + RPMH_VREG("smps10", SMPS, 10, &pmic4_ftsmps426, "vdd-s10"), 992 + RPMH_VREG("smps11", SMPS, 11, &pmic4_ftsmps426, "vdd-s11"), 993 + RPMH_VREG("smps12", SMPS, 12, &pmic4_ftsmps426, "vdd-s12"), 994 + RPMH_VREG("smps13", SMPS, 13, &pmic4_ftsmps426, "vdd-s13"), 995 + RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l27"), 996 + RPMH_VREG("ldo2", LDO, 2, &pmic4_nldo, "vdd-l2-l8-l17"), 997 + RPMH_VREG("ldo3", LDO, 3, &pmic4_nldo, "vdd-l3-l11"), 998 + RPMH_VREG("ldo4", LDO, 4, &pmic4_nldo, "vdd-l4-l5"), 999 + RPMH_VREG("ldo5", LDO, 5, &pmic4_nldo, "vdd-l4-l5"), 1000 + RPMH_VREG("ldo6", LDO, 6, &pmic4_pldo, "vdd-l6"), 1001 + RPMH_VREG("ldo7", LDO, 7, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 1002 + RPMH_VREG("ldo8", LDO, 8, &pmic4_nldo, "vdd-l2-l8-l17"), 1003 + RPMH_VREG("ldo9", LDO, 9, &pmic4_pldo, "vdd-l9"), 1004 + RPMH_VREG("ldo10", LDO, 10, &pmic4_pldo, "vdd-l10-l23-l25"), 1005 + RPMH_VREG("ldo11", LDO, 11, &pmic4_nldo, "vdd-l3-l11"), 1006 + RPMH_VREG("ldo12", LDO, 12, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 1007 + RPMH_VREG("ldo13", LDO, 13, &pmic4_pldo, "vdd-l13-l19-l21"), 1008 + RPMH_VREG("ldo14", LDO, 14, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 1009 + RPMH_VREG("ldo15", LDO, 15, &pmic4_pldo_lv, "vdd-l7-l12-l14-l15"), 1010 + RPMH_VREG("ldo16", LDO, 16, &pmic4_pldo, "vdd-l16-l28"), 1011 + RPMH_VREG("ldo17", LDO, 17, &pmic4_nldo, "vdd-l2-l8-l17"), 1012 + RPMH_VREG("ldo18", LDO, 18, &pmic4_pldo, "vdd-l18-l22"), 1013 + RPMH_VREG("ldo19", LDO, 19, &pmic4_pldo, "vdd-l13-l19-l21"), 1014 + RPMH_VREG("ldo20", LDO, 20, &pmic4_pldo, "vdd-l20-l24"), 1015 + RPMH_VREG("ldo21", LDO, 21, &pmic4_pldo, "vdd-l13-l19-l21"), 1016 + RPMH_VREG("ldo22", LDO, 22, &pmic4_pldo, "vdd-l18-l22"), 1017 + RPMH_VREG("ldo23", LDO, 23, &pmic4_pldo, "vdd-l10-l23-l25"), 1018 + RPMH_VREG("ldo24", LDO, 24, &pmic4_pldo, "vdd-l20-l24"), 1019 + RPMH_VREG("ldo25", LDO, 25, &pmic4_pldo, "vdd-l10-l23-l25"), 1020 + RPMH_VREG("ldo26", LDO, 26, &pmic4_nldo, "vdd-l26"), 1021 + RPMH_VREG("ldo27", LDO, 27, &pmic4_nldo, "vdd-l1-l27"), 1022 + RPMH_VREG("ldo28", LDO, 28, &pmic4_pldo, "vdd-l16-l28"), 1023 + RPMH_VREG("lvs1", VS, 1, &pmic4_lvs, "vin-lvs-1-2"), 1024 + RPMH_VREG("lvs2", VS, 2, &pmic4_lvs, "vin-lvs-1-2"), 1034 1025 {} 1035 1026 }; 1036 1027 1037 1028 static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = { 1038 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1029 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), 1039 1030 {} 1040 1031 }; 1041 1032 1042 1033 static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = { 1043 - RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"), 1034 + RPMH_VREG("bob", BOB, 1, &pmic4_bob, "vdd-bob"), 1044 1035 {} 1045 1036 }; 1046 1037 1047 1038 static const struct rpmh_vreg_init_data pm8005_vreg_data[] = { 1048 - RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 1049 - RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 1050 - RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"), 1051 - RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"), 1039 + RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"), 1040 + RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"), 1041 + RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3"), 1042 + RPMH_VREG("smps4", SMPS, 4, &pmic4_ftsmps426, "vdd-s4"), 1052 1043 {} 1053 1044 }; 1054 1045 1055 1046 static const struct rpmh_vreg_init_data pm8150_vreg_data[] = { 1056 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1057 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1058 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1059 - RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 1060 - RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 1061 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1062 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 1063 - RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), 1064 - RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), 1065 - RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"), 1066 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"), 1067 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"), 1068 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1069 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1070 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1071 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"), 1072 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l12-l14-l15"), 1073 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"), 1074 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"), 1075 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"), 1076 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"), 1077 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1078 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"), 1079 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1080 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1081 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"), 1082 - RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"), 1083 - RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1047 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), 1048 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), 1049 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), 1050 + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), 1051 + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), 1052 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), 1053 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), 1054 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"), 1055 + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"), 1056 + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"), 1057 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l8-l11"), 1058 + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l10"), 1059 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1060 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1061 + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1062 + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9"), 1063 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l12-l14-l15"), 1064 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l1-l8-l11"), 1065 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9"), 1066 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l2-l10"), 1067 + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l1-l8-l11"), 1068 + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1069 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l13-l16-l17"), 1070 + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1071 + RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1072 + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16-l17"), 1073 + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l13-l16-l17"), 1074 + RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1084 1075 {} 1085 1076 }; 1086 1077 1087 1078 static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { 1088 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1089 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1090 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1091 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"), 1092 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"), 1093 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1094 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 1095 - RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"), 1096 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"), 1097 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"), 1098 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"), 1099 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"), 1100 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"), 1101 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"), 1102 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"), 1103 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l1-l8"), 1104 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"), 1105 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"), 1106 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"), 1107 - RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), 1079 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), 1080 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), 1081 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), 1082 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"), 1083 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"), 1084 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), 1085 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), 1086 + RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"), 1087 + RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l8"), 1088 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"), 1089 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"), 1090 + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l4-l5-l6"), 1091 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l4-l5-l6"), 1092 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l4-l5-l6"), 1093 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l11"), 1094 + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo_lv, "vdd-l1-l8"), 1095 + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l9-l10"), 1096 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l9-l10"), 1097 + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l7-l11"), 1098 + RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"), 1108 1099 {} 1109 1100 }; 1110 1101 1111 1102 static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = { 1112 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1113 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1114 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1115 - RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 1116 - RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 1117 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1118 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 1119 - RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), 1120 - RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), 1121 - RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"), 1122 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"), 1123 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"), 1124 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1125 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1126 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1127 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"), 1128 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1129 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"), 1130 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"), 1131 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"), 1132 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"), 1133 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1134 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"), 1135 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1136 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1137 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"), 1138 - RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"), 1139 - RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1103 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), 1104 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), 1105 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), 1106 + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), 1107 + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), 1108 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), 1109 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), 1110 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"), 1111 + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"), 1112 + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"), 1113 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l8-l11"), 1114 + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l10"), 1115 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1116 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1117 + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1118 + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9"), 1119 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1120 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l1-l8-l11"), 1121 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9"), 1122 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l2-l10"), 1123 + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l1-l8-l11"), 1124 + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1125 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l13-l16-l17"), 1126 + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1127 + RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), 1128 + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16-l17"), 1129 + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l13-l16-l17"), 1130 + RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, "vdd-l3-l4-l5-l18"), 1140 1131 {} 1141 1132 }; 1142 1133 1143 1134 static const struct rpmh_vreg_init_data pmm8654au_vreg_data[] = { 1144 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps527, "vdd-s1"), 1145 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps527, "vdd-s2"), 1146 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps527, "vdd-s3"), 1147 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps527, "vdd-s4"), 1148 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps527, "vdd-s5"), 1149 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps527, "vdd-s6"), 1150 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps527, "vdd-s7"), 1151 - RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps527, "vdd-s8"), 1152 - RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps527, "vdd-s9"), 1153 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-s9"), 1154 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-l3"), 1155 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l2-l3"), 1156 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-s9"), 1157 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo515, "vdd-s9"), 1158 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo515, "vdd-l6-l7"), 1159 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l6-l7"), 1160 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo515_mv, "vdd-l8-l9"), 1161 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"), 1135 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps527, "vdd-s1"), 1136 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps527, "vdd-s2"), 1137 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps527, "vdd-s3"), 1138 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps527, "vdd-s4"), 1139 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps527, "vdd-s5"), 1140 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps527, "vdd-s6"), 1141 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps527, "vdd-s7"), 1142 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps527, "vdd-s8"), 1143 + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps527, "vdd-s9"), 1144 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-s9"), 1145 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-l3"), 1146 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l2-l3"), 1147 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-s9"), 1148 + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-s9"), 1149 + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6-l7"), 1150 + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l6-l7"), 1151 + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo515_mv, "vdd-l8-l9"), 1152 + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l8-l9"), 1162 1153 {} 1163 1154 }; 1164 1155 1165 1156 static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { 1166 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1167 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1168 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1169 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"), 1170 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"), 1171 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1172 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 1173 - RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), 1174 - RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), 1175 - RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"), 1176 - RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"), 1177 - RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"), 1178 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4"), 1179 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"), 1180 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l5"), 1181 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4"), 1182 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l5"), 1183 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"), 1184 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"), 1185 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"), 1186 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"), 1187 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"), 1157 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), 1158 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), 1159 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), 1160 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"), 1161 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"), 1162 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), 1163 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), 1164 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"), 1165 + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"), 1166 + RPMH_VREG("smps10", SMPS, 10, &pmic5_hfsmps510, "vdd-s10"), 1167 + RPMH_VREG("smps11", SMPS, 11, &pmic5_hfsmps510, "vdd-s11"), 1168 + RPMH_VREG("smps12", SMPS, 12, &pmic5_hfsmps510, "vdd-s12"), 1169 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l4"), 1170 + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l7"), 1171 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l5"), 1172 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l1-l4"), 1173 + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l3-l5"), 1174 + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9-l10"), 1175 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l2-l7"), 1176 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8"), 1177 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9-l10"), 1178 + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l6-l9-l10"), 1188 1179 {} 1189 1180 }; 1190 1181 1191 1182 static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = { 1192 - RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps515, "vdd-s1"), 1193 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1194 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1195 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"), 1196 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"), 1197 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1198 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 1199 - RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), 1200 - RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), 1201 - RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"), 1202 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l12"), 1203 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo_lv, "vdd-l2-l8"), 1204 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1205 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1206 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1207 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l9-l11"), 1208 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1209 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo_lv, "vdd-l2-l8"), 1210 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l6-l9-l11"), 1211 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l10"), 1212 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l6-l9-l11"), 1213 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"), 1214 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1215 - RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), 1183 + RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps515, "vdd-s1"), 1184 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), 1185 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), 1186 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"), 1187 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"), 1188 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), 1189 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), 1190 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps510, "vdd-s8"), 1191 + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps510, "vdd-s9"), 1192 + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps510, "vdd-s10"), 1193 + RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l12"), 1194 + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo_lv, "vdd-l2-l8"), 1195 + RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1196 + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1197 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1198 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l6-l9-l11"), 1199 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1200 + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo_lv, "vdd-l2-l8"), 1201 + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l6-l9-l11"), 1202 + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l10"), 1203 + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l6-l9-l11"), 1204 + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l1-l12"), 1205 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), 1206 + RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"), 1216 1207 {} 1217 1208 }; 1218 1209 1219 1210 static const struct rpmh_vreg_init_data pm8450_vreg_data[] = { 1220 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"), 1221 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"), 1222 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"), 1223 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"), 1224 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"), 1225 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"), 1226 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1227 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"), 1228 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1229 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"), 1211 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps520, "vdd-s1"), 1212 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"), 1213 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps520, "vdd-s3"), 1214 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps520, "vdd-s4"), 1215 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps520, "vdd-s5"), 1216 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps520, "vdd-s6"), 1217 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), 1218 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"), 1219 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), 1220 + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"), 1230 1221 {} 1231 1222 }; 1232 1223 1233 1224 static const struct rpmh_vreg_init_data pm8550_vreg_data[] = { 1234 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1-l4-l10"), 1235 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l13-l14"), 1236 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1237 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l1-l4-l10"), 1238 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16"), 1239 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l6-l7"), 1240 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l6-l7"), 1241 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l8-l9"), 1242 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l8-l9"), 1243 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo515, "vdd-l1-l4-l10"), 1244 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo515, "vdd-l11"), 1245 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo515, "vdd-l12"), 1246 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l2-l13-l14"), 1247 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, "vdd-l2-l13-l14"), 1248 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"), 1249 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16"), 1250 - RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l17"), 1251 - RPMH_VREG("bob1", "bob%s1", &pmic5_bob, "vdd-bob1"), 1252 - RPMH_VREG("bob2", "bob%s2", &pmic5_bob, "vdd-bob2"), 1225 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1-l4-l10"), 1226 + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l13-l14"), 1227 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), 1228 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l1-l4-l10"), 1229 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l16"), 1230 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l6-l7"), 1231 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l6-l7"), 1232 + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, "vdd-l8-l9"), 1233 + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l8-l9"), 1234 + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo515, "vdd-l1-l4-l10"), 1235 + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo515, "vdd-l11"), 1236 + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo515, "vdd-l12"), 1237 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l2-l13-l14"), 1238 + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, "vdd-l2-l13-l14"), 1239 + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo515, "vdd-l15"), 1240 + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l16"), 1241 + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l17"), 1242 + RPMH_VREG("bob1", BOB, 1, &pmic5_bob, "vdd-bob1"), 1243 + RPMH_VREG("bob2", BOB, 2, &pmic5_bob, "vdd-bob2"), 1253 1244 {} 1254 1245 }; 1255 1246 1256 1247 static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = { 1257 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"), 1258 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"), 1259 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"), 1260 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"), 1261 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"), 1262 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"), 1263 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), 1264 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), 1265 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1248 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), 1249 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), 1250 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), 1251 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), 1252 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), 1253 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), 1254 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), 1255 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"), 1256 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), 1266 1257 {} 1267 1258 }; 1268 1259 1269 1260 static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = { 1270 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"), 1271 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"), 1272 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"), 1273 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"), 1274 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"), 1275 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"), 1276 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"), 1277 - RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"), 1278 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), 1279 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), 1280 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1261 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), 1262 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), 1263 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), 1264 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), 1265 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), 1266 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), 1267 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"), 1268 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"), 1269 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), 1270 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"), 1271 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), 1281 1272 {} 1282 1273 }; 1283 1274 1284 1275 static const struct rpmh_vreg_init_data pmc8380_vreg_data[] = { 1285 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"), 1286 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"), 1287 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"), 1288 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"), 1289 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"), 1290 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"), 1291 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"), 1292 - RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"), 1293 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), 1294 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2"), 1295 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1276 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), 1277 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), 1278 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), 1279 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), 1280 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), 1281 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), 1282 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"), 1283 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"), 1284 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), 1285 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2"), 1286 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), 1296 1287 {} 1297 1288 }; 1298 1289 1299 1290 static const struct rpmh_vreg_init_data pm8009_vreg_data[] = { 1300 - RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"), 1301 - RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515, "vdd-s2"), 1302 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1303 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"), 1304 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1305 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"), 1306 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), 1307 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), 1308 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"), 1291 + RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"), 1292 + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps515, "vdd-s2"), 1293 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), 1294 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"), 1295 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), 1296 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"), 1297 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"), 1298 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"), 1299 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7"), 1309 1300 {} 1310 1301 }; 1311 1302 1312 1303 static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = { 1313 - RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"), 1314 - RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps515_1, "vdd-s2"), 1315 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1316 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2"), 1317 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1318 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"), 1319 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), 1320 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), 1321 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"), 1304 + RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"), 1305 + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps515_1, "vdd-s2"), 1306 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), 1307 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2"), 1308 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), 1309 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"), 1310 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"), 1311 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"), 1312 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo_lv, "vdd-l7"), 1322 1313 {} 1323 1314 }; 1324 1315 1325 1316 static const struct rpmh_vreg_init_data pm8010_vreg_data[] = { 1326 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo502, "vdd-l1-l2"), 1327 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo502, "vdd-l1-l2"), 1328 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo502ln, "vdd-l3-l4"), 1329 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo502ln, "vdd-l3-l4"), 1330 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo502, "vdd-l5"), 1331 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo502ln, "vdd-l6"), 1332 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo502, "vdd-l7"), 1317 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo502, "vdd-l1-l2"), 1318 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo502, "vdd-l1-l2"), 1319 + RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo502ln, "vdd-l3-l4"), 1320 + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo502ln, "vdd-l3-l4"), 1321 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo502, "vdd-l5"), 1322 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo502ln, "vdd-l6"), 1323 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo502, "vdd-l7"), 1333 1324 }; 1334 1325 1335 1326 static const struct rpmh_vreg_init_data pm6150_vreg_data[] = { 1336 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1337 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1338 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1339 - RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 1340 - RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 1341 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1342 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"), 1343 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"), 1344 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l7-l8"), 1345 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1346 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"), 1347 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l4-l7-l8"), 1348 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l4-l7-l8"), 1349 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"), 1350 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10-l14-l15"), 1351 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l12-l13"), 1352 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l11-l12-l13"), 1353 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo_lv, "vdd-l11-l12-l13"), 1354 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l10-l14-l15"), 1355 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l10-l14-l15"), 1356 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1357 - RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1358 - RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1359 - RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1327 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), 1328 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), 1329 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), 1330 + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), 1331 + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), 1332 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), 1333 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"), 1334 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"), 1335 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4-l7-l8"), 1336 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1337 + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6"), 1338 + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l4-l7-l8"), 1339 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l4-l7-l8"), 1340 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l9"), 1341 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo_lv, "vdd-l10-l14-l15"), 1342 + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo_lv, "vdd-l11-l12-l13"), 1343 + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo_lv, "vdd-l11-l12-l13"), 1344 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo_lv, "vdd-l11-l12-l13"), 1345 + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo_lv, "vdd-l10-l14-l15"), 1346 + RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo_lv, "vdd-l10-l14-l15"), 1347 + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1348 + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1349 + RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1350 + RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), 1360 1351 {} 1361 1352 }; 1362 1353 1363 1354 static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { 1364 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1365 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), 1366 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), 1367 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps510, "vdd-s4"), 1368 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps510, "vdd-s5"), 1369 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1370 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), 1371 - RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"), 1372 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_pldo_lv, "vdd-l1-l8"), 1373 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l3"), 1374 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l2-l3"), 1375 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo, "vdd-l4-l5-l6"), 1376 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l4-l5-l6"), 1377 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l4-l5-l6"), 1378 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-l11"), 1379 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, "vdd-l1-l8"), 1380 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, "vdd-l9-l10"), 1381 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"), 1382 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"), 1383 - RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), 1355 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), 1356 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps510, "vdd-s2"), 1357 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps510, "vdd-s3"), 1358 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps510, "vdd-s4"), 1359 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps510, "vdd-s5"), 1360 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), 1361 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps510, "vdd-s7"), 1362 + RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"), 1363 + RPMH_VREG("ldo1", LDO, 1, &pmic5_pldo_lv, "vdd-l1-l8"), 1364 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l3"), 1365 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l2-l3"), 1366 + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo, "vdd-l4-l5-l6"), 1367 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l4-l5-l6"), 1368 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l4-l5-l6"), 1369 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-l11"), 1370 + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, "vdd-l1-l8"), 1371 + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, "vdd-l9-l10"), 1372 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l9-l10"), 1373 + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l7-l11"), 1374 + RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"), 1384 1375 {} 1385 1376 }; 1386 1377 1387 1378 static const struct rpmh_vreg_init_data pm6350_vreg_data[] = { 1388 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, NULL), 1389 - RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, NULL), 1379 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, NULL), 1380 + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, NULL), 1390 1381 /* smps3 - smps5 not configured */ 1391 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, NULL), 1392 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, NULL), 1393 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_pldo, NULL), 1394 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, NULL), 1395 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, NULL), 1396 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, NULL), 1397 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, NULL), 1398 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_pldo, NULL), 1399 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_pldo, NULL), 1400 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, NULL), 1401 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, NULL), 1402 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo, NULL), 1403 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, NULL), 1404 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, NULL), 1405 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, NULL), 1406 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, NULL), 1382 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, NULL), 1383 + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, NULL), 1384 + RPMH_VREG("ldo3", LDO, 3, &pmic5_pldo, NULL), 1385 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, NULL), 1386 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, NULL), 1387 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, NULL), 1388 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, NULL), 1389 + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo, NULL), 1390 + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo, NULL), 1391 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, NULL), 1392 + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, NULL), 1393 + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo, NULL), 1394 + RPMH_VREG("ldo13", LDO, 13, &pmic5_nldo, NULL), 1395 + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, NULL), 1396 + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, NULL), 1397 + RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo, NULL), 1407 1398 /* ldo17 not configured */ 1408 - RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, NULL), 1409 - RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, NULL), 1410 - RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, NULL), 1411 - RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, NULL), 1412 - RPMH_VREG("ldo22", "ldo%s22", &pmic5_nldo, NULL), 1399 + RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo, NULL), 1400 + RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo, NULL), 1401 + RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo, NULL), 1402 + RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo, NULL), 1403 + RPMH_VREG("ldo22", LDO, 22, &pmic5_nldo, NULL), 1404 + }; 1405 + 1406 + static const struct rpmh_vreg_init_data pmcx0102_vreg_data[] = { 1407 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"), 1408 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"), 1409 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"), 1410 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"), 1411 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps530, "vdd-s5"), 1412 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps530, "vdd-s6"), 1413 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps530, "vdd-s7"), 1414 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps530, "vdd-s8"), 1415 + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps530, "vdd-s9"), 1416 + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps530, "vdd-s10"), 1417 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1"), 1418 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo530, "vdd-l2"), 1419 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3"), 1420 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l4"), 1421 + {} 1422 + }; 1423 + 1424 + static const struct rpmh_vreg_init_data pmh0101_vreg_data[] = { 1425 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1-l4-l10"), 1426 + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo530_mvp300, "vdd-l2-l13-l14"), 1427 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3-l11"), 1428 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l1-l4-l10"), 1429 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo530_mvp150, "vdd-l5-l16"), 1430 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo530_mvp300, "vdd-l6-l7"), 1431 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo530_mvp300, "vdd-l6-l7"), 1432 + RPMH_VREG("ldo8", LDO, 8, &pmic5_pldo530_mvp150, "vdd-l8-l9"), 1433 + RPMH_VREG("ldo9", LDO, 9, &pmic5_pldo515_mv, "vdd-l8-l9"), 1434 + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo530, "vdd-l1-l4-l10"), 1435 + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo530, "vdd-l3-l11"), 1436 + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo530, "vdd-l12"), 1437 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo530_mvp150, "vdd-l2-l13-l14"), 1438 + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo530_mvp150, "vdd-l2-l13-l14"), 1439 + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo530, "vdd-l15"), 1440 + RPMH_VREG("ldo16", LDO, 15, &pmic5_pldo530_mvp600, "vdd-l5-l16"), 1441 + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo515_mv, "vdd-l17"), 1442 + RPMH_VREG("ldo18", LDO, 18, &pmic5_nldo530, "vdd-l18"), 1443 + RPMH_VREG("bob1", BOB, 1, &pmic5_bob, "vdd-bob1"), 1444 + RPMH_VREG("bob2", BOB, 2, &pmic5_bob, "vdd-bob2"), 1445 + {} 1446 + }; 1447 + 1448 + static const struct rpmh_vreg_init_data pmh0104_vreg_data[] = { 1449 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"), 1450 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"), 1451 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"), 1452 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"), 1453 + {} 1454 + }; 1455 + 1456 + static const struct rpmh_vreg_init_data pmh0110_vreg_data[] = { 1457 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps530, "vdd-s1"), 1458 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps530, "vdd-s2"), 1459 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps530, "vdd-s3"), 1460 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps530, "vdd-s4"), 1461 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps530, "vdd-s5"), 1462 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps530, "vdd-s6"), 1463 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps530, "vdd-s7"), 1464 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps530, "vdd-s8"), 1465 + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps530, "vdd-s9"), 1466 + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps530, "vdd-s10"), 1467 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo530, "vdd-l1"), 1468 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo530, "vdd-l2"), 1469 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo530, "vdd-l3"), 1470 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo530, "vdd-l4"), 1471 + {} 1413 1472 }; 1414 1473 1415 1474 static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { 1416 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1417 - RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"), 1418 - RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"), 1419 - RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 1420 - RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 1421 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1422 - RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"), 1423 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"), 1424 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"), 1425 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l9"), 1426 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4-l12"), 1427 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), 1428 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), 1429 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"), 1430 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"), 1431 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l3-l9"), 1432 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10-l11-l13"), 1433 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l10-l11-l13"), 1434 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l4-l12"), 1435 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l10-l11-l13"), 1436 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"), 1437 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"), 1438 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"), 1475 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), 1476 + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, "vdd-s2"), 1477 + RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps510, "vdd-s3"), 1478 + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), 1479 + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), 1480 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), 1481 + RPMH_VREG("smps7", SMPS, 7, &pmic5_hfsmps510, "vdd-s7"), 1482 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"), 1483 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"), 1484 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3-l9"), 1485 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4-l12"), 1486 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6"), 1487 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6"), 1488 + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7-l8"), 1489 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l7-l8"), 1490 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l3-l9"), 1491 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10-l11-l13"), 1492 + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l10-l11-l13"), 1493 + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l4-l12"), 1494 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l10-l11-l13"), 1495 + RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14"), 1496 + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l15"), 1497 + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l16"), 1439 1498 {} 1440 1499 }; 1441 1500 1442 1501 static const struct rpmh_vreg_init_data pmx65_vreg_data[] = { 1443 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), 1444 - RPMH_VREG("smps2", "smp%s2", &pmic5_hfsmps510, "vdd-s2"), 1445 - RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps510, "vdd-s3"), 1446 - RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), 1447 - RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), 1448 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), 1449 - RPMH_VREG("smps7", "smp%s7", &pmic5_hfsmps510, "vdd-s7"), 1450 - RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"), 1451 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1"), 1452 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l2-l18"), 1453 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1454 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l4"), 1455 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6-l16"), 1456 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6-l16"), 1457 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7"), 1458 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8-l9"), 1459 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l8-l9"), 1460 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"), 1461 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"), 1462 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l12"), 1463 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"), 1464 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"), 1465 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"), 1466 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l5-l6-l16"), 1467 - RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo, "vdd-l17"), 1502 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps510, "vdd-s1"), 1503 + RPMH_VREG("smps2", SMPS, 2, &pmic5_hfsmps510, "vdd-s2"), 1504 + RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps510, "vdd-s3"), 1505 + RPMH_VREG("smps4", SMPS, 4, &pmic5_hfsmps510, "vdd-s4"), 1506 + RPMH_VREG("smps5", SMPS, 5, &pmic5_hfsmps510, "vdd-s5"), 1507 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps510, "vdd-s6"), 1508 + RPMH_VREG("smps7", SMPS, 7, &pmic5_hfsmps510, "vdd-s7"), 1509 + RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"), 1510 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1"), 1511 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l2-l18"), 1512 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), 1513 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l4"), 1514 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo, "vdd-l5-l6-l16"), 1515 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo, "vdd-l5-l6-l16"), 1516 + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7"), 1517 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8-l9"), 1518 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l8-l9"), 1519 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10"), 1520 + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l11-l13"), 1521 + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l12"), 1522 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l11-l13"), 1523 + RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14"), 1524 + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l15"), 1525 + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l5-l6-l16"), 1526 + RPMH_VREG("ldo17", LDO, 17, &pmic5_nldo, "vdd-l17"), 1468 1527 /* ldo18 not configured */ 1469 - RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo, "vdd-l19"), 1470 - RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo, "vdd-l20"), 1471 - RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo, "vdd-l21"), 1528 + RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo, "vdd-l19"), 1529 + RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo, "vdd-l20"), 1530 + RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo, "vdd-l21"), 1472 1531 {} 1473 1532 }; 1474 1533 1475 1534 static const struct rpmh_vreg_init_data pmx75_vreg_data[] = { 1476 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"), 1477 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"), 1478 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"), 1479 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"), 1480 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"), 1481 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"), 1482 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525, "vdd-s7"), 1483 - RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525, "vdd-s8"), 1484 - RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps525, "vdd-s9"), 1485 - RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps525, "vdd-s10"), 1486 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), 1487 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-18"), 1488 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l3"), 1489 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l4-l16"), 1490 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo_lv, "vdd-l5-l6"), 1491 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo_lv, "vdd-l5-l6"), 1492 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l7"), 1493 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo515, "vdd-l8-l9"), 1494 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo515, "vdd-l8-l9"), 1495 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l10"), 1496 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l11-l13"), 1497 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo515, "vdd-l12"), 1498 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l11-l13"), 1499 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo515, "vdd-l14"), 1500 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo515, "vdd-l15"), 1501 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo515, "vdd-l4-l16"), 1502 - RPMH_VREG("ldo17", "ldo%s17", &pmic5_nldo515, "vdd-l17"), 1535 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), 1536 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), 1537 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), 1538 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), 1539 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), 1540 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), 1541 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps525, "vdd-s7"), 1542 + RPMH_VREG("smps8", SMPS, 8, &pmic5_ftsmps525, "vdd-s8"), 1543 + RPMH_VREG("smps9", SMPS, 9, &pmic5_ftsmps525, "vdd-s9"), 1544 + RPMH_VREG("smps10", SMPS, 10, &pmic5_ftsmps525, "vdd-s10"), 1545 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), 1546 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-18"), 1547 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l3"), 1548 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l4-l16"), 1549 + RPMH_VREG("ldo5", LDO, 5, &pmic5_pldo_lv, "vdd-l5-l6"), 1550 + RPMH_VREG("ldo6", LDO, 6, &pmic5_pldo_lv, "vdd-l5-l6"), 1551 + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"), 1552 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo515, "vdd-l8-l9"), 1553 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo515, "vdd-l8-l9"), 1554 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo, "vdd-l10"), 1555 + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo, "vdd-l11-l13"), 1556 + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo515, "vdd-l12"), 1557 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo, "vdd-l11-l13"), 1558 + RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo515, "vdd-l14"), 1559 + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo515, "vdd-l15"), 1560 + RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo515, "vdd-l4-l16"), 1561 + RPMH_VREG("ldo17", LDO, 17, &pmic5_nldo515, "vdd-l17"), 1503 1562 /* ldo18 not configured */ 1504 - RPMH_VREG("ldo19", "ldo%s19", &pmic5_nldo515, "vdd-l19"), 1505 - RPMH_VREG("ldo20", "ldo%s20", &pmic5_nldo515, "vdd-l20-l21"), 1506 - RPMH_VREG("ldo21", "ldo%s21", &pmic5_nldo515, "vdd-l20-l21"), 1563 + RPMH_VREG("ldo19", LDO, 19, &pmic5_nldo515, "vdd-l19"), 1564 + RPMH_VREG("ldo20", LDO, 20, &pmic5_nldo515, "vdd-l20-l21"), 1565 + RPMH_VREG("ldo21", LDO, 21, &pmic5_nldo515, "vdd-l20-l21"), 1507 1566 }; 1508 1567 1509 1568 static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { 1510 - RPMH_VREG("smps1", "smp%s1", &pmic5_hfsmps510, "vdd-s1"), 1511 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"), 1512 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps520, "vdd-s3"), 1513 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps520, "vdd-s4"), 1514 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps520, "vdd-s5"), 1515 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps520, "vdd-s6"), 1516 - RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps520, "vdd-s7"), 1517 - RPMH_VREG("smps8", "smp%s8", &pmic5_hfsmps510, "vdd-s8"), 1518 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1519 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l7"), 1520 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1521 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1522 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"), 1523 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9-l10"), 1524 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l2-l7"), 1525 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"), 1526 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"), 1527 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"), 1528 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1529 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1530 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_nldo, "vdd-l13"), 1531 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14-l16"), 1532 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1533 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_nldo, "vdd-l14-l16"), 1534 - RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1535 - RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1536 - RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1569 + RPMH_VREG("smps1", SMPS, 1, &pmic5_hfsmps510, "vdd-s1"), 1570 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"), 1571 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps520, "vdd-s3"), 1572 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps520, "vdd-s4"), 1573 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps520, "vdd-s5"), 1574 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps520, "vdd-s6"), 1575 + RPMH_VREG("smps7", SMPS, 7, &pmic5_ftsmps520, "vdd-s7"), 1576 + RPMH_VREG("smps8", SMPS, 8, &pmic5_hfsmps510, "vdd-s8"), 1577 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1578 + RPMH_VREG("ldo2", LDO, 2, &pmic5_pldo, "vdd-l2-l7"), 1579 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), 1580 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1581 + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5"), 1582 + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6-l9-l10"), 1583 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l2-l7"), 1584 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l8"), 1585 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l6-l9-l10"), 1586 + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo, "vdd-l6-l9-l10"), 1587 + RPMH_VREG("ldo11", LDO, 11, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1588 + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1589 + RPMH_VREG("ldo13", LDO, 13, &pmic5_nldo, "vdd-l13"), 1590 + RPMH_VREG("ldo14", LDO, 14, &pmic5_nldo, "vdd-l14-l16"), 1591 + RPMH_VREG("ldo15", LDO, 15, &pmic5_nldo, "vdd-l1-l4-l12-l15"), 1592 + RPMH_VREG("ldo16", LDO, 16, &pmic5_nldo, "vdd-l14-l16"), 1593 + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1594 + RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1595 + RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), 1537 1596 {} 1538 1597 }; 1539 1598 1540 1599 static const struct rpmh_vreg_init_data pm7550_vreg_data[] = { 1541 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525, "vdd-s1"), 1542 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525, "vdd-s2"), 1543 - RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525, "vdd-s3"), 1544 - RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525, "vdd-s4"), 1545 - RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525, "vdd-s5"), 1546 - RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525, "vdd-s6"), 1547 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo515, "vdd-l1"), 1548 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo515, "vdd-l2-l3"), 1549 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo515, "vdd-l2-l3"), 1550 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo515, "vdd-l4-l5"), 1551 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo515, "vdd-l4-l5"), 1552 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo515, "vdd-l6"), 1553 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo515, "vdd-l7"), 1554 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo515, "vdd-l8"), 1555 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo515, "vdd-l9-l10"), 1556 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo515, "vdd-l9-l10"), 1557 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo515, "vdd-l11"), 1558 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo515_mv, "vdd-l12-l14"), 1559 - RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo515_mv, "vdd-l13-l16"), 1560 - RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo, "vdd-l12-l14"), 1561 - RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1562 - RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16"), 1563 - RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1564 - RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1565 - RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1566 - RPMH_VREG("ldo20", "ldo%s20", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1567 - RPMH_VREG("ldo21", "ldo%s21", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1568 - RPMH_VREG("ldo22", "ldo%s22", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1569 - RPMH_VREG("ldo23", "ldo%s23", &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1570 - RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), 1600 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps525, "vdd-s1"), 1601 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps525, "vdd-s2"), 1602 + RPMH_VREG("smps3", SMPS, 3, &pmic5_ftsmps525, "vdd-s3"), 1603 + RPMH_VREG("smps4", SMPS, 4, &pmic5_ftsmps525, "vdd-s4"), 1604 + RPMH_VREG("smps5", SMPS, 5, &pmic5_ftsmps525, "vdd-s5"), 1605 + RPMH_VREG("smps6", SMPS, 6, &pmic5_ftsmps525, "vdd-s6"), 1606 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo515, "vdd-l1"), 1607 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo515, "vdd-l2-l3"), 1608 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo515, "vdd-l2-l3"), 1609 + RPMH_VREG("ldo4", LDO, 4, &pmic5_nldo515, "vdd-l4-l5"), 1610 + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo515, "vdd-l4-l5"), 1611 + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo515, "vdd-l6"), 1612 + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo515, "vdd-l7"), 1613 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo515, "vdd-l8"), 1614 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo515, "vdd-l9-l10"), 1615 + RPMH_VREG("ldo10", LDO, 10, &pmic5_nldo515, "vdd-l9-l10"), 1616 + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo515, "vdd-l11"), 1617 + RPMH_VREG("ldo12", LDO, 12, &pmic5_pldo515_mv, "vdd-l12-l14"), 1618 + RPMH_VREG("ldo13", LDO, 13, &pmic5_pldo515_mv, "vdd-l13-l16"), 1619 + RPMH_VREG("ldo14", LDO, 14, &pmic5_pldo, "vdd-l12-l14"), 1620 + RPMH_VREG("ldo15", LDO, 15, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1621 + RPMH_VREG("ldo16", LDO, 16, &pmic5_pldo, "vdd-l13-l16"), 1622 + RPMH_VREG("ldo17", LDO, 17, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1623 + RPMH_VREG("ldo18", LDO, 18, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1624 + RPMH_VREG("ldo19", LDO, 19, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1625 + RPMH_VREG("ldo20", LDO, 20, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1626 + RPMH_VREG("ldo21", LDO, 21, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1627 + RPMH_VREG("ldo22", LDO, 22, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1628 + RPMH_VREG("ldo23", LDO, 23, &pmic5_pldo, "vdd-l15-l17-l18-l19-l20-l21-l22-l23"), 1629 + RPMH_VREG("bob", BOB, 1, &pmic5_bob, "vdd-bob"), 1571 1630 {} 1572 1631 }; 1573 1632 1574 1633 static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = { 1575 - RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps520, "vdd-s1"), 1576 - RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps520, "vdd-s2"), 1577 - RPMH_VREG("smps3", "smp%s3", &pmic5_hfsmps515, "vdd-s3"), 1578 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"), 1579 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"), 1580 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1581 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"), 1582 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"), 1583 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"), 1584 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"), 1634 + RPMH_VREG("smps1", SMPS, 1, &pmic5_ftsmps520, "vdd-s1"), 1635 + RPMH_VREG("smps2", SMPS, 2, &pmic5_ftsmps520, "vdd-s2"), 1636 + RPMH_VREG("smps3", SMPS, 3, &pmic5_hfsmps515, "vdd-s3"), 1637 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"), 1638 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"), 1639 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), 1640 + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"), 1641 + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5-l6"), 1642 + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l5-l6"), 1643 + RPMH_VREG("ldo7", LDO, 7, &pmic5_pldo, "vdd-l7-bob"), 1585 1644 {} 1586 1645 }; 1587 1646 1588 1647 static const struct rpmh_vreg_init_data pmr735b_vreg_data[] = { 1589 - RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l2"), 1590 - RPMH_VREG("ldo2", "ldo%s2", &pmic5_nldo, "vdd-l1-l2"), 1591 - RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3"), 1592 - RPMH_VREG("ldo4", "ldo%s4", &pmic5_pldo_lv, "vdd-l4"), 1593 - RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5"), 1594 - RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6"), 1595 - RPMH_VREG("ldo7", "ldo%s7", &pmic5_nldo, "vdd-l7-l8"), 1596 - RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l7-l8"), 1597 - RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l9"), 1598 - RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo_lv, "vdd-l10"), 1599 - RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l11"), 1600 - RPMH_VREG("ldo12", "ldo%s12", &pmic5_nldo, "vdd-l12"), 1648 + RPMH_VREG("ldo1", LDO, 1, &pmic5_nldo, "vdd-l1-l2"), 1649 + RPMH_VREG("ldo2", LDO, 2, &pmic5_nldo, "vdd-l1-l2"), 1650 + RPMH_VREG("ldo3", LDO, 3, &pmic5_nldo, "vdd-l3"), 1651 + RPMH_VREG("ldo4", LDO, 4, &pmic5_pldo_lv, "vdd-l4"), 1652 + RPMH_VREG("ldo5", LDO, 5, &pmic5_nldo, "vdd-l5"), 1653 + RPMH_VREG("ldo6", LDO, 6, &pmic5_nldo, "vdd-l6"), 1654 + RPMH_VREG("ldo7", LDO, 7, &pmic5_nldo, "vdd-l7-l8"), 1655 + RPMH_VREG("ldo8", LDO, 8, &pmic5_nldo, "vdd-l7-l8"), 1656 + RPMH_VREG("ldo9", LDO, 9, &pmic5_nldo, "vdd-l9"), 1657 + RPMH_VREG("ldo10", LDO, 10, &pmic5_pldo_lv, "vdd-l10"), 1658 + RPMH_VREG("ldo11", LDO, 11, &pmic5_nldo, "vdd-l11"), 1659 + RPMH_VREG("ldo12", LDO, 12, &pmic5_nldo, "vdd-l12"), 1601 1660 {} 1602 1661 }; 1603 1662 1604 1663 static const struct rpmh_vreg_init_data pm660_vreg_data[] = { 1605 - RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 1606 - RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 1607 - RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"), 1608 - RPMH_VREG("smps4", "smp%s4", &pmic4_hfsmps3, "vdd-s4"), 1609 - RPMH_VREG("smps5", "smp%s5", &pmic4_hfsmps3, "vdd-s5"), 1610 - RPMH_VREG("smps6", "smp%s6", &pmic4_hfsmps3, "vdd-s6"), 1611 - RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l6-l7"), 1612 - RPMH_VREG("ldo2", "ldo%s2", &pmic4_nldo, "vdd-l2-l3"), 1613 - RPMH_VREG("ldo3", "ldo%s3", &pmic4_nldo, "vdd-l2-l3"), 1664 + RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"), 1665 + RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"), 1666 + RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3"), 1667 + RPMH_VREG("smps4", SMPS, 4, &pmic4_hfsmps3, "vdd-s4"), 1668 + RPMH_VREG("smps5", SMPS, 5, &pmic4_hfsmps3, "vdd-s5"), 1669 + RPMH_VREG("smps6", SMPS, 6, &pmic4_hfsmps3, "vdd-s6"), 1670 + RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l6-l7"), 1671 + RPMH_VREG("ldo2", LDO, 2, &pmic4_nldo, "vdd-l2-l3"), 1672 + RPMH_VREG("ldo3", LDO, 3, &pmic4_nldo, "vdd-l2-l3"), 1614 1673 /* ldo4 is inaccessible on PM660 */ 1615 - RPMH_VREG("ldo5", "ldo%s5", &pmic4_nldo, "vdd-l5"), 1616 - RPMH_VREG("ldo6", "ldo%s6", &pmic4_nldo, "vdd-l1-l6-l7"), 1617 - RPMH_VREG("ldo7", "ldo%s7", &pmic4_nldo, "vdd-l1-l6-l7"), 1618 - RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1619 - RPMH_VREG("ldo9", "ldo%s9", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1620 - RPMH_VREG("ldo10", "ldo%s10", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1621 - RPMH_VREG("ldo11", "ldo%s11", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1622 - RPMH_VREG("ldo12", "ldo%s12", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1623 - RPMH_VREG("ldo13", "ldo%s13", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1624 - RPMH_VREG("ldo14", "ldo%s14", &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1625 - RPMH_VREG("ldo15", "ldo%s15", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1626 - RPMH_VREG("ldo16", "ldo%s16", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1627 - RPMH_VREG("ldo17", "ldo%s17", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1628 - RPMH_VREG("ldo18", "ldo%s18", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1629 - RPMH_VREG("ldo19", "ldo%s19", &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1674 + RPMH_VREG("ldo5", LDO, 5, &pmic4_nldo, "vdd-l5"), 1675 + RPMH_VREG("ldo6", LDO, 6, &pmic4_nldo, "vdd-l1-l6-l7"), 1676 + RPMH_VREG("ldo7", LDO, 7, &pmic4_nldo, "vdd-l1-l6-l7"), 1677 + RPMH_VREG("ldo8", LDO, 8, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1678 + RPMH_VREG("ldo9", LDO, 9, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1679 + RPMH_VREG("ldo10", LDO, 10, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1680 + RPMH_VREG("ldo11", LDO, 11, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1681 + RPMH_VREG("ldo12", LDO, 12, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1682 + RPMH_VREG("ldo13", LDO, 13, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1683 + RPMH_VREG("ldo14", LDO, 14, &pmic4_pldo_lv, "vdd-l8-l9-l10-l11-l12-l13-l14"), 1684 + RPMH_VREG("ldo15", LDO, 15, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1685 + RPMH_VREG("ldo16", LDO, 16, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1686 + RPMH_VREG("ldo17", LDO, 17, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1687 + RPMH_VREG("ldo18", LDO, 18, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1688 + RPMH_VREG("ldo19", LDO, 19, &pmic4_pldo, "vdd-l15-l16-l17-l18-l19"), 1630 1689 {} 1631 1690 }; 1632 1691 1633 1692 static const struct rpmh_vreg_init_data pm660l_vreg_data[] = { 1634 - RPMH_VREG("smps1", "smp%s1", &pmic4_ftsmps426, "vdd-s1"), 1635 - RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), 1636 - RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3-s4"), 1637 - RPMH_VREG("smps5", "smp%s5", &pmic4_ftsmps426, "vdd-s5"), 1638 - RPMH_VREG("ldo1", "ldo%s1", &pmic4_nldo, "vdd-l1-l9-l10"), 1639 - RPMH_VREG("ldo2", "ldo%s2", &pmic4_pldo, "vdd-l2"), 1640 - RPMH_VREG("ldo3", "ldo%s3", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1641 - RPMH_VREG("ldo4", "ldo%s4", &pmic4_pldo, "vdd-l4-l6"), 1642 - RPMH_VREG("ldo5", "ldo%s5", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1643 - RPMH_VREG("ldo6", "ldo%s6", &pmic4_pldo, "vdd-l4-l6"), 1644 - RPMH_VREG("ldo7", "ldo%s7", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1645 - RPMH_VREG("ldo8", "ldo%s8", &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1646 - RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"), 1693 + RPMH_VREG("smps1", SMPS, 1, &pmic4_ftsmps426, "vdd-s1"), 1694 + RPMH_VREG("smps2", SMPS, 2, &pmic4_ftsmps426, "vdd-s2"), 1695 + RPMH_VREG("smps3", SMPS, 3, &pmic4_ftsmps426, "vdd-s3-s4"), 1696 + RPMH_VREG("smps5", SMPS, 5, &pmic4_ftsmps426, "vdd-s5"), 1697 + RPMH_VREG("ldo1", LDO, 1, &pmic4_nldo, "vdd-l1-l9-l10"), 1698 + RPMH_VREG("ldo2", LDO, 2, &pmic4_pldo, "vdd-l2"), 1699 + RPMH_VREG("ldo3", LDO, 3, &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1700 + RPMH_VREG("ldo4", LDO, 4, &pmic4_pldo, "vdd-l4-l6"), 1701 + RPMH_VREG("ldo5", LDO, 5, &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1702 + RPMH_VREG("ldo6", LDO, 6, &pmic4_pldo, "vdd-l4-l6"), 1703 + RPMH_VREG("ldo7", LDO, 7, &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1704 + RPMH_VREG("ldo8", LDO, 8, &pmic4_pldo, "vdd-l3-l5-l7-l8"), 1705 + RPMH_VREG("bob", BOB, 1, &pmic4_bob, "vdd-bob"), 1647 1706 {} 1648 1707 }; 1649 1708 ··· 1897 1688 { 1898 1689 .compatible = "qcom,pmc8380-rpmh-regulators", 1899 1690 .data = pmc8380_vreg_data, 1691 + }, 1692 + { 1693 + .compatible = "qcom,pmcx0102-rpmh-regulators", 1694 + .data = pmcx0102_vreg_data, 1695 + }, 1696 + { 1697 + .compatible = "qcom,pmh0101-rpmh-regulators", 1698 + .data = pmh0101_vreg_data, 1699 + }, 1700 + { 1701 + .compatible = "qcom,pmh0104-rpmh-regulators", 1702 + .data = pmh0104_vreg_data, 1703 + }, 1704 + { 1705 + .compatible = "qcom,pmh0110-rpmh-regulators", 1706 + .data = pmh0110_vreg_data, 1900 1707 }, 1901 1708 { 1902 1709 .compatible = "qcom,pmm8155au-rpmh-regulators",