tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
sh: Allow SH-3 and SH-5 to use common headers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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-83
arch/sh/include/cpu-sh2/cpu/rtc.h
arch/sh/include/cpu-common/cpu/rtc.h
arch/sh/include/cpu-sh2/cpu/rtc.h
arch/sh/include/cpu-common/cpu/rtc.h
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arch/sh/include/cpu-sh3/cpu/addrspace.h
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arch/sh/include/cpu-sh3/cpu/addrspace.h
···
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1999 by Kaz Kojima
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*
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* Defitions for the address spaces of the SH-3 CPUs.
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*/
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#ifndef __ASM_CPU_SH3_ADDRSPACE_H
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#define __ASM_CPU_SH3_ADDRSPACE_H
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#define P0SEG 0x00000000
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#define P1SEG 0x80000000
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#define P2SEG 0xa0000000
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#define P3SEG 0xc0000000
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#define P4SEG 0xe0000000
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#endif /* __ASM_CPU_SH3_ADDRSPACE_H */
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-35
arch/sh/include/cpu-sh3/cpu/cacheflush.h
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-35
arch/sh/include/cpu-sh3/cpu/cacheflush.h
···
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#ifndef __ASM_CPU_SH3_CACHEFLUSH_H
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#define __ASM_CPU_SH3_CACHEFLUSH_H
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/*
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* Cache flushing:
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*
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* - flush_cache_all() flushes entire cache
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* - flush_cache_mm(mm) flushes the specified mm context's cache lines
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* - flush_cache_dup mm(mm) handles cache flushing when forking
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* - flush_cache_page(mm, vmaddr, pfn) flushes a single page
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* - flush_cache_range(vma, start, end) flushes a range of pages
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*
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* - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
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* - flush_icache_range(start, end) flushes(invalidates) a range for icache
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* - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
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*
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* Caches are indexed (effectively) by physical address on SH-3, so
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* we don't need them.
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*/
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#if defined(CONFIG_SH7705_CACHE_32KB)
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/* SH7705 is an SH3 processor with 32KB cache. This has alias issues like the
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* SH4. Unlike the SH4 this is a unified cache so we need to do some work
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* in mmap when 'exec'ing a new binary
···
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void flush_icache_range(unsigned long start, unsigned long end);
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void flush_icache_page(struct vm_area_struct *vma, struct page *page);
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#else
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#define flush_cache_all() do { } while (0)
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_dup_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) do { } while (0)
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#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
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#define flush_dcache_page(page) do { } while (0)
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#define flush_icache_range(start, end) do { } while (0)
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#define flush_icache_page(vma,pg) do { } while (0)
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#include <cpu-common/cpu/cacheflush.h>
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#endif
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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/* SH3 has unified cache so no special action needed here */
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#define flush_cache_sigtramp(vaddr) do { } while (0)
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#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
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#define p3_cache_init() do { } while (0)
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#endif /* __ASM_CPU_SH3_CACHEFLUSH_H */
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arch/sh/include/cpu-sh3/cpu/rtc.h
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arch/sh/include/cpu-sh3/cpu/rtc.h
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arch/sh/include/cpu-sh3/cpu/sigcontext.h
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arch/sh/include/cpu-sh3/cpu/sigcontext.h
···
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#ifndef __ASM_CPU_SH3_SIGCONTEXT_H
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#define __ASM_CPU_SH3_SIGCONTEXT_H
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struct sigcontext {
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unsigned long oldmask;
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/* CPU registers */
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unsigned long sc_regs[16];
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unsigned long sc_pc;
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unsigned long sc_pr;
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unsigned long sc_sr;
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unsigned long sc_gbr;
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unsigned long sc_mach;
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unsigned long sc_macl;
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};
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#endif /* __ASM_CPU_SH3_SIGCONTEXT_H */