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memory-barriers: Fix description of data dependency barriers

In the description of data dependency barriers the words 'before' is
used erroneously. Since such barrier order dependent loads one after
the other. So substitute 'before' with 'after'.

Signed-off-by: Nikolay Borisov <nborisov@suse.com>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: akiyks@gmail.com
Cc: boqun.feng@gmail.com
Cc: dhowells@redhat.com
Cc: j.alglave@ucl.ac.uk
Cc: linux-arch@vger.kernel.org
Cc: luc.maranget@inria.fr
Cc: npiggin@gmail.com
Cc: parri.andrea@gmail.com
Cc: stern@rowland.harvard.edu
Cc: will.deacon@arm.com
Link: http://lkml.kernel.org/r/1519169112-20593-8-git-send-email-paulmck@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

authored by

Nikolay Borisov and committed by
Ingo Molnar
51de7889 621df431

+1 -1
+1 -1
Documentation/memory-barriers.txt
··· 403 403 where two loads are performed such that the second depends on the result 404 404 of the first (eg: the first load retrieves the address to which the second 405 405 load will be directed), a data dependency barrier would be required to 406 - make sure that the target of the second load is updated before the address 406 + make sure that the target of the second load is updated after the address 407 407 obtained by the first load is accessed. 408 408 409 409 A data dependency barrier is a partial ordering on interdependent loads