parisc: convert the rest of the irq handlers to simple/percpu

The generic conversion eliminates the spurious no_ack and no_end
routines, converts all the cascaded handlers to handle_simple_irq() and
makes iosapic use a modified handle_percpu_irq() to become the same as
the CPU irq's. This isn't an essential change, but it eliminates the
mask/unmask overhead of handle_level_irq().

Signed-off-by: James Bottomley <James.Bottomley@suse.de>
Tested-by: Helge Deller <deller@gmx.de>
Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>

authored by James Bottomley and committed by Kyle McMartin 51890613 d16cd297

+12 -11
+1 -4
arch/parisc/kernel/irq.c
··· 75 smp_send_all_nop(); 76 } 77 78 - void no_ack_irq(unsigned int irq) { } 79 - void no_end_irq(unsigned int irq) { } 80 - 81 void cpu_ack_irq(unsigned int irq) 82 { 83 unsigned long mask = EIEM_MASK(irq); ··· 238 239 /* for iosapic interrupts */ 240 if (type) { 241 - set_irq_chip_and_handler(irq, type, handle_level_irq); 242 set_irq_chip_data(irq, data); 243 cpu_unmask_irq(irq); 244 }
··· 75 smp_send_all_nop(); 76 } 77 78 void cpu_ack_irq(unsigned int irq) 79 { 80 unsigned long mask = EIEM_MASK(irq); ··· 241 242 /* for iosapic interrupts */ 243 if (type) { 244 + set_irq_chip_and_handler(irq, type, handle_percpu_irq); 245 set_irq_chip_data(irq, data); 246 cpu_unmask_irq(irq); 247 }
-1
drivers/parisc/dino.c
··· 349 .name = "GSC-PCI", 350 .unmask = dino_unmask_irq, 351 .mask = dino_mask_irq, 352 - .ack = no_ack_irq, 353 }; 354 355
··· 349 .name = "GSC-PCI", 350 .unmask = dino_unmask_irq, 351 .mask = dino_mask_irq, 352 }; 353 354
+1 -2
drivers/parisc/eisa.c
··· 186 .name = "EISA", 187 .unmask = eisa_unmask_irq, 188 .mask = eisa_mask_irq, 189 - .ack = no_ack_irq, 190 }; 191 192 static irqreturn_t eisa_irq(int wax_irq, void *intr_dev) ··· 339 setup_irq(2, &irq2_action); 340 for (i = 0; i < 16; i++) { 341 set_irq_chip_and_handler(i, &eisa_interrupt_type, 342 - handle_level_irq); 343 } 344 345 EISA_bus = 1;
··· 186 .name = "EISA", 187 .unmask = eisa_unmask_irq, 188 .mask = eisa_mask_irq, 189 }; 190 191 static irqreturn_t eisa_irq(int wax_irq, void *intr_dev) ··· 340 setup_irq(2, &irq2_action); 341 for (i = 0; i < 16; i++) { 342 set_irq_chip_and_handler(i, &eisa_interrupt_type, 343 + handle_simple_irq); 344 } 345 346 EISA_bus = 1;
+1 -2
drivers/parisc/gsc.c
··· 143 .name = "GSC-ASIC", 144 .unmask = gsc_asic_unmask_irq, 145 .mask = gsc_asic_mask_irq, 146 - .ack = no_ack_irq, 147 }; 148 149 int gsc_assign_irq(struct irq_chip *type, void *data) ··· 152 if (irq > GSC_IRQ_MAX) 153 return NO_IRQ; 154 155 - set_irq_chip_and_handler(irq, type, handle_level_irq); 156 set_irq_chip_data(irq, data); 157 158 return irq++;
··· 143 .name = "GSC-ASIC", 144 .unmask = gsc_asic_unmask_irq, 145 .mask = gsc_asic_mask_irq, 146 }; 147 148 int gsc_assign_irq(struct irq_chip *type, void *data) ··· 153 if (irq > GSC_IRQ_MAX) 154 return NO_IRQ; 155 156 + set_irq_chip_and_handler(irq, type, handle_simple_irq); 157 set_irq_chip_data(irq, data); 158 159 return irq++;
+8
drivers/parisc/iosapic.c
··· 669 DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", irq, 670 vi->eoi_addr, vi->eoi_data); 671 iosapic_eoi(vi->eoi_addr, vi->eoi_data); 672 cpu_eoi_irq(irq); 673 } 674 ··· 712 .unmask = iosapic_unmask_irq, 713 .mask = iosapic_mask_irq, 714 .ack = cpu_ack_irq, 715 #ifdef CONFIG_SMP 716 .set_affinity = iosapic_set_affinity_irq, 717 #endif
··· 669 DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", irq, 670 vi->eoi_addr, vi->eoi_data); 671 iosapic_eoi(vi->eoi_addr, vi->eoi_data); 672 + } 673 + 674 + static void iosapic_eoi_irq(unsigned int irq) 675 + { 676 + struct vector_info *vi = get_irq_chip_data(irq); 677 + 678 + iosapic_eoi(vi->eoi_addr, vi->eoi_data); 679 cpu_eoi_irq(irq); 680 } 681 ··· 705 .unmask = iosapic_unmask_irq, 706 .mask = iosapic_mask_irq, 707 .ack = cpu_ack_irq, 708 + .eoi = iosapic_eoi_irq, 709 #ifdef CONFIG_SMP 710 .set_affinity = iosapic_set_affinity_irq, 711 #endif
+1 -2
drivers/parisc/superio.c
··· 323 .name = SUPERIO, 324 .unmask = superio_unmask_irq, 325 .mask = superio_mask_irq, 326 - .ack = no_ack_irq, 327 }; 328 329 #ifdef DEBUG_SUPERIO_INIT ··· 353 #endif 354 355 for (i = 0; i < 16; i++) { 356 - set_irq_chip_and_handler(i, &superio_interrupt_type, handle_level_irq); 357 } 358 359 /*
··· 323 .name = SUPERIO, 324 .unmask = superio_unmask_irq, 325 .mask = superio_mask_irq, 326 }; 327 328 #ifdef DEBUG_SUPERIO_INIT ··· 354 #endif 355 356 for (i = 0; i < 16; i++) { 357 + set_irq_chip_and_handler(i, &superio_interrupt_type, handle_simple_irq); 358 } 359 360 /*