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kernel
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linux
ARM: S5PC100: Clenaup map.h file
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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arch/arm/mach-s5pc100/include/mach/map.h
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arch/arm/mach-s5pc100/include/mach/map.h
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/* linux/arch/arm/mach-s5pc100/include/mach/map.h
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Copyright 2009 Samsung Electronics Co.
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* Byungho Min <bhmin@samsung.com>
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*
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#include <plat/map-base.h>
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#include <plat/map-s5p.h>
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/*
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* map-base.h has already defined virtual memory address
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* S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s)
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* S3C_VA_SYS S3C_ADDR(0x00100000) system control
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* S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used)
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* S3C_VA_TIMER S3C_ADDR(0x00300000) timer block
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* S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog
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* S3C_VA_UART S3C_ADDR(0x01000000) UART
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*
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* S5PC100 specific virtual memory address can be defined here
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* S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO
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*
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*/
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#define S5PC100_PA_SDRAM 0x20000000
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#define S5PC100_PA_ONENAND_BUF (0xB0000000)
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#define S5PC100_SZ_ONENAND_BUF (SZ_256M - SZ_32M)
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#define S5PC100_PA_ONENAND 0xE7100000
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#define S5PC100_PA_ONENAND_BUF 0xB0000000
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/* Chip ID */
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#define S5PC100_PA_CHIPID 0xE0000000
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#define S5PC100_PA_CHIPID (0xE0000000)
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#define S5P_PA_CHIPID S5PC100_PA_CHIPID
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#define S5PC100_PA_SYSCON 0xE0100000
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#define S5PC100_PA_SYSCON (0xE0100000)
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#define S5P_PA_SYSCON S5PC100_PA_SYSCON
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#define S5PC100_PA_OTHERS 0xE0200000
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#define S5PC100_PA_OTHERS (0xE0200000)
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#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
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#define S5PC100_PA_GPIO 0xE0300000
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#define S5PC100_PA_GPIO (0xE0300000)
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#define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000)
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#define S5PC100_PA_VIC0 0xE4000000
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#define S5PC100_PA_VIC1 0xE4100000
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#define S5PC100_PA_VIC2 0xE4200000
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/* Interrupt */
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#define S5PC100_PA_VIC0 (0xE4000000)
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#define S5PC100_PA_VIC1 (0xE4100000)
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#define S5PC100_PA_VIC2 (0xE4200000)
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#define S5PC100_VA_VIC S3C_VA_IRQ
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#define S5PC100_VA_VIC_OFFSET 0x10000
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#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
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#define S5PC100_PA_SROMC 0xE7000000
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#define S5PC100_PA_SROMC (0xE7000000)
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#define S5P_PA_SROMC S5PC100_PA_SROMC
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#define S5PC100_PA_CFCON 0xE7800000
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#define S5PC100_PA_ONENAND (0xE7100000)
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#define S5PC100_PA_MDMA 0xE8100000
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#define S5PC100_PA_PDMA0 0xE9000000
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#define S5PC100_PA_PDMA1 0xE9200000
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#define S5PC100_PA_CFCON (0xE7800000)
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#define S5PC100_PA_TIMER 0xEA000000
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#define S5PC100_PA_SYSTIMER 0xEA100000
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#define S5PC100_PA_WATCHDOG 0xEA200000
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#define S5PC100_PA_RTC 0xEA300000
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/* DMA */
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#define S5PC100_PA_MDMA (0xE8100000)
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#define S5PC100_PA_PDMA0 (0xE9000000)
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#define S5PC100_PA_PDMA1 (0xE9200000)
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#define S5PC100_PA_UART 0xEC000000
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/* Timer */
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#define S5PC100_PA_TIMER (0xEA000000)
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#define S5P_PA_TIMER S5PC100_PA_TIMER
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#define S5PC100_PA_IIC0 0xEC100000
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#define S5PC100_PA_IIC1 0xEC200000
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#define S5PC100_PA_SYSTIMER (0xEA100000)
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#define S5PC100_PA_SPI0 0xEC300000
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#define S5PC100_PA_SPI1 0xEC400000
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#define S5PC100_PA_SPI2 0xEC500000
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#define S5PC100_PA_WATCHDOG (0xEA200000)
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#define S5PC100_PA_RTC (0xEA300000)
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#define S5PC100_PA_USB_HSOTG 0xED200000
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#define S5PC100_PA_USB_HSPHY 0xED300000
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#define S5PC100_PA_UART (0xEC000000)
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#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
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#define S5P_PA_UART0 (S5PC100_PA_UART + 0x0)
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#define S5P_PA_UART1 (S5PC100_PA_UART + 0x400)
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#define S5P_PA_UART2 (S5PC100_PA_UART + 0x800)
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#define S5P_PA_UART3 (S5PC100_PA_UART + 0xC00)
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#define S5P_SZ_UART SZ_256
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#define S5PC100_PA_FB 0xEE000000
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#define S5PC100_PA_IIC0 (0xEC100000)
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#define S5PC100_PA_IIC1 (0xEC200000)
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#define S5PC100_PA_FIMC0 0xEE200000
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#define S5PC100_PA_FIMC1 0xEE300000
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#define S5PC100_PA_FIMC2 0xEE400000
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/* SPI */
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#define S5PC100_PA_SPI0 0xEC300000
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#define S5PC100_PA_SPI1 0xEC400000
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#define S5PC100_PA_SPI2 0xEC500000
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#define S5PC100_PA_I2S0 0xF2000000
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#define S5PC100_PA_I2S1 0xF2100000
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#define S5PC100_PA_I2S2 0xF2200000
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/* USB HS OTG */
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#define S5PC100_PA_USB_HSOTG (0xED200000)
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#define S5PC100_PA_USB_HSPHY (0xED300000)
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#define S5PC100_PA_AC97 0xF2300000
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#define S5PC100_PA_FB (0xEE000000)
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#define S5PC100_PA_PCM0 0xF2400000
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#define S5PC100_PA_PCM1 0xF2500000
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#define S5PC100_PA_FIMC0 (0xEE200000)
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#define S5PC100_PA_FIMC1 (0xEE300000)
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#define S5PC100_PA_FIMC2 (0xEE400000)
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#define S5PC100_PA_SPDIF 0xF2600000
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#define S5PC100_PA_I2S0 (0xF2000000)
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#define S5PC100_PA_I2S1 (0xF2100000)
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#define S5PC100_PA_I2S2 (0xF2200000)
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#define S5PC100_PA_TSADC 0xF3000000
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#define S5PC100_PA_AC97 0xF2300000
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#define S5PC100_PA_KEYPAD 0xF3100000
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/* PCM */
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#define S5PC100_PA_PCM0 0xF2400000
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#define S5PC100_PA_PCM1 0xF2500000
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/* Compatibiltiy Defines */
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#define S5PC100_PA_SPDIF 0xF2600000
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#define S3C_PA_FB S5PC100_PA_FB
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#define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0)
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#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1)
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#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2)
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#define S3C_PA_IIC S5PC100_PA_IIC0
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#define S3C_PA_IIC1 S5PC100_PA_IIC1
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#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
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#define S3C_PA_ONENAND S5PC100_PA_ONENAND
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#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF
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#define S3C_PA_RTC S5PC100_PA_RTC
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#define S3C_PA_TSADC S5PC100_PA_TSADC
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#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG
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#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY
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#define S3C_PA_WDT S5PC100_PA_WATCHDOG
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#define S5PC100_PA_TSADC (0xF3000000)
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#define S5P_PA_CHIPID S5PC100_PA_CHIPID
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#define S5P_PA_FIMC0 S5PC100_PA_FIMC0
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#define S5P_PA_FIMC1 S5PC100_PA_FIMC1
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#define S5P_PA_FIMC2 S5PC100_PA_FIMC2
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#define S5P_PA_SDRAM S5PC100_PA_SDRAM
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#define S5P_PA_SROMC S5PC100_PA_SROMC
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#define S5P_PA_SYSCON S5PC100_PA_SYSCON
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#define S5P_PA_TIMER S5PC100_PA_TIMER
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/* KEYPAD */
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#define S5PC100_PA_KEYPAD (0xF3100000)
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#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
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#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
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#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
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#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
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#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
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#define S5PC100_PA_SDRAM (0x20000000)
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#define S5P_PA_SDRAM S5PC100_PA_SDRAM
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#define S3C_SZ_ONENAND_BUF (SZ_256M - SZ_32M)
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/* compatibiltiy defines. */
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#define S3C_PA_UART S5PC100_PA_UART
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#define S3C_PA_IIC S5PC100_PA_IIC0
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#define S3C_PA_IIC1 S5PC100_PA_IIC1
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#define S3C_PA_FB S5PC100_PA_FB
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#define S3C_PA_G2D S5PC100_PA_G2D
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#define S3C_PA_G3D S5PC100_PA_G3D
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#define S3C_PA_JPEG S5PC100_PA_JPEG
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#define S3C_PA_ROTATOR S5PC100_PA_ROTATOR
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#define S5P_VA_VIC0 S5PC1XX_VA_VIC(0)
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#define S5P_VA_VIC1 S5PC1XX_VA_VIC(1)
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#define S5P_VA_VIC2 S5PC1XX_VA_VIC(2)
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#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG
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#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY
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#define S3C_PA_HSMMC0 S5PC100_PA_HSMMC(0)
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#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1)
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#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2)
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#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
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#define S3C_PA_WDT S5PC100_PA_WATCHDOG
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#define S3C_PA_TSADC S5PC100_PA_TSADC
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#define S3C_PA_ONENAND S5PC100_PA_ONENAND
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#define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF
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#define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF
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#define S3C_PA_RTC S5PC100_PA_RTC
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/* UART */
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#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
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#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
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#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
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#define S3C_PA_UART S5PC100_PA_UART
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#define S5P_PA_FIMC0 S5PC100_PA_FIMC0
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#define S5P_PA_FIMC1 S5PC100_PA_FIMC1
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#define S5P_PA_FIMC2 S5PC100_PA_FIMC2
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#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET))
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#define S5P_PA_UART0 S5P_PA_UART(0)
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#define S5P_PA_UART1 S5P_PA_UART(1)
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#define S5P_PA_UART2 S5P_PA_UART(2)
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#define S5P_PA_UART3 S5P_PA_UART(3)
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#endif /* __ASM_ARCH_C100_MAP_H */
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#define S5P_SZ_UART SZ_256
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#endif /* __ASM_ARCH_MAP_H */